BK889B PONT DE MESURE RLC DE TABLE AVEC INTERFACE USB - Farnell Element 14 - Revenir à l'accueil

 

 

Branding Farnell element14 (France)

 

Farnell Element 14 :

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Everything You Need To Know About Arduino

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Tutorial 01 for Arduino: Getting Acquainted with Arduino

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The Cube® 3D Printer

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What's easier- DIY Dentistry or our new our website features?

 

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Ben Heck's Getting Started with the BeagleBone Black Trailer

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Ben Heck's Home-Brew Solder Reflow Oven 2.0 Trailer

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Get Started with Pi Episode 3 - Online with Raspberry Pi

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Discover Simulink Promo -- Exclusive element14 Webinar

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Ben Heck's TV Proximity Sensor Trailer

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Ben Heck's PlayStation 4 Teardown Trailer

See the trailer for the next exciting episode of The Ben Heck show. Check back on Friday to be among the first to see the exclusive full show on element…

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Get Started with Pi Episode 4 - Your First Raspberry Pi Project

Connect your Raspberry Pi to a breadboard, download some code and create a push-button audio play project.

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Ben Heck Anti-Pickpocket Wallet Trailer

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Molex Earphones - The 14 Holiday Products of Newark element14 Promotion

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Tripp Lite Surge Protector - The 14 Holiday Products of Newark element14 Promotion

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Microchip ChipKIT Pi - The 14 Holiday Products of Newark element14 Promotion

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Beagle Bone Black - The 14 Holiday Products of Newark element14 Promotion

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3M E26, LED Lamps - The 14 Holiday Products of Newark element14 Promotion

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3M Colored Duct Tape - The 14 Holiday Products of Newark element14 Promotion

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Tenma Soldering Station - The 14 Holiday Products of Newark element14 Promotion

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Duratool Screwdriver Kit - The 14 Holiday Products of Newark element14 Promotion

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Cubify 3D Cube - The 14 Holiday Products of Newark element14 Promotion

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Bud Boardganizer - The 14 Holiday Products of Newark element14 Promotion

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Raspberry Pi Starter Kit - The 14 Holiday Products of Newark element14 Promotion

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Fluke 323 True-rms Clamp Meter - The 14 Holiday Products of Newark element14 Promotion

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Dymo RHINO 6000 Label Printer - The 14 Holiday Products of Newark element14 Promotion

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3M LED Advanced Lights A-19 - The 14 Holiday Products of Newark element14 Promotion

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Innovative LPS Resistor Features Very High Power Dissipation

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Charge Injection Evaluation Board for DG508B Multiplexer Demo

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Ben Heck The Great Glue Gun Trailer Part 2

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Introducing element14 TV

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Ben Heck Time to Meet Your Maker Trailer

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Détecteur de composants

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Recherche intégrée

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Ben Builds an Accessibility Guitar Trailer Part 1

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Ben Builds an Accessibility Guitar - Part 2 Trailer

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PiFace Control and Display Introduction

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Flashmob Farnell

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Express Yourself in 3D with Cube 3D Printers from Newark element14

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Farnell YouTube Channel Move

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Farnell: Design with the best

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French Farnell Quest

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Altera - 3 Ways to Quickly Adapt to Changing Ethernet Protocols

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Cy-Net3 Network Module

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MC AT - Professional and Precision Series Thin Film Chip Resistors

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Solderless LED Connector

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PSA-T Series Spectrum Analyser: PSA1301T/ PSA2701T

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3-axis Universal Motion Controller For Stepper Motor Drivers: TMC429

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Voltage Level Translation

Puce électronique / Microchip :

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Microchip - 8-bit Wireless Development Kit

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 2 of 3

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 3 of 3

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 1 of 3

Sans fil - Wireless :

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Microchip - 8-bit Wireless Development Kit

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Wireless Power Solutions - Wurth Electronics, Texas Instruments, CadSoft and element14

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Analog Devices - Remote Water Quality Monitoring via a Low Power, Wireless Network

Texas instrument :

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Texas Instruments - Automotive LED Headlights

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Texas Instruments - Digital Power Solutions

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Texas Instruments - Industrial Sensor Solutions

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Texas Instruments - Wireless Pen Input Demo (Mobile World Congress)

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Texas Instruments - Industrial Automation System Components

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Texas Instruments - TMS320C66x - Industry's first 10-GHz fixed/floating point DSP

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Texas Instruments - TMS320C66x KeyStone Multicore Architecture

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Texas Instruments - Industrial Interfaces

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Texas Instruments - Concerto™ MCUs - Connectivity without compromise

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Texas Instruments - Stellaris Robot Chronos

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Texas Instruments - DRV8412-C2-KIT, Brushed DC and Stepper Motor Control Kit

Ordinateurs :

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Ask Ben Heck - Connect Raspberry Pi to Car Computer

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Ben's Portable Raspberry Pi Computer Trailer

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Ben's Raspberry Pi Portable Computer Trailer 2

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Ben Heck's Pocket Computer Trailer

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Ask Ben Heck - Atari Computer

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Ask Ben Heck - Using Computer Monitors for External Displays

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Raspberry Pi Partnership with BBC Computer Literacy Project - Answers from co-founder Eben Upton

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Installing RaspBMC on your Raspberry Pi with the Farnell element14 Accessory kit

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Raspberry Pi Served - Joey Hudy

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Happy Birthday Raspberry Pi

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Raspberry Pi board B product overview

Logiciels :

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Ask Ben Heck - Best Opensource or Free CAD Software

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Tektronix FPGAView™ software makes debugging of FPGAs faster than ever!

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Ask Ben Heck - Best Open-Source Schematic Capture and PCB Layout Software

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Introduction to Cadsoft EAGLE PCB Design Software in Chinese

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Altera - Developing Software for Embedded Systems on FPGAs

Tutoriels :

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Ben Heck The Great Glue Gun Trailer Part 1

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the knode tutorial - element14

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Ben's Autodesk 123D Tutorial Trailer

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Ben's CadSoft EAGLE Tutorial Trailer

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Ben Heck's Soldering Tutorial Trailer

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Ben Heck's AVR Dev Board tutorial

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Ben Heck's Pinball Tutorial Trailer

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Ben Heck's Interface Tutorial Trailer

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First Stage with Python and PiFace Digital

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Cypress - Getting Started with PSoC® 3 - Part 2

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Energy Harvesting Challenge

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New Features of CadSoft EAGLE v6

Autres documentations :

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BK889B PONT DE MESURE RLC DE TABLE AVEC INTERFACE USB MANUEL D’UTILISATION RÉSUMÉ DES RÈGLES DE SÉCURITÉ GÉNÉRALITÉS – Les informations générales de sécurité données ici sont valables à la fois pour le personnel qui utilise l’appareil et pour le personnel de maintenance. TERMES – Dans ce manuel, l’indication ATTENTION identifie les conditions ou pratiques qui peuvent occasionner des dommages à l’équipement ou autres biens, et l’indication DANGER identifie les conditions ou pratiques qui peuvent occasionner des blessures ou présenter un risque vital pour le personnel. Ne pas passer outre les indications ATTENTION et DANGER avant d’avoir bien compris et rempli les conditions indiquées. FONCTIONNEMENT – Avant la mise sous tension, respecter les instructions d’installation et d’utilisation. MISE À LA TERRE – Cet appareil est mis à la terre par le conducteur de terre du câble d’alimentation. Ne pas détériorer cette connexion. En cas d’absence de protection par mise à la terre, toutes les parties conductrices accessibles (y compris les boutons et commandes) peuvent provoquer un choc électrique. ADDITIONNELLEMENT – Toute opération de réglage, maintenance ou réparation ne doit être effectuée que par un personnel qualifié. – Pour éviter les risques de dommages corporels, ne pas utiliser cet appareil avec le couvercle ou les panneaux démontés. – Utiliser uniquement des fusibles du type spécifié dans la liste des composants. Ne jamais utiliser des fusibles réparés ni court-circuiter les porte fusibles. – N’effectuer aucune modification non-autorisée de l’instrument. – Ne pas utiliser l’instrument en présence de gaz inflammables ou en atmosphère explosive. – Déconnecter le câble d’alimentation avant de démonter les panneaux de protection, de souder ou de remplacer des composants. – Ne pas entreprendre de manipulations ou réglages internes hors de la présence d’une personne capable de porter les premiers secours et de pratiquer une réanimation. Sommaire SOMMAIRE......................................................................................................................................................................................... 3 1. INTRODUCTION ...................................................................................................................................................................... 3 1.1 GENERAL................................................................................................................................................................................................................................3 1.2 PARAMÈTRES D’IMPÉDANCE .................................................................................................................................................................................................4 1.3 SPÉCIFICATIONS .....................................................................................................................................................................................................................5 1.4 ACCESSOIRES .......................................................................................................................................................................................................................12 2. UTILISATION.......................................................................................................................................................................... 13 2.1 DESCRIPTION........................................................................................................................................................................................................................13 2.2 MESURES..............................................................................................................................................................................................................................14 2.2.1 Calibration ouverte/fermée ..........................................................................................................................................................................................................................................14 2.2.2 Mode Relatif..................................................................................................................................................................................................................................................................14 2.2.3 Range Hold (maintien de la gamme) ...........................................................................................................................................................................................................................14 2.2.4 Mesure de la résistance continue.................................................................................................................................................................................................................................14 2.2.5 Mesure de l’impédance AC...........................................................................................................................................................................................................................................15 2.2.6 Mesure de la capacité ...................................................................................................................................................................................................................................................15 2.2.7 Mesure de l’inductance.................................................................................................................................................................................................................................................15 3. MODES................................................................................................................................................................................... 15 3.1 SYNTAXE DE LA COMMANDE DU MODE REMOTE MODE....................................................................................................................................................19 3.2 COMMANDES DU MODE REMOTE........................................................................................................................................................................................19 4. APPLICATION ........................................................................................................................................................................ 25 4.1 CONNEXION DES FILS DE MESURE .......................................................................................................................................................................................25 4.2 COMPENSATION OUVERTE/FERMÉE.....................................................................................................................................................................................27 4.3 CHOIX DU MODE SÉRIE OU PARALLÈLE ...............................................................................................................................................................................28 3 1. Introduction 1.1Général Le pont de mesure RLC de table avec interface USB BK889B est un instrument très précis utilisé pour mesurer les inductances, capacités et résistances avec une précision de base de 0.1%. Grâce à ses fonctions intégrées de mesures de tension/courant AC/DC et de vérifications de la continuité et de test diode, le BK889B ne permet pas seulement de comprendre les caractéristiques des composants électroniques, c’est aussi un outil essentiel pour tout usage en laboratoire. Le BK889B est par défaut en mode gammes automatiques. Cependant, il peut aussi être utilisé en gammes automatiques et manuelles en appuyant sur la touche Range Hold. Lorsque le mode mesure LCR est sélectionné, l’une des fréquences de test (100Hz, 120Hz, 1KHz, 10KHz, 100KHz ou 200KHz) peut être sélectionnée sur toutes les gammes applicables. L’une des tensions de test (50mVeff, 0.25Veff, 1Veff ou 1VDC) (DCR uniquement) peut aussi être sélectionnée sur toutes les gammes applicables. Le double affichage permet d’effectuer des mesures en simultané. Lorsque le mode mesure tension/courant DC/AC ou le mode Vérification de la continuité de la diode/audible est sélectionné, seul l’affichage secondaire sera utilisé pour afficher la mesure. Le BK889B peut effectuer virtuellement toutes les fonctions des ponts RLC de table. Grâce à sa précision de base de 0.1%, l’instrument économique peut remplacer un pont plus cher dans divers cas. De plus, avec une précision de base de 0.4% dans les mesures de tension et de courant, le BK889B possède les mêmes fonctions qu’un multimètre numérique, vous disposez ainsi de plusieurs instruments en un. Le BK889B peut servir à vérifier les valeurs ESR des condensateurs, régler et/ou sélectionner des composants, mesurer des composants banalisés et inconnus, puis mesurer la capacité, l’inductance ou la résistance des câbles, des commutateurs, des circuits imprimés, etc. Les caractéristiques principales sont les suivantes : 1. Mesures de la tension : · AC : True RMS, jusqu’à 600Veff @ 40~1 kHz · DC : jusqu’à 600V · Impédance d’entrée : 1M-Ohm 2. Mesures du courant : · AC : True RMS, jusqu’à 2Aeff @ 40~1 kHz · DC : jusqu’à 2A · Shunt du courant : 0.1 Ohm@>20mA ; 10Ohm @<20mA 3. Vérifications continuité Diode/Audible : · Tension en circuit ouvert : 5Vdc · Courant de court-circuit : 2.5mA · Buzzer activé : < 25 · Buzzer désactivé : > 50 4. Mesures LCR : · Conditions de test · Fréquence : 100Hz/120Hz/ 1KHz/ 100KHz / 200KHz · Niveau : 1Veff/0.25Veff/50mVeff/1VDC (DCR uniquement) · Paramètres de mesure : Z, Ls, Lp, Cs, Cp, DCR, ESR, D, Q et θ · Précision de base : 0.1% · Double affichage LCD · Gamme automatique ou gamme Hold · Interface USB · Calibration ouverte/fermée · Affichage principal des paramètres : · Z : Impédance alternative · DCR : Résistance continue · Ls : Inductance série · Lp : Inductance parallèle · Cs : Capacité série · Cp : Capacité parallèle · Affichage secondaire · θ: Angle de phase · ESR : Résistance série équivalente · D : Facteur de dissipation · Q : Facteur de qualité · Combinaisons d’affichage : · Mode Série : Z-θ, Cs – Q, Cs – ESR, Ls – D, Ls – Q, Ls – ESR Mode Parallèle : Cp – D, Cp – Q, Lp – D, Lp – Q 4 1.2 Paramètres d’impédance A cause des différents signaux de test sur l’instrument de mesure d’impédance, il y a l’impédance DC et l’impédance AC. Le multimètre numérique classique peut uniquement mesurer l'impédance DC mais le BK889B peut mesurer les deux. Il est très important de comprendre les paramètres d’impédance des composants électroniques. Lorsque nous analysons l’impédance avec le plan de mesure d’impédance (figure 1.1), elle peut être visualisée par un élément réel sur l’axe X et un élément imaginaire sur l’axe Y. Le plan de mesure d’impédance peut aussi être perçu comme des coordonnées polaires. Le Z représente la magnitude et le θ est la phase de l’impédance. ( ) ( ) ( ) ( ) (Ohm ) Reactance Resistance Impedance W = = = = = = - = = + = + = Ð W         S S X R Z Rs X s X s Z Sin Tan Rs Z Cos Z Rs X s Z Rs jX s Z 1 2 2 q q q q Il existe deux types de réactance : Inductive (XL) et Capacitive (XC) pouvant être définies de la manière suivante : Il y a aussi le facteur de Qualité (Q) et le facteur de Dissipation (D) qui doivent être traités. Le facteur Qualité sert de mesure de la pureté de la réactance pour le composant. En réalité, il y a toujours une résistance associée qui dissipe la puissance en augmentant la quantité d’énergie qui peut être récupérée. Le facteur Qualité peut être défini comme le rapport énergie stockée (réactance)/énergie dissipée (résistance). Q sert généralement pour les inductances et D pour les condensateurs. X s R s Z (R s , X s ) Z q Axe imaginaire Axe réel Figure 1.1 C fC XC X L L fL w p w p 2 1 1 2 = = = = C p R p L p R p X p R p G B Rs C s Rs Ls Rs X s D Q w w w w d = = = = = = = = = 1 tan 1 1 L = Inductance (H) C = Capacité (F) f = Fréquence (Hz) 5 Il existe deux types de circuits : le mode série et le mode parallèle. Regarder la figure 1.2 pour découvrir la relation des modes série et parallèle. 1.3 Spécifications  Gamme de mesure: Paramètre Gamme Z 0.000 W à 500.0 MW L 0.030 μH à 9999 H C 0.003 pF à 80.00 mF DCR 0.000 W à 500.0 MW ESR 0.000 W à 9999 W D 0.000 à 9999 Q 0.000 à 9999 θ -180.0 ° à 180.0 ° Mesure de tension/courant V 0.0 mV à +/- 600 V A 0.000 mA à +/- 2 A  Précision (Ae): 1. Mesure de la tension continue : Gamme : 2V, 20V, 200V et 600V Résolution : 1mV, 10mV, 100mV et 1V Précision :+/- (0.4% + 3 digits) Impédance d’entrée : 1M-Ohm 2. Mesure de la tension alternative (True RMS) Gamme : 2V, 20V, 200V et 600V Résolution : 1mV, 10mV, 100mV et 1V Précision :+/- (0.8% + 5 digits) Impédance d’entrée : 1M-Ohm 3. Mesure du courant continu : Gamme : 2mA, 20mA, 200mA et 2000mA Résolution : 1μA, 10μA, 100μA et 1μA Précision :+/- (0.4% + 3 digits) Shunt du courant : 0.1 Ohm @ >20mA, 10 Ohm @ £20mA 4. Mesure du courant alternatif (True RMS) Gamme : 2mA, 20mA, 200mA et 2000mA Résolution : 1μA, 10μA, 100μA et 1μA Précision :+/- (0.8% + 5 digits) Shunt du courant : 0.1 Ohm @ >20mA, 10 Ohm @ £20mA Figure 1.2 Les composants réels et imaginaires sont en série Z = Rs + jXs Rs jXs Les composants réels et imaginaires sont en parallèle G=1/Rp jB=1/jXp Y =G+ jB jXp Rp jXP 1 RP 1 Y = + 6 Note : La précision des mesures de tension/courant DC/AC s’applique uniquement sur 5%-10% de la gamme 5. Mesure LCR: Précision Z (Ae) : |Zx| Freq. 20M ~ 10M (W) 10M ~ 1M (W) 1M ~ 100K (W) 100K ~ 10K (W) 10K ~ 1K (W) 1K ~ 100 (W) 100 ~ 1 (W) 1 ~ 0.1 (W) DCR 0.1% ±1 0.2% ±1 100Hz 120Hz 1KHz 2% ±1  1% ±1 10KHz 5% ±1  2% ±1 0.5% ±1 0.2% ±1 0.5% ±1 1% ±1  100KHz 200KHz  NA 5% ±1 2% ±1 1% ±1 0.4% ±1 1% ±1 2% ±1 5% ±1 Note: 1. La précision s’applique lorsque le niveau de test est à 1Veff 2. Ae multiplie 1,25 lorsque le niveau de test est à 250mVeff 3. Ae multiplie 1,50 lorsque le niveau de test est à 50mVeff 4. Lorsque l’on mesure L et C, multiplier Ae par 1+Dx2 si Dx>0.1  : Ae s’applique uniquement lorsque le niveau de test est à 1Vrms. Précision C : 79.57pF | 159.1pF 159.1pF | 1.591nF 1.591nF | 15.91nF 15.91nF | 159.1uF 159.1nF | 1.591uF 1.591uF | 15.91uF 15.91uF | 1591uF 1591uF | 100Hz 15.91mF 2% ± 1  1% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  66.31pF | 132.6pF 132.6pF | 1.326nF 1.326nF | 13.26nF 13.26nF | 132.6nF 132.6nF | 1.326uF 1.326uF | 13.26uF 13.26uF | 1326uF 1326uF | 120Hz 13.26mF 2% ± 1  1% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  7.957pF | 15.91pF 15.91pF | 159.1pF 159.1pF | 1.591nF 1.591nF | 15.91nF 15.91nF | 159.1nF 159.1nF | 1.591uF 1.591uF | 159.1uF 159.1uF | 1KHz 1.591mF 2% ± 1  1% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  10KHz 0.795pF | 1.591pF 1.591pF | 15.91pF 15.91pF | 159.1pF 159.1pF | 1.591nF 1.591nF | 15.91nF 15.91nF | 159.1nF 159.1nF | 15.91uF 15.91uF | 159.1uF 7 5% ± 1  2% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  NA 0.159pF | 1.591pF 1.591pF | 15.91pF 15.91pF | 159.1pF 159.1pF | 1.591nF 1.591nF | 15.91nF 15.91nF | 1.591uF 1.591uF | 15.91uF 100KHz  NA 5% ± 1 2%± 1 1%± 1 0.4%± 1 1%± 1 2%± 1 5% ± 1 NA 0.079pF | 0.795pF 0.795pF | 7.957pF 7.957pF | 79.57pF 79.57pF | 795.7pF 795.7pF | 7.957nF 7.957nF | 795.7nF 795.7nF | 7.957uF 200KHz  NA 5% ± 1 2%± 1 1%± 1 0.4%± 1 1%± 1 2%± 1 5% ± 1 Précision L: 31.83KH | 15.91KH 15.91KH | 1591H 1591H | 159.1H 159.1H | 15.91H 15.91H | 1.591H 1.591H | 159.1mH 159.1mH | 1.591mH 1.591mH | 100Hz 159.1uH 2% ± 1  1% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  26.52KH | 13.26KH 13.26KH | 1326H 1326H | 132.6H 132.6H | 13.26H 13.26H | 1.326H 1.326H | 132.6mH 132.6mH | 1.326mH 1.326mH | 120Hz 132.6uH 2% ± 1  1% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  3.183KH | 1.591KH 1.591KH | 159.1H 159.1H | 15.91H 15.91H | 1.591H 1.591H | 159.1mH 159.1mH | 15.91mH 15.91mH | 159.1uH 159.1uH | 1KHz 15.91uH 2% ± 1  1% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  318.3H | 159.1H 159.1H | 15.91H 15.91H | 1.591H 1.591H | 159.1mH 159.1mH | 15.91mH 15.91mH | 1.591mH 1.591mH | 15.91uH 15.91uH | 10KHz 1.591uH 5% ± 1  2% ± 1 0.5% ± 1 0.2% ± 1 0.1% ± 1 0.2% ± 1 0.5% ± 1 1% ± 1  31.83H | 15.91H 15.91H | 1.591H 1.591H | 159.1mH 159.1mH | 15.91mH 15.91mH | 1.591mH 1.591mH | 159.1uH 159.1uH | 1.591uH 1.591uH | 0.159uH 100KHz  NA 5% ± 1 2%± 1 1% ± 1 0.4% ± 1 1% ± 1 2%± 1 5% ± 1 15.91H | 7.957H 7.957H | 795.7mH 795.7mH | 79.57mH 79.57mH | 7.957mH 7.957mH | 795.7uH 795.7uH | 79.57uH 79.57uH | 0.795uH 0.795uH | 0.079uH 200KHz  NA 5% ± 1 2%± 1 1% ± 1 0.4% ± 1 1% ± 1 2%± 1 5% ± 1 Précision D: 8 |Zx| Freq. 20M ~ 10M (W) 10M ~ 1M (W) 1M ~ 100K (W) 100K ~ 10K (W) 10K ~ 1K (W) 1K ~ 100 (W) 100 ~ 1 (W) 1 ~ 0.1 (W) 100Hz ±0.002 ±0.002 120Hz 1KHz ±0.020  ±0.010 10KHz ±0.050  ±0.020 ±0.005 ±0.002 ±0.005 ±0.010  100KHz 200KHz  NA ±0.050 ±0.020 ±0.010 ±0.004 ±0.010 ±0.020 ±0.050 Précision q: |Zx| Freq. 20M ~ 10M (W) 10M ~ 1M (W) 1M ~ 100K (W) 100K ~ 10K (W) 10K ~ 1K (W) 1K ~ 100 (W) 100 ~ 1 (W) 1 ~ 0.1 (W) 100Hz ±0.105 ±0.105 120Hz 1KHz ±1.046  ±0.523 10KHz ±2.615  ±1.046 ±0.261 ±0.105 ±0.261 ±0.523  100KHz 200KHz  NA ±2.615 ±1.046 ±0.409 ±0.209 ±0.409 ±1.046 ±2.615 Précision Z: Voir tableau 1. Précision C: f Cx Zx × × × = 2 p 1 CAe = Ae of C f : Fréquence de test (Hz) Cx : Valeur de capacité mesurée (F) |Zx| : Valeur d’impédance mesurée () La précision s’applique lorsque Dx (valeur D mesurée) < 0.1 Lorsque Dx>0.1, multiplier CAe par 1 + Dx2 Exemple : Condition de test : Fréquence : 1KHz Niveau : 1Veff DUT : 100nF Donc 9 - = W × × × × = × × × = 1590 2 103 100 10 9 1 2 1 p p f Cx Zx Lire le tableau de précision, obtenir CAe=±0.1% Précision L: Zx = 2 ×p × f × Lx LAe = Ae of L f : Fréquence de test (Hz) Lx : Valeur d’inductance mesurée (F) |Zx| : Valeur d’impédance mesurée () La précision s’applique lorsque Dx (valeur D mesurée) < 0.1 Lorsque Dx>0.1, multiplier LAe par 1 + Dx2 Exemple : Condition de test : Fréquence : 1KHz Niveau : 1Veff DUT : 1mH Donc = × × × - = W = × × × 2 10 3 10 3 6.283 2 p Zx p f Lx Lire le tableau de précision, obtenir LAe = ±0.5% Précision ESR: 100 Ae ESRAe = ±Xx × f Cx Xx f Lx × × × = × × × = p p 2 1 2 ESRAe = Ae de ESR f :Fréquence de test (Hz) Xx :Valeur de réactance mesurée () Lx :Valeur d’inductance mesurée (H) Cx : Valeur de capacité mesurée (F) La précision s’applique lorsque Dx (valeur D mesurée) £ 0.1 Exemple: Condition de test : Fréquence : 1KHz Niveau : 1Veff DUT : 100nF Donc - = W × × × × = × × × = 1590 2 10 3 100 10 9 1 2 1 p p f Cx Zx Lire le tableau de précision, obtenir CAe=±0.1%, 10 = ± × = ±1.59W 100 Ae ESR Ae Xx Précision D: 100 Ae D Ae = ± DAe = Ae de D La précision s’applique lorsque Dx (valeur D mesurée) £ 0.1 Lorsque Dx > 0.1, multiplier Dx par (1+Dx) Exemple : Condition de test : Fréquence : 1KHz Niveau : 1Veff DUT : 100nF Donc - = W × × × × = × × × = 1590 2 10 3 100 10 9 1 2 1 p p f Cx Zx Lire le tableau de précision, obtenir CAe=±0.1%, 0.002 100 = ± × = ± Ae D Ae Précision Q: Qx De Qx De Ae Q × = ± × 1 m 2 QAe = Ae de Q Qx : Valeur du facteur Qualité mesuré De : Valeur de précision relative La précision s’applique lorsque Qx × De < 1 Exemple : Condition de test : Fréquence : 1KHz Niveau : 1Veff DUT : 1mH Donc = × × × - = W = × × × 2 10 3 10 3 6.283 2 p Zx p f Lx Lire le tableau de précision, obtenir LAe=±0.5%, 0.005 100 = ± × = ± Ae De Si Qx = 20 Donc 11 1 0.1 2 1 2 m m = ± × = ± × Qx De Qx De Q Ae Précision θ: 100 Ae π 180 = × Ae q Exemple : Condition de test : Fréquence : 1KHz Niveau : 1Veff DUT : 100nF Donc - = W × × × × = × × × = 1590 2 10 3 100 10 9 1 2 1 p p f Cx Zx Lire le tableau de précision, obtenir ZAe=±0.1%, 0 .057 deg 100 180 0 .1 100 180 = ± × = ± = ± × p p q Ae Ae  Signal de test : Précision du niveau : + 10% Précision de la fréquence : 0.1%  Impédance de sortie : 100W ± 5%  Température : 0°C à 40°C (Utilisation) -20°C à 70°C (Stockage) Humidité relative : Jusqu’à 85% Puissance AC : 110/220V, 60/50Hz Dimensions : 300mm x 220mm x 150mm Masse : 4500g Attention Lorsque le mode de mesure RLC est sélectionné, les facteurs suivants doivent être pris en compte. Fréquence de test : elle peut être choisie et modifiée par l’utilisateur. En général, un signal de test de 1KHz ou plus élevé sert à mesurer les condensateurs qui sont de 0.01μF ou moins, et un signal de test de 120Hz sert pour les condensateurs de 10 μF ou plus. Un signal de test de 1KHz ou plus sert à mesurer les inductances utilisés dans les circuits audio et RF (fréquence radio). C’est parce que ces types d’inductances fonctionnent à de hautes fréquences et exigent d’être mesurés à haute fréquence. En général, les inductances inférieures à 2mH devraient être mesurées à la fréquence de test de 1KHz ou plus, et les inductances supérieures à 200H devraient être mesurées à 120Hz ou moins. Il est recommandé de vérifier la feuille des données du composant pour déterminer la meilleure fréquence de test. Condensateurs chargés : Toujours décharger un condensateur avant d’effectuer des mesures car cela pourrait endommager l’instrument. 12 Effet de D sur la précision A: diminuer la mesure D (Facteur de dissipation) est désirable. Les condensateurs électrolytiques possèdent un facteur de dissipation élevé dû à leur perte normalement élevée. Si D (facteur de dissipation) est trop élevé, la précision de la mesure de capacité peut se dégrader. Il est recommandé de vérifier la feuille des données du composant pour déterminer la valeur D souhaitable du composant. Capacité de mesure des câbles, commutateurs ou autres éléments : mesurer la capacité des câbles coaxiaux est très utile pour déterminer la longueur du câble. La majorité des spécifications donnant la capacité/unité de longueur de câble, c’est pour cela que la longueur du câble peut être déterminée en mesurant la capacité de ce câble. Par exemple : les spécifications exigent un certain câble pour avoir une capacité de 10pF par pied. Après avoir mesuré le câble, la valeur de capacité qui s’affiche est 1.000nF. Diviser 1000pF (1.000nF) par 10pF par pied donne une longueur du câble d’environ 100 pieds. Même si les spécifications sont inconnues, la capacité d’une longueur mesuré du câble (comme 10 pieds) peut être utilisée pour déterminer la capacité/pied. Ne pas utiliser une longueur trop courte car toute erreur sur les calculs de la longueur totale est proportionnelle. Mesures série ou Parallèle (pour inductances) : le mode série affiche la mesure la plus précise dans tous les cas. Le mode série équivalent est essentiel pour obtenir une mesure Q précise de faibles inductances. Là où le risque de pertes sont plus importantes, le mode série équivalent est préférable. Cependant, il existe des cas où le mode parallèle équivalent est le plus approprié. Pour le fonctionnement des inductances en fer (hautes fréquences) où l’hystérésis et les courants de Foucault deviennent important, la mesure en mode parallèle équivalent est préférable. 1.4Accessoires · Un manuel d’utilisation · Un cordon d’alimentation AC · Une pince Kelvin · Un câble de mesure pour multimètre numérique 13 2. Utilisation 2.1 Description 1. Affichage du paramètre primaire 2. Affichage du paramètre secondaire 3. Touche Fonction L/C/Z/DCR 4. Touche Fonction DCA/ACA 5. Touche Fréquence de mesure 6. Borne LCUR 7. Touche Niveau de mesure 8. Touche Range Hold (maintenir la gamme) 9. Référence du modèle 10. Borne LPOT 11. Touche Fonction D/Q/θ/ESR 12. Borne HPOT 13. Touche Calibration ouverte 14. Touche Fonction DCV/ACV 15. Touche Relatif 16. Borne HCUR 17. Touche Calibration 18. Touche Fonction Diode/Continuité 19. Touche Fonction à distance 21. Marche/Arrêt 23. Puissance AC 25. Borne A 20. Borne COM 22. Borne V/Diode/Continuité 24. Port USB 26. Fusible 2A 14 2.2 Mesures 2.2.1 Calibration circuit ouvert/court-circuit Le BK889B effectue des calibrations circuit ouvert/court-circuit qui permettent à l’utilisateur d’obtenir plus de précision pour mesurer une impédance haute ou basse. Nous vous recommandons d’effectuer ce type de calibration si le niveau ou la fréquence de test a été modifiée.  Calibration en circuit ouvert Les bornes de mesure étant à l’état circuit ouvert, appuyer sur la touche Open puis l’écran suivant apparaît: Cette calibration dure environ 15 secondes. Une fois la calibration terminée, le BK889B émettra un bip pour indiquer la fin de la calibration.  Calibration en court-circuit Pour effectuer une calibration en court-circuit, insérer un court-circuit sur les bornes de mesure. Appuyer sur Short puis l’écran suivant s’affiche: Cette calibration dure environ 15 secondes. Une fois la calibration terminée, le BK889B émettra un bip pour indiquer la fin de la calibration. 2.2.2 Mode Relatif Le mode relatif permet de trier rapidement les composants. Insérer le composant de la valeur de référence pour lire la valeur standard. (Environ 5 secondes pour une lecture stable.) Puis appuyer sur Relative , l’affichage principal se remettra à zéro. Retirer le composant de la valeur de référence et insérer un composant inconnu, l’écran indiquera la valeur qui représente la différence entre la valeur de référence et la valeur inconnue. 2.2.3 Range Hold (maintien de la gamme) Pour mettre l’appareil sur Range Hold, insérer un composant de référence sur cette gamme de mesure. (Environ 5 secondes pour une lecture stable.) Puis appuyer sur Range Hold , cela maintiendra la gamme de 0.5 à 2 fois la gamme de mesure du courant. Lorsque l’on appuie sur Range Hold , l’écran suivant s’affiche: 2.2.4 Mesure de la résistance continue La mesure de la résistance continue permet de mesurer la résistance d’un composant inconnu sous 1VDC. Appuyer sur L/C/Z/DCR pour sélectionner la mesure DCR. L’écran affiche: 15 2.2.5 Mesure de l’impédance AC (Z) La mesure de l‘impédance AC permet de mesurer le Z d’un appareil inconnu. Appuyer sur L/C/Z/DCR pour sélectionner la mesure Z. L’écran affiche: Le niveau et la fréquence de test peuvent être sélectionnés en appuyant sur Level et Freq. 2.2.6 Mesure de la capacité Pour mesurer la capacité d’un composant, appuyer sur L/C/Z/DCR pour sélectionner le mode de mesure Cs (Mode Série) ou Cp (Mode Parallèle). Si le mode série (Cs) est sélectionné, le D, Q et ESR s’affichent sur l’afficheur secondaire. Si le mode Parallèle (Cp) est sélectionné, seuls le D et Q s’affichent sur l’afficheur secondaire. Voici des exemples de mesures de capacité : Le niveau et la fréquence de test peuvent être sélectionnés en appuyant sur Level et Freq. 2.2.7 Mesure de l’inductance Appuyer sur L/C/Z/DCR pour sélectionner le mode Ls ou Lp pour mesurer l’inductance en mode série ou en mode parallèle. Si le mode série (Ls) est sélectionné, le D, Q et ESR s’affichent sur l’afficheur secondaire. Si le mode Parallèle (Lp) est sélectionné, seuls le D et Q s’affichent sur l’afficheur secondaire. Voici des exemples de mesures d’inductance : Le niveau et la fréquence de test peuvent être sélectionnés en appuyant sur Level et Freq. 3. Modes Le BK889B possède quatre modes de fonctionnement : Normal, Binning , Remote et Remote Binning. En appuyant sur Remote , l’utilisateur peut sélectionner l’un des 4 modes ci-dessus.  Mode Normal: 16 Le mode Normal est le mode par défaut. C’est un mode local qui fait que le BK889B est piloté par le clavier et les résultats seront envoyés à l’afficheur et au PC équipé d’un port USB.  Mode Binning: Le mode Binning est réservé au prochain usage (comme GPIB). Il est réglé pour fonctionner de la même façon que le mode Normal qui reçoit des commandes depuis le clavier et qui envoie les résultats à l’afficheur et au PC équipé d’un port USB.  Mode Remote Binning: En mode Remote Binning, le “RMT Bin” sur l’écran s’allumera, le fonctionnement du BK889B est piloté par un PC équipé d’un port USB ou par une borne, les résultats seront envoyés à l’afficheur local et au poste de travail via le port USB. Dans ce mode, toutes les touches sauf Remote sont verrouillées. Le mode Remote Binning permet une meilleure et plus rapide utilisation les programmes d’application. L’utilisateur peut créer un serveur ou un pilote (n’importe quel composant de logiciel peut effectuer la tâche d’un serveur) avec l’interface Graphic, le modèle de réseau OSI, et le puissant interprète intégré à l’afficheur Graphique du support, la connectivité du réseau, les interprétations de la commande de structure (SCPI, IEEE488 etc.) et fera un pont entre le programme d’application de haut niveau comme VB, VISUAL C++, EXCEL, ACCESS etc. et le BK889B. Voir la figure suivante : Le protocole de communication entre le BK889B et un PC équipé d’un port USB se décrit de la manière suivante : 1. Les commandes qui seront envoyées d’un PC à distance à un BK889B sont utilisées pour paramétrer la machine sur un mode de mesure sélectionné. La syntaxe de la commande est: MOD current-state-code Elle commence toujours par MOD suivi par un espace puis par le code d’état actuel. Le code d’état actuel qui est défini dans le tableau ci-dessous fait 3 octets (24 bits), bit-23, 22, 21… bit-0, où bit-23 est le MSB et bit-0 est le LSB. Position du bit LCR DC/AC V/A Bit 2 – Bit 0 (freq test) Réservé 000 100 Hz 001 120 Hz 010 1K Hz 011 10K Hz 100 100K Hz Modèle BK889B Serveur: COM, DCOM, ATL, CONTROL, AUTOMATION EXE Intégrés: Graphic interface, Réseau OSI, et/ou puissant Interprète ou Analyseur VB, VISUAL C++, EXCEL, ACCESS etc. 17 101 200K Hz 110 Réservé 111 Réservé Bit 4 – Bit 3 (niveau test) Réservé 00 50 mVeff 01 250 mVeff 10 1 Veff 11 Réservé Bit 5 Réservé 0 Défaut Défaut 1 Réservé Réservé Bit 6 0 Relatif Relatif 1 Normal Normal Bit 7 0 Calibration Calibration 1 Normal Normal Bit 10 – Bit 8 Réservé 000 Lp 001 Ls 010 Cp 011 Cs 100 Z 101 DCR 110 Réservé 111 Réservé Bit 12 – Bit 11 Réservé 00 D 01 Q 10 DEG 11 ESR Bit 16 – Bit 13 0000 RH nH Réservé 0001 RH uH RH mV, mA 0010 RH mH RH V, A 0011 RH H Réservé 0100 RH pF 0101 RH nF 0110 RH uF 0111 RH mF 1000 RH F 1001 RH Ohm 1010 RH K-Ohm 1011 RH M-Ohm 1100 Réservé 1101 1110 1111 Gamme automatique Gamme automatique Bit 17 0 Calibration court-circuit Calibration court-circuit 1 Calibration circuit ouvert Réservé 18 Bit 21 – Bit 18 Modes de mesure 0000 Réservé 0001 LCR 0010 DCV 0011 ACV 0100 Diode 0101 Continuité 0110 DCA 0111 ACA Autres Réservé Bit 23 – Bit 22 Réservé 00 01 10 11 Par exemple : si la fonction LCR, Cp en mode mesure D est sélectionné en gamme automatique en calibration relative ouverte/fermée sont désactivés et le signal du test est à 1 Veff dans 1KHz, la commande est la suivante : MOD 000001111110001011010010 2. Les résultats qui seront envoyés du BK889B au PC à distance seront empaquetés dans un format de 7 octets ou de 11 octets. Lorsque les données doubles (comme Cp avec D) seront envoyées, les données seront empaquetées dans un format de 11 octets comme indiqué ci-dessous: Lead_code1 : 02 Lead_code2 : 09 Data_code : mesure 8 octets; deux formats de nombre de points instables de 32 bits ; les 4 premiers octets sont la mesure principale (Cp) et la deuxième série de 4 octets représentent la mesure secondaire (D) Checksum : -((02+09+data_code) && 0x00FF) 02 09 M-B0 M-B1 M-B2 M-B3 S-B0 S-B1 S-B2 S-B3 CS Où M-Bx et S-Bx sont la mesure principale et secondaire. Lorsque seule la mesure principale (comme DCR) est envoyée, les données sont empaquetées dans un format de 7 octets décrits ci-dessous: Lead_code1 : 02 Lead_code2 : 03 Data_code : mesure 4 octets Checksum : -((02+03+data_code) && 0x00FF) 02 03 M-B0 M-B1 M-B2 M-B3 CS Lorsque seule la mesure secondaire (comme DCV) est envoyée, les données sont empaquetées dans un format de 11 octets décrits ci-dessous: Lead_code1 : 02 Lead_code2 : 09 Data_code : mesure 8 octets Checksum : -((02+09+data_code) && 0x00FF) 02 09 S-B0 S-B1 S-B2 S-B3 S-B0 S-B1 S-B2 S-B3 CS 19  Mode Remote: En mode Remote, le “RMT” sur l’écran s’allumera et le BK889B pourra communiquer avec le PC équipé d’une interface USB ou une borne via le port USB. Voici le paramétrage de la connexion : Mode Transmission : Semi-duplex Vitesse de transmission : 9600 Parité : Aucune Bits de données : 8 Stop : 1 Liaison : Aucune Dans ce mode, l’écran et toutes les touches sauf Remote seront verrouillés. Le programme externe pilote le BK889B via le port USB. 3.1 Syntaxe de la commande du Mode Remote La syntaxe de la commande est la suivante: COMMAND(?) (PARAMETER) Le format de COMMAND et PARAMETER est le suivant: 1. Il y a au moins un espace entre COMMAND et PARAMETER. 2. Le PARAMETER doit uniquement utiliser la chaîne ASCII pas le code numérique. 3. Le paramètre de la valeur peut être un entier, instable ou exposant avec l’unité. Par exemple : 50mV 0.05V 5.0e1mV 4. Le point d’interrogation (?) à la fin de COMMAND représente une demande ou une commande de mesure. Par exemple : “CpD” fixe le mode de mesure sur Cp et D. “CpD?” fixe le mode de mesure sur Cp et D, mesure les valeurs et les renvoie. 5. COMMAND et PARAMETER peuvent être soit en majuscule soit en minuscule. Mais pour décrire la valeur dans le PARAMETER, il devrait y avoir une différence entre milli (m) et méga (M). Par exemple: 1mV équivaut à 0.001V. 1MV équivaut à 1000000V. 6. Le caractère à la “fin de la commande” doit être placé à la fin: ASCII CR (0DH) ou ASCII LF (0AH) 3.2 Commandes du Mode Remote Commande de paramétrage (ou de demande) de la mesure Le paramétrage suivant et les commandes de demande sont pris en charge par le BK889B. Lorsque la commande de paramétrage du mode de mesure est entrée, le BK889B renvoie “OK” lorsque le paramétrage est terminé. Lorsque la commande de demande est entrée, le BK889B revoie les valeurs de mesure.  DCR(?) Paramétrage ou commande de demande du mode de mesure de la résistance continue.  CpRp(?) Paramétrage ou commande de demande du mode de mesure de la capacité parallèle et de la résistance parallèle.  CpQ(?) Paramétrage ou commande de demande du mode de mesure de la capacité parallèle et du facteur de qualité.  CpD(?) Paramétrage ou commande de demande du mode de mesure de la capacité parallèle et du facteur de dissipation.  CsRs(?) Paramétrage ou commande de demande du mode de mesure de la capacité série et de la 20 résistance série.  CsQ(?) Paramétrage ou commande de demande du mode de mesure de la capacité série et du facteur de qualité.  CsD(?) Paramétrage ou commande de demande du mode de mesure de la capacité série et du facteur de dissipation.  LpRp(?) Paramétrage ou commande de demande du mode de mesure de la résistance parallèle et de l’inductance parallèle.  LpQ(?) Paramétrage ou commande de demande du mode de mesure de l’inductance parallèle et du facteur de qualité.  LpD(?) Paramétrage ou commande de demande du mode de mesure de l’inductance parallèle et du facteur de dissipation.  LsRs(?) Paramétrage ou commande de demande du mode de mesure de l’inductance série et la résistance série.  LsQ(?) Paramétrage ou commande de demande du mode de mesure de l’inductance série et le facteur de qualité.  LsD(?) Paramétrage ou commande de demande du mode de mesure de l’inductance série et du facteur de dissipation.  RsXs(?) Paramétrage ou commande de demande du mode de mesure de l’inductance série et la réactance série.  RpXp(?) Paramétrage ou commande de demande du mode de mesure de la résistance parallèle et de la réactance parallèle.  ZTD(?) Paramétrage ou commande de demande du mode de mesure de l’impédance et de l’angle (Deg).  ZTR(?) Paramétrage ou commande de demande du mode de mesure de l’impédance et de l’angle (Rad).  DCV(?) Paramétrage ou commande de demande du mode de mesure de la tension continue.  ACV(?) Paramétrage ou commande de demande du mode de mesure de la tension alternative.  DCA(?) Paramétrage ou commande de demande du mode de mesure du courant continu.  ACA(?) Paramétrage ou commande de demande du mode de mesure du courant alternatif. Exemple: CPD (sur Cp- mode D) OK CPD? 0.22724 0.12840 (retour des valeurs) DCR? 5.1029 (retour de la valeur) *IDN? Demande l’identité du BK889B. Cette commande sert à identifier les informations de base du BK889B. La valeur retournée a quatre champs séparés par une virgule (,). La longueur totale n’est pas supérieure à 100 caractères. Les quatre champs sont: 1. Nom du fabricant 2. Numéro du modèle 3. Numéro de série 4. Numéro de la version du logiciel Exemple: *IDN? B&K PRECISION CORP. MODEL889B,123456789,4.096 21 *RST Remet le BK889B dans son état par défaut. L’état par défaut est : 1KHz 1Vrms CpD uF Une fois le BK889B remis à zéro, il retournera la chaîne d’identité. ASC Définit le format de la valeur de retour. Cette commande fixe le retour de la chaîne ASCII ou du code numérique. PARAMETER: ON chaîne ASCII OFF code numérique Exemple: ASC ON OK (retour) FREQ? 1KHz (retour) ASC OFF OK (retour) FREQ? 2 (retour) CORR OPEN Effectue la calibration circuit ouvert. CORR SHORT Effectue la calibration court-circuit. FREQ(?) PARAMETER Définit (demande) la fréquence de mesure.  FREQ PARAMETER Définit la fréquence de mesure en fonction du paramètre. Lorsque la commande de paramétrage est entrée, le BK889B retourne “OK” à la fin du paramétrage. PARAMETER: Chaîne ASCII Code numérique 100Hz 0 120Hz 1 1KHz 2 10KHz 3 100KHz 4 200KHz 5 Exemple: FREQ 100KHz OK (retour)  FREQ? Retourne le paramètre de fréquence de la mesure. Exemple: ASC ON OK FREQ? 1KHz (valeur de retour) ASC OFF OK 22 FREQ? 2 (valeur de retour) LEV(?) PARAMETER Définit (demande) le niveau de mesure.  LEV PARAMETER Définit le niveau de mesure en fonction du paramètre. Lorsque le paramétrage est terminé, le BK889B retourne “OK”. PARAMETER: Chaîne ASCII Code numérique 1VDC 0 1Vrms 1 250mVrms 2 50mVrms 3 Exemple: LEV 1V OK  LEV? Retourne le paramètre du niveau de mesure. Exemple: ASC ON OK LEV? 1Vrms (valeur de retour) ASC OFF OK LEV? 1 (valeur de retour) MODE? Demande du mode de mesure. Si en mode LCR, six champs doivent être retournés. 1. Fréquence 2. Niveau 3. Mode de mesure 4. Unité de l’affichage principal 5. Unité de l’affichage secondaire L’existence du champ 5 dépend du mode de mesure. Par exemple, il n’y a pas de champ 5 si le mode de mesure est le mode DCR. Les champs sont séparés par un espace (ASCII 20H). Exemple: ASC ON OK CPD OK MODE? 1KHz 1Vrms CpD uF (valeur de retour) ASC ON OK CPRP OK MODE? 1KHz 1Vrms CpRp uF Ohm (valeur de retour) 23 Si en mode de mesure de la tension, les trois champs sont retournés. 1. Mode de mesure 2. Unité de l’affichage principal Exemple: ASC ON OK DCV OK MODE? DCV V (valeur de retour) RANG mV OK MODE? DCV mV (valeur de retour) RANG(?) PARAMETER Définit (demande) l’unité de mesure.  RANG PARAMETER Définit l’unité de mesure en fonction du paramètre. L’instrument retourne “OK” à la fin du paramétrage. PARAMETER: ASCII Code numérique pF 0 nF 1 uF 2 mF 3 F 4 nH 8 uH 9 mH 10 H 11 KH 12 mOhm 17 Ohm 18 KOhm 19 MOhm 20 mV 21 V 22 mA 23 A 24 Exemple: RANG pF OK  RANG? Retourne le paramètre de l’unité de mesure du courant. Exemple: ASC ON OK RANG? pF (valeur de retour) 24 ASC OFF OK RANG? 0 (valeur de retour) READ? Retourne la valeur de mesure. Cette commande mesurera en fonction du mode de mesure en cours et retournera la valeur mesurée. Exemple: CPD OK READ? 0.22724 0.12840 (valeur de retour) DCR OK READ? 5.1029 (valeur de retour) Les mesures “DCR”, “DCV”, and “ACV” n’enverront qu’une seule valeur mesurée. Les autres modes de mesure enverront deux valeurs mesurées séparées par un espace (ASCII 20H). 25 4.Application 4.1 Connexion des fils de mesure Un pont d’équilibre automatique possède 4 bornes (HCUR, HPOT, LCUR and LPOT) à connecter sur l’appareil à tester (DUT). Il faut comprendre quelle méthode de connexion affectera la précision de la mesure.  Borne 2 (2T) – Mesure 2 fils La Borne 2 est la manière la plus simple de connecter le DUT, mais elle contient de nombreuses erreurs qui sont l’inductance et la résistance ainsi que la capacité parasite des câbles de mesure (Figure 4.1).A cause de ces erreurs, la gamme de mesure d’impédance efficace sera limitée de 100W à 10KW. R HCUR HPOT DUT (b) BLOCK DIAGRAM V DUT A Co o Lo Ro Lo (a) CONNECTION (c) TYPICAL IMPEDANCE MEASUREMENT RANGE(£[) 2T 1m 10m 100m 1 10 100 1K 10K 100K 1M 10M LPOT LCUR Figure 4.1  Borne 3 (3T) – Mesure 3 fils La borne 3 utilise la câble coaxial pour réduire l’effet du condensateur parasite (Figure 4.2). Le blindage du câble coaxial doit être relié au boîtier de l’instrument pour augmenter la gamme de mesure jusqu’à 10MW. DUT V A (d) 2T CONNECTION WITH SHILDING HCUR HPOT DUT (b) BLOCK DIAGRAM V DUT A Co Ro Lo Ro Lo Co doesn't effect measurement result (a) CONNECTION (c) TYPICAL IMPEDANCE MEASUREMENT RANGE(£[) 3T 1m 10m 100m 1 10 100 1K 10K 100K 1M 10M LPOT LCUR Figure 4.2  Borne 4 (4T) – Mesure 4 fils La connexion de la borne 4 réduit l’effet de la résistance du fil de mesure (Figure 4.3). Cette connexion peut améliorer la gamme de mesure jusqu’à 10mW min. Cependant, l’effet de l’inductance du fil de mesure ne peut être éliminée. 26 HCUR HPOT DUT (b) BLOCK DIAGRAM V DUT A (a) CONNECTION (c) TYPICAL IMPEDANCE MEASUREMENT RANGE (£[) 4T 1m 10m 100m 1 10 100 1K 10K 100K 1M 10M LPOT LCUR Figure 4.3  Borne 5 (5T) La connexion de la borne 5 est une combinaison de 3T et 4T (Figure 4.4). Elle possède 4 câbles coaxiaux. Grâce à son avantage de 3T et 4T, cette connexion permet une gamme de mesure de10mW à 10MW. (d) WRONG 4T CONNECTION HPOT DUT (a) CONNECTION (b) BLOCK DIAGRAM (c) TYPICAL IMPEDANCE MEASUREMENT RANGE (£[) 5T 1m 10m 100m 1 10 100 1K 10K 100K 1M 10M HCUR V DUT A V DUT A LPOT LCUR Figure 4.4  Chemin borne 4 (4TP) Cette connexion résout le problème causé par l’inductance du câble de mesure. Le 4TP utilise quatre câbles coaxiaux pour isoler le chemin actuel et le câble de prise de tension (Figure 4.5). Le courant de retour circulera dans le câble coaxial ainsi que dans le blindage. Le flux magnétique généré par le conducteur interne neutralisera donc le flux magnétique généré par le conducteur externe (blindage). La connexion du 4TP augmente la gamme de mesure de 1mW à 10MW. 27 (a) CONNECTION (b) BLOCK DIAGRAM DUT V A (c) TYPICAL IMPEDANCE MEASUREMENT RANGE(£[) 4T 1m 10m100m 1 10 100 1K 10K 100K 1M 10M HPOT DUT HCUR LCUR LPOT HPOT DUT HCUR LCUR LPOT (d) 4T CONNECTION WITH SHILDING Figure 4.5  Elimination de l’effet du condensateur parasite Lorsqu’un composant d’impédance élevée est mesuré (i.e. condensateur de faible valeur), le condensateur parasite devient un problème important (Figure 4.6). Sur la figure 4.6(a), le condensateur parasite Cd est mis en parallèle avec le DUT ainsi que le Ci et le Ch. Pour corriger ce problème, ajouter une protection (Figure 4.6(b)) entre les bornes H et L pour freiner le Cd. Si la protection est connecté à la garde de l’instrument, l’effet de Ci et Ch sera supprimé. (a) Parastic Effect HCUR HPOT LPOT LCUR Cd Connection Point DUT Ch Cl Ground (b) Guard Plant reduces Parastic Effect HCUR HPOT LPOT LCUR Guard Plant Figure 4.6 4.2 Compensation circuit ouvert/court circuit Pour ces instruments de mesure d’impédance de précision, la compensation circuit ouvert/court-circuit doit être utilisée afin de réduire l ‘effet parasite de l’installation de mesure. L’effet parasite de l’installation de mesure peut être traité comme les composants passifs simples sur la figure 4.7(a). Lorsque le DUT est ouvert, l’instrument a une conductance Yp = Gp + jwCp (Figure 4.7(b)). Lorsque le DUT est fermé, l’instrument a une impédance Zs = Rs + jwLs (Figure 4.7(c)). Après la compensation ouverte et fermée, Yp et Zs peuvent donc être utilisés pour le vrai calcul Zdut (Figure 4.7(d)). 28 HCUR HPOT LCUR LPOT Co Zdut Rs Ls Zm Go Redundant Impedance (Zs) Parastic Conductance (Yo) Parastic of the Test Fixture (a) Parastic Effect of the Test Fixture HCUR HPOT LCUR LPOT Co Rs Ls Go (b) OPEN Measurement Yo OPEN Yo = Go + j£sCo 1 (Rs + j£s<< ) Go+j£sCo HCUR HPOT LCUR LPOT Co Rs Ls Go (c) SHORT Measurement Zs SHORT Zs = Rs + j£sLs Zm Yo Zdut Zm - Zs Zdut = 1-(Zm-Zs)Yo (d) Compensation Equation Zs Figure 4.7 4.3 Choix du mode série ou parallèle En fonction du besoin de mesure différent, il existe des modes série et parallèle pour décrire les résultats de mesure. Le choix du mode dépend de la valeur élevée ou basse de l’impédance.  Condensateur L’impédance et la capacité dans le condensateur sont inversement proportionnelles. La capacité la plus élevée signifie donc l’impédance la plus basse, la capacité la plus petite signifie l’impédance la plus élevée. La figure 4.8 indique le circuit équivalent du condensateur. Si la capacité est petite, le Rp est plus important que le Rs. Si la capacité est grande, le Rs ne doit pas être évitée. Il est donc préférable d‘utiliser le mode parallèle pour une mesure de capacité basse et le mode série pour une mesure de capacité élevée. CIRCUIT OUVERT COURT-CIRCUIT 29  Inductance L’impédance et l’inductance sont directement proportionnelles lorsque la fréquence test est fixée. C’est pour cela que l’inductance plus élevée équivaut à l’impédance la plus élevée et vice versa. La figure 4.9 indique le circuit équivalent de l’inductance. Lorsque l’inductance est faible, le Rs devient plus important que le Rp. Lorsque l’inductance est importante, le Rp doit être prix en considération. Il est donc convenable d’utiliser le mode série pour mesurer une inductance basse et le mode parallèle pour mesurer une inductance élevée. Small capacitor (High impedance) C RP RS Effect No Effect Large capacitor (Low impedance) C RP RS Effect No Effect Figure 4.9 Small inductor (Low impedance) L RP RS Large inductor (High impedance) Effect No Effect L RP RS No Effect Effect 30 DECLARATION OF CE CONFORMITY according to EEC directives and NF EN 45014 norm DECLARATION DE CONFORMITE CE suivant directives CEE et norme NF EN 45014 SEFRAM INSTRUMENTS & SYSTEMES 32, rue Edouard MARTEL 42100 SAINT-ETIENNE ( FRANCE) Declares, that the below mentionned product complies with : Déclare que le produit désigné ci-après est conforme à : The European low voltage directive 2006/95/EEC : La directive Européenne basse tension 2006/95/CE NF EN 61010-031 Safety requirements for electrical equipement for measurement, control and laboratory use. Règles de sécurité pour les appareils électriques de mesurage, de régulation et de laboratoire. The European EMC directive 2004/108/EEC : Emission standard EN 50081-1. Immunity standard EN 50082-1. La directive Européenne CEM 2004/108/CE : En émission selon NF EN 50081-1. En immunité selon NF EN 50082-1. Pollution degree Degré de pollution : 2 Product name Désignation : LCR/ESR meter RLC mètre Model Type : BK889B Compliance was demonstrated in listed laboratory and record in test report number La conformité à été démontrée dans un laboratoire reconnu et enregistrée dans le rapport numéro RC BK889B SAINT-ETIENNE the : Name/Position : Tuesday, April 28, 2009 T. TAGLIARINO / Quality Manager 31 SEFRAM 32, rue E. Martel – BP55 F42009 – Saint-Etienne Cedex 2 France Tel : 0825.56.50.50 (0,15€TTC/mn) Fax : 04.77.57.23.23 Web : www.sefram.fr E-mails : Service commercial : sales@sefram.fr Support technique : support@sefram.fr Manuel d’utilisation_BK1550_Alimentation Alimentation à découpage BK1550 Manuel d’utilisation Manuel d’utilisation_BK1550_Alimentation Manuel d’utilisation_BK1550_Alimentation SOMMAIRE TERMES ET SYMBOLES DE SÉCURITÉ.............................................................................................. 1 CONDITIONS D’UTILISATION............................................................................................................... 2 INTRODUCTION........................................................................................................................................ 2 UTILISER L’ALIMENTATION À DÉCOUPAGE 1550 ......................................................................................... 2 UTILISER LE PORT USB............................................................................................................................... 3 COMMANDES ET INDICATEURS.......................................................................................................... 4 MISE EN OEUVRE....................................................................................................................................... 5 CONNEXION À LA TERRE ............................................................................................................................. 5 MODE DE FONCTIONNEMENT....................................................................................................................... 5 TENSION CONSTANTE (CV), TRANSITION AUTOMATIQUE ET COURANT CONSTANT (CC) ............................ 6 PRÉRÉGLAGE DE LA VALEUR LIMITE DU COURANT (CC) ............................................................................. 6 PROCÉDURE DE CONNEXION ET DE MISE EN ROUTE ..................................................................................... 6 PROTECTION DE LA SORTIE CONTRE LA SURTENSION (OVP) ...................................................................... 7 PROTECTION CONTRE LA SURCHAUFFE........................................................................................................ 7 SPÉCIFICATIONS ...................................................................................................................................... 7 Manuel d’utilisation_BK1550_Alimentation Manuel d’utilisation_BK1550_Alimentation 1 Termes et symboles de sécurité Les termes suivants peuvent être utilisés dans ce manuel ou sur l’instrument : Attention. Se référer au manuel DANGER ! Haute tension – Risque de chocs électriques Terre de protection (Terre) Conducteur de terre Terre (châssis) Prescriptions de sécurité : • L’utilisateur doit être informé des risques liés aux chocs électriques et prendre les précautions nécessaires. • Le raccordement au secteur doit impérativement se faire avec une prise de terre • Toute intervention interne sur le produit (réglages ou réparation) doit se faire par du personnel qualifié Manuel d’utilisation_BK1550_Alimentation 2 Conditions d’utilisation • Humidité relative 10 à 80% • Humidité relative maximum de 80% pour une température maximum de 31°C (dégression linéaire pour 50% d’humidité relative à 40°C). • Altitude maximum de fonctionnement: 2000m • Catégorie d’installation : CAT 2 • Degré de pollution: 2 • Fluctuation de la tension du secteur jusqu’à ±10% de la tension normale. Introduction Utiliser l’alimentation à découpage 1550 Cette alimentation est pilotée par microcontrôleur qui assiste la gestion de la tension et du courant de sortie avec une capacité d’alimentation totale de 100W. Le contrôle de l’alimentation est réalisé par un système de commande originale associé à un affichage digital, ainsi vous pouvez facilement configurer la tension et le courant de sortie. C’est une alimentation faible bruit et ondulation et silencieuse, idéale pour le travail en laboratoire, en atelier ou dans l’éducation ou l’espace de travail est limité. Le 1550 a une borne USB, un fonctionnement en courant constant, une protection contre les surtensions, les sorties sont isolées, touche activation/désactivation de la sortie, facteur de formes faibles. Manuel d’utilisation_BK1550_Alimentation 3 Utiliser le port USB La sortie USB est destinée à une alimentation USB standard (5VDC et 0.4A). Vous pouvez mettre en marche ou charger vos portables (I-Pod, lecteur MP3 ou téléphone cellulaire*) possédant des connecteurs d’alimentation USB pour obtenir un courant continu de l’ordinateur. * Remarques Tous les téléphones cellulaires ne peuvent pas être rechargés par USB. Certains nouveaux modèles requièrent une tension plus élevée que 5V. Veuillez vous référez à la documentation de l’appareil pour les problèmes de compatibilité. Manuel d’utilisation_BK1550_Alimentation 4 Commandes et indicateurs 1. Interrupteur marche/arrêt : Allumer ou éteindre l’alimentation, lorsqu’elle est mise en marche l’écran s’allume. 2. Prise secteur avec fusible 3. Boîtier fusible masqué ( ôter le cache pour avoir accès au fusible) 4. V: Touche de réglage de la tension de sortie 5. A: Touche de réglage du courant de sortie 6. “+” appuyer sur cette touche pour augmenter les valeurs numériques Manuel d’utilisation_BK1550_Alimentation 5 7. “-” appuyer sur cette touche pour diminuer les valeurs numériques 8. Bouton Output On/Off (activer/désactiver la sortie) 9. Prise USB Norme USB courant continu 5V, 400mA Pour charger ou mettre en marche des ordinateurs portables et téléphones cellulaires 10. Borne de sortie polarité positive (rouge) 11. Borne de terre (:) verte Borne de mise à la masse, normalement elle doit être court-circuitée avec les bornes (+) ou (-) 12. Borne de sortie polarité négative (noir) 13. Ecran LCD affichant: La tension et le courant sur 3 digits, l’indication (CV) mode tension constante, l’indication (CC) mode courant constant, l’état de la borne de sortie (activée/désactivée) Mise en oeuvre Connexion à la terre Suivant l’application, les bornes de sortie de l’alimentation peuvent être mises à la terre dans n’importe laquelle des conditions suivantes : La borne – ou la borne + peuvent être réunies à la borne terre GND (verte). Mode de fonctionnement Cette alimentation a été conçue pour fonctionner comme source de tension constante ou comme source de courant constant. Passage automatique à l’un de ces deux modes, lorsque la condition de charge varie d’une des manières suivantes: Configuration de la valeur de tension: tout d’abord, appuyer sur le clavier (4), puis ajuster la valeur de tension comme désiré en utilisant le clavier (6) et (7). Manuel d’utilisation_BK1550_Alimentation 6 Configuration de la valeur du courant: Appuyer sur le clavier (5), puis ajuster la valeur du courant comme désiré en utilisant le clavier (6) et (7). Tension constante (CV), Transition automatique et courant constant (CC) L’alimentation fonctionne comme source de tension constante (CV) aussi longtemps que la charge du courant est inférieure à la valeur prédéfinie de limitation du courant. Lorsque la charge du courant est égale ou supérieure à cette valeur de limitation du courant, l’alimentation passe automatiquement en mode courant constant, la tension baisse, (CC) apparaît à l’écran et l’unité fonctionne en source de courant constant. Lorsque le charge de courant repasse en dessous de la valeur prédéfinie de limitation de courant, l’alimentation repasse en mode de tension constante (CV). Préréglage de la valeur limite du courant (CC) Allumer l’alimentation, régler la tension de sortie sur 3V, désactiver la borne de sortie en appuyant sur la touche (8), l’icône devient . Court-circuiter les bornes de sortie rouge et noire et activer la borne de sortie en appuyant sur la touche (8), l’icône devient , régler la valeur de limitation du courant à la limite désirée en utilisant les touches incrémenter et décrémenter. Désactiver la borne de sortie et enlever le courtcircuit des bornes. La limite de courant de l’alimentation a été réglée à x Amp pour toute la gamme de tension de sortie. Procédure de connexion et de mise en route 1. Après avoir contrôlé les références brancher l’alimentation au secteur 2. Mettre en marche l’alimentation, l’écran LCD doit s’allumer en même temps. 3. L’icône (CV) doit apparaître à l’écran. Manuel d’utilisation_BK1550_Alimentation 7 4. Régler la valeur de courant au maximum en appuyant sur la touche (6) si vous n’avez besoin d’aucune valeur de limitation de courant plus basse, sinon effectuer la procédure de limitation (CC). 5. Régler la tension de sortie à la valeur désirée puis désactiver la borne de sortie en appuyant sur la touche (8). 6. Connecter le point chaud de votre charge avec la borne positive et le point froid de votre charge avec la borne négative. 7. Activer de nouveau la borne de sortie et vérifier que l’écran affiche (CV). 8. Si l’écran affiche (CC), soit votre valeur prédéfinie de limitation de courant est trop basse soit votre charge requière plus de tension et de courant. Vous devez ré-ajuster la tension et le courant de la charge ou augmenter la tension ou le courant jusqu’à ce que (CV) apparaisse. Protection de la sortie contre la surtension (OVP) Ceci sert à protéger la charge connectée dans l’éventualité d’un dysfonctionnement du circuit de contrôle de la tension de sortie, la tension de sortie maximum n’excèdera pas 40% de la valeur de tension ajustée au moment de l’opération. Protection contre la surchauffe Lorsque la température à l’intérieur de l’alimentation devient plus élevée que la valeur prédéterminée, la tension et le courant de sortie de l’alimentation diminuera automatiquement à zéro pour prévenir tout risques de dommages de l’appareil. Lorsque la température à l’intérieur de l’alimentation retombe à 65°C, l’appareil se remet automatiquement en fonction. Spécifications Tension d’entrée 200 – 240Vac (50~60Hz) Pleine charge du courant d’entrée 120Vac 0.95A (+10%) Manuel d’utilisation_BK1550_Alimentation 8 Principale sortie: Gamme d’ajustement de tension de sortie 1.0 – 36VDC Gamme d’ajustement du courant de sortie 0 – 3A Régulation de tension pour une variation de charge de 10% à 100% < 50mV de secteur < 20mV d’ondulation (mV eff.) < 5mV de bruit (Crête-à-crête) < 50mV Régulation de courant pour une variation de charge de 10% à 100% < 20mA de secteur < 20mA Fréquence de découpage 80KHz à 120KHz Rendement 83% (+10%) Affichage voltmètre et ampèremètre 3 Digit Précision du voltmètre +1% + 5rdg. Précision de l’ampèremètre +1% + 5rdg. SORTIE USB: Tension de sortie 5V (+10%) Courant de sortie 400mA (+10%) Régulation tension de charge < 80mV (+10%) Ondulation et Bruit (sans charge) < 8mV (+10%) Manuel d’utilisation_BK1550_Alimentation 9 Voyants à l’écran CC, CV, Amp, Volt, Output ON-OFF Protection Court-circuit, Surcharge, Echauffement Système de refroidissement Convection naturelle Dimensions (lxLxP) 2.8 x 6.0 x 9.8 (70 x 150 x 250mm) Masse 4.4lbs. (2Kgs) Manuel d’utilisation_BK1550_Alimentation Manuel d’utilisation_BK1550_Alimentation SEFRAM Instruments et Systèmes 32, Rue Edouard MARTEL F42100 – SAINT-ETIENNE Tel : 0825 56 50 50 (0,15€TTC/mn) Fax: +33 (0)4 77 57 23 23 Site WEB : www.sefram.fr e-mail : sales@sefram.fr CC2531 USB Hardware User’s Guide swru221a swru221a 2/14 Table of Contents 1 Introduction ..................................................................................................................................3 2 About this Manual ........................................................................................................................3 3 Acronyms .....................................................................................................................................4 4 Definitions.....................................................................................................................................5 5 Getting Started .............................................................................................................................7 6 Using SmartRF05EB as an In-Circuit Emulator (ICE)..................................................................9 6.1 The Debug Interface................................................................................................................9 7 USB Dongle Hardware Description............................................................................................10 7.1 User Interface........................................................................................................................10 7.2 Debug Connector ..................................................................................................................10 7.3 RF Performance of Antenna ..................................................................................................11 8 USB Dongle Reference Design and Schematics.......................................................................12 9 References..................................................................................................................................13 10 General Information ...................................................................................................................14 10.1 Document History ..............................................................................................................14 swru221a 3/14 1 Introduction Thank you for purchasing a CC2530 Development Kit. The CC2530 is Texas Instrument’s second generation ZigBee/IEEE 802.15.4 compliant System-on- Chip with an optimized 8051 MCU core and radio for the 2.4 GHz unlicensed ISM/SRD band. This device enables industrial grade applications by offering state-of-the-art noise immunity, excellent link budget, operation up to 125 degrees and low voltage operation. In addition, the CC2530 provides extensive hardware support for packet handling, data buffering, burst transmissions, data encryption, data authentication, clear channel assessment, link quality indication and packet timing information. The CC2530 product folder on the web [10] has more information, with datasheets, user guides and application notes. The CC2531 is identical to CC2530, with the addition of a built in full speed USB 2.0 compliant interface. The CC2530 Development Kit includes all the necessary hardware to properly evaluate, demonstrate, prototype and develop software targeting not only IEEE802.15.4 or ZigBee compliant applications, but also proprietary applications for which a DSSS radio is required or wanted. 2 About this Manual This manual covers the CC2531 USB dongle found in the CC2530 Development Kit and the CC2530 ZigBee Development Kit. The manual covers the CC2531 USB Dongle hardware component of a USB development framework. Please refer to [3] for a description of the accompanying USB Firmware Library and application examples. swru221a 4/14 3 Acronyms CDC Communications Device Class DK Development Kit EB Evaluation Board EM Evaluation Module EMK Evaluation Module Kit HID Human Interface Device IC Integrated Circuit ICE In Circuit Emulator KB Kilo Byte (1024 byte) LED Light Emitting Diode LPRF Low Power RF MCU Micro Controller NC Not connected RF Radio Frequency RX Receive SoC System on Chip TI Texas Instruments TX Transmit UART Universal Asynchronous Receive Transmit USB Universal Serial Bus swru221a 5/14 4 Definitions SmartRF05EB The SmartRF05EB (evaluation board) is the main board in the kit with a wide range of user interfaces:  3x16 character serial LCD  Full speed USB 2.0 interface  UART  LEDs  Serial Flash  Potentiometer  Joystick  Buttons The EB is the platform for the evaluation modules (EM) and can be connected to the PC via USB to control the EM. CC2530EM The CC2530EM (evaluation module) contains the RF IC and necessary external components and matching filters for getting the most out of the radio. The module can be plugged into the SmartRF05EB. Use the EM as reference design for RF layout. The schematics are included at the end of this document and the layout files can be found on the web CC2530 Product Page [10]. CC2531 USB Dongle The CC2531 USB Dongle is a fully operational USB device that can be plugged into a PC. The dongle has 2 LEDs, two small push-buttons and connector holes that allow connection of external sensors or devices. The dongle also has a connector for programming and debugging of the CC2531 USB controller. The dongle comes preprogrammed with firmware such that it can be used as a packet sniffer device. Antenna 2.4 GHz antenna Titanis from Antenova. swru221a 6/14 SoC System on Chip. A collective term used to refer to Texas Instruments ICs with on-chip MCU and RF transceiver. Used in this document to reference the CC2530 and 2531. ICE In Circuit Emulator. ICE functionality is built into the SmartRF05EB and the CC Debugger USB software application examples Application examples using the CC2531 USB Dongle together with a CC2530EM. USB Firmware Library A library of low level USB firmware which is used by all the USB software examples. swru221a 7/14 5 Getting Started Make sure to install SmartRF Studio before connecting the SmartRF05EB to a PC. By installing it, the required Windows drivers will be provided when connecting the SmartRF05EB. SmartRF Studio [4] is a PC application for Windows that helps you find and adjust the radio register settings. Please see [4] for instructions on downloading and installation. The dongle comes preprogrammed with firmware such that it can be used as a packet sniffer device. For programming the device with other firmware an external ICE is needed. The SmartRF05EB1 can be used to program the USB dongle. The CC2531 has a 2 wire debug interface that is used for chip programming and debugging. When connecting this interface to the SmartRF05EB, the CC2531 can be programmed from the SmartRF Flash Programmer software [2] and debugged from IAR Embedded Workbench. To connect the CC2531 USB Dongle to the SmartRF05EB, follow these steps: 1. Turn off the SmartRF05EB power by moving the power switch shown in Figure 2 to the left position. 2. Remove any evaluation modules (EMs) attached to the SmartRF05EB. 3. Connect the SmartRF05EB to a PC with the supplied USB cable. 4. Connect the USB Dongle to the ExtSoC Debug header (P3) on SmartRF05EB with the supplied 10 pin cable and adapter board (see Figure 1). Make sure pin 1 on the dongle is connected to pin 1 on P3. This cable connects the debug interface and GND between the two devices; however the USB Dongle is not powered through this cable. 5. Power the CC2531 USB Dongle. To power the dongle there are two options:  Powered with a USB Cable Use the supplied USB extension cable to connect the USB Dongle to the PC (see Figure 1).  Powered from the SmartRF05EB Mount resistor R2 on the CC2531 USB Dongle and resistor R30 on the SmartRF05EB. The CC2531 USB Dongle should only be powered by one of the two sources at a time. Do not connect the USB cable to the USB Dongle while it is powered from the SmartRF05EB. 6. Turn on the power on the SmartRF05EB (see Figure 2). 1 It is also possible to use the SmartRF04EB or the CC Debugger to program the device. swru221a 8/14 Figure 1 - CC2531 USB Dongle connected to SmartRF05EB Figure 2 - SmartRF05EB power switch, power on. The CC2531 can now be programmed with the SmartRF Flash Programmer software. The firmware on the CC2531 can also be debugged using the IAR Embedded Workbench debugger. Please see the “SmartRF Flash Programmer User’s Manual” for more details [2]. Please see the “CC2530 Development Kit User Manual” [1] for more information on the SmartRF05EB and how to use the CC2530EM. swru221a 9/14 6 Using SmartRF05EB as an In-Circuit Emulator (ICE) The debug interface on the SmartRF05EB is controlled by the USB MCU. This allows both programming and an emulator interface over USB, which makes the SmartRF05EB usable as an ICE for the CC2531 dongle. To use the SmartRF05EB as ICE, the IAR Embedded Workbench software for 8051 architecture (EW8051) must be installed. The Embedded Workbench is an integrated development environment with a complete tool-chain such as C Compiler, Simulator, and ICE debugger. Please see [1] for instructions on how to set up the ICE debugger for use as an ICE. When the SmartRF05EB with a SoC is connected to a PC with the USB port, the debugger in IAR EW8051 will connect to it when started. If several SmartRF05EBs are connected to USB ports simultaneously, a selection window will display the connected evaluation boards, and the user can select which device to load. 6.1 The Debug Interface For custom PCB’s with the CC2531 SoC, it is recommended to include a pin header or test points to allow in-circuit emulation or programming using a SmartRF05EB or other 3rd party programming tools. The USB Dongle can be used as a reference. VDD note: The SmartRF05EB includes a voltage converter to support programming and debugging of external systems with different voltage than the SmartRF05EB. When using SmartRF05EB as emulator for external target debugging any evaluation module (EM) must be removed. Figure 3 shows the required signal for a minimum connector layout on external target. Figure 3 - Minimum Debug Connector Pinout (top view) swru221a 10/14 7 USB Dongle Hardware Description Figure 4 - CC2531 USB Dongle 7.1 User Interface The CC2531 USB Dongle has two buttons and two LEDs that can be used to interact with the user. Table 1 shows which CC2531 signals are connected to what IO on the dongle. IO Connector CC2531 Dongle User IO CC2531 1 P0.2 Green LED P0.0 2 P0.3 Red LED P1.1 3 P0.4 Button S1 P1.2 4 P0.5 Button S2 P1.3 5 P1.7 6 P1.6 7 P1.5 8 P1.4 Table 1 - CC2531 USB Dongle Pinout 7.2 Debug Connector The CC2531 USB dongle can be connected to a SmartRF Evaluation Board for debugging and programming. IO Connector Meandred F-antenna CC2531F256 Button S1 Button S2 LEDs Debug connector Voltage regulator swru221a 11/14 Figure 5 - CC2531 USB Dongle connected to SmartRF05EB The debug connector on the CC2531 USB Dongle matches the debug connector on the SmartRF05EB (and the CC Debugger). Note that, by default, the CC2531 dongle is not powered through the debug connector, so an external power source must be used while programming. The easiest solution is to connect it to a USB port on the PC. Alternatively, resistor R2 can be mounted. The table below shows the pin out of the debug connector. Pin # Connection 1 GND 2 VCC 3 CC2531 P2.2 (DC) 4 CC2531 P2.1 (DD) 5 NC 6 NC 7 CC2531 RESET 8 NC 9 Optional external VCC (R2 must be mounted) 10 NC Table 2 - CC2531 USB Dongle Debug Connector 7.3 RF Performance of Antenna While the CC2531 USB Dongle has a PCB antenna designed as a meandered inverted F antenna. The performance of the PCB antenna on the USB Dongle will be affected by its nearby surroundings. Therefore, when plugged into different computers or a USB extension cable differences in the RF performance must be expected. Also, if the USB Dongle is put inside a casing, the material and design of the enclosure will influence the antenna’s performance. For the CC2531 USB Dongle the maximum antenna gain measured is 5.3 dBi. This means that duty cycling or reduction of output power might be needed to ensure compliance with regulatory limits. Please see [8] for more information about SRD regulations in the 2.4 GHz ISM band. The performance of the antenna of the CC2531 USB Dongle is further described in [9]. swru221a 12/14 8 USB Dongle Reference Design and Schematics Refer to [1] for the schematics of the CC2531 USB Dongle. swru221a 13/14 9 References [1] CC2530 DK Development Kit User Manual (swru208) [2] SmartRF Flash Programmer (swrc044) [3] SmartRF Packet Sniffer (swrc045) [4] SmartRF Studio (swrc046) [5] CC USB Firmware Library and Examples (swrc088) [6] CC USB Software Examples User’s Guide (swru222) [7] SmartRF05EB User’s Guide (swru210) [8] AN032 – SRD Regulation for License-Free Transceiver Operation in the 2.4 GHz Band (swra060) [9] AN043 – Small Size 2.4 GHz PCB Antenna (swra117) [10] CC2530 Product Web Site (http://focus.ti.com/docs/prod/folders/print/cc2530.html) swru221a 14/14 10 General Information 10.1 Document History Revision Date Description/Changes SWRU221A 2009.07.31 Updated info about how to connect dongle to SmartRF05EB. Corrected typos. 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May 2009–Revised February 2014 Contents Preface ....................................................................................................................................... 7 1 Get Started Now! ............................................................................................................... 10 1.1 Flash Emulation Tool (FET) Overview .................................................................................. 11 1.2 Kit Contents, MSP-FET430PIF .......................................................................................... 12 1.3 Kit Contents, eZ430-F2013 .............................................................................................. 12 1.4 Kit Contents, eZ430-T2012 .............................................................................................. 12 1.5 Kit Contents, eZ430-RF2500 ............................................................................................ 12 1.6 Kit Contents, eZ430-RF2500T ........................................................................................... 12 1.7 Kit Contents, eZ430-RF2500-SEH ...................................................................................... 12 1.8 Kit Contents, eZ430-Chronos-xxx ....................................................................................... 13 1.9 Kit Contents, MSP-FET430UIF .......................................................................................... 13 1.10 Kit Contents, MSP-FET430xx ............................................................................................ 13 1.11 Kit Contents, FET430F6137RF900 ..................................................................................... 14 1.12 Kit Contents, MSP-TS430xx ............................................................................................. 14 1.13 Kit Contents, EM430Fx1x7RF900 ....................................................................................... 16 1.14 Hardware Installation, MSP-FET430PIF ............................................................................... 16 1.15 Hardware Installation, MSP-FET430UIF ............................................................................... 17 1.16 Hardware Installation, eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSP-EXP430F5529 ......... 17 1.17 Hardware Installation, MSP-FET430Uxx, MSP-TS430xxx, FET430F6137RF900, EM430Fx137RF900 ...... 17 1.18 Important MSP430 Documents on the Web ........................................................................... 18 2 Design Considerations for In-Circuit Programming ............................................................... 19 2.1 Signal Connections for In-System Programming and Debugging ................................................... 20 2.2 External Power ............................................................................................................. 24 2.3 Bootstrap Loader (BSL) .................................................................................................. 24 A Frequently Asked Questions and Known Issues ................................................................... 25 A.1 Hardware FAQs ............................................................................................................ 26 A.2 Known Issues .............................................................................................................. 28 B Hardware .......................................................................................................................... 29 B.1 MSP-TS430D8 ............................................................................................................. 31 B.2 MSP-TS430PW14 ......................................................................................................... 34 B.3 MSP-TS430L092 .......................................................................................................... 37 B.4 MSP-TS430L092 Active Cable .......................................................................................... 40 B.5 MSP-TS430PW24 ......................................................................................................... 43 B.6 MSP-TS430DW28 ......................................................................................................... 46 B.7 MSP-TS430PW28 ......................................................................................................... 49 B.8 MSP-TS430PW28A ....................................................................................................... 52 B.9 MSP-TS430DA38 .......................................................................................................... 55 B.10 MSP-TS430QFN23x0 ..................................................................................................... 58 B.11 MSP-TS430RSB40 ........................................................................................................ 61 B.12 MSP-TS430RHA40A ...................................................................................................... 64 B.13 MSP-TS430DL48 .......................................................................................................... 67 B.14 MSP-TS430RGZ48B ...................................................................................................... 70 B.15 MSP-TS430RGZ48C ...................................................................................................... 73 B.16 MSP-TS430PM64 ......................................................................................................... 76 2 Contents SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com B.17 MSP-TS430PM64A ....................................................................................................... 79 B.18 MSP-TS430RGC64B ..................................................................................................... 82 B.19 MSP-TS430RGC64C ..................................................................................................... 85 B.20 MSP-TS430RGC64USB .................................................................................................. 89 B.21 MSP-TS430PN80 .......................................................................................................... 93 B.22 MSP-TS430PN80A ........................................................................................................ 96 B.23 MSP-TS430PN80USB .................................................................................................... 99 B.24 MSP-TS430PZ100 ....................................................................................................... 103 B.25 MSP-TS430PZ100A ..................................................................................................... 106 B.26 MSP-TS430PZ100B ..................................................................................................... 109 B.27 MSP-TS430PZ100C ..................................................................................................... 112 B.28 MSP-TS430PZ5x100 .................................................................................................... 115 B.29 MSP-TS430PZ100USB ................................................................................................. 118 B.30 MSP-TS430PEU128 ..................................................................................................... 122 B.31 EM430F5137RF900 ..................................................................................................... 125 B.32 EM430F6137RF900 ..................................................................................................... 129 B.33 EM430F6147RF900 ..................................................................................................... 133 B.34 MSP-FET430PIF ......................................................................................................... 137 B.35 MSP-FET430UIF ......................................................................................................... 139 B.35.1 MSP-FET430UIF Revision History .......................................................................... 144 C Hardware Installation Guide .............................................................................................. 145 C.1 Hardware Installation .................................................................................................... 146 Document Revision History ........................................................................................................ 151 SLAU278Q–May 2009–Revised February 2014 Contents 3 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com List of Figures 2-1. Signal Connections for 4-Wire JTAG Communication................................................................ 21 2-2. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F2xx, MSP430G2xx, and MSP430F4xx Devices............................................................................. 22 2-3. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F5xx and MSP430F6xx Devices .................................................................................................... 23 B-1. MSP-TS430D8 Target Socket Module, Schematic ................................................................... 31 B-2. MSP-TS430D8 Target Socket Module, PCB .......................................................................... 32 B-3. MSP-TS430PW14 Target Socket Module, Schematic ............................................................... 34 B-4. MSP-TS430PW14 Target Socket Module, PCB ...................................................................... 35 B-5. MSP-TS430L092 Target Socket Module, Schematic................................................................. 37 B-6. MSP-TS430L092 Target Socket Module, PCB........................................................................ 38 B-7. MSP-TS430L092 Active Cable Target Socket Module, Schematic................................................. 40 B-8. MSP-TS430L092 Active Cable Target Socket Module, PCB........................................................ 41 B-9. MSP-TS430PW24 Target Socket Module, Schematic ............................................................... 43 B-10. MSP-TS430PW24 Target Socket Module, PCB ...................................................................... 44 B-11. MSP-TS430DW28 Target Socket Module, Schematic ............................................................... 46 B-12. MSP-TS430DW28 Target Socket Module, PCB ...................................................................... 47 B-13. MSP-TS430PW28 Target Socket Module, Schematic ............................................................... 49 B-14. MSP-TS430PW28 Target Socket Module, PCB ...................................................................... 50 B-15. MSP-TS430PW28A Target Socket Module, Schematic.............................................................. 52 B-16. MSP-TS430PW28A Target Socket Module, PCB (Red) ............................................................. 53 B-17. MSP-TS430DA38 Target Socket Module, Schematic ................................................................ 55 B-18. MSP-TS430DA38 Target Socket Module, PCB ....................................................................... 56 B-19. MSP-TS430QFN23x0 Target Socket Module, Schematic ........................................................... 58 B-20. MSP-TS430QFN23x0 Target Socket Module, PCB .................................................................. 59 B-21. MSP-TS430RSB40 Target Socket Module, Schematic .............................................................. 61 B-22. MSP-TS430RSB40 Target Socket Module, PCB ..................................................................... 62 B-23. MSP-TS430RHA40A Target Socket Module, Schematic ............................................................ 64 B-24. MSP-TS430RHA40A Target Socket Module, PCB ................................................................... 65 B-25. MSP-TS430DL48 Target Socket Module, Schematic ................................................................ 67 B-26. MSP-TS430DL48 Target Socket Module, PCB ....................................................................... 68 B-27. MSP-TS430RGZ48B Target Socket Module, Schematic ............................................................ 70 B-28. MSP-TS430RGZ48B Target Socket Module, PCB ................................................................... 71 B-29. MSP-TS430RGZ48C Target Socket Module, Schematic ............................................................ 73 B-30. MSP-TS430RGZ48C Target Socket Module, PCB ................................................................... 74 B-31. MSP-TS430PM64 Target Socket Module, Schematic................................................................ 76 B-32. MSP-TS430PM64 Target Socket Module, PCB....................................................................... 77 B-33. MSP-TS430PM64A Target Socket Module, Schematic .............................................................. 79 B-34. MSP-TS430PM64A Target Socket Module, PCB ..................................................................... 80 B-35. MSP-TS430RGC64B Target Socket Module, Schematic ............................................................ 82 B-36. MSP-TS430RGC64B Target Socket Module, PCB ................................................................... 83 B-37. MSP-TS430RGC64C Target Socket Module, Schematic............................................................ 86 B-38. MSP-TS430RGC64C Target Socket Module, PCB................................................................... 87 B-39. MSP-TS430RGC64USB Target Socket Module, Schematic ........................................................ 89 B-40. MSP-TS430RGC64USB Target Socket Module, PCB ............................................................... 90 B-41. MSP-TS430PN80 Target Socket Module, Schematic ................................................................ 93 B-42. MSP-TS430PN80 Target Socket Module, PCB ....................................................................... 94 B-43. MSP-TS430PN80A Target Socket Module, Schematic .............................................................. 96 4 List of Figures SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com B-44. MSP-TS430PN80A Target Socket Module, PCB ..................................................................... 97 B-45. MSP-TS430PN80USB Target Socket Module, Schematic .......................................................... 99 B-46. MSP-TS430PN80USB Target Socket Module, PCB ................................................................ 100 B-47. MSP-TS430PZ100 Target Socket Module, Schematic ............................................................. 103 B-48. MSP-TS430PZ100 Target Socket Module, PCB .................................................................... 104 B-49. MSP-TS430PZ100A Target Socket Module, Schematic............................................................ 106 B-50. MSP-TS430PZ100A Target Socket Module, PCB................................................................... 107 B-51. MSP-TS430PZ100B Target Socket Module, Schematic............................................................ 109 B-52. MSP-TS430PZ100B Target Socket Module, PCB................................................................... 110 B-53. MSP-TS430PZ100C Target Socket Module, Schematic ........................................................... 112 B-54. MSP-TS430PZ100C Target Socket Module, PCB .................................................................. 113 B-55. MSP-TS430PZ5x100 Target Socket Module, Schematic .......................................................... 115 B-56. MSP-TS430PZ5x100 Target Socket Module, PCB.................................................................. 116 B-57. MSP-TS430PZ100USB Target Socket Module, Schematic........................................................ 118 B-58. MSP-TS430PZ100USB Target Socket Module, PCB............................................................... 119 B-59. MSP-TS430PEU128 Target Socket Module, Schematic ........................................................... 122 B-60. MSP-TS430PEU128 Target Socket Module, PCB .................................................................. 123 B-61. EM430F5137RF900 Target board, Schematic....................................................................... 125 B-62. EM430F5137RF900 Target board, PCB.............................................................................. 126 B-63. EM430F6137RF900 Target board, Schematic....................................................................... 129 B-64. EM430F6137RF900 Target board, PCB.............................................................................. 130 B-65. EM430F6147RF900 Target Board, Schematic ...................................................................... 133 B-66. EM430F6147RF900 Target Board, PCB ............................................................................. 134 B-67. MSP-FET430PIF FET Interface Module, Schematic ................................................................ 137 B-68. MSP-FET430PIF FET Interface Module, PCB....................................................................... 138 B-69. MSP-FET430UIF USB Interface, Schematic (1 of 4) ............................................................... 139 B-70. MSP-FET430UIF USB Interface, Schematic (2 of 4) ............................................................... 140 B-71. MSP-FET430UIF USB Interface, Schematic (3 of 4) ............................................................... 141 B-72. MSP-FET430UIF USB Interface, Schematic (4 of 4) ............................................................... 142 B-73. MSP-FET430UIF USB Interface, PCB ................................................................................ 143 C-1. Windows XP Hardware Wizard ........................................................................................ 146 C-2. Windows XP Driver Location Selection Folder....................................................................... 147 C-3. Device Manager Using USB Debug Interface using VID/PID 0x2047/0x0010................................... 148 C-4. Device Manager Using USB Debug Interface with VID/PID 0x0451/0xF430 .................................... 149 C-5. Device Manager Using USB Debug Interface with VID/PID 0x0451/0xF432 .................................... 150 SLAU278Q–May 2009–Revised February 2014 List of Figures 5 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com List of Tables 1-1. Flash Emulation Tool (FET) Features and Device Compatibility.................................................... 11 1-2. Individual Kit Contents, MSP-TS430xx ................................................................................. 14 B-1. MSP-TS430D8 Bill of Materials.......................................................................................... 33 B-2. MSP-TS430PW14 Bill of Materials...................................................................................... 36 B-3. MSP-TS430L092 Bill of Materials ....................................................................................... 39 B-4. MSP-TS430L092 JP1 Settings .......................................................................................... 41 B-5. MSP-TS430L092 Active Cable Bill of Materials ....................................................................... 42 B-6. MSP-TS430PW24 Bill of Materials...................................................................................... 45 B-7. MSP-TS430DW28 Bill of Materials...................................................................................... 48 B-8. MSP-TS430PW28 Bill of Materials ..................................................................................... 51 B-9. MSP-TS430PW28A Bill of Materials .................................................................................... 54 B-10. MSP-TS430DA38 Bill of Materials ...................................................................................... 57 B-11. MSP-TS430QFN23x0 Bill of Materials.................................................................................. 60 B-12. MSP-TS430RSB40 Bill of Materials .................................................................................... 63 B-13. MSP-TS430RHA40A Bill of Materials................................................................................... 66 B-14. MSP-TS430DL48 Bill of Materials....................................................................................... 69 B-15. MSP-TS430RGZ48B Bill of Materials................................................................................... 72 B-16. MSP-TS430RGZ48C Revision History ................................................................................. 74 B-17. MSP-TS430RGZ48C Bill of Materials .................................................................................. 75 B-18. MSP-TS430PM64 Bill of Materials ...................................................................................... 78 B-19. MSP-TS430PM64A Bill of Materials .................................................................................... 81 B-20. MSP-TS430RGC64B Bill of Materials .................................................................................. 84 B-21. MSP-TS430RGC64C Bill of Materials .................................................................................. 88 B-22. MSP-TS430RGC64USB Bill of Materials............................................................................... 91 B-23. MSP-TS430PN80 Bill of Materials ...................................................................................... 95 B-24. MSP-TS430PN80A Bill of Materials .................................................................................... 98 B-25. MSP-TS430PN80USB Bill of Materials ............................................................................... 101 B-26. MSP-TS430PZ100 Bill of Materials.................................................................................... 105 B-27. MSP-TS430PZ100A Bill of Materials.................................................................................. 108 B-28. MSP-TS430PZ100B Bill of Materials.................................................................................. 111 B-29. MSP-TS430PZ100C Bill of Materials.................................................................................. 114 B-30. MSP-TS430PZ5x100 Bill of Materials................................................................................. 117 B-31. MSP-TS430PZ100USB Bill of Materials .............................................................................. 120 B-32. MSP-TS430PEU128 Bill of Materials ................................................................................. 124 B-33. EM430F5137RF900 Bill of Materials .................................................................................. 127 B-34. EM430F6137RF900 Bill of Materials .................................................................................. 131 B-35. EM430F6147RF900 Bill of Materials .................................................................................. 135 C-1. USB VIDs and PIDs Used in MSP430 Tools......................................................................... 146 6 List of Tables SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Preface SLAU278Q–May 2009–Revised February 2014 Read This First About This Manual This manual describes the hardware of the Texas Instruments MSP-FET430 Flash Emulation Tool (FET). The FET is the program development tool for the MSP430™ ultra-low-power microcontroller. Both available interface types, the parallel port interface and the USB interface, are described. How to Use This Manual Read and follow the instructions in Chapter 1. This chapter lists the contents of the FET, provides instructions on installing the hardware and according software drivers. After you see how quick and easy it is to use the development tools, TI recommends that you read all of this manual. This manual describes the setup and operation of the FET but does not fully describe the MSP430™ microcontrollers or the development software systems. For details of these items, see the appropriate TI documents listed in Section 1.18. This manual applies to the following tools (and devices): • MSP-FET430PIF (debug interface with parallel port connection, for all MSP430 flash-based devices) • MSP-FET430UIF (debug interface with USB connection, for all MSP430 flash-based devices) • eZ430-F2013 (USB stick form factor interface with attached MSP430F2013 target, for all MSP430F20xx, MSP430G2x01, MSP430G2x11, MSP430G2x21, and MSP430G2x31 devices) • eZ430-T2012 (three MSP430F2012 based target boards) • eZ430-RF2500 (USB stick form factor interface with attached MSP430F2274 and CC2500 target, for all MSP430F20xx, MSP430F21x2, MSP430F22xx, MSP430G2x01, MSP430G2x11, MSP430G2x21, and MSP430G2x31 devices) • eZ430-RF2500T (one MSP430F2274 and CC2500 target board including battery pack) • eZ430-RF2500-SEH (USB stick form factor interface with attached MSP430F2274 and CC2500 target and solar energy harvesting module) • eZ430-Chronos-xxx (USB stick form factor interface with CC430F6137 based development system contained in a watch. Includes <1 GHz RF USB access point) Stand-alone target-socket modules (without debug interface) named as MSP-TS430TSxx. Tools named as MSP-FET430Uxx contain the USB debug interface (MSP-FET430UIF) and the respective target socket module MSP-TS430TSxx, where 'xx' is the same for both names. Following tools contain also the USB debug interface (MSP-FET430UIF): • FET430F5137RF900 (for CC430F513x devices in 48-pin RGZ packages) (green PCB) • FET430F6137RF900 (for CC430F612x and CC430F613x devices in 64-pin RGC packages) (green PCB) These tools contain the most up-to-date materials available at the time of packaging. For the latest materials (data sheets, user's guides, software, application information, and so on), visit the TI MSP430 web site at www.ti.com/msp430 or contact your local TI sales office. SLAU278Q–May 2009–Revised February 2014 Read This First 7 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Information About Cautions and Warnings www.ti.com Information About Cautions and Warnings This document may contain cautions and warnings. CAUTION This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software or equipment. WARNING This is an example of a warning statement. A warning statement describes a situation that could potentially cause harm to you. The information in a caution or a warning is provided for your protection. Read each caution and warning carefully. Related Documentation From Texas Instruments MSP430 development tools documentation: Code Composer Studio v5.4 for MSP430 User's Guide (literature number SLAU157) Code Composer Studio v5.x Core Edition (CCS Mediawiki) IAR Embedded Workbench Version 3+ for MSP430(tm) User's Guide (literature number SLAU138) IAR Embedded Workbench KickStart installer (literature number SLAC050) eZ430-F2013 Development Tool User's Guide (literature number SLAU176) eZ430-RF2480 Demonstration Kit User's Guide (literature number SWRU151) eZ430-RF2500 Development Tool User's Guide (literature number SLAU227) eZ430-RF2500-SEH Development Tool User's Guide (literature number SLAU273) eZ430-Chronos Development Tool User's Guide (literature number SLAU292) Spectrum Analyzer (MSP-SA430-SUB1GHZ) User's Guide (literature number SLAU371) MSP-EXP430F5529 Experimenter Board User's Guide (literature number SLAU330) MSP-EXP430F5438 Experimenter Board User's Guide (literature number SLAU263) MSP-EXP430G2 LaunchPad Experimenter Board User's Guide (literature number SLAU318) MSP Gang Programmer (MSP-GANG) User's Guide (literature number SLAU358) MSP430 Gang Programmer (MSP-GANG430) User's Guide (literature number SLAU101) MSP430 device user's guides: MSP430x1xx Family User's Guide (literature number SLAU049) MSP430x2xx Family User's Guide (literature number SLAU144) MSP430x3xx Family User's Guide (literature number SLAU012) MSP430x4xx Family User's Guide (literature number SLAU056) MSP430x5xx and MSP430x6xx Family User's Guide (literature number SLAU208) CC430 Family User's Guide (literature number SLAU259) 8 Read This First SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com If You Need Assistance MSP430FR57xx Family User's Guide (literature number SLAU272) MSP430FR58xx and MSP430FR59xx Family User's Guide (literature number SLAU367) If You Need Assistance Support for the MSP430 devices and the FET development tools is provided by the Texas Instruments Product Information Center (PIC). Contact information for the PIC can be found on the TI web site at www.ti.com/support. The Texas Instruments E2E Community support forums for the MSP430 provide open interaction with peer engineers, TI engineers, and other experts. Additional device-specific information can be found on the MSP430 web site. SLAU278Q–May 2009–Revised February 2014 Read This First 9 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Chapter 1 SLAU278Q–May 2009–Revised February 2014 Get Started Now! This chapter lists the contents of the FET and provides instruction on installing the hardware. Topic ........................................................................................................................... Page 1.1 Flash Emulation Tool (FET) Overview .................................................................. 11 1.2 Kit Contents, MSP-FET430PIF ............................................................................. 12 1.3 Kit Contents, eZ430-F2013 .................................................................................. 12 1.4 Kit Contents, eZ430-T2012 .................................................................................. 12 1.5 Kit Contents, eZ430-RF2500 ................................................................................ 12 1.6 Kit Contents, eZ430-RF2500T .............................................................................. 12 1.7 Kit Contents, eZ430-RF2500-SEH ........................................................................ 12 1.8 Kit Contents, eZ430-Chronos-xxx ........................................................................ 13 1.9 Kit Contents, MSP-FET430UIF ............................................................................. 13 1.10 Kit Contents, MSP-FET430xx .............................................................................. 13 1.11 Kit Contents, FET430F6137RF900 ........................................................................ 14 1.12 Kit Contents, MSP-TS430xx ................................................................................ 14 1.13 Kit Contents, EM430Fx1x7RF900 ......................................................................... 16 1.14 Hardware Installation, MSP-FET430PIF ................................................................ 16 1.15 Hardware Installation, MSP-FET430UIF ................................................................ 17 1.16 Hardware Installation, eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSPEXP430F5529 .................................................................................................... 17 1.17 Hardware Installation, MSP-FET430Uxx, MSP-TS430xxx, FET430F6137RF900, EM430Fx137RF900 ............................................................................................ 17 1.18 Important MSP430 Documents on the Web ........................................................... 18 10 Get Started Now! SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Flash Emulation Tool (FET) Overview 1.1 Flash Emulation Tool (FET) Overview TI offers several flash emulation tools according to different requirements. Table 1-1. Flash Emulation Tool (FET) Features and Device Compatibility(1) eZ430-F2013 eZ430-RF2500 eZ430-RF2480 eZ430-RF2560 MSP-WDSxx Metawatch eZ430-Chronos MSP-FET430PIF MSP-FET430UIF LaunchPad (MSP-EXP430G2) MSP-EXP430FR5739 MSP-EXP430F5529 Supports all programmable MSP430 and CC430 devices (F1xx, F2xx, F4xx, F5xx, F6xx, G2xx, L092, FR57xx, FR59xx, x x MSP430TCH5E) Supports only F20xx, G2x01, G2x11, x G2x21, G2x31 Supports MSP430F20xx, F21x2, F22xx, x G2x01, G2x11, G2x21, G2x31, G2x53 Supports MSP430F20xx, F21x2, F22xx, x x G2x01, G2x11, G2x21, G2x31 Supports F5438, F5438A x Supports BT5190, F5438A x Supports only F552x x Supports FR57xx, F5638, F6638 x Supports only CC430F613x x Allows fuse blow x Adjustable target supply voltage x Fixed 2.8-V target supply voltage x Fixed 3.6-V target supply voltage x x x x x x x x x 4-wire JTAG x x 2-wire JTAG(2) x x x x x x x x x x Application UART x x x x x x x x Supported by CCS for Windows x x x x x x x x x x x Supported by CCS for Linux x Supported by IAR x x x x x x x x x x x (1) The MSP-FET430PIF is for legacy device support only. This emulation tool will not support any new devices released after 2011. (2) The 2-wire JTAG debug interface is also referred to as Spy-Bi-Wire (SBW) interface. SLAU278Q–May 2009–Revised February 2014 Get Started Now! 11 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Kit Contents, MSP-FET430PIF www.ti.com 1.2 Kit Contents, MSP-FET430PIF • One READ ME FIRST document • One MSP-FET430PIF interface module • One 25-conductor cable • One 14-conductor cable NOTE: This part is obsolete and is not recommended to use in new design. 1.3 Kit Contents, eZ430-F2013 • One QUICK START GUIDE document • One eZ430-F2013 development tool including one MSP430F2013 target board 1.4 Kit Contents, eZ430-T2012 • Three MSP430F2012-based target boards 1.5 Kit Contents, eZ430-RF2500 • One QUICK START GUIDE document • One eZ430-RF2500 CD-ROM • One eZ430-RF2500 development tool including one MSP430F2274 and CC2500 target board • One eZ430-RF2500T target board • One AAA battery pack with expansion board (batteries included) 1.6 Kit Contents, eZ430-RF2500T • One eZ430-RF2500T target board • One AAA battery pack with expansion board (batteries included) 1.7 Kit Contents, eZ430-RF2500-SEH • One MSP430 development tool CD containing documentation and development software • One eZ430-RF USB debugging interface • Two eZ430-RF2500T wireless target boards • One SEH-01 solar energy harvester board • One AAA battery pack with expansion board (batteries included) 12 Get Started Now! SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Kit Contents, eZ430-Chronos-xxx 1.8 Kit Contents, eZ430-Chronos-xxx '433, '868, '915 • One QUICK START GUIDE document • One ez430-Chronos emulator • One screwdriver • Two spare screws eZ430-Chronos-433: – One 433-MHz eZ430-Chronos watch (battery included) – One 433-MHz eZ430-Chronos access point eZ430-Chronos-868: – One 868-MHz eZ430-Chronos watch (battery included) – One 868-MHz eZ430-Chronos access point eZ430-Chronos-915: – One 915-MHz eZ430-Chronos watch (battery included) – One 915-MHz eZ430-Chronos access point 1.9 Kit Contents, MSP-FET430UIF • One READ ME FIRST document • One MSP-FET430UIF interface module • One USB cable • One 14-conductor cable 1.10 Kit Contents, MSP-FET430xx • One READ ME FIRST document • One MSP-FET430UIF USB interface module. This is the unit that has a USB B-connector on one end of the case, and a 2×7-pin male connector on the other end of the case. • One USB cable • One 32.768-kHz crystal from Micro Crystal, if the board has an option to use the quartz. • A 2×7-pin male JTAG connector is also present on the PCB (see different setup for L092) • One 14-Pin JTAG conductor cable • One small box containing two MSP430 device samples (See table for Sample Type) • One target socket module. To determine the devices used for each board and a summary of the board, see Table 1-2. The name of MSP-TS430xx board can be derived from the name of the MSP-FET430xx kit; for example, the MSP-FET430U28A kit contains the MSP-TS430PW28A board. Refer to the device data sheets for device specifications. Device errata can be found in the respective device product folder on the web provided as a PDF document. Depending on the device, errata may also be found in the device bug database at www.ti.com/sc/cgi-bin/buglist.cgi. SLAU278Q–May 2009–Revised February 2014 Get Started Now! 13 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Kit Contents, FET430F6137RF900 www.ti.com 1.11 Kit Contents, FET430F6137RF900 • One READ ME FIRST document • One legal notice • One MSP-FET430UIF interface module • Two EM430F6137RF900 target socket modules. This is the PCB on which is soldered a CC430F6137 device in a 64-pin RGC package. A 2×7-pin male connector is also present on the PCB. • Two CC430EM battery packs • Four AAA batteries • Two 868-MHz or 915-MHz antennas • Two 32.768-kHz crystals • 18 PCB 2x4-pin headers • One USB cable • One 14-pin JTAG conductor cable 1.12 Kit Contents, MSP-TS430xx • One READ ME FIRST document • One 32.768-kHz crystal from Micro Crystal (except MSP-TS430PW24) • One target socket module • A 2×7-pin male JTAG connector is also present on the PCB (see different setup for L092) • MSP430 Device samples (see Table 1-2 for sample type) Table 1-2. Individual Kit Contents, MSP-TS430xx Part Number Socket Type Supported Devices Included Devices Headers and Comment MSP-TS430D8 8-pin D MSP430G2210, 1 x MSP430G2210 and Two PCB 1×4-pin headers (two male and (green PCB) (TSSOP ZIF) MSP430G2230 1 x MSP430G2230 two female) MSP430F20xx, MSP-TS430PW14 14-pin PW MSP430G2x01, Four PCB 1×7-pin headers (two male and (green PCB) (TSSOP ZIF) MSP430G2x11, 2 x MSP430F2013IPW two female) MSP430G2x21, MSP430G2x31 Four PCB 1×7-pin headers (two male and two female). A "Micro-MaTch" 10-pin MSP-TS430L092 14-pin PW female connector is also present on the (green PCB) (TSSOP ZIF) MSP-TS430L092 2 x MSP430L092IPW PCB which connects the kit with an 'Active Cable' PCB; this 'Active Cable' PCB is connected by 14-pin JTAG cable with the FET430UIF MSP-TS430PW24 24-pin PW MSP430AFE2xx 2 x MSP430AFE253IPW Four PCB 1×12-pin headers (two male (green PCB) (TSSOP ZIF) and two female) MSP430F11x1, MSP430F11x2, MSP-TS430DW28 28-pin DW MSP430F12x, Four PCB 1×12-pin headers (two male (green PCB) (SSOP ZIF) MSP430F12x2, 2 x MSP430F123IDW and two female) MSP430F21xx Supports devices in 20- and 28-pin DA packages MSP430F11x1, MSP-TS430PW28 28-pin PW MSP430F11x2, Four PCB 1×12-pin headers (two male (green PCB) (TSSOP ZIF) MSP430F12x, 2 x MSP430F2132IPW and two female) MSP430F12x2, MSP430F21xx MSP430F20xx, MSP-TS430PW28A 28-pin PW MSP430G2xxx in 14-, 20-, Four PCB 1×12-pin headers (two male (red PCB) (TSSOP ZIF) and 28-pin PW packages, 2 x MSP430G2452IPW20 and two female) MSP430TCH5E in PW package MSP-TS430DA38 38-pin DA MSP430F22xx, 2 x MSP430F2274IDA Four PCB 1×19-pin headers (two male (green PCB) (TSSOP ZIF) MSP430G2x44, 2 x MSP430G2744IDA and two female) MSP430G2x55 2 x MSP430G2955IDA MSP-TS430QFN23x0 40-pin RHA MSP430F23x0 2 x MSP430F2370IRHA Eight PCB 1×10-pin headers (four male (green PCB) (QFN ZIF) and four female) 14 Get Started Now! SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Kit Contents, MSP-TS430xx Table 1-2. Individual Kit Contents, MSP-TS430xx (continued) Part Number Socket Type Supported Devices Included Devices Headers and Comment MSP-TS430RSB40 40-pin RSB MSP430F51x1, 2 x MSP430F5172IRSB Eight PCB 1×10-pin headers (four male (green PCB) (QFN ZIF) MSP430F51x2 and four female) MSP-TS430RHA40A 40-pin RHA MSP430FR572x, 2 x MSP430FR5739IRHA Eight PCB 1×10-pin headers (four male (red PCB) (QFN ZIF) MSP430FR573x and four female) MSP-TS430DL48 48-pin DL MSP430F42x0 2 x MSP430F4270IDL Four PCB 2×12-pin headers (two male (green PCB) (TSSOP ZIF) and two female) MSP-TS430RGZ48B 48-pin RGZ MSP430F534x 2 x MSP430F5342IRGZ Eight PCB 1×12-pin headers (four male (blue PCB) (QFN ZIF) and four female) MSP-TS430RGZ48C 48-pin RGZ MSP430FR58xx and 2 x MSP430FR5969IRGZ Eight PCB 1×12-pin headers (four male (black PCB) (QFN ZIF) MSP430FR59xx and four female) MSP430F13x, MSP430F14x, MSP430F14x1, MSP430F15x, MSP430F16x, MSP430F16x1, MSP430F23x, TS Kit: MSP-TS430PM64 64-pin PM MSP430F24x, 2 x MSP430F2618IPM; Eight PCB 1×16-pin headers (four male (green PCB) (QFP ZIF) MSP430F24xx, FET Kit: and four female) MSP430F261x, 2 x MSP430F417IPM and MSP430F41x, 2 x MSP430F169IPM MSP430F42x, MSP430F42xA, MSP430FE42x, MSP430FE42xA, MSP430FE42x2, MSP430FW42x MSP-TS430PM64A 64-pin PM MSP430F41x2 2 x MSP430F4152IPM Eight PCB 1×16-pin headers (four male (red PCB) (QFP ZIF) and four female) MSP-TS430RGC64B 64-pin RGC MSP430F530x 2 x MSP430F5310IRGC Eight PCB 1×16-pin headers (four male (blue PCB) (QFN ZIF) and four female) MSP430F522x, MSP-TS430RGC64C 64-pin RGC MSP430F521x , Eight PCB 1×16-pin headers (four male (black PCB) (QFN ZIF) MSP430F523x, 2 x MSP430F5229IRGC and four female) MSP430F524x, MSP430F525x MSP-TS430RGC64USB 64-pin RGC MSP430F550x, 2 x MSP430F5510IRGC or Eight PCB 1×16-pin headers (four male (green PCB) (QFN ZIF) MSP430F551x, 2 x MSP430F5528IRGC and four female) MSP430F552x MSP430F241x, MSP430F261x, MSP-TS430PN80 80-pin PN MSP430F43x, Eight PCB 1×20-pin headers (four male (green PCB) (QFP ZIF) MSP430F43x1, 2 x MSP430FG439IPN and four female) MSP430FG43x, MSP430F47x, MSP430FG47x MSP-TS430PN80A 80-pin PN MSP430F532x 2 x MSP430F5329IPN Eight PCB 1×20-pin headers (four male (red PCB) (QFP ZIF) and four female) MSP-TS430PN80USB 80-pin PN MSP430F552x, 2 x MSP430F5529IPN Eight PCB 1×20-pin headers (four male (green PCB) (QFP ZIF) MSP430F551x and four female) MSP430F43x, MSP-TS430PZ100 100-pin PZ MSP430F43x1, Eight PCB 1×25-pin headers (four male (green PCB) (QFP ZIF) MSP430F44x, 2 x MSP430FG4619IPZ and four female) MSP430FG461x, MSP430 F47xx MSP-TS430PZ100A 100-pin PZ MSP430F471xx 2 x MSP430F47197IPZ Eight PCB 1×25-pin headers (four male (red PCB) (QFP ZIF) and four female) MSP-TS430PZ100B 100-pin PZ MSP430F67xx 2 x MSP430F6733IPZ Eight PCB 1×25-pin headers (four male (blue PCB) (QFP ZIF) and four female) MSP430F645x, MSP-TS430PZ100C 100-pin PZ MSP430F643x, 2 x MSP430F6438IPZ Eight PCB 1×25-pin headers (four male (black PCB) (QFP ZIF) MSP430F535x, and four female) MSP430F533x MSP-TS430PZ5x100 100-pin PZ MSP430F543x, Eight PCB 1×25-pin headers (four male (green PCB) (QFP ZIF) MSP430BT5190, 2 x MSP430F5438IPZ and four female) MSP430SL5438A SLAU278Q–May 2009–Revised February 2014 Get Started Now! 15 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Kit Contents, EM430Fx1x7RF900 www.ti.com Table 1-2. Individual Kit Contents, MSP-TS430xx (continued) Part Number Socket Type Supported Devices Included Devices Headers and Comment MSP-TS430PZ100USB 100-pin PZ MSP430F665x, Eight PCB 1×25-pin headers (four male (green PCB) (QFP ZIF) MSP430F663x, 2 x MSP430F6638IPZ and four female) MSP430F563x MSP430F677x, MSP430F676x, Four PCB 1x26-pin headers (two male MSP-TS430PEU128 128-pin PEU MSP430F674x, 2 x MSP430F67791IPEU and two female) and four PCB 1x38-pin (green PCB) (QFP ZIF) MSP430F677x1, headers (two male and two female) MSP430F676x1, MSP430F674x1 See the device data sheets for device specifications. Device errata can be found in the respective device product folder on the web provided as a PDF document. Depending on the device, errata may also be found in the device bug database at www.ti.com/sc/cgi-bin/buglist.cgi. 1.13 Kit Contents, EM430Fx1x7RF900 • One READ ME FIRST document • One legal notice • Two target socket module MSP-EM430F5137RF900: Two EM430F5137RF900 target socket modules. This is the PCB on which is soldered a CC430F5137 device in a 48-pin RGZ package. A 2×7-pin male connector is also present on the PCB MSP-EM430F6137RF900: Two EM430F6137RF900 target socket modules. This is the PCB on which is soldered a CC430F6137 device in a 64-pin RGC package. A 2×7-pin male connector is also present on the PCB MSP-EM430F6147RF900: Two EM430F6147RF900 target socket modules. This is the PCB on which is soldered a CC430F6147 device in a 64-pin RGC package. A 2×7-pin male connector is also present on the PCB • Two CC430EM battery packs • Four AAA batteries • Two 868- or 915-MHz antennas • Two 32.768-kHz crystals • 18 PCB 2×4-pin headers 1.14 Hardware Installation, MSP-FET430PIF Follow these steps to install the hardware for the MSP-FET430PIF tools: 1. Use the 25-conductor cable to connect the FET interface module to the parallel port of the PC. The necessary driver for accessing the PC parallel port is installed automatically during CCS or IAR Embedded Workbench installation. Note that a restart is required after the CCS or IAR Embedded Workbench installation for the driver to become active. 2. Use the 14-conductor cable to connect the parallel-port debug interface module to a target board, such as an MSP-TS430xxx target socket module. Module schematics and PCBs are shown in Appendix B. 16 Get Started Now! SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware Installation, MSP-FET430UIF 1.15 Hardware Installation, MSP-FET430UIF Follow these steps to install the hardware for the MSP-FET430UIF tool: 1. Install the IDE (CCS or IAR) you plan to use before connecting USB-FET interface to PC. The IDE installation installs drivers automatically. 2. Use the USB cable to connect the USB-FET interface module to a USB port on the PC. The USB FET should be recognized, as the USB device driver is installed automatically. If the driver has not been installed yet, the install wizard starts. Follow the prompts and point the wizard to the driver files. The default location for CCS is c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_CDC or c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_FET_XP_XX, depending of firmware version of the tool. The default location for IAR Embedded Workbench is \Embedded Workbench x.x\ 430\drivers\TIUSBFET\eZ430-UART or \Embedded Workbench x.x\ 430\drivers\, depending of firmware version of the tool. The USB driver is installed automatically. Detailed driver installation instructions can be found in Appendix C. 3. After connecting to a PC, the USB FET performs a self-test during which the red LED may flash for approximately two seconds. If the self-test passes successfully, the green LED stays on. 4. Use the 14-conductor cable to connect the USB-FET interface module to a target board, such as an MSP-TS430xxx target socket module. 5. Ensure that the MSP430 device is securely seated in the socket, and that its pin 1 (indicated with a circular indentation on the top surface) aligns with the "1" mark on the PCB. 6. Compared to the parallel-port debug interface, the USB FET has additional features including JTAG security fuse blow and adjustable target VCC (1.8 V to 3.6 V). Supply the module with up to 60 mA. 1.16 Hardware Installation, eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSPEXP430F5529 To install eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSP-EXP430F5529 tools follow instructions 1 and 2 of Section 1.15 1.17 Hardware Installation, MSP-FET430Uxx, MSP-TS430xxx, FET430F6137RF900, EM430Fx137RF900 Follow these steps to install the hardware for the MSP-FET430Uxx and MSP-TS430xxx tools: 1. Follow instructions 1 and 2 of Section 1.15 2. Connect the MSP-FET430PIF or MSP-FET430UIF debug interface to the appropriate port of the PC. Use the 14-conductor cable to connect the FET interface module to the supplied target socket module. 3. Ensure that the MSP430 device is securely seated in the socket and that its pin 1 (indicated with a circular indentation on the top surface) aligns with the "1" mark on the PCB. 4. Ensure that the two jumpers (LED and VCC) near the 2×7-pin male connector are in place. Illustrations of the target socket modules and their parts are found in Appendix B. SLAU278Q–May 2009–Revised February 2014 Get Started Now! 17 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Important MSP430 Documents on the Web www.ti.com 1.18 Important MSP430 Documents on the Web The primary sources of MSP430 information are the device-specific data sheet and user's guide. The MSP430 web site (www.ti.com/msp430) contains the most recent version of these documents. PDF documents describing the CCS tools (CCS IDE, the assembler, the C compiler, the linker, and the librarian) are in the msp430\documentation folder. A Code Composer Studio specific Wiki page (FAQ) is available, and the Texas Instruments E2E Community support forums for the MSP430 and Code Composer Studio v5 provide additional help besides the product help and Welcome page. PDF documents describing the IAR tools (Workbench C-SPY, the assembler, the C compiler, the linker, and the librarian) are in the common\doc and 430\doc folders. Supplements to the documents (that is, the latest information) are available in HTML format in the same directories. A IAR specific Wiki Page is also available. 18 Get Started Now! SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Chapter 2 SLAU278Q–May 2009–Revised February 2014 Design Considerations for In-Circuit Programming This chapter presents signal requirements for in-circuit programming of the MSP430. Topic ........................................................................................................................... Page 2.1 Signal Connections for In-System Programming and Debugging ............................ 20 2.2 External Power .................................................................................................. 24 2.3 Bootstrap Loader (BSL) ..................................................................................... 24 SLAU278Q–May 2009–Revised February 2014 Design Considerations for In-Circuit Programming 19 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Signal Connections for In-System Programming and Debugging www.ti.com 2.1 Signal Connections for In-System Programming and Debugging MSP-FET430PIF, MSP-FET430UIF, MSP-GANG, MSP-GANG430, MSP-PRGS430 With the proper connections, the debugger and an FET hardware JTAG interface (such as the MSPFET430PIF and MSP-FET430UIF) can be used to program and debug code on the target board. In addition, the connections also support the MSP-GANG430 or MSP-PRGS430 production programmers, thus providing an easy way to program prototype boards, if desired. Figure 2-1 shows the connections between the 14-pin FET interface module connector and the target device required to support in-system programming and debugging for 4-wire JTAG communication. Figure 2-2 shows the connections for 2-wire JTAG mode (Spy-Bi-Wire). The 4-wire JTAG mode is supported on most MSP430 devices, except devices with low pin counts (for example, MSP430G2230). The 2-wire JTAG mode is available on selected devices only. See the Code Composer Studio for MSP430 User's Guide (SLAU157) or IAR Embedded Workbench Version 3+ for MSP430 User's Guide (SLAU138) for information on which interface method can be used on which device. The connections for the FET interface module and the MSP-GANG, MSP-GANG430, or MSP-PRGS430 are identical. Both the FET interface module and MSP-GANG430 can supply VCC to the target board (through pin 2). In addition, the FET interface module, MSP-GANG, and MSP-GANG430 have a VCCsense feature that, if used, requires an alternate connection (pin 4 instead of pin 2). The VCC-sense feature senses the local VCC present on the target board (that is, a battery or other local power supply) and adjusts the output signals accordingly. If the target board is to be powered by a local VCC, then the connection to pin 4 on the JTAG should be made, and not the connection to pin 2. This uses the VCCsense feature and prevents any contention that might occur if the local on-board VCC were connected to the VCC supplied from the FET interface module, MSP-GANG or the MSP-GANG430. If the VCC-sense feature is not necessary (that is, if the target board is to be powered from the FET interface module, MSPGANG, or MSP-GANG430), the VCC connection is made to pin 2 on the JTAG header, and no connection is made to pin 4. Figure 2-1 and Figure 2-2 show a jumper block that supports both scenarios of supplying VCC to the target board. If this flexibility is not required, the desired VCC connections may be hard-wired to eliminate the jumper block. Pins 2 and 4 must not be connected at the same time. Note that in 4-wire JTAG communication mode (see Figure 2-1), the connection of the target RST signal to the JTAG connector is optional when using devices that support only 4-wire JTAG communication mode. However, when using devices that support 2-wire JTAG communication mode in 4-wire JTAG mode, the RST connection must be made. The MSP430 development tools and device programmers perform a target reset by issuing a JTAG command to gain control over the device. However, if this is unsuccessful, the RST signal of the JTAG connector may be used by the development tool or device programmer as an additional way to assert a device reset. 20 Design Considerations for In-Circuit Programming SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 3 5 7 9 11 13 2 4 6 8 10 12 14 TDO/TDI TDI/VPP TMS TCK GND TEST/VPP JTAG VCC TOOL VCC TARGET J1 (see Note A) J2 (see Note A) VCC R1 47 k (see Note B) W C2 10 μF C3 0.1 μF VCC/AVCC/DVCC RST/NMI TDO/TDI TDI/VPP TMS TCK TEST/VPP (see Note C) V /AV /DV SS SS SS MSP430Fxxx C1 10 nF/2.2 nF (see Notes B and E) RST (see Note D) Important to connect www.ti.com Signal Connections for In-System Programming and Debugging A If a local target power supply is used, make connection J1. If power from the debug or programming adapter is used, make connection J2. B The configuration of R1 and C1 for the RST/NMI pin depends on the device family. See the respective MSP430 family user's guide for the recommended configuration. C The TEST pin is available only on MSP430 family members with multiplexed JTAG pins. See the device-specific data sheet to determine if this pin is available. D The connection to the JTAG connector RST pin is optional when using a device that supports only 4-wire JTAG communication mode, and it is not required for device programming or debugging. However, this connection is required when using a device that supports 2-wire JTAG communication mode in 4-wire JTAG mode. E When using a device that supports 2-wire JTAG communication in 4-wire JTAG mode, the upper limit for C1 should not exceed 2.2 nF. This applies to both TI FET interface modules (LPT and USB FET). Figure 2-1. Signal Connections for 4-Wire JTAG Communication SLAU278Q–May 2009–Revised February 2014 Design Considerations for In-Circuit Programming 21 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 3 5 7 9 11 13 2 4 6 8 10 12 14 TEST/SBWTCK MSP430Fxxx RST/NMI/SBWTDIO TDO/TDI TCK GND TEST/VPP JTAG VCC TOOL VCC TARGET 330! R2 J1 (see Note A) J2 (see Note A) Important to connect VCC/AVCC/DVCC V /AV /DV SS SS SS R1 47 k! See Note B C1 2.2 nF See Note B VCC C2 10 μF C3 0.1 μF Signal Connections for In-System Programming and Debugging www.ti.com A If a local target power supply is used, make connection J1. If power from the debug or programming adapter is used, make connection J2. B The device RST/NMI/SBWTDIO pin is used in 2-wire mode for bidirectional communication with the device during JTAG access, and any capacitance that is attached to this signal may affect the ability to establish a connection with the device. The upper limit for C1 is 2.2 nF when using current TI tools. C R2 protects the JTAG debug interface TCK signal from the JTAG security fuse blow voltage that is supplied by the TEST/VPP pin during the fuse blow process. If fuse blow functionality is not needed, R2 is not required (populate 0 Ω) and do not connect TEST/VPP to TEST/SBWTCK. Figure 2-2. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F2xx, MSP430G2xx, and MSP430F4xx Devices 22 Design Considerations for In-Circuit Programming SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 3 5 7 9 11 13 2 4 6 8 10 12 14 TEST/SBWTCK MSP430Fxxx RST/NMI/SBWTDIO TDO/TDI TCK GND JTAG R1 47 k! See Note B VCC TOOL VCC TARGET C1 2.2 nF See Note B J1 (see Note A) J2 (see Note A) Important to connect VCC/AVCC/DVCC V /AV /DV SS SS SS VCC C2 10 μF C3 0.1 μF www.ti.com Signal Connections for In-System Programming and Debugging A Make connection J1 if a local target power supply is used, or make connection J2 if the target is powered from the debug or programming adapter. B The device RST/NMI/SBWTDIO pin is used in 2-wire mode for bidirectional communication with the device during JTAG access, and any capacitance that is attached to this signal may affect the ability to establish a connection with the device. The upper limit for C1 is 2.2 nF when using current TI tools. Figure 2-3. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F5xx and MSP430F6xx Devices SLAU278Q–May 2009–Revised February 2014 Design Considerations for In-Circuit Programming 23 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated External Power www.ti.com 2.2 External Power The MSP-FET430UIF can supply targets with up to 60 mA through pin 2 of the 14-pin connector. Note that the target should not consume more than 60 mA, even as a peak current, as it may violate the USB specification. For example, if the target board has a capacitor on VCC more than 10 μF, it may cause inrush current during capacitor charging that may exceed 60 mA. In this case, the current should be limited by the design of the target board, or an external power supply should be used. The VCC for the target can be selected between 1.8 V and 3.6 V in steps of 0.1 V. Alternatively, the target can be supplied externally. In this case, the external voltage should be connected to pin 4 of the 14-pin connector. The MSP-FET430UIF then adjusts the level of the JTAG signals to external VCC automatically. Only pin 2 (MSP-FET430UIF supplies target) or pin 4 (target is externally supplied) must be connected; not both at the same time. When a target socket module is powered from an external supply, the external supply powers the device on the target socket module and any user circuitry connected to the target socket module, and the FET interface module continues to be powered from the PC through the parallel port. If the externally supplied voltage differs from that of the FET interface module, the target socket module must be modified so that the externally supplied voltage is routed to the FET interface module (so that it may adjust its output voltage levels accordingly). See the target socket module schematics in Appendix B. The PC parallel port can source a limited amount of current. Because of the ultra-low-power requirement of the MSP430, a standalone FET does not exceed the available current. However, if additional circuitry is added to the tool, this current limit could be exceeded. In this case, external power can be supplied to the tool through connections provided on the target socket modules. See the schematics and pictorials of the target socket modules in Appendix B to locate the external power connectors. Note that the MSPFET430PIF is not recommended for new design. 2.3 Bootstrap Loader (BSL) The JTAG pins provide access to the memory of the MSP430 and CC430 devices. On some devices, these pins are shared with the device port pins, and this sharing of pins can complicate a design (or sharing may not be possible). As an alternative to using the JTAG pins, most MSP430Fxxx devices contain a program (a "bootstrap loader") that permits the flash memory to be erased and programmed using a reduced set of signals. The MSP430 Programming Via the Bootstrap Loader User's Guide (SLAU319) describes this interface. See the MSP430 web site for the application reports and a list of MSP430 BSL tool developers. TI suggests that MSP430Fxxx customers design their circuits with the BSL in mind (that is, TI suggests providing access to these signals by, for example, a header). See FAQ Hardware #10 for a second alternative to sharing the JTAG and port pins. 24 Design Considerations for In-Circuit Programming SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix A SLAU278Q–May 2009–Revised February 2014 Frequently Asked Questions and Known Issues This appendix presents solutions to frequently asked questions regarding the MSP-FET430 hardware. Topic ........................................................................................................................... Page A.1 Hardware FAQs ................................................................................................. 26 A.2 Known Issues ................................................................................................... 28 SLAU278Q–May 2009–Revised February 2014 Frequently Asked Questions and Known Issues 25 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware FAQs www.ti.com A.1 Hardware FAQs 1. MSP430F22xx Target Socket Module (MSP-TS430DA38) – Important Information Due to the large capacitive coupling introduced by the device socket between the adjacent signals XIN/P2.6 (socket pin 6) and RST/SBWTDIO (socket pin 7), in-system debugging can disturb the LFXT1 low-frequency crystal oscillator operation (ACLK). This behavior applies only to the Spy-Bi-Wire (2-wire) JTAG configuration and only to the period while a debug session is active. Workarounds: • Use the 4-wire JTAG mode debug configuration instead of the Spy-Bi-Wire (2-wire) JTAG configuration. This can be achieved by placing jumpers JP4 through JP9 accordingly. • Use the debugger option "Run Free" that can be selected from the Advanced Run drop-down menu (at top of Debug View). This prevents the debugger from accessing the MSP430 device while the application is running. Note that, in this mode, a manual halt is required to see if a breakpoint was hit. See the IDE documentation for more information on this feature. • Use an external clock source to drive XIN directly. 2. With current interface hardware and software, there is a weakness when adapting target boards that are powered externally. This leads to an accidental fuse check in the MSP430 device. This is valid for PIF and UIF but is seen most often on the UIF. A solution is being developed. Workarounds: • Connect the RST/NMI pin to the JTAG header (pin 11). LPT and USB tools are able to pull the RST line, which also resets the device internal fuse logic. • Use the debugger option "Release JTAG On Go" that can be selected from the IDE drop-down menu. This prevents the debugger from accessing the MCU while the application is running. Note that in this mode, a manual halt is required to see if a breakpoint was hit. See the IDE documentation for more information on this feature. • Use an external clock source to drive XIN directly. 3. The 14-conductor cable that connects the FET interface module and the target socket module must not exceed 8 inches (20 centimeters) in length. 4. The signal assignment on the 14-conductor cable is identical for the parallel port interface and the USB FET. 5. To use the on-chip ADC voltage references, the capacitor must be installed on the target socket module. See the schematic of the target socket module to populate the capacitor according to the data sheet of the device. 6. To use the charge pump on the devices with LCD+ Module, the capacitor must be installed on the target socket module. See the schematic of the target socket module to populate the capacitor according to the data sheet of the device. 7. Crystals or resonators Q1 and Q2 (if applicable) are not provided on the target socket module. For MSP430 devices that contain user-selectable loading capacitors, see the device and crystal data sheets for the value of capacitance. 8. Crystals or resonators have no effect upon the operation of the tool and the CCS debugger or C-SPY (as any required clocking and timing is derived from the internal DCO and FLL). 9. On devices with multiplexed port or JTAG pins, to use these pin in their port capability: For CCS: "Run Free" (in Run pulldown menu at top of Debug View) must be selected. For C-SPY: "Release JTAG On Go" must be selected. 10. As an alternative to sharing the JTAG and port pins (on low pin count devices), consider using an MSP430 device that is a "superset" of the smaller device. A very powerful feature of the MSP430 is that the family members are code and architecturally compatible, so code developed on one device (for example, one without shared JTAG and port pins) ports effortlessly to another (assuming an equivalent set of peripherals). 26 Frequently Asked Questions and Known Issues SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware FAQs 11. Information memory may not be blank (erased to 0xFF) when the device is delivered from TI. Customers should erase the information memory before its first use. Main memory of packaged devices is blank when the device is delivered from TI. 12. The device current is higher then expected. The device current measurement may not be accurate with the debugger connected to the device. For accurate measurement, disconnect the debugger. Additionally some unused pins of the device should be terminated. See the Connection of Unused Pins table in the device's family user's guide. 13. The following ZIF sockets are used in the FET tools and target socket modules: • 8-pin device (D package): Yamaichi IC369-0082 • 14-pin device (PW package): Enplas OTS-14-065-01 • 14-pin package for 'L092 (PW package): Yamaichi IC189-0142-146 • 24-pin package (PW package): Enplas OTS-24(28)-0.65-02 • 28-pin device (DW package): Wells-CTI 652 D028 • 28-pin device (PW package): Enplas OTS-28-0.65-01 • 38-pin device (DA package): Yamaichi IC189-0382-037 • 40-pin device (RHA package): Enplas QFN-40B-0.5-01 • 40-pin device (RSB package): Enplas QFN-40B-0.4 • 48-pin device (RGZ package): Yamaichi QFN11T048-008 A101121-001 • 48-pin device (DL package): Yamaichi IC51-0482-1163 • 64-pin device (PM package): Yamaichi IC51-0644-807 • 64-pin device (RGC package): Yamaichi QFN11T064-006 • 80-pin device (PN package): Yamaichi IC201-0804-014 • 100-pin device (PZ package): Yamaichi IC201-1004-008 • 128-pin device (PEU package): Yamaichi IC500-1284-009P Enplas: www.enplas.com Wells-CTI: www.wellscti.com Yamaichi: www.yamaichi.us SLAU278Q–May 2009–Revised February 2014 Frequently Asked Questions and Known Issues 27 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Known Issues www.ti.com A.2 Known Issues MSP-FET430UIF Current detection algorithm of the UIF firmware Problem Description If high current is detected, the ICC monitor algorithm stays in a loop of frequently switching on and off the target power supply. This power switching puts some MSP430 devices such as the MSP430F5438 in a state that requires a power cycle to return the device to JTAG control. A side issue is that if the UIF firmware has entered this switch on and switch off loop, it is not possible to turn off the power supply to the target by calling MSP430_VCC(0). A power cycle is required to remove the device from this state. Solution IAR KickStart and Code Composer Essentials that have the MSP430.dll version 2.04.00.003 and higher do not show this problem. Update the software development tool to this version or higher to update the MSP-FET430UIF firmware. MSP-FET430PIF Some PCs do not supply 5 V through the parallel port Problem Description Device identification problems with modern PCs, because the parallel port often does not deliver 5 V as was common with earlier hardware. 1. When connected to a laptop, the test signal is clamped to 2.5 V. 2. When the external VCC becomes less than 3 V, up to 10 mA is flowing in the adapter through pin 4 (sense). Solution Measure the voltage level of the parallel port. If it is too low, provide external 5 V to the VCC pads of the interface. The jumper on a the target socket must be switched to external power. 28 Frequently Asked Questions and Known Issues SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix B SLAU278Q–May 2009–Revised February 2014 Hardware This appendix contains information relating to the FET hardware, including schematics, PCB pictorials, and bills of materials (BOMs). All other tools, such as the eZ430 series, are described in separate productspecific user's guides. SLAU278Q–May 2009–Revised February 2014 Hardware 29 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix B www.ti.com Topic ........................................................................................................................... Page B.1 MSP-TS430D8 ................................................................................................... 31 B.2 MSP-TS430PW14 ............................................................................................... 34 B.3 MSP-TS430L092 ................................................................................................ 37 B.4 MSP-TS430L092 Active Cable ............................................................................. 40 B.5 MSP-TS430PW24 ............................................................................................... 43 B.6 MSP-TS430DW28 ............................................................................................... 46 B.7 MSP-TS430PW28 ............................................................................................... 49 B.8 MSP-TS430PW28A ............................................................................................. 52 B.9 MSP-TS430DA38 ............................................................................................... 55 B.10 MSP-TS430QFN23x0 .......................................................................................... 58 B.11 MSP-TS430RSB40 ............................................................................................. 61 B.12 MSP-TS430RHA40A ........................................................................................... 64 B.13 MSP-TS430DL48 ................................................................................................ 67 B.14 MSP-TS430RGZ48B ........................................................................................... 70 B.15 MSP-TS430RGZ48C ........................................................................................... 73 B.16 MSP-TS430PM64 ............................................................................................... 76 B.17 MSP-TS430PM64A ............................................................................................. 79 B.18 MSP-TS430RGC64B ........................................................................................... 82 B.19 MSP-TS430RGC64C ........................................................................................... 85 B.20 MSP-TS430RGC64USB ....................................................................................... 89 B.21 MSP-TS430PN80 ............................................................................................... 93 B.22 MSP-TS430PN80A ............................................................................................. 96 B.23 MSP-TS430PN80USB ......................................................................................... 99 B.24 MSP-TS430PZ100 ............................................................................................ 103 B.25 MSP-TS430PZ100A .......................................................................................... 106 B.26 MSP-TS430PZ100B .......................................................................................... 109 B.27 MSP-TS430PZ100C .......................................................................................... 112 B.28 MSP-TS430PZ5x100 ......................................................................................... 115 B.29 MSP-TS430PZ100USB ...................................................................................... 118 B.30 MSP-TS430PEU128 .......................................................................................... 122 B.31 EM430F5137RF900 ........................................................................................... 125 B.32 EM430F6137RF900 ........................................................................................... 129 B.33 EM430F6147RF900 ........................................................................................... 133 B.34 MSP-FET430PIF ............................................................................................... 137 B.35 MSP-FET430UIF ............................................................................................... 139 30 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated GND 100nF 330R 10uF/10V 47K 2.2nF GND 330R GND GND green FE4L FE4H GND Ext_PWR Socket: YAMAICHI Type: IC369-0082 Vcc ext int to measure supply current DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 SBW C5 R3 C7 R5 C8 1 2 3 J3 1 2 J4 1 2 J6 1 2 3 J5 R2 D1 1 2 3 4 J1 5 6 7 8 J2 DVCC 1 DVSS 8 P1.2/TA1/A2 2 P1.5/TA0/A5/SCLK 3 P1.6/TA1/A6/SDO/SCL 4 TST/SBWTCK 7 RST/SBWTDIO 6 P1.7/A7/SDI/SDA 5 U1 MSP-TS430D8 GND VCC RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO SBWTCK VCC430 TST/SBWTCK TST/SBWTCK TST/SBWTCK P1.5 P1.6 P1.7 P1.2 Date: 28.07.201111:03:35 Sheet: /11 REV: TITLE: Document Number: MSP-TS430D8 + 1.0 MSP-TS430D8 Target Socket Board www.ti.com MSP-TS430D8 B.1 MSP-TS430D8 Figure B-1. MSP-TS430D8 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 31 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP3 to "ext" Jumper JP2 Open to disconnect LED D1 LED connected to P1.2 Orient Pin 1 of MSP430 device 14 pin connector for debugging only in Spy-Bi-Wire mode (4 Wire JTAG not available) MSP-TS430D8 www.ti.com Figure B-2. MSP-TS430D8 Target Socket Module, PCB 32 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430D8 Table B-1. MSP-TS430D8 Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 J4, J6 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 2 J5 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 3 SBW 1 10-pin connector, male, TH HRP10H-ND 4 J3 1 3-pin header, male, TH SAM1035-03-ND 5 C8 1 2.2nF, CSMD0805 Buerklin 53 D 292 6 C7 1 10uF, 10V, 1210ELKO 478-3875-1-ND 7 R5 1 47K, 0805 541-47000ATR-ND 8 C5 1 100nF, CSMD0805 311-1245-2-ND 9 R2, R3 2 330R, 0805 541-330ATR-ND 10 J1, J2 2 4-pin header, TH SAM1029-04-ND DNP: headers enclosed with kit. Keep vias free of solder. 10,1 J1, J2 1 4-pin socket, TH SAM1029-04-ND DNP: receptacles enclosed with kit. 11 U1 1 SO8 Socket: Type IC369-0082 Manuf.: Yamaichi 12 D1 1 red, LED 0603 13 MSP430 2 MSP430x "DNP: enclosed with kit. Is supplied by TI" 14 PCB 1 50,0mmx44,5mm MSP-TS430D8 Rev. 1.0 SLAU278Q–May 2009–Revised February 2014 Hardware 33 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 12pF 12pF GND 100nF 330R 10uF/10V 47K 2.2nF GND 330R 100nF GND GND GND green Ext_PWR Socket: ENPLAS Type: OTS-14-065 Vcc ext int to measure supply current DNP DNP DNP DNP DNP JTAG -> SBW -> JTAG-Mode selection: 4-wire JTAG: Set jumpers J7 to J12 to position 2-3 2-wire "SpyBiWire": Set jumpers J7 to J12 to position 2-1 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C5 R3 C7 R5 C8 1 2 3 J3 Q1 8 9 10 11 12 13 14 J2 1 2 3 4 5 6 7 J1 1 2 J4 1 2 J6 J5 1 2 3 R2 C3 J7 1 2 3 J8 1 2 3 J9 1 2 3 J10 1 2 3 J11 1 2 3 J12 1 2 3 1 2 3 4 5 6 7 8 9 10 14 13 12 11 D1 P1.0 P1.3 P1.2 P1.1 XOUT XOUT GND XIN XIN VCC RST/SBWTDIO RST/SBWTDIO SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK VCC430 P1.4/TCK P1.4/TCK P1.5/TMS P1.5/TMS P1.6/TDI P1.6/TDI P1.7/TDO P1.7/TDO TDO/SBWTDIO RST/NMI TMS TDI Date: 7/16/2007 8:22:36 AM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430PW14 + 2.0 MSP-TS430PW14 Target Socket Board MSP-TS430PW14 www.ti.com B.2 MSP-TS430PW14 Figure B-3. MSP-TS430PW14 Target Socket Module, Schematic 34 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper J4 Open to disconnect LED Orient Pin 1 of MSP430 device Jumper J6 Open to measure current Connector J3 External power connector Jumper J5 to 'ext' LED connected to P1.0 Jumpers J7 to J12 Close 1-2 to debug in Spy-Bi-Wire Mode. Close 2-3 to debug in 4-wire JTAG mode. www.ti.com MSP-TS430PW14 Figure B-4. MSP-TS430PW14 Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 35 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PW14 www.ti.com Table B-2. MSP-TS430PW14 Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C7 1 10uF, 10V, Tantal Size 511-1463-2-ND B 3 C3, C5 1 100nF, SMD0805 478-3351-2-ND DNP: C3 4 C8 0 2.2nF, SMD0805 DNP 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: Headers and receptacles enclosed with kit. Keep vias free of 6 J1, J2 0 7-pin header, TH solder SAM1029-07-ND : Header SAM1213-07-ND : Receptacle J3, J5, J7, Place jumpers on headers J5, J7, J8, 7 J8, J9, J10, 8 3-pin header, male, TH SAM1035-03-ND J9, J10, J11, J12; Pos 1-2 J11, J12 8 J4, J6 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND Place on: J5, J7-J12; Pos 1-2 10 JTAG 1 14-pin connector, male, HRP14H-ND TH Micro Crystal MS1V-T1K 12 Q1 0 Crystal 32.768kHz, C(Load) = DNP: keep vias free of solder 12.5pF 13 R2, R3 2 330 Ω, SMD0805 541-330ATR-ND 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: OTS-14-0.65-01 Manuf.: Enplas 17 PCB 1 56 x 53 mm 2 layers Adhesive Approximately 6mm For example, 3M 18 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 19 MSP430 2 MSP430F2013IPW DNP: enclosed with kit, supplied by TI 36 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430L092 B.3 MSP-TS430L092 Figure B-5. MSP-TS430L092 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 37 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430L092 www.ti.com Settings of the MSP-TS430L092 Target Socket Figure B-6 shows the PCB layout of the MSP-TS430L092 target socket. The following pinning is recommended: • JP1 is write enable for the EPROM. If this is not set, the EPROM can only be read. • JP2 and JP3 connect device supply with boost converter. They can be opened to measure device current consumption. For default operation, they should be closed. Figure B-6. MSP-TS430L092 Target Socket Module, PCB 38 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430L092 Table B-3. MSP-TS430L092 Bill of Materials Pos. Ref Des No. No. Per Description DigiKey Part No. Comment Board 1 C1, C2 2 330nF, SMD0603 2 C5 1 100n, SMD0603 3 C6 1 10u, SMD0805 4 C10 1 100n, SMD0603 5 EEPROM1 1 M95512 SO08 (SO8) ST Micro M95160R Digikey: 497-8688-1-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2 2 7-pin header, TH Keep vias free of solder. SAM1213-07-ND : Header SAM1035-07-ND : Receptacle 8 J3 1 3-pin header, male, TH SAM1035-03-ND 9 J4, J5 2 FE4L, FE4H 4 pol. Stiftreihe DNP; Keep vias free of solder. 11 J13 1 MICRO_STECKV_10 Reichelt: MicroMaTch- Connector: MM FL 10G 12 JP1, JP2,JP3 3 2-pin header, male, TH SAM1035-02-ND place jumper on header 15 L1 1 33uH, SMD0806 LQH2MCN330K02L Farnell: 151-5557 16 LED1, LED4 2 LEDCHIPLED_0603 Farnell: 1686065 17 Q2 1 BC817-16LT1SMD BC817-16LT1SMD SOT23-BEC 18 R0, R6, R7 3 2K7, SMD0603 19 R1 1 1k, SMD0603 20 R2 1 47k, SMD0603 21 R4,R5, R8, 6 10k, SMD0603 R10, RC, RD 22 RA 1 3.9k, SMD0603 23 RB 1 6.8k, SMD0603 24 U1 1 14 Pin Socket - IC189-0142- Manuf. Yamaichi 146 22 MSP430 2 MSP430L092PWR DNP: Enclosed with kit. Is supplied by TI. SLAU278Q–May 2009–Revised February 2014 Hardware 39 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430L092 Active Cable www.ti.com B.4 MSP-TS430L092 Active Cable Figure B-7. MSP-TS430L092 Active Cable Target Socket Module, Schematic 40 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430L092 Active Cable Figure B-8 shows the PCB layout for the Active Cable. The following pinning is possible: • JP1 has two jumpers (Jumper 1 and Jumper 2) that can be set as shown in Table B-4. Table B-4. MSP-TS430L092 JP1 Settings Jumper 1 Jumper 2 Description Off Off The active cable has no power and does not function. Off On The active cable receives power from target socket. For this option, the target socket must have its own power supply. On Off The active cable receives power from the JTAG connector. The JTAG connector powers the active cable and the target socket. For On On this option, the target socket must not have its own power source, as this would cause a not defined state. • JP2 is for reset. For the standard MSP-TS430L092, this jumper must be set. It sets the reset pin to high and can also control it. Without this jumper on the MSP-TS430L092, reset is set to zero. Figure B-8. MSP-TS430L092 Active Cable Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 41 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430L092 Active Cable www.ti.com Table B-5. MSP-TS430L092 Active Cable Bill of Materials Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 1 C1, C3, C5, 4 100nF, SMD0603 C6 2 C2, C4 2 1uF, SMD0805 3 R1, R10 2 10K, SMD0603 4 R2 1 4K7, SMD0603 5 R5, R6, R7, 4 100, SMD0603 R9 6 R8 1 680k, SMD0603 7 R11, R15 2 1K, SMD0603 8 R12 0 SMD0603 DNP 9 R13 0 SMD0603 DNP 10 R14 1 0, SMD0603 11 IC1 1 SN74AUC1G04DBVR Manu: TI 12 IC2, IC3, IC4 3 SN74AUC2G125DCTR Manu: TI 13 J2 1 MICRO_STECKV_10 Reichelt: MicroMaTch- Connector: MM FL 10G 14 JP1 1 2x2 Header JP2Q Put jumper on Position 1 and 2. Do not mix direction. 15 JP2 1 2-pin header, male, TH SAM1035-02-ND place jumper on header 16 JTAG 1 14-pin connector, male, TH HRP14H-ND 17 Q1 1 BC817-25LT1SMD, SOT23- Digi-Key: BC817- BEC 25LT1GOSCT-ND 18 U1, U2 2 TLVH431IDBVR SOT23-5 Manu: TI 42 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PW24 B.5 MSP-TS430PW24 Figure B-9. MSP-TS430PW24 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 43 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Orient Pin 1 of MSP430 device D1 LED connected to P1.0 Jumper JP3 Open to disconnect LED Connector J5 External power connector Jumper JP1 to "ext" Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode MSP-TS430PW24 www.ti.com Figure B-10. MSP-TS430PW24 Target Socket Module, PCB 44 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PW24 Table B-6. MSP-TS430PW24 Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C5 1 2.2nF, SMD0805 3 C3, C7 2 10uF, 10V, SMD0805 4 C4, C6, C8 3 100nF, SMD0805 478-3351-2-ND 5 D1 1 green LED, SMD0805 P516TR-ND "SAM1029-07- DNP: Headers and receptacles 6 J1, J2 0 12-pin header, TH NDSAM1213-07-ND" enclosed with kit. Keep vias free of solder. (Header & Receptacle) J5, JP1, 7 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND Place jumper on 1-2 of JP4-JP9 JP6, JP7, Place on 1-2 on JP1 JP8, JP9 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND see Pos 7 an 8 10 JTAG 1 14-pin connector, male, HRP14H-ND TH 11 Q1 0 Crystal DNP: keep vias free of solder 12 R1, R7 2 330 Ω, SMD0805 541-330ATR-ND 13 R5, R6, 2 0 Ohm, SMD0805 541-000ATR-ND DNP R5, R6 R8, R9, 14 R4 1 47k Ohm, SMD0805 541-47000ATR-ND 15 U1 1 Socket: OTS 24(28)- Manuf.: Enplas 065-02-00 16 PCB 1 68.5 x 61 mm 2 layers Adhesive Approximately 6mm for example, 3M 17 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 18 MSP430 2 MSP430AFE2xx DNP: enclosed with kit, supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 45 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated ML14 LED3 12pF 12pF GND GND 100nF 560R ML10 JP1Q JP1Q 10uF/10V 50K 10nF 0R 0R 0R - - 0R - U1 SOCK28DW F123 FE14H FE14L 0R GND remove R8 and add R9 (0 Ohm) If external supply voltage: remove R11 and add R10 (0 Ohm) SMD-Footprint Socket: Yamaichi 2.0 MSP-TS430DW28 Target Socket DW28 Type: IC189-0282-042 If external supply voltage: R1, C1, C2 not assembled not assembled 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG D1 C2 C1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 1 2 J5 J4 1 2 C7 R5 C8 R6 R7 R8 R9 R10 R11 R1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 TST 1 VCC 2 P2.5 3 VSS 4 XOUT 5 XIN 6 RST 7 P2.0 8 P2.1 9 P2.2 10 P2.3 19 P2.4 20 P1.0 21 P1.1 22 P1.2 23 P1.3 24 P1.4 25 P1.5 26 P1.6 27 P1.7 28 P3.0 11 P3.1 12 P3.2 13 P3.3 14 P3.4 15 P3.5 16 P3.6 17 P3.7 18 U2 15 16 17 18 19 20 21 22 23 24 25 26 27 28 J2 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 R2 1 2 3 J3 Q1 QUARZ3 P1.0 P1.0 P1.3 P1.3 P1.2 P1.2 P1.1 P1.1 RST/NMI RST/NMI RST/NMI RST/NMI RST/NMI TCK TCK TCK TMS TMS TMS TDI TDI TDI TDO TDO TDO XOUT XOUT VCC GND GND GND P2.3 P2.3 P2.4 P2.4 XIN XIN P2.5 P2.5 P2.2 P2.2 P2.1 P2.1 P2.0 P2.0 TST/VPP TST/VPP TST/VPP P3.0 P3.0 P3.1 P3.1 P3.2 P3.2 P3.3 P3.3 P3.7 P3.7 P3.6 P3.6 P3.5 P3.5 P3.4 P3.4 VCC430 Ext_PWR Date: 11/14/2006 1:26:04 PM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430DW28 + VCC430 MSP-TS430DW28 www.ti.com B.6 MSP-TS430DW28 Figure B-11. MSP-TS430DW28 Target Socket Module, Schematic 46 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper J4 Open to disconnect LED Orient Pin 1 of MSP430 device Jumper J5 Open to measure current Connector J3 External power connector Remove R8 and jumper R9 LED connected to P1.0 www.ti.com MSP-TS430DW28 Figure B-12. MSP-TS430DW28 Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 47 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430DW28 www.ti.com Table B-7. MSP-TS430DW28 Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2, Cover holes while soldering 2 C5 1 100nF, SMD0805 3 C7 1 10uF, 10V Tantal Elko B 4 C8 1 10nF SMD0805 5 D1 1 LED3 T1 3mm yellow RS: 228-4991 Micro Crystal MS1V-T1K 6 Q1 0 QUARZ, Crystal 32.768kHz, C(Load) = DNP: Cover holes while soldering 12.5pF DNP: Headers and receptacles enclosed with kit. Keep vias free of 7 J1, J2 2 14-pin header, TH male solder. : Header : Receptacle DNP: Headers and receptacles enclosed with kit. Keep vias free of 7.1 2 14-pin header, TH solder. female : Header : Receptacle 8 J3 1 3-Pin Connector, male 9 J4, J5 2 2-Pin Connector, male With jumper 10 BOOTST 0 ML10, 10-Pin Conn., m RS: 482-115 DNP, Cover holes while soldering 11 JTAG 1 ML14, 14-Pin Conn., m RS: 482-121 R1, R2, 12 R6, R7, 4 0R, SMD0805 DNP: R1, R2, R9, R10 R8,R9, R10, R11 13 R3 1 560R, SMD0805 14 R5 1 47K, SMD0805 15 U1 1 SOP28DW socket Yamaichi: IC189-0282- 042 16 U2 0 TSSOP DNP 48 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 12pF 12pF GND GND 100nF 330R 10uF/10V - 0R GND GND green 2.2nF 47k GND 0R 0R 330R MSP430F12xx If external supply voltage: remove R11 and add R10 (0 Ohm) 3.1 MSP-TS430PW28: OTS-28-0.65-01 Socket: Enplas Vcc int ext Target Socket Board for MSP430's in PW28 package DNP DNP DNP DNP DNP DNP DNP JTAG -> SBW -> JTAG-Mode selection: 4-wire JTAG: Set jumpers JP4 to JP9 to position 2-3 2-wire "SpyBiWire": Set jumpers JP4 to JP9 to position 1-2 DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C4 R1 1 2 3 4 5 6 7 8 9 10 BOOTST C3 R2 R3 1 2 3 J5 JP1 1 2 3 JP2 1 2 1 2 JP3 D1 C5 R4 JP4 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 JP9 1 2 3 R5 R6 1 2 Q1 R7 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 U1 TST 1 VCC 2 P2.5 3 VSS 4 XOUT 5 XIN 6 RST 7 P2.0 8 P2.1 9 P2.2 10 P2.3 19 P2.4 20 P1.0 21 P1.1 22 P1.2 23 P1.3 24 P1.4 25 P1.5 26 P1.6 27 P1.7 28 P3.0 11 P3.1 12 P3.2 13 P3.3 14 P3.4 15 P3.5 16 P3.6 17 P3.7 18 P1.0 P1.0 RST/NMI TMS TDI VCC GND GND VCC430 VCC430 P2.0 P1.1 P1.1 P3.3 P3.2 P3.1 P3.0 P2.2 P2.2 XIN/P2.6 XIN/P2.6 XOUT/P2.7 XOUT/P2.7 P2.1 RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO P3.4 P3.5 P3.6 P3.7 P2.3 P2.4 P1.2 P1.3 P1.4/TCK P1.4/TCK P1.5/TMS P1.5/TMS P1.6/TDI P1.6/TDI P1.7/TDO P1.7/TDO TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK P2.5 TCK/SBWTCK TDO/SBWTDIO XTLGND Ext_PWR + www.ti.com MSP-TS430PW28 B.7 MSP-TS430PW28 Figure B-13. MSP-TS430PW28 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 49 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Jumper JP3 Open to disconnect LED LED D1 connected to P5.1 Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External Power Supply Jumper JP4 to JP9: Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Orient Pin 1 of Device MSP-TS430PW28 www.ti.com Figure B-14. MSP-TS430PW28 Target Socket Module, PCB 50 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PW28 Table B-8. MSP-TS430PW28 Bill of Materials(1) Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 , Cover holes while soldering 2 C3 1 10uF, 10V Tantal Elko B 3 C4 1 100nF, SMD0805 4 C5 0 2.2nF, SMD0805 DNP 5 D1 1 LED green SMD0603 Micro Crystal MS1V-T1K DNP: Cover holes and 6 Q1 0 QUARZ, Crystal 32.768kHz, C(Load) = neighboring holes while 12.5pF soldering DNP: Headers and receptacles enclosed with 7 J1, J2 2 14-pin header, TH male kit.Keep vias free of solder. : Header : Receptacle DNP: headers and receptacles enclosed with 7.1 2 14-pin header, TH female kit.Keep vias free of solder. : Header : Receptacle 8 J5, IP1 1 3-Pin Connector , male JP1, JP4, 8a JP5, JP6, 7 3-Pin Connector , male Jumper on Pos 1-2 JP7, JP8, JP9 9 JP2, JP3 2 2-Pin Connector , male with Jumper 10 BOOTST 0 ML10, 10-Pin Conn. , m RS: 482-115 DNP: Cover holes while soldering 11 JTAG 1 ML14, 14-Pin Conn. , m RS: 482-121 12 R1, R7 2 330R, SMD0805 12 R2, R3, R5, 0 0R, SMD0805 DNP R6 14 R4 1 47K, SMD0805 15 U1 1 SOP28PW socket Enplas: OTS-28-0.65-01 (1) PCB 66 x 79 mm, two layers; Rubber stand off, four pieces SLAU278Q–May 2009–Revised February 2014 Hardware 51 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated JTAG Mode selection: 4-wire JTAG: Set jumpers J4 to J9 to position 2-3 2-wire "SpyBiWire": Set jumpers J4 to J9 to position 2-1 MSP-TS430PW28A www.ti.com B.8 MSP-TS430PW28A Figure B-15. MSP-TS430PW28A Target Socket Module, Schematic 52 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Orient Pin 1 of MSP430 device Jumper JP3 Open to disconnect LED D1 LED connected to P1.0 Connector J5 External power connector Jumper JP1 to "ext" Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode www.ti.com MSP-TS430PW28A Figure B-16. MSP-TS430PW28A Target Socket Module, PCB (Red) SLAU278Q–May 2009–Revised February 2014 Hardware 53 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PW28A www.ti.com Table B-9. MSP-TS430PW28A Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C5 1 2.2nF, SMD0805 3 C3 1 10uF, 10V, SMD0805 4 C4, C6, 2 100nF, SMD0805 478-3351-2-ND 5 D1 1 green LED, SMD0805 P516TR-ND DNP: Headers and receptacles 6 J1, J2 0 14-pin header, TH enclosed with kit. Keep vias free of solder: (Header & Receptacle) J5, JP1, 7 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND Place jumper on 1-2 of JP4-JP9 JP6, JP7, Place on 1-2 on JP1 JP8, JP9 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND see Pos 7 an 8 10 JTAG 1 14-pin connector, male, HRP14H-ND TH 11 BOOTST 0 DNP Keep vias free of solder Micro Crystal MS3V 12 Q1 0 Crystal 32.768kHz, C(Load) = DNP: keep vias free of solder 12.5pF 13 R1, R7 2 330 Ω, SMD0805 541-330ATR-ND 14 R2, R3,R5, 0 0 Ohm, SMD0805 541-000ATR-ND DNP R2, R3,R5, R6 R6, 15 R4 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: OTS-28-0.65-01 Manuf.: Enplas 17 PCB 1 63.5 x 64.8 mm 2 layers Adhesive Approximately 6mm for example, 3M 18 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 19 MSP430 2 MSP430G2553IPW28 DNP: enclosed with kit, supplied by TI 54 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 12pF 12pF GND GND 100nF 560R 10uF/10V 47k 10nF - 0R GND MSP430F2274IDA GND 330R GND yellow If external supply voltage: remove R11 and add R10 (0 Ohm) IC189-0382-037 Socket: 4-wire JTAG: 2-wire "SpyBiWire": JTAG-Mode selection: Set jumpers JP4 to JP9 to position 2-3 Set jumpers JP4 to JP9 to position 2-1 JTAG -> SBW -> Yamaichi DNP DNP DNP DNP DNP DNP DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C5 R3 1 2 3 4 5 6 7 8 9 10 BOOTST C7 R5 C8 R10 R11 1 2 3 J3 Q1 TEST/SBWTCK 1 P3.5 26 P3.6 27 P1.4/TCK 35 RST/SBWDAT 7 DVCC 2 DVSS 4 P4.7 24 P3.7 28 AVSS 15 AVCC 16 P3.0 11 P3.1 12 P3.2 13 P3.3 14 P4.0 17 P4.1 18 P4.2 19 P3.4 25 P2.5 3 P2.4 30 P2.3 29 P2.2 10 P2.1 9 P2.0 8 P1.5/TMS 36 P1.6/TDI 37 P1.7/TDO 38 P2.7 5 P2.6 6 P4.6 23 P4.5 22 P4.4 21 P4.3 20 P1.0 31 P1.1 32 P1.2 33 P1.3 34 U1 JP1 1 2 3 JP2 1 2 1 2 JP3 1 2 3 JP4 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 R1 JP9 1 2 3 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 1 J1 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 20 J2 D1 P1.0 P1.0 RST/NMI TMS TDI VCC GND GND GND VCC430 VCC430 VCC430 TCK/SBWTCK TDO/SBWTDIO TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK P2.5 P2.0 P2.1 P3.0 P3.1 P3.2 P3.3 P4.0 P4.1 P4.2 P1.7/TDO P1.7/TDO P1.6/TDI P1.6/TDI P1.5/TMS P1.5/TMS P1.4/TCK P1.4/TCK P1.3 P1.2 P1.1 P1.1 P2.4 P2.3 P3.7 P3.6 P3.5 P3.4 P4.7 P4.6 P4.5 P4.4 P4.3 P2.7/XOUT P2.7/XOUT P2.6/XIN P2.6/XIN RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO P2.2 P2.2 Ext_PWR Date: 6/18/2008 11:04:56 AM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430DA38 + 1.3 MSP-TS430DA38: Vcc int ext Target Socket Board for MSP430F2247IDA www.ti.com MSP-TS430DA38 B.9 MSP-TS430DA38 Figure B-17. MSP-TS430DA38 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 55 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Orient pin 1 of MSP430 device LED connected to P1.0 Connector J3 External power connector Jumper JP1 to 'ext' Jumper JP3 Open to disconnect LED Jumper JP2 Open to measure current Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire Mode, Close 2-3 to debug in 4-wire JTAG Mode MSP-TS430DA38 www.ti.com Figure B-18. MSP-TS430DA38 Target Socket Module, PCB 56 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430DA38 Table B-10. MSP-TS430DA38 Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 0 2.2nF, SMD0805 DNP 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: headers and receptacles enclosed with 6 J1, J2 0 19-pin header, TH kit.Keep vias free of solder. SAM1029-19-ND : Header SAM1213-19-ND : Receptacle "J3, JP1, Place jumpers on headers 7 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND JP1, JP4,JP5, JP6, JP7, JP6, JP7, JP8, JP9; Pos 1-2 JP8, JP9" 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND Place on: JP1 - JP9; Pos 1- 2 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R1, R3 2 330 Ω, SMD0805 541-330ATR-ND 14 R10, R11 0 0 Ω, SMD0805 541-000ATR-ND DNP 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC189-0382--037 Manuf.: Yamaichi 17 PCB 1 67 x 66 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430F2274IDA DNP: enclosed with kit supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 57 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430QFN23x0 www.ti.com B.10 MSP-TS430QFN23x0 Figure B-19. MSP-TS430QFN23x0 Target Socket Module, Schematic 58 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated LED connected to P1.0 Connector J5 External power connector Jumper JP1 to 'ext' Jumper JP3 Open to disconnect LED Jumper JP2 Open to measure current www.ti.com MSP-TS430QFN23x0 Figure B-20. MSP-TS430QFN23x0 Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 59 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430QFN23x0 www.ti.com Table B-11. MSP-TS430QFN23x0 Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3 1 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C4 1 100nF, SMD0805 478-3351-2-ND 4 C5 1 10nF, SMD0805 478-1383-2-ND 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: headers and receptacles enclosed with 6 J1, J2, J3, 0 10-pin header, TH kit.Keep vias free of solder. J4 SAM1034-10-ND : Header SAM1212-10-ND : Receptacle 7 J5, JP1 2 3-pin header, male, TH SAM1035-03-ND Place jumper on header JP1; Pos 1-2. 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 3 Jumper 15-38-1024-ND Place on: JP1, JP2, JP3 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R1 1 330 Ω, SMD0805 541-330ATR-ND 14 R2, R3 0 0 Ω, SMD0805 541-000ATR-ND DNP 15 R4 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: QFN-40B-0.5-01 Manuf.: Enplas 17 PCB 1 79 x 66 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430F2370IRHA DNP: enclosed with kit supplied by TI 60 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RSB40 B.11 MSP-TS430RSB40 Figure B-21. MSP-TS430RSB40 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 61 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Orient Pin 1 of MSP430 device Jumper JP3 Open to disconnect LED D1 LED connected to P1.0 Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Connector J5 External power connector Jumper JP1 to "ext" MSP-TS430RSB40 www.ti.com Figure B-22. MSP-TS430RSB40 Target Socket Module, PCB 62 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RSB40 Table B-12. MSP-TS430RSB40 Bill of Materials Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 2 C3, C7, C10, 3 10uF, 10V, SMD 0805 445-1371-1-ND DNP C12 C12 3 C4, C6, C8, 3 100nF, SMD0805 311-1245-2-ND DNP C11 C11 4 C5 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 4 10-pin header, TH Keep vias free of solder. : Header : Receptacle DNP: headers and receptacles enclosed with kit. 7.1 4 10-pin header, TH Keep vias free of solder. : Header : Receptacle JP1, JP4,JP5, Jumper: 1-2 on JP1, JP10; 2- 8 JP6, JP7, 9 3-pin header, male, TH SAM1035-03-ND 3 on JP4-JP9 JP8, JP9, J5, JP10 9 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP. Keep vias free of solder 12 U1 1 QFN-40B-0.4_ Enplas ENPLAS_SOCKET Micro Crystal MS3V-T1R DNP: Q1. Keep vias free of 13 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF Place on: JP1, JP2, JP3, 15 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 16 R1,R7 2 330R SMD0805 R2, R3, R5, 17 R6, R8, R9, 3 0R SMD0805 DNP R2, R3, R5, R6 R10 18 R4 1 47k SMD0805 19 MSP430 2 MSP430F5132 DNP: enclosed with kit. Is supplied by TI 20 Rubber stand 4 select appropriate; for apply to corners at bottom off example, Buerklin: 20H1724 side SLAU278Q–May 2009–Revised February 2014 Hardware 63 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RHA40A www.ti.com B.12 MSP-TS430RHA40A Figure B-23. MSP-TS430RHA40A Target Socket Module, Schematic 64 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Connector J5 External power connector Jumper JP1 to "ext" Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 Jumper JP3 Open to disconnect LED Orient Pin 1 of MSP430 device www.ti.com MSP-TS430RHA40A Figure B-24. MSP-TS430RHA40A Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 65 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RHA40A www.ti.com Table B-13. MSP-TS430RHA40A Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 2 C5 0 2.2nF, SMD0805 DNP C12 3 C3, C7 2 10uF, 10V, SMD0805 5 DNP C11 4 C4, C6 2 100nF, SMD0805 478-3351-2-ND 5 C9 1 470nF, SMD0805 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. Keep vias free of 7 J1, J2, J3, 4 10-pin header, TH solder. J4 : Header : Receptacle DNP: headers and receptacles enclosed with kit. Keep vias free of 7.1 4 10-pin header, TH solder. : Header : Receptacle J5, JP1, 8 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND Place jumper on 1-2 of JP4-JP9; JP6, JP7, Place on 1-2 on JP1 JP8, JP9 9 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10 9 Jumper 15-38-1024-ND see Pos 8 an 9 11 JTAG 1 14-pin connector, male, HRP14H-ND TH 12 BOOTST 0 10-pin connector, male, DNP. Keep vias free of solder TH 13 U1 1 Socket: QFN-40B-0.5-01 Manuf.: Enplas Micro Crystal MS3V-T1R 14 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1. Keep vias free of solder 12.5pF 15 R1,R7 2 330R SMD0805 541-330ATR-ND R2, R3, 16 R5, R6, 2 0 Ohm, SMD0805 541-000ATR-ND DNP:R2, R3, R5, R6 R8, R9, 17 R4 1 47k SMD0805 18 PCB 1 79 x 66 mm 2 layers Rubber select appropriate; for 19 stand off 4 example, Buerklin: apply to corners at bottom side 20H1724 20 MSP430 2 MSP430N5736IRHA DNP: enclosed with kit. Is supplied by TI 66 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated ML14 LED3 12pF 12pF GND GND 100nF 560R ML10 JP1Q JP1Q 10uF/10V 47K 10nF 0R 0R GND 0R 0R 10uF/10V GND IC51-1387.KS-15186 100nF 1.3 MSP-TS430DL48 Target Socket DL48 Q1, C1, C2 not assembled 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG D1 C2 C1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 1 2 J5 J4 1 2 C7 R5 C8 R6 R7 1 2 3 J3 Q1 QUARZ3 J2 1 3 5 2 4 6 7 9 8 10 11 13 15 12 14 16 17 19 18 20 21 23 22 24 1 3 5 2 4 6 7 9 8 10 11 13 15 12 14 16 17 19 18 20 21 23 22 24 J1 R12 R4 JP1 1 2 3 1 2 3 JP2 C4 U1 TDO/TDI 1 TDI/TCLK 2 TMS 3 TCK 4 RST/NMI 5 DVCC 6 DVSS 7 XIN 8 XOUT 9 AVSS 10 AVCC 11 VREF+ 12 P6.0 13 P6.1 14 P6.2 15 P6.3 16 P6.4 17 P6.5 18 P6.6 19 P6.7 20 P2.5 39 P2.4 40 P2.3 41 P2.2 42 P2.1 43 P2.0 44 COM0 45 P5.2 46 P5.3 47 P5.4 48 LCDREF 29 LCDCAP 30 P5.1 31 P5.0 32 P5.5 33 P5.6 34 P5.7 35 S5 36 P2.7 37 P2.6 38 P1.7 21 P1.6 22 P1.5 23 P1.4 24 P1.0 28 P1.1 27 P1.2 26 P1.3 25 C3 P1.0 P1.0 RST/NMI RST/NMI RST/NMI TCK TCK TCK TMS TMS TDI TDI TDO TDO XOUT XOUT GND GND GND XIN XIN BSL_TX VCC BSL_RX Ext_PWR Date: 11/14/2006 1:24:44 PM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430DL48 + + Vcc ext int int ext Vcc www.ti.com MSP-TS430DL48 B.13 MSP-TS430DL48 Figure B-25. MSP-TS430DL48 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 67 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper J4 Open to disconnect LED LED connected to P1.0 Orient pin 1 of MSP430 device Jumper J5 Open to measure current Connector J3 External power connector Jumper JP1 to ‘ext’ MSP-TS430DL48 www.ti.com Figure B-26. MSP-TS430DL48 Target Socket Module, PCB 68 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430DL48 Table B-14. MSP-TS430DL48 Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C4, C7 2 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C3, C5 2 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 D1 1 yellow LED, TH, 3mm, T1 511-1251-ND DNP: Headers and receptacles enclosed with 6 J1, J2 0 24-pin header, TH kit.Keep vias free of solder. SAM1034-12-ND : Header SAM1212-12-ND : Receptacle 7 J3, JP1, JP2 2 3-pin header, male, TH SAM1035-03-ND Place jumper on header JP1; Pos 1-2. DNP: JP2 8 J4, J5 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 3 Jumper 15-38-1024-ND Place on: JP1, J4, J5 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R3 1 560 Ω, SMD0805 541-560ATR-ND 14 R4, R6, R7, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R6, R7 R12 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC51-1387 KS- Manuf.: Yamaichi 15186 17 PCB 1 58 x 66 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430F4270IDL DNP: Enclosed with kit supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 69 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGZ48B www.ti.com B.14 MSP-TS430RGZ48B Figure B-27. MSP-TS430RGZ48B Target Socket Module, Schematic 70 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to disconnect LED Connector J5 External power connector Jumper JP1 to "ext" Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 Jumper JP1 Open to measure current Orient Pin 1 of MSP430 device www.ti.com MSP-TS430RGZ48B Figure B-28. MSP-TS430RGZ48B Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 71 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGZ48B www.ti.com Table B-15. MSP-TS430RGZ48B Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3, C4 0 47pF, SMD0805 DNP 3 C6, C7, 3 10uF, 6.3V, SMD0805 C12 4 C5, C11, 4 100nF, SMD0805 311-1245-2-ND C13, C14 5 C8 1 2.2nF, SMD0805 6 C9 1 470nF, SMD0805 478-1403-2-ND 7 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-12-ND DNP: Headers and receptacles 8 J4 0 12-pin header, TH (Header) SAM1213-12- enclosed with kit. Keep vias free of ND (Receptacle) solder: 9 J5 1 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, 10 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP6, JP7, JP8, JP9, JP10 place JP8, JP9, jumpers on pins 1-2 on JP3, JP10 11 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 12 9 Jumper 15-38-1024-ND See Pos. 10and Pos. 11 13 JTAG 1 14-pin connector, male, HRP14H-ND TH 14 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH Micro Crystal MS3V-T1R 15 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1 Keep vias free of solder 12.5pF 16 Q2 0 Crystal Q2: 4MHz Buerklin: DNP: Q2 Keep vias free of solder 78D134 Insulating http://www.ettinger.de/Ar 17 disk to Q2 0 Insulating disk to Q2 t_Detail.cfm?ART_ART NUM=70.08.121 18 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, R6, 19 R8, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11,R12 R9,R10, R11, R12 20 R5 1 47k Ω, SMD0805 541-47000ATR-ND 21 U1 1 Socket: QFN11T048- Manuf.: Yamaichi 008_A101121_RGZ48 22 PCB 1 81 x 76 mm 2 layers Adhesive Approximately 6mm for example, 3M 23 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 24 MSP430 2 MSP430F5342IRGZ DNP: enclosed with kit, supplied by TI 72 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated DNP DNP DNP GND GND 100nF 330R 0R - GND GND 47k 1.1nF GND 0R 0R 0R 1uF/10V QUARZ5 1uF/10V 100nF green DNP yellow (DNP) DNP red (DNP) 0R GND DNP DNP 0R 0R QUARZ5 EVQ11 0R DNP DNP If external supply voltage: remove R3 and add R2 (0 Ohm) 1.3 Ext_PWR MSP-TS430RGZ48C Vcc int ext Target Socket Board for MSP430FR58xx, FR59xx IRGZ DNP DNP DNP DNP DNP JTAG -> SBW -> JTAG-Mode selection: 4-wire JTAG: Set jumpers JP3 to JP8 to position 2-3 2-wire "SpyBiWire": Set jumpers JP3 to JP8 to position 1-2 connection by via DNP DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C4 R1 1 2 3 4 5 6 7 8 9 10 BOOTST R3 R2 1 2 3 J2 J1 1 2 3 JP1 1 2 1 2 JP9 R4 C5 1 2 3 JP3 1 2 3 JP4 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 R5 R6 R7 C3 Q1 C7 C6 D1 R10 1 2 JP10 D2 R11 1 2 JP11 D3 R12 JP2 1 2 C8 C9 R9 R8 Q2 SV4 1 2 3 4 5 6 7 8 9 10 11 12 SV1 1 2 3 4 5 6 7 8 9 10 11 12 SV2 1 2 3 4 5 6 7 8 9 10 11 12 SV3 1 2 3 4 5 6 7 8 9 10 11 12 1 1_P1.0 2 2_P1.1 3 3_P1.2 4 4_P3.0 5 5_P3.1 6 6_P3.2 7 7_P3.3 8 8_P4.7 9 9_P1.3 10 10_P1.4 11 11_P1.5 12 12_PJ.0_TDO 13 13_PJ.1_TDI 14 14_PJ.2_TMS 15 15_PJ.3/TCK 16 16_P4.0 17 17_P4.1 18 18_P4.2 19 19_P4.3 20 20_P2.5 21 21_P2.6 22 22_TEST/SBWTCK 23 23_RST/SBWTDIO 24 24_P2.0 25_P2.1 25 26_P2.2 26 27_P3.4 27 28_P3.5 28 29_P3.6 29 30_P3.7 30 31_P1.6 31 32_P1.7 32 33_P4.4 33 34_P4.5 34 35_P4.6 35 36_DVSS 36 37_DVCC 37 38_P2.7 38 39_P2.3 39 40_P2.4 40 41_AVSS 41 42_HFXIN 42 43_HFXOUT 43 44_AVSS 44 45_LFXIN 45 46_LFXOUT 46 47_AVSS 47 48_AVCC 48 U1 SW1 R13 TP1TP2 SW2 R14 P1.0 P1.0 RST/NMI TMS TDI VCC GND P1.1 P1.1 RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO TCK/SBWTCK TDO/SBWTDIO PJ.0/TDO PJ.0/TDO PJ.2/TMS PJ.2/TMS PJ.3/TCK PJ.3/TCK PJ.1/TDI PJ.1/TDI P1.2 P1.2 P2.0 P2.0 P2.1 P2.1 P1.3 P1.3 P1.4 P1.5 AVCC AVCC AVSS AVSS AVSS AVSS LFXOUT LFXIN LFGND HFGND HFXOUT HFXIN P2.4 P2.3 P2.7 DVCC DVCC DVCC DVCC DVSS DVSS P4.6 P4.5 P4.4 P1.7 P1.6 P3.7 P3.6 P3.5 P3.4 P2.2 P2.6 P2.5 P4.3 P4.2 P4.1 P4.0 P4.7 P3.3 P3.2 P3.1 P3.0 TEST/SBWTCK1 TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK www.ti.com MSP-TS430RGZ48C B.15 MSP-TS430RGZ48C Figure B-29. MSP-TS430RGZ48C Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 73 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGZ48C www.ti.com Figure B-30. MSP-TS430RGZ48C Target Socket Module, PCB Table B-16. MSP-TS430RGZ48C Revision History Revision Comments 1.2 Initial release LFOSC pins swapped at SV1 (9-10). 1.3 HFOSC pins swapped at SV1 (6-7). BOOTST pin 4 now directly connected to the device RST/SBWTDIO pin. 74 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGZ48C Table B-17. MSP-TS430RGZ48C Bill of Materials Number Pos Ref Des Per Description DigiKey Part Number Comment Board 1 SV1, SV2, SV3, 4 12-pin header, TH DNP: headers and receptacles enclosed with kit. SV4 Keep vias free of solder. SAM1029-12-ND : Header : Receptacle 1.1 SV1, SV2, SV3, 4 12-pin receptable, TH DNP: headers and receptacles enclosed with kit. SV4 Keep vias free of solder. : Header SAM1213-12-ND : Receptacle 2 JP1, JP2, JP9 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header 3 JP10, JP11 2 2-pin header, male, TH SAM1035-02-ND DNP 4 J1, JP3, JP4, JP5, 7 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 2-3 JP6, JP7, JP8 5 J2 1 3-pin header, male, TH SAM1035-03-ND 6 JP1, JP2, JP9, J1, 10 Jumper 15-38-1024-ND Place on: JP1, JP2, JP9, J1, JP3, JP4, JP5, JP6, JP3, JP4, JP5, JP7, JP8 JP6, JP7, JP8 7 R2, R3, R5, R6, 9 DNP, 0805 DNP R8, R9, R10, R11, R14 8 R12, R13, R7 3 0R, 0805 541-000ATR-ND 9 C5 1 1.1nF, CSMD0805 490-1623-2-ND 10 C3, C7 2 1uF, 10V, CSMD0805 490-1702-2-ND 11 R4 1 47k, 0805 541-47000ATR-ND 12 C4, C6 2 100nF, CSMD0805 311-1245-2-ND 13 R1 1 330R, 0805 541-330ATR-ND 14 C1, C2, C8, C9 4 DNP, CSMD0805 DNP 15 SW1, SW2 2 EVQ-11L05R P8079STB-ND DNP, Lacon: 1251459 16 BOOTST 1 10-pin connector, male, TH HRP10H-ND DNP, keep vias free of solder 17 JTAG 1 14-pin connector, male, TH HRP14H-ND 18 Q1 1 DNP: MS3V-TR1 (32768kHz, depends on application Micro Crystal, DNP, enclosed in kit, keep vias 20ppm, 12.5pF) free of solder 19 Q2 1 DNP, Christal depends on application DNP, keep vias free of solder 20 U1 1 Socket: QFN11T048-008 Manuf.: Yamaichi A101121-001 20.1 U1 1 MSP430 DNP: enclosed with kit. Is supplied by TI. 21 D1 1 green LED, DIODE0805 P516TR-ND 22 D3 1 red (DNP), DIODE0805 DNP 23 D2 1 yellow (DNP), DIODE0805 DNP 24 TP1, TP2 2 Testpoint DNP, keep pads free of solder 25 Rubber stand off 4 Buerklin: 20H1724 apply to corners at bottom side 26 PCB 1 79.6 x 91.0 mm MSP-TS430RGZ48C 2 layers, black solder mask Rev. 1.2 SLAU278Q–May 2009–Revised February 2014 Hardware 75 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated ML14 LED3 0R 12pF 12pF 12pF 12pF GND GND 0R 100nF 560R ML10 JP1Q JP1Q 10uF/6,3V 10uF/10V 47K 10nF 0R 0R 0R - - 0R - 0R 0R FE16-1-1 FE16-1-2 FE16-1-3 FE16-1-4 PWR3 GNDGND - MSP64PM not assembled not assembled not assembled not assembled enhancement reserved for future JTAG 1 3 5 7 9 11 13 2 4 6 12 14 8 10 D1 R2 C2 C1 C3 C4 R1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 J7 1 2 J6 1 2 C6 C7 R5 C8 R6 R7 R8 R9 R10 R11 R12 R13 R14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 J2 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 J3 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 J4 J5 1 2 3 R4 Q1 LFXTCLK XTCLK U2 DVCC 2 3 4 5 6 7 XIN XOUT 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 TDO TDI TMS TCK RST 59 60 61 AVSS DVSS AVCC RST/NMI TCK TMS TDI TDO VCC Date: 3/14/2006 10:46:30 AM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430PM64 + + 1 MSP-TS430PM64 Target Socket PM64 Yamaichi IC51-0644-807 Socket: 1.2 for F14x and F41x Open J6 if LCD is connected If external supply voltage: remove R8 and add R9 (0 Ohm) If external supply voltage: remove R11 and add R10 (0 Ohm) For BSL usage add: R6 R7 R13 R14 MSP430F14x : 0 0 open open MSP430F41x : open open 0 0 MSP-TS430PM64 www.ti.com B.16 MSP-TS430PM64 NOTE: Connections between the JTAG header and pins XOUT and XIN are no longer required and should not be made. Figure B-31. MSP-TS430PM64 Target Socket Module, Schematic 76 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connection Remove R8 and jumper R9 LED connected to pin 12 Jumper J6 Open to disconnect LED Jumper J7 Open to measure current Orient Pin 1 of MSP430 device www.ti.com MSP-TS430PM64 Figure B-32. MSP-TS430PM64 Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 77 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PM64 www.ti.com Table B-18. MSP-TS430PM64 Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 1.1 C3, C4 0 47pF, SMD0805 DNP: Only recommendation. Check your crystal spec. 2 C6, C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND DNP: C6 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: Headers and receptacles enclosed with 7 J1, J2, J3, J4 0 16-pin header, TH kit.Keep vias free of solder. SAM1029-16-ND : Header SAM1213-16-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND 9 J6, J7 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 11 2 Jumper 15-38-1024-ND Place on: J6, J7 12 JTAG 1 14-pin connector, male, TH HRP14H-ND 13 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V-T1K DNP: Keep vias free of 14 Q1, Q2 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 15 R3 1 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, R6, R7, R8, DNP: R4, R6, R7, R9, R10, 16 R9, R10, 3 0 Ω, SMD0805 541-000ATR-ND R11, R12, R13, R14 R11, R12, R13, R14 17 R5 1 47k Ω, SMD0805 541-47000ATR-ND 18 U1 1 Socket: IC51-0644-807 Manuf.: Yamaichi 19 PCB 1 78 x 75 mm 2 layers 20 Rubber 4 select appropriate Apply to corners at bottom standoff side 21 MSP430 22 MSP430F2619IPM DNP: Enclosed with kit MSP430F417IPM supplied by TI 78 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 0R 12pF 12pF GND GND 0R 100nF 330R 10uF/6.3V 0R 0R 0R 0R PWR3 GND 47k 2.2nF 330R GND GND 100nF GND 0R 0R MSP-TS430PM64A Target Socket DNP Yamaichi IC51-0644-807 Socket: DNP 1.1 for F4152 Open JP1 if LCD is connected JTAG -> SBW -> DNP DNP DNP DNP DNP DNP DNP Vcc ext int TEST/SBWTCK RST/SBWTDIO P7.0/TDO P7.1/TDI P7.2/TMS P7.3/TCK ADD LCD-CAP! DNP DNP JTAG 1 3 5 7 9 11 13 2 4 6 12 14 8 10 R2 C2 C1 R1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 C6 R10 R11 R13 R14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 J2 J3 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 J4 J5 1 2 3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1 2 3 4 5 6 7 8 9 11 12 13 14 15 10 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 1 2 Q1 R4 C3 1 2 3 JP4 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 R6 JP9 1 2 3 1 2 JP1 JP2 1 2 JP3 1 2 3 D1 C4 R5 R7 RST/NMI TMS TDI VCC GND XTLGND TCK/SBWTCK TDO/SBWTDIO VCC430 VCC430 VCC430 P5.1 P5.1 AVCC AVCC AVSS AVSS P1.0 P1.1 XIN XOUT A A A B B B C C D D E E F F Date: 3/29/2011 3:07:02 PM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430PM64A + TEST/SBWTCK RST/SBWTDIO If supplied locally: populate R10 (0R), remove R11 If supplied by interface: populate R11 (0R), remove R10 www.ti.com MSP-TS430PM64A B.17 MSP-TS430PM64A Figure B-33. MSP-TS430PM64A Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 79 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Jumper JP1 Open to disconnect LED LED D1 connected to P5.1 Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External Power Supply Jumper JP4 to JP9: Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Orient Pin 1 of Device MSP-TS430PM64A www.ti.com Figure B-34. MSP-TS430PM64A Target Socket Module, PCB 80 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PM64A Table B-19. MSP-TS430PM64A Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2, 0 12pF, SMD0805 DNP 2 C3 0 2.2nF, SMD0805 DNP 3 C6, 1 10uF, 10V, Tantal Size B 511-1463-2-ND 4 C4, C5 2 100nF, SMD0805 478-3351-2-ND 5 D1 1 green LED, SMD0805 P516TR-ND DNP: Headers and receptacles enclosed with kit. 6 J1, J2, J3, J4 0 16-pin header, TH Keep vias free of solder. SAM1029-16-ND : Header SAM1213-16-ND : Receptacle J5, JP3, JP4, 7 JP5, JP6, 8 3-pin header, male, TH SAM1035-03-ND JP7, JP8, JP9 8 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 2 Jumper 15-38-1024-ND Place on: J6, J7 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R3, R6 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R5, 14 R7, R9, R10, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R5, R7, R9, R10, R11, R11, R13, R13, R14 R14 15 R4 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC51-0644-807 Manuf.: Yamaichi 17 PCB 1 78 x 75 mm 4 layers 18 Rubber stand 4 select appropriate Apply to corners at bottom off side 19 MSP430 2 MSP430F4152IPM DNP: Enclosed with kit supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 81 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64B www.ti.com B.18 MSP-TS430RGC64B Figure B-35. MSP-TS430RGC64B Target Socket Module, Schematic 82 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to disconnect LED Connector J5 External power connector Jumper JP3 to "ext" Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 If the system should be supplied via LDOI (J6), close JP4 and set JP3 to external Orient Pin 1 of MSP430 device www.ti.com MSP-TS430RGC64B Figure B-36. MSP-TS430RGC64B Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 83 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64B www.ti.com Table B-20. MSP-TS430RGC64B Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3, C4 0 47pF, SMD0805 DNP 3 C6, C7, C10 3 10uF, 6.3V, SMD0805 C5, C11, 4 C13, C14, 5 100nF, SMD0805 311-1245-2-ND C15 5 C8 1 2.2nF, SMD0805 6 C9 1 470nF, SMD0805 478-1403-2-ND 7 C16 1 4.7uF, SMD0805 8 C17 1 220nF, SMD0805 9 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-16-ND DNP: Headers and receptacles 10 J4 0 16-pin header, TH (Header) SAM1213-16- enclosed with kit. Keep vias free of ND (Receptacle) solder: 11 J5 , J6 2 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, JP6, 12 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP7, JP8, JP9, JP10 place jumpers on JP8, JP9, pins 1-2 on JP3, JP10 13 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 14 10 Jumper 15-38-1024-ND See Pos. 12 and Pos. 13 15 JTAG 1 14-pin connector, male, HRP14H-ND TH 16 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH Micro Crystal MS3V-T1R 17 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1 Keep vias free of solder 12.5pF 18 Q2 0 Crystal Q2: 4MHz Buerklin: DNP: Q2 Keep vias free of solder 78D134 Insulating http://www.ettinger.de/Art 19 disk to Q2 0 Insulating disk to Q2 _Detail.cfm?ART_ARTNU M=70.08.121 20 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 21 R6, R8, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11,R12 R9,R10, R11, R12 22 R5 1 47k Ω, SMD0805 541-47000ATR-ND 23 U1 1 Socket: QFN11T064-006- Manuf.: Yamaichi N-HSP 24 PCB 1 85 x 76 mm 2 layers Adhesive Approximately 6mm for example, 3M 25 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 26 D3,D4 27 MSP430 2 MSP430F5310 RGC DNP: enclosed with kit, supplied by TI 84 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGC64C B.19 MSP-TS430RGC64C The MSP-TS430RGC64C target board has been designed with the option to operate with the target device DVIO input voltage supplied via header J6 (see Figure B-37). This development platform does not supply the 1.8-V DVIO rail on board and it MUST be provided by external power supply for proper device operation. For correct JTAG connection, programming, and debug operation, it is important to follow this procedure: 1. Make sure that the VCC and DVIO voltage supplies are OFF and that the power rails are fully discharged to 0 V. 2. Enable the 1.8-V external DVIO power supply. 3. Enable the 1.8-V to 3.6-V VCC power supply (alternatively, this supply can be provided from the MSPFET430UIF JTAG debugger interface). 4. Connect the MSP-FET430UIF JTAG connector to the target board. 5. Start the debug session using IAR or CCS IDE. For more information on debugging the MSP4and MSP430F525x, see the device-specific data sheets (MSP430F522x: SLAS718; MSP430F525x: SLAS903) and Designing with MSP430F522x and MSP430F521x Devices (SLAA558). For debugging of devices (MSP430F524x and MSP430F523x) without use of the DVIO power domain, short JP4 with the jumper. SLAU278Q–May 2009–Revised February 2014 Hardware 85 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1.1 MSP-TS430RGC64C TI Friesing Tools MSP430 1 1 12/14/10 S.G. 1 2 3 4 5 6 A B C D A B C D Design: Appr.: Rev.: Comment: Drawing#: Revision: File: Page: Size: Title of Schematic of Mentor Pads Logic V9 Date: Name: 1 2 3 4 5 6 MSP-TS430RGC64C.sch <-- SBW <-- JTAG ext int VCC DVIO Power Circle BSL 1 P6.0/CB0/A0 2 P6.1/CB1/A1 3 P6.2/CB2/A2 4 P6.3/CB3/A3 5 P6.4/CB4/A4 6 P6.5/CB5/A5 7 P6.6/CB6/A6 8 P6.7/CB7/A7 9 P5.0/A8/VEREF+ 10 P5.1/A9/VEREF- 11 AVCC 12 P5.4/XIN 13 P5.5/XOUT 14 AVSS 15 DVCC 16 DVSS 17 VCORE 18 P1.0/TA0CLK/ACLK 19 P1.1/TA0.0 20 P1.2/TA0.1 21 P1.3/TA0.2 22 P1.4/TA0.3 23 P1.5/TA0.4 24 P1.6/TA1CLK/CBOUT 25 P1.7/TA1.0 26 P2.0/TA1.1 27 P2.1/TA1.2 28 P2.2/TA2CLK/SMCLK 29 P2.3/TA2.0 30 P2.4/TA2.1 31 P2.5/TA2.2 32 P2.6/RTCCLK/DMAE0 P2.7/UCB0STE/UCA0CLK 33 P3.0/UCB0SIMO/UCB0SDA 34 P3.1/UCB0SOMI/UCB0SCL 35 P3.2/UCB0CLK/UCA0STE 36 P3.3/UCA0TXD/UCA0SIMO 37 P3.4/UCA0RXD/UCA0SOMI 38 DVSS 39 DVIO 40 P4.0/PM_UCB1STE 41 P4.1/PM_UCB1SIMO 42 P4.2/PM_UCB1SOMI 43 P4.3/PM_UCB1CLK 44 P4.4/PM_UCA1TXD 45 P4.5/PM_UCA1RXD 46 P4.6/PM_NONE 47 P4.7/PM_NONE 48 49 P7.0/TB0.0 50 P7.1/TB0.1 51 P7.2/TB0.2 52 P7.3/TB0.3 53 P7.4/TB0.4 54 P7.5/TB0.5 55 BSLEN 56 RST/NMI 57 P5.2/XT2IN 58 P5.3/XT2OUT 59 TEST/SBWTCK 60 PJ.0/TDO 61 PJ.1/TDI/TCLK 62 PJ.2/TMS 63 PJ.3/TCK 64 RSTDVCC/SBWTDIO 65 THERMAL_1 66 THERMAL_2 67 THERMAL_3 68 THERMAL_4 69 THERMAL_5 70 THERMAL_6 71 THERMAL_7 72 THERMAL_8 U1 MSP430F5229 2 1 4 3 6 5 8 7 10 9 12 11 14 13 JTAG 1 2 3 4 5 6 7 8 9 0 1 BOOTST CN-ML10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J4 1 2 3 JP5 PINHEAD_1X3 1 2 3 JP6 PINHEAD_1X3 1 2 3 JP7 PINHEAD_1X3 1 2 3 JP8 PINHEAD_1X3 1 2 3 JP9 PINHEAD_1X3 1 2 3 JP10 PINHEAD_1X3 1 2 3 J5 PINHEAD_1X3 R7 330R 1 2 3 JP3 C10 10uF C14 100nF C5 10uF C6 100nF R1 0R R2 0R R6 0R R8 0R C1 12pF C2 12pF C7 10uF C13 100nF 1 2 JP2 R3 330R 1 2 D1 ??? R4 0R C9 470nF R5 47K C8 2.2nF R11 0R R12 0R C16 4.7uF tbd C3 tbd C4 R9 0R R10 0R C15 100nF 1 2 3 J6 PINHEAD_1X3 1 2 JP4 PINHEAD_1X2 D3 Q2 QUARZ_4PIN 26MHz/ASX53 Q1 1 2 JP1 PINHEAD_1X2 SHC1 SHORTCUT2 GND GND GND GND XTLGND VCORE GND GND DVCC DVCC GND XTLGND2 GND GND DVCC GND RST/NMI TCK TMS TDI TDO RSTDVCC_SBWTDIO TDO RST/NMI TCK C TCK M TMS I TDI O TDO DVCC P1.2/TA0.1 P1.1/TA0.0 TEST/SBWTCK C M I O DVCC P1.1/TA0.0 P1.2/TA0.1 RSTDVCC_SBWTDIO TEST/SBWTCK AVSS MSP-TS430RGC64C www.ti.com Figure B-37. MSP-TS430RGC64C Target Socket Module, Schematic 86 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector for DVCC. Set jumper JP3 to "ext". IMPORTANT NOTE: Rev1.0 of the board does not have connection from pin 4 of BOOTST to pin 64 of MCU. To use BSL, these pins should be connected by a wire. Jumper JP2 Open to disconnect LED. D1 LED connected to P1.0 Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 -2 to debug in Spy-Bi-Wire mode. Close 2-3 to debug in 4-wire JTAG mode. Close 1 Jumper JP4 For F524x devices, close. For F522x, F523x and F525x devices, close only if one power supply is used for VCC and DVIO, and if VCC is not higher then 1.98 V. Otherwise. supply DVIO over J6. Do not close if VCC > 1.98 V, as it may damage the chip. Ÿ Ÿ Connector J6 External power connector to supply DVIO www.ti.com MSP-TS430RGC64C Figure B-38. MSP-TS430RGC64C Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 87 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64C www.ti.com Table B-21. MSP-TS430RGC64C Bill of Materials Item Qty Reference Value Description Comment Supplier No. 1 0 C1, C2 12pF CAP, SMD, Ceramic, 0805 DNP C1 C2 2 0 C3, C4 tbd CAP, SMD, Ceramic, 0805 DNP C3 C4 4 3 C5, C7, C10 10uF CAP, SMD, Ceramic, 0805 5 5 C8 C6 C13-15 100nF CAP, SMD, Ceramic, 0805 DigiKey: 311-1245-2-ND 5 5 C8 2.2nF CAP, SMD, Ceramic, 0805 6 1 C9 470nF CAP, SMD, Ceramic, 0805 DigiKey: 478-1403-2-ND 7 1 C16 4.7uF CAP, SMD, Ceramic, 0805 8 1 D1 Green LED LED, SMD, 0805 DNP: headers and receptacles enclosed with 9 4 J1-J4 16-pin header Pin header 1x16: Grid: 100mil kit. Keep vias free of (2.54 mm) solder. : Header SAM1029-16-ND : Receptacle SAM1213-16-ND 10 2 J5, J6 3-pin header, male, TH Pin header 1x3: Grid: 100mil SAM1035-03-ND (2.54 mm) 11 JP5, JP6, JP7, 3-pin header, male, TH Pinheader 1x3: Grid: 100mil place jumpers on pins 2-3 SAM1035-03-ND JP8, JP9, JP10 (2.54 mm) 12 JP3 3-pin header, male, TH Pin header 1x3: Grid: 100mil place jumper on pins 1-2 SAM1035-03-ND (2.54 mm) 13 JP1, JP2, JP4 2-pin header, male, TH Pin header 1x2; Grid: 100mil place jumper on header SAM1035-02-ND (2.54 mm) Place on: JP1, JP2, JP3, 14 10 Jumper JP4, JP5, JP6, JP7, JP8, 15-38-1024-ND JP9, JP10 15 1 JTAG 2x7Pin,Wanne Header, THD, Male 2x7 Pin, HRP14H-ND Wanne, 100mil spacing 16 0 BOOTST 2x5Pin,Wanne Header, THD, Male 2x5 Pin, DNP Wanne, 100mil spacing 17 1 Q1 26MHz/ASX53 CRYSTAL, SMD, 5x3MM, Only Kit. 26MHz 18 0 Q2 26MHz/ASX53 CRYSTAL, SMD, 5x3MM, 300-8219-1-ND 26MHz 19 1 D3 LL103A DIODE, SMD, SOD123, Buerklin: 24S3406 Schottky 20 2 R3, R7 330 Ohm, SMD0805 541-330ATR-ND 21 1 R5 47k Ohm, SMD0805 RES, SMD, 0805, 1/8W, x% 541-47000ATR-ND R1, R2, R4, DNP: R6, R8, R9, R10, 22 R6, R8, R9, 0 Ohm, SMD0805 RES, SMD, 0805, 1/8W, x% R11,R12 541-000ATR-ND R10, R11, R12 23 1 U1 Socket: QFN11T064-006-N- Manuf.: Yamaichi HSP 24 2 MSP430 MSP430F5229IRGCR IC, MCU, SMD, 9.15x9.15mm Thermal Pad with Socket 25 4 Rubber stand Rubber stand off apply to corners at bottom Buerklin: 20H1724 off side 26 1 PCB 84 x 76 mm 84 x 76 mm 88 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGC64USB B.20 MSP-TS430RGC64USB Due to the use of diodes in the power chain, the voltage on the MSP430F5xx device is approximately 0.3 V lower than is set by the debugging tool. Set the voltage in the IDE to 0.3 V higher than desired; for example, to run the MCU at 3.0 V, set it to 3.3 V. Figure B-39. MSP-TS430RGC64USB Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 89 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64USB www.ti.com Figure B-40. MSP-TS430RGC64USB Target Socket Module, PCB 90 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGC64USB Table B-22. MSP-TS430RGC64USB Bill of Materials Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND 3 C5, C11, 4 100nF, SMD0805 311-1245-2-ND C13, C14 3.1 C10, C12 0 10uF, SMD0805 DNP: C10, C12 4 C8 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 4 16-pin header, TH Keep vias free of solder. SAM1029-16-ND : Header SAM1213-16-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 2-3 JP9, JP10 10 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND place jumper on header JP4 11 JP3 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 Place on: JP1, JP2, JP3, 12 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND Q1: Micro Crystal MS1V-T1K DNP: Q1 14 Q1 0 Crystal 32.768kHz, C(Load) = Keep vias free of solder" 12.5pF 15 Q2 1 Crystal Q2: 4MHz Buerklin: 78D134 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R6, R8, R9, R12 R12 18 R10 1 100 Ω, SMD0805 Buerklin: 07E500 18 R11 1 1M Ω, SMD0805 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket: QFN11T064-006 Manuf.: Yamaichi 20 PCB 1 79 x 77 mm 2 layers 21 Rubber stand 4 Buerklin: 20H1724 apply to corners at bottom off side 22 MSP430 2 MSP430F5509 RGC DNP: enclosed with kit. Is supplied by TI Insulating http://www.ettinger.de/Art_De 23 disk to Q2 1 Insulating disk to Q2 tail.cfm?ART_ARTNUM=70.0 8.121 27 C33 1 220n SMD0603 Buerklin: 53D2074 28 C35 1 10p SMD0603 Buerklin: 56D102 29 C36 1 10p SMD0603 Buerklin: 56D102 30 C38 1 220n SMD0603 Buerklin: 53D2074 31 C39 1 4u7 SMD0603 Buerklin: 53D2086 32 C40 1 0.1u SMD0603 Buerklin: 53D2068 33 D2, D3, D4 3 LL103A Buerklin: 24S3406 SLAU278Q–May 2009–Revised February 2014 Hardware 91 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64USB www.ti.com Table B-22. MSP-TS430RGC64USB Bill of Materials (continued) Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 34 IC7 1 TPD4E004 Manu: TI 36 LED 0 JP3QE SAM1032-03-ND DNP 37 LED1 0 LEDCHIPLED_0603 FARNELL: 852-9833 DNP 38 LED2 0 LEDCHIPLED_0603 FARNELL: 852-9868 DNP 39 LED3 0 LEDCHIPLED_0603 FARNELL: 852-9841 DNP 40 R13, R15, 0 470R Buerklin: 07E564 DNP R16 41 R33 1 1k4 / 1k5 Buerklin: 07E612 42 R34 1 27R Buerklin: 07E444 43 R35 1 27R Buerklin: 07E444 44 R36 1 33k Buerklin: 07E740 45 S1 0 PB P12225STB-ND DNP 46 S2 0 PB P12225STB-ND DNP 46 S3 1 PB P12225STB-ND 47 USB1 1 USB_RECEPTACLE FARNELL: 117-7885 92 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PN80 B.21 MSP-TS430PN80 NOTE: For MSP430F47x and MSP430FG47x devices: Connect pins 7 and 10 (GND) externally to DVSS (see data sheet). Connect load capacitance on Vref pin 60 when SD16 is used (see data sheet). For use of BSL: connect pin 1 of BOOST to pin 58 of U1 and pin 3 of BOOST to pin 57 of U1. Figure B-41. MSP-TS430PN80 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 93 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connection Remove R8 and jumper R9 LED connected to pin 12 Jumper J6 Open to disconnect LED Orient Pin 1 of MSP430 device MSP-TS430PN80 www.ti.com Figure B-42. MSP-TS430PN80 Target Socket Module, PCB 94 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PN80 Table B-23. MSP-TS430PN80 Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 0 47pF, SMD0805 DNP: Only recommendation. Check your crystal spec. 2 C6, C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: Headers and receptacles enclosed with 6 J1, J2, J3, J4 0 25-pin header, TH kit.Keep vias free of solder. SAM1029-20-ND : Header SAM1213-20-ND : Receptacle 7 J5, JP1 2 3-pin header, male, TH SAM1035-03-ND 8 J6, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 3 Jumper 15-38-1024-ND Place on: J6, JP2, JP1/Pos1- 2 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1, Q2 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R3 1 560 Ω, SMD0805 541-560ATR-ND R1, R2, R4, DNP: R4, R6, R7, R10, R11, 14 R6, R7, R10, 2 0 Ω, SMD0805 541-000ATR-ND R12 R11, R12 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC201-0804-014 Manuf.: Yamaichi 17 PCB 1 77 x 77 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430FG439IPN DNP: Enclosed with kit supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 95 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PN80A www.ti.com B.22 MSP-TS430PN80A Figure B-43. MSP-TS430PN80A Target Socket Module, Schematic 96 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP3 to "ext" Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 Jumper JP2 Open to disconnect LED If the system should be supplied via LDOI (J6), close JP4 and set JP3 to external www.ti.com MSP-TS430PN80A Figure B-44. MSP-TS430PN80A Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 97 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PN80A www.ti.com Table B-24. MSP-TS430PN80A Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3, C4 0 47pF, SMD0805 DNP 3 C6, C7, 3 10uF, 6.3V, SMD0805 DNP C10 C10, C12 C5, C11, 4 C13, C14, 5 100nF, SMD0805 311-1245-2-ND C15 5 C8 1 2.2nF, SMD0805 6 C9 1 470nF, SMD0805 478-1403-2-ND 7 C16 1 4.7uF, SMD0805 8 C17 1 220nF, SMD0805 9 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-20-ND DNP: Headers and receptacles 10 J4 0 20-pin header, TH (Header) SAM1213-20- enclosed with kit. Keep vias free of ND (Receptacle) solder: 11 J5 , J6 2 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, 12 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP6, JP7, JP8, JP9, JP10 place JP8, JP9, jumpers on pins 1-2 on JP3, JP10 13 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 14 10 Jumper 15-38-1024-ND See Pos. 12 and Pos. 13 15 JTAG 1 14-pin connector, male, HRP14H-ND TH 16 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH Micro Crystal MS3V-T1R 17 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1 Keep vias free of solder 12.5pF 18 Q2 0 Crystal Q2: 4MHz Buerklin: DNP: Q2 Keep vias free of solder 78D134 Insulating http://www.ettinger.de/Ar 19 disk to Q2 0 Insulating disk to Q2 t_Detail.cfm?ART_ART NUM=70.08.121 20 D3,D4 2 LL103A Buerklin: 24S3406 21 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, R6, 22 R8, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11,R12 R9,R10, R11, R12 23 R5 1 47k Ω, SMD0805 541-47000ATR-ND 24 U1 1 Socket:IC201-0804-014 Manuf.: Yamaichi 25 PCB 1 77 x 91 mm 2 layers Adhesive Approximately 6mm for example, 3M 26 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 27 MSP430 2 MSP430F5329IPN DNP: enclosed with kit, supplied by TI 98 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PN80USB B.23 MSP-TS430PN80USB Due to the use of diodes in the power chain, the voltage on the MSP430F5xx device is approximately 0.3 V lower than is set by the debugging tool. Set the voltage in the IDE to 0.3 V higher than desired; for example, to run the MCU at 3.0 V, set it to 3.3 V. NOTE: R11 should be populated. Figure B-45. MSP-TS430PN80USB Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 99 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP3 1-2 (int): Power supply via JTAG debug interface 2-3 (ext): External power supply Connector J5 External power connector Jumper JP3 to ‘ext’ USB Connector BSL invoke button S3 Jumper JP4 Close for USB bus powered device Jumper JP2 Open to disconnect LED LED connected to P1.0 Jumper JP1 Open to measure current Jumper JP5 to JP10 Close 1-2 to debug in Spy-Bi- Wire mode. Close 2-3 to debug in 4-wire JTAG mode. MSP-TS430PN80USB www.ti.com Figure B-46. MSP-TS430PN80USB Target Socket Module, PCB 100 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PN80USB Table B-25. MSP-TS430PN80USB Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND 3 C5, C11, 4 100nF, SMD0805 311-1245-2-ND C13, C14 3.1 C10, C12 0 10uF, SMD0805 311-1245-2-ND DNP: C10, C12 4 C8 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and 7 J1, J2, J3, 4 20-pin header, TH SAM1029-20-ND receptacles enclosed with J4 kit. Keep vias free of solder. DNP: headers and receptacles enclosed with kit. Keep vias free of 7.1 4 20-pin header, TH solder. SAM1213-20-ND : Header : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, 6 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 2-3 JP8,JP9, JP10 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 1 SAM1035-02-ND Place jumper only on one pin 11 JP3 1 3-pin header, male, TH SAM1035-03-ND Place jumper on pins 1-2 Place on: JP1, JP2, JP3, 12 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND Micro Crystal MS1V-T1K DNP: Q1 Keep vias free of 14 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 15 Q2 1 Crystal "Q2: 4MHzBuerklin: 78D134" 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R6, R8, R9, R12 R12 18 R10 1 100 Ω, SMD0805 Buerklin: 07E500 18 R11 0 1M Ω, SMD0805 DNP 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket:IC201-0804-014 Manuf.: Yamaichi 20 PCB 1 79 x 77 mm 2 layers 21 Rubber 4 Buerklin: 20H1724 Apply to corners at bottom standoff side 22 MSP430 2 MSP430F5529 DNP: Enclosed with kit supplied by TI Insulating http://www.ettinger.de/Art_ 23 disk to Q2 1 Insulating disk to Q2 Detail.cfm?ART_ARTNUM =70.08.121 27 C33 1 220n Buerklin: 53D2074 SLAU278Q–May 2009–Revised February 2014 Hardware 101 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PN80USB www.ti.com Table B-25. MSP-TS430PN80USB Bill of Materials (continued) Pos. Ref Des No. per Description DigiKey Part No. Comment Board 28 C35 1 10p Buerklin: 56D102 29 C36 1 10p Buerklin: 56D102 30 C38 1 220n Buerklin: 53D2074 31 C39 1 4u7 Buerklin: 53D2086 32 C40 1 0.1u Buerklin: 53D2068 33 D2, D3, D4 3 LL103A Buerklin: 24S3406 34 IC7 1 TPD4E004 Manu: TI 36 LED 0 JP3QE SAM1032-03-ND DNP 37 LED1 0 LEDCHIPLED_0603 FARNELL: 852-9833 DNP 38 LED2 0 LEDCHIPLED_0603 FARNELL: 852-9868 DNP 39 LED3 0 LEDCHIPLED_0603 FARNELL: 852-9841 DNP 40 R13, R15, 0 470R Buerklin: 07E564 DNP R16 41 R33 1 1k4 Buerklin: 07E612 42 R34 1 27R Buerklin: 07E444 43 R35 1 27R Buerklin: 07E444 44 R36 1 33k Buerklin: 07E740 45 S1 0 PB P12225STB-ND DNP 46 S2 0 PB P12225STB-ND DNP 46 S3 1 PB P12225STB-ND 47 USB1 1 USB_RECEPTACLE FARNELL: 117-7885 102 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100 B.24 MSP-TS430PZ100 NOTE: Connections between the JTAG header and pins XOUT and XIN are no longer required and should not be made. Figure B-47. MSP-TS430PZ100 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 103 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connection Remove R8 and jumper R9 LED connected to pin 12 Jumper J6 Open to disconnect LED Orient Pin 1 of MSP430 device Jumper J7 Open to measure current MSP-TS430PZ100 www.ti.com Figure B-48. MSP-TS430PZ100 Target Socket Module, PCB 104 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100 Table B-26. MSP-TS430PZ100 Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP DNP: Only 1b C3, C4 0 47pF, SMD0805 recommendation. Check your crystal spec. 2 C6, C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND DNP: C6 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 yellow LED, TH, 3mm, T1 511-1251-ND DNP: Headers and receptacles enclosed with 7 J1, J2, J3, 0 25-pin header, TH kit.Keep vias free of solder. J4 SAM1029-25-ND : Header SAM1213-25-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND 9 J6, J7 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10 2 Jumper 15-38-1024-ND Place on: J6, J7 11 JTAG 1 14-pin connector, male, TH HRP14H-ND 12 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V- DNP: Keep vias free of 13 Q1, Q2 0 Crystal T1K 32.768kHz, C(Load) = solder 12.5pF 14 R3 1 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 15 R8, R9, R10, 3 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R9, R10, R12 R11, R12 16 R5 1 47k Ω, SMD0805 541-47000ATR-ND 17 U1 1 Socket: IC201-1004-008 or Manuf.: Yamaichi IC357-1004-53N 18 PCB 1 82 x 90 mm 2 layers 19 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 20 MSP430 2 MSP430FG4619IPZ DNP: enclosed with kit supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 105 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100A www.ti.com B.25 MSP-TS430PZ100A Figure B-49. MSP-TS430PZ100A Target Socket Module, Schematic 106 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP1 Open to measure current Jumper JP2 Open to disconnect LED LED D1 connected to P5.1 Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External Power Supply Orient Pin 1 of Device www.ti.com MSP-TS430PZ100A Figure B-50. MSP-TS430PZ100A Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 107 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100A www.ti.com Table B-27. MSP-TS430PZ100A Bill of Materials Pos. Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP DNP: Only 1b C3, C4 0 47pF, SMD0805 recommendation. Check your crystal spec. 2 C7, C9 2 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C5, C11, 3 100nF, SMD0805 311-1245-2-ND C14 4 C8 1 10nF, SMD0805 478-1358-1-ND 5 C6 0 470nF, SMD0805 478-1403-2-ND DNP 6 D1 1 green LED, SMD0805 67-1553-1-ND DNP: Headers and receptacles enclosed with 7 J1, J2, J3, 0 25-pin header, TH kit.Keep vias free of solder. J4 SAM1029-25-ND : Header SAM1213-25-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND pPlace jumper on header 11 JP3 1 3-pin header, male, TH SAM1035-03-ND Place jumper on pins 1-2 12 3 Jumper 15-38-1024-ND Place on: JP1, JP2, JP3 13 JTAG 1 14-pin connector, male, TH HRP14H-ND 14 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V- DNP: Keep vias free of 15 Q1, Q2 0 Crystal T1K 32.768kHz, C(Load) = solder 12.5pF 16 R3 1 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R7, R8, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R6, R7, R8, R9, R9, R10, R10, R11, R12 R11, R12 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 20 PCB 1 90 x 82 mm 4 layers 21 Rubber 4 Select appropriate Apply to corners at bottom standoff side 22 MSP430 2 MSP430F5438IPZ DNP: Enclosed with kit supplied by TI 108 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100B B.26 MSP-TS430PZ100B Figure B-51. MSP-TS430PZ100B Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 109 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP1 to "ext" Jumper JP1 Open to measure current Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode JP11, JP12, JP13 Connect 1-2 to connect AUXVCCx with DVCC or drive AUXVCCx externally D1 LED connected to P1.0 Jumper JP2 Open to disconnect LED MSP-TS430PZ100B www.ti.com Figure B-52. MSP-TS430PZ100B Target Socket Module, PCB 110 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100B Table B-28. MSP-TS430PZ100B Bill of Materials Position Ref Des No. per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP C4, C5, 2 C6 , C7, 6 100nF, SMD0805 311-1245-2-ND C8, C9 3 C10, C26 2 470 nF, SMD0805 478-1403-2-ND 4 C11, C12 1 10 uF / 6.3 V SMD0805 C12 DNP C13, C14, 5 C16, C18, 6 4.7 uF SMD0805 C19, C29 6 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-25-ND DNP: Headers and receptacles 7 J4 0 25-pin header, TH (Header) SAM1213-25- enclosed with kit. Keep vias free of ND (Receptacle) solder: 8 J5 1 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, 9 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP6, JP7, JP8, JP9, JP10 place JP8, JP9, jumpers on pins 1-2 on JP3, JP10 10 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 11 JP11, 3 4-pin header, male, TH place jumper on header 1-2 JP12, JP13 12 13 Jumper 15-38-1024-ND See Pos. 9 and Pos. 10 and Pos. 11 15 JTAG 1 14-pin connector, male, HRP14H-ND TH 16 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH 17 Q1 0 Crystal DNP: Q1 Keep vias free of solder 21 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, 22 R4, R6, 2 0 Ohm, SMD0805 541-000ATR-ND DNP: R4, R6, R8, R10, R11 R8, R10, R11 23 R5 1 47k Ω, SMD0805 541-47000ATR-ND 24 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 25 PCB 1 90 x 82 mm 2 layers Adhesive Approximately 6mm for example, 3M 26 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 27 MSP430 2 MSP430F6733IPZ DNP: enclosed with kit, supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 111 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated DNP DNP DNP DNP DNP DNP 0R 12pF 12pF 47pF 47pF GND 0R 100nF 330R 10uF/6.3V 10uF/6.3V 2.2nF PWR3 GND GND GND 0R GND 330R 47K 100nF 100nF P516TR-ND 470nF 100nF 100nF 0R 0R 0R 0R GND VCC 100nF GND 100nF 100nF GND 100nF LL103A GND 4.7n HCTC_XTL_4 HCTC_XTL_4 HCTC_XTL_4 HCTC_XTL_4 GND 0R 0R GND GND GND 4.7uF GND 100nF 220nF GND VCC LL103A 1.1 MSP430: Target-Socket MSP-TS430PZ100C Socket: Yamaichi IC201-1004-008 LFXTCLK <- SBW <- JTAG Vcc int ext DNP DNP DNP DNP DNP DNP BSL-Rx BSL-Tx DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG R2 C2 C1 C3 C4 C5 R1 R3 C6 C7 C8 1 2 3 J5 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 64 63 62 61 44 43 42 41 37 38 39 40 17 18 19 20 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 U1 QFP100PZ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 J1 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 J2 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 J3 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 J4 1 JP1 2 1 JP2 2 R4 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 JP9 1 2 3 R7 JP10 R5 C11 C12 D1 C9 C13 C10 R6 R8 R9 R12 1 2 3 JP3 C17 C18 C19 C14 D3 C16 1 2 3 JP11 4 1 2 Q1G$1 3 4 Q1G$2 2 1 Q2G$1 4 3 Q2G$2 1 2 3 4 5 6 7 8 9 10 BOOTST R10 R11 C15 C20 C21 1 JP4 2 D4 1 2 3 J6 TMS TMS TDI TDI TDO TDO TDO XOUT VCC GND GND GND XIN P1.0 DVCC1 DVCC1 DVCC1 DVCC1 DVCC1 DVCC1 AVCC XT2OUT AVSS AVSS AVSS M M I I O O XT2IN RST/NMI RST/NMI TCK TCK TCK C C TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK RST RST RST XTLGND2 XTLGND1 PU.0 PU.1 P1.6 P1.7 P8.0 P8.1 P8.2 VBAK VBAT VBAT VBAT P1.1 P1.1 P1.2 P1.2 LDOI LDOI LDOO LDOO BSL Interface LDOI/LDOO Interface + + Note: If the system should be supplied via LDOI (J6) close JP4 and set JP3 to external MSP-TS430PZ100C www.ti.com B.27 MSP-TS430PZ100C Figure B-53. MSP-TS430PZ100C Target Socket Module, Schematic 112 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP3 to "ext" If the system should be supplied via LDOI (J6), close JP4 and set JP3 to external Jumper JP2 Open to disconnect LED D1 LED connected to P1.0 Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode LDOI/LDOO 14 1 2 GND GND VCC 1 5 10 1 5 2 25 0 26 30 3540 45 50 75 70 65 60 55 51 100 95 90 85 80 76 1 2 3 123 123 123 123 123 3 2 1 1 2 3 4 10 1 2 1 2 3 1 SBW JTAG Vcc int ext GND VBAT DVCC JTAG R2 C2 C1 C3 C4 R1 C5 R3 + C6 + C7 C8 J5 U1 J1 J2 J3 J4 JP1 JP2 R4 JP5 JP6 JP7 JP8 JP9 JP10 R7 R5 C11 C12 D1 C9 C13 C10 R6 R8 R9 R12 JP3 C17 C18 C19 C14 D3 C16 JP11 Q1 Q2 BOOTST R10 R11 C15 C20 C21 JP4 D4 J6 www.ti.com MSP-TS430PZ100C Figure B-54. MSP-TS430PZ100C Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 113 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100C www.ti.com Table B-29. MSP-TS430PZ100C Bill of Materials Number Pos. Ref Des Per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 DNP: C3, C4 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND C5, C11, 3 C13, C14, 6 100nF, SMD0805 311-1245-2-ND C19, C20 3.1 C10, C12, 0 100nF, SMD0805 311-1245-2-ND DNP: C10, C12,C18, C17 C18,17 4 C8 1 2.2nF, SMD0805 Buerklin 53 D 292 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, DNP: headers and receptacles enclosed 7 J4 4 25-pin header, TH SAM1029-25-ND with kit. Keep vias free of solder. DNP: headers and receptacles enclosed 7.1 4 25-pin header, TH SAM1213-25-ND with kit. Keep vias free of solder. 8 J5, J6 2 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, 6 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 2-3 JP8,JP9, JP10 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10.1 JP4 1 2-pin header, male, TH SAM1035-02-ND place jumper on header 11 JP3 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 12 10 Jumper 15-38-1024-ND Place on: JP1, JP2, JP3, JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND 14 BOOTST 1 10-pin connector, male, TH HRP10H-ND DNP, keep vias free of solder 15 Q1 0 Crystal DNP: Q1 Keep vias free of solder 16 Q2 1 Crystal DNP: Q2 Keep vias free of solder 17 R3, R7 2 330 Ohm, SMD0805 541-330ATR-ND R1, R2, R4, 18 R6, R8, R9, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11, R12 R10, R11, R12 19 R5 1 47k Ohm, SMD0805 541-47000ATR-ND 20 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 21 PCB 1 79.5 x 99.5 mm MSP-TS430PZ100C 2 layers Rev 1.0 22 Rubber 4 Buerklin: 20H1724 apply to corners at bottom side stand off 23 MSP430 2 MSP430F643x DNP: enclosed with kit. Is supplied by TI. 24 C16 1 4.7 nF SMD0603 Buerklin 53 D 2042 26 D3, D4 2 LL103A Buerklin: 24S3406 27 JP11 1 4-pin header, male, TH SAM1035-04-ND Place jumper on Pin 1 and Pin 2 28 C15 1 4.7 uF, SMD0805 Buerklin 53 D 2430 29 C21 1 220nF, SMD0805 Buerklin 53 D 2381 114 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ5x100 B.28 MSP-TS430PZ5x100 Figure B-55. MSP-TS430PZ5x100 Target Socket Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 115 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper J3 to ‘ext’ Jumper JP1 Open to measure current Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode. Close 2-3 to debug in 4-wire JTAG mode. Jumper JP2 Open to disconnect LED LED connected to P1.0 Jumper JP3 1-2 (int): Power supply via JTAG debug interface 2-3 (ext): External power supply MSP-TS430PZ5x100 www.ti.com Figure B-56. MSP-TS430PZ5x100 Target Socket Module, PCB 116 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ5x100 Table B-30. MSP-TS430PZ5x100 Bill of Materials Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 1b C3, C4 47pF, SMD0805 DNP: Only recommendation. Check your crystal spec. 2 C6, C7 2 10uF, 10V, Tantal Size B 511-1463-2-ND C5, C10, 3 C11, C12, 4 100nF, SMD0805 311-1245-2-ND DNP: C12, C14 C13, C14 4 C8 0 2.2nF, SMD0805 DNP 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 67-1553-1-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 0 25-pin header, TH Keep vias free of solder. SAM1029-25-ND : Header SAM1213-25-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 2-3 JP9, JP10 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 11 JP3 1 3-pin header, male, TH SAM1035-03-ND Place jumper on pins 1-2 12 9 Jumper 15-38-1024-ND Place on JP1, JP2, JP3, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND 14 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V-T1K DNP: Keep vias free of 15 Q1, Q2 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 3 0 Ω, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11, R10, R11, R12 R12 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 20 PCB 1 90 x 82 mm 2 layers 21 Rubber 4 Select appropriate Apply to corners at bottom standoff side 22 MSP430 2 MSP430F5438IPZ DNP: Enclosed with kit supplied by TI SLAU278Q–May 2009–Revised February 2014 Hardware 117 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100USB www.ti.com B.29 MSP-TS430PZ100USB Due to the use of diodes in the power chain, the voltage on the MSP430F5xx device is approximately 0.3 V lower than is set by the debugging tool. Set the voltage in the IDE to 0.3 V higher than desired; for example, to run the MCU at 3.0 V, set it to 3.3 V. Figure B-57. MSP-TS430PZ100USB Target Socket Module, Schematic 118 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100USB Figure B-58. MSP-TS430PZ100USB Target Socket Module, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 119 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100USB www.ti.com Table B-31. MSP-TS430PZ100USB Bill of Materials Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND C5, C11, 3 C13, C14, 5 100nF, SMD0805 311-1245-2-ND C19 3.1 C10, C12, 0 100nF, SMD0805 311-1245-2-ND DNP: C10, C12,C18, C17 C18, C17 4 C8 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 4 25-pin header, TH SAM1029-25-ND Keep vias free of solder. : Header : Receptacle DNP: headers and receptacles enclosed with kit. 7.1 4 25-pin header, TH SAM1213-25-ND Keep vias free of solder. : Header : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 2-3 JP9, JP10 10 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND place jumper on header JP4 11 JP3 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 Place on: JP1, JP2, JP3, 12 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND Micro Crystal MS1V-T1K DNP: Q1. Keep vias free of 14 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 15 Q2 1 Crystal Q2: 4MHz, Buerklin: 78D134 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 3 0 Ω, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R12 R12 18 R10 1 100 Ω, SMD0805 Buerklin: 07E500 18 R11 1 1M Ω, SMD0603 not existing in Rev 1.0 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket:IC201-1004-008 Manuf.: Yamaichi 20 PCB 1 79 x 77 mm 2 layers 21 Rubber stand 4 Buerklin: 20H1724 apply to corners at bottom off side 22 MSP430 2 MSP430F5529 DNP: enclosed with kit. Is supplied by TI Insulating http://www.ettinger.de/Art_De 23 disk to Q2 1 Insulating disk to Q2 tail.cfm?ART_ARTNUM=70.0 8.121 24 C16 1 4.7 nF SMD0603 27 C33 1 220n SMD0603 Buerklin: 53D2074 28 C35, C36 2 10p SMD0603 Buerklin: 56D102 120 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100USB Table B-31. MSP-TS430PZ100USB Bill of Materials (continued) Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 30 C38 1 220n SMD0603 Buerklin: 53D2074 31 C39 1 4u7 SMD0603 Buerklin: 53D2086 32 C40 1 0.1u SMD0603 Buerklin: 53D2068 33 D2, D3, D4 3 LL103A Buerklin: 24S3406 34 IC7 1 TPD4E004 Manu: TI 35 LED 0 JP3QE SAM1032-03-ND DNP 36 LED1, LED2, 0 LEDCHIPLED_0603 FARNELL: 852-9833 DNP LED3 37 R13, R15, 0 470R SMD0603 Buerklin: 07E564 DNP R16 38 R33 1 1k4 / 1k5 SMD0603 Buerklin: 07E612 39 R34 1 27R SMD0603 Buerklin: 07E444 40 R35 1 27R SMD0603 Buerklin: 07E444 41 R36 1 33k SMD0603 Buerklin: 07E740 42 S1, S2, S3 1 PB P12225STB-ND DNP S1 and S2. (Only S3) 43 USB1 1 USB_RECEPTACLE FARNELL: 117-7885 44 JP11 1 4-pin header, male, TH SAM1035-04-ND place jumper only on Pin 1 SLAU278Q–May 2009–Revised February 2014 Hardware 121 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 0R 12pF 12pF GND GND 0R 100nF 330R 2.2nF 0R 0R PWR3 GND 330R 47K 0R 0R 100nF 4.7uF GND GND 100nF 470nF 0R QUARZ5 100nF 10uF/6,3V 10uF/6,3V 100nF 4.7uF 4.7uF 100nF 4.7uF 4.7uF 4.7uF 470nF FE04-1 VCC GND GND 100nF 4.7uF GND GND GND GND GND VCC1 VCC1 VCC1 VCC1 VCC1 GND GND GND GND GND GND AVSS AVSS DVCC AVCC GND VCC VCC GND MSP430: Target-Socket MSP-TS430PEU128 for F6779 Petersen 1080/1/001/01.1 DNP LFXTCLK DNP <- SBW <- JTAG DNP Vcc int ext DNP DNP DNP DNP DNP DNP DNP DVDSYS 1.1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 J1 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 J2 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 J3 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 J4 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG R2 C2 C1 R1 C5 R3 1 2 3 4 5 6 7 8 9 10 BOOTST C3 R10 R11 J5 1 2 3 1 2 JP1 JP2 1 2 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 JP9 1 2 3 JP10 R7 R5 D1 R6 R8 C6 C29 C7 C10 R4 Q1 JP12 1 2 3 4 1 2 3 4 JP11 JP131 2 3 4 C4 C11 C12 C8 C13 C14 C9 C16 C19 C18 C26 1 2 JP4 JP3 1 2 3 4 C15 C17 TP1 TP2 IC1 MSP430F677XIPEU# XIN 1 XOUT 2 AUXVCC3 3 RTCCAP1 4 RTCCAP0 5 P1.5/SMCLK/CB0/A5 6 P1.4/MCLK/SDCLK/CB1/A4 7 P1.3/ADC10CLK/TACLK/RTCCLK/A3 8 P1.2/ACLK/TA3.1/A2 9 P1.1/TA2.1/VEREF+/A1 10 P1.0/TA1.1/TA0.0/VEREF-/A0 11 P2.4/PM_TA2.0 12 P2.5/PM_UCB0SOMI/PM_UCB0SCL 13 P2.6/PM_USB0SIMO/PM_UCB0SDA 14 P2.7/PM_UCB0CLK 15 P3.0/PM_UCA0RXD/PM_UCA0SOMI 16 P3.1/PM_UCA0TXD/PM_UCA0SIMO 17 P3.2/PM_UCA0CLK 18 P3.3/PM_UCA1CLK 19 P3.4/PM_UCA1RXD/PM_UCA1SOMI 20 P3.5/PM_UCA1TXD/PM_UCA1SIMO 21 COM0 22 COM1 23 P1.6/COM2 24 P1.7/COM3 25 P5.0/COM4 26 P5.1/COM5 27 P5.2/COM6 28 P5.3/COM7 29 LCDCAP/R33 30 P5.4/SDCLK/R23 31 P5.5/SD0DIO/LCDREF/R13 32 P5.6/SD1DIO/R03 33 P5.7/SD2DIO/CB2 34 P6.0/SD3DIO 35 P3.6/PM_UCA2RXD/PM_UCA2SOMI 36 P3.7/PM_UCA2TXD/PM_UCA2SIMO 37 P4.0/PM_UCA2CLK 38 P4.1/PM_UCA3RXD/PM_UCA3SOMI 39 P4.2/PM_UCA3TXD/PM_UCA3SIMO 40 P4.3/PM_UCA3CLK 41 P4.4/PM_UCB1SOMI/PM_UCB1SCL 42 P4.5/PM_UCB1SIMO/PM_UCB1SDA 43 P4.6/PM_UCB1CLK 44 P4.7/PM_TA3.0 45 P6.1/SD4DIO/S39 46 P6.2/SD5DIO/S38 47 P6.3/SD6DIO/S37 48 P6.4/S36 49 P6.5/S35 50 P6.6/S34 51 P6.7/S33 52 P7.0/S32 53 P7.1/S31 54 P7.2/S30 55 P7.3/S29 56 P7.4/S28 57 P7.5/S27 58 P7.6/S26 59 P7.7/S25 60 P8.0/S24 61 P8.1/S23 62 P8.2/S22 63 P8.3/S21 64 P8.4/S20 65 P8.5/S19 66 P8.6/S18 67 P8.7/S17 68 DVSYS 69 DVSS2 70 P9.0/S16 71 P9.1/S15 72 P9.2/S14 73 P9.3/S13 74 P9.4/S12 75 P9.5/S11 76 P9.6/S10 77 P9.7/S9 78 P10.0/S8 79 P10.1/S7 80 P10.2/S6 81 P10.3/S5 82 P10.4/S4 83 P10.5/S3 84 P10.6/S2 85 P10.7/S1 86 P11.0/S0 87 P11.1/TA3.1/CB3 88 P11.2/TA1.1 89 P11.3/TA2.1 90 P11.4/CBOUT 91 P11.5/TACLK/RTCCLK 92 P2.0/PM_TA0.0 93 P2.1/PM_TA0.1 94 P2.2/PM_TA0.2 95 P2.3/PM_TA1.0 96 TEST/SBWTCK 97 PJ.0/TDO 98 PJ.1/TDI/TCLK 99 PJ.2/TMS 100 PJ.3/TCK 101 ~RST/NMI/SBWTDIO 102 SD0P0 103 SD0N0 104 SD1P0 105 SD1N0 106 SD2P0 107 SD2N0 108 SD3P0 109 SD3N0 110 VASYS2 111 AVSS2 112 VREF 113 SD4P0 114 SD4N0 115 SD5P0 116 SD5N0 117 SD6P0 118 SD6N0 119 AVSS1 120 AVCC 121 VASYS1 122 AUXVCC2 123 AUXVCC1 124 VDSYS 125 DVCC 126 DVSS1 127 VCORE 128 P1.0 P1.0 P2.0 P2.0 P2.1 P2.1 SD0P0 SD0N0 SD1P0 SD1N0 SD2P0 SD2N0 SD3P0 SD3N0 SD4P0 SD4N0 SD5P0 SD5N0 SD6P0 SD6N0 VASYS1/2 VASYS1/2 VASYS1/2 VASYS1/2 TMS TMS TDI TDI TDO TDO TDO XOUT GND GND XIN DVCC AVCC DVDSYS DVDSYS DVDSYS DVDSYS AVSS AVSS PJ.2 PJ.2 PJ.1 PJ.1 PJ.0 PJ.0 RST/NMI RST/NMI TCK TCK TCK PJ.3 PJ.3 TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK RST RST RST RST LCDCAP LCDCAP VREF VREF VEREF+ VEREF+ VCORE AUXVCC2 AUXVCC2 AUXVCC1 AUXVCC1 AUXVCC3 AUXVCC3 1 2 3 4 5 6 1 2 3 4 5 6 Titel: Datum: Bearb.: Seite 1/1 MSP-TS430PEU128 22.05.2012 09:37:33 A3 A B C D E F G H I A B C D E F G H I File: Dok: Rev.: MSP-TS430PEU128 www.ti.com B.30 MSP-TS430PEU128 Figure B-59. MSP-TS430PEU128 Target Socket Module, Schematic 122 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 P1.0 SBW JTAG DVDSYS ext int MSP-TS430PEU128 Rev. 1.1 RoHS DVCC AUXVCC GND AUXVCC1 AUXVCC2 AUXVCC3 GND GND RST/NMI TCK TDI TDO TEST/SBWTCK TMS 1 25 5 10 15 20 30 35 40 45 50 55 60 64 65 90 70 75 80 85 95 100 128 125 120 115 110 105 14 1 2 10 1 2 GND GND VCC 3 2 1 3 2 1 3 2 1 3 2 1 3 2 1 3 2 1 1 2 3 4 1234 1234 1 J1 J2 J3 J4 JTAG R2 C2 C1 R1 C5 R3 BOOTST C3 R10 R11 J5 JP1 JP2 JP5 JP6 JP7 JP8 JP9 JP10 R7 R5 D1 R6 R8 C6 C29 C7 C10 R4 JP12 JP11 JP13 C4 C11 C12 C8 C13 C14 C9 C16 C19 C18 C26 JP4 JP3 C15 C17 TP1 TP2 IC1 Connector J5 External power connector Jumper JP1 to "ext" Jumper JP1 Open to measure current Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode JP11, JP12, JP13 Connect 1-2 to connect AUXVCCx with DVCC or drive AUXVCCx externally D1 LED connected to P1.0 Jumper JP2 Open to disconnect LED www.ti.com MSP-TS430PEU128 Figure B-60. MSP-TS430PEU128 Target Socket Module, PCB NOTE: The MSP-TS430PEU128 Rev 1.1 ships with the following modifications: • R7 value is changed to 0 Ω instead of 330 Ω. • JTAG pin 8 is connected only to JP5 pin 3, and not to pin 2. • JP5 pin 2 is connected to IC1 pin 97. • BOOTST pin 7 is connected to IC1 pin 97. SLAU278Q–May 2009–Revised February 2014 Hardware 123 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PEU128 www.ti.com Table B-32. MSP-TS430PEU128 Bill of Materials Pos. Ref Des No. Per Description DigiKey Part No. Comment Board 1 PCB 1 94x119.4mm, 4 layers MSP-TS430PEU128 4 layers, green solder mask Rev. 1.1 2 D1 1 green LED, DIODE0805 516-1434-1-ND 3 JP1, JP2, JP4 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header 4 JP5, JP6, JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 1-2 (SBW) JP9, JP10 5 JP11, JP12, JP13 3 4-pin header, male, TH SAM1035-04-ND Place jumpers on pins 1-2 (AVCC=VCC) 6 JP3 1 4-pin header, male, TH SAM1035-04-ND Place jumpers on pins 1-2 JP1, JP2, JP3, JP4, Jumper WM4592-ND 7 JP5, JP6, JP7, JP8, 13 JP9, JP10, JP11, JP12, JP13 8 R1, R2, R4, R6, R8 5 0R, 0805 541-0.0ATR-ND 9 R10, R11 2 0R, 0805 541-0.0ATR-ND DNP 10 C3 1 2.2nF, CSMD0805 490-1628-2-ND DNP 11 C13, C14, C16, 7 4.7uF, 6.3V, CSMD0805 587-1302-2-ND C17, C18, C19, C29 12 C11 1 10uF, 6.3V, CSMD0805 445-1372-2-ND 13 C12 1 10uF, 6.3V, CSMD0805 445-1372-2-ND DNP 14 C1, C2 2 12pF, CSMD0805 490-5531-2-ND DNP 15 R5 1 47K, 0805 311-47KARTR-ND 16 C4, C5, C6, C7, C8, 6 100nF, CSMD0805 311-1245-2-ND C15 17 C9 1 100nF, CSMD0805 311-1245-2-ND DNP 18 R3, R7 2 330R, 0805 541-330ATR-ND 19 C10, C26 2 470nF, CSMD0805 587-1282-2-ND 20 BOOTST 1 10-pin connector, male, TH HRP10H-ND DNP, keep vias free of solder 21 JTAG 1 14-pin connector, male, TH HRP14H-ND 22 IC1 Socket 1 Socket: IC500-1284-009P Manuf. Yamaichi 23 IC1 2 MSP430F67791IPEU DNP: enclosed with kit. Is supplied by TI 24 J5 1 3-pin header, male, TH SAM1035-03-ND 25 Q1 1 Crystal: MS3V-T1R 32.768kHz DNP: Crystal enclosed with kit. Keep vias 12.5pF ±20ppm free of solder 26 TP1, TP2 2 Test point DNP, keep vias free of solder 27 J2,J4 2 26-pin header, TH SAM1029-26-ND DNP: Headers enclosed with kit. Keep vias free of solder. 28 J2,J4 2 26-pin receptable, TH SAM1213-26-ND DNP: Receptacles enclosed with kit. Keep vias free of solder. 29 J1, J3 2 38-pin header, TH SAM1029-38-ND DNP: Headers enclosed with kit. Keep vias free of solder. 30 J1, J3 2 38-pin receptable, TH SAM1213-38-ND DNP: Receptacles enclosed with kit. Keep vias free of solder. 31 Rubber feet 4 Rubber feet Buerklin: 20H1724 apply to bottom side corners 124 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Power Management VCC01 = external VCC Vdd = DVCC Vdda1 = AVDD_RF / AVCC_RF Vdda2 = AVCC Port connectors CON1 .. CON3 = Port1 .. Port3 of cc430 CON4 = spare CON5 = 1: XIN 2: XOUT CON6 = Vdd, GND, Vcore, COM0, LCDCAP CON7 = Vdda1, Vdda2, GND, AGND CON8 = JTAG_BASE (JTAG Port) CON9 = Vdd, GND, AGND (May be addedclose to therespective pins to reduce emissions at 5GHz toel vel required byETSI) www.ti.com EM430F5137RF900 B.31 EM430F5137RF900 Figure B-61. EM430F5137RF900 Target board, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 125 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated JTAG connector External power connector CON12 GND GND VCC Open to disconnect LEDs jumper JP5/JP10 LED D2 (red) connected to P3.6 via JP10 LED D1 (green) connected to P1.0 via JP5 RF - Crystal Q1 26 MHz RF - Signal SMA Reset button S1 Push-button S2 connected to P1.7 Jumper JP1 Close JTAG position to debug in JTAG mode Jumper JP2 Close EXT for external supply Close INT for JTAG supply Close SBW position to debug in Spy-Bi-Wire mode Jumper JP1 Spy-Bi-Wire mode Footprint for 32kHz crystal Use 0 resistor for R431/R441 to make XIN/XOUT available on connector port5 ! Open to measure current jumper JP3 EM430F5137RF900 www.ti.com Figure B-62. EM430F5137RF900 Target board, PCB The battery pack that is included with the EM430F5137RF900 kit may be connected to CON12. Ensure correct battery insertion regarding the polarity as indicated in battery holder. 126 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com EM430F5137RF900 Table B-33. EM430F5137RF900 Bill of Materials Item Reference No. per Description Value Manufacturer's Part Manufacturer Comment Board Number 1 Q1 1 ( CUSTOMER SUPPLY ) CRYSTAL, 26M ASX-531(CS) AKER SMT, 4P, 26MHz ELECTRONIC C1-C5, C082, C222, C271, CAPACITOR, SMT, 0402, CER, 16V, 2 C281, C311, 14 10%, 0.1uF 0.1uF 0402YC104KAT2A AVX C321, C341, C412, C452 3 C071 1 CAPACITOR, SMT, 0603, CERAMIC, 0.47uF 0603YD474KAT2A AVX 0.47uF, 16V, 10%, X5R 4 R401 1 RES0402, 47.0K 47kΩ CRCW04024702F10 DALE 0 5 CON11 1 HEADER, THU, MALE, 14P, 2X7, 09 18 514 6323 HARTING 25.4x9.2x9.45mm 6 CON10 0 HEADER, THU, MALE, 10P, 2X5, 09 18 510 6323 HARTING DNP 20.32x9.2x9.45mm 7 D1 1 LED, SMT, 0603, GREEN, 2.1V active APT1608MGC KINGBRIGHT 8 D2 1 LED, SMT, 0603, RED, 2.0V active APT1608EC KINGBRIGHT 9 Q3 0 UNINSTALLED CRYSTAL, SMT, 3P, 32.768k MS1V-T1K (UN) MICRO DNP MS1V (Customer Supply) CRYSTAL 10 CON12 1 HEADER, THU, MALE, 3P, 1x3, 22-03-5035 MOLEX 9.9x4.9x5.9mm 11 C251, C261 2 50V, 5%, 27pF 27pF GRM36COG270J50 MURATA 12 L341 1 FERRITE, SMT, 0402, 1.0kΩ, 250mA 1kΩ BLM15HG102SN1D MURATA 13 C293 1 CAPACITOR, SMT, 0402, CERAMIC, 100pF GRM1555C1H101JZ MURATA 100pF, 50V, 0.25pF, C0G(NP0) 01 14 L304 1 INDUCTOR, SMT, 0402, 2.2nH, 0.1nH, 0.0022uH LQP15MN2N2B02 MURATA 220mA, 500MHz 15 L303, L305 2 INDUCTOR, SMT, 0402, 15nH, 2%, 0.015uH LQW15AN15NG00 MURATA 450mA, 250MHz 16 L292, L302 2 INDUCTOR, SMT, 0402, 18nH, 2%, 0.018uH LQW15AN18NG00 MURATA 370mA, 250MHz 17 C291 1 CAPACITOR, SMT, 0402, CERAMIC, 1pF GRM1555C1H1R0W MURATA 1pF, 50V, 0.05pF, C0G(NP0) Z01 18 C303 1 CAPACITOR, SMT, 0402, CERAMIC, 8.2pF GRM1555C1H8R2W MURATA 8.2pF, 50V, 0.05pF, C0G(NP0) Z01 19 C292, C301- 4 CAPACITOR, SMT, 0402, CERAMIC, 1.5pF GRM1555C1H1R5W MURATA C302, C304 1.5pF, 50V, 0.05pF, C0G(NP0) Z01 20 L291, L301 2 INDUCTOR, SMT, 0402, 12nH, 2%, 0.012uH LQW15AN12NG00 MURATA 500mA, 250MHz C282, C312, CAPACITOR, SMT, 0402, CERAMIC, GRM1555C1H2R0B 21 C351, C361, 5 2pF, 50V, 0.1pF, C0G 2.0pF Z01 Murata C371 22 L1 1 INDUCTOR, SMT, 0402, 6.2nH, 0.1nH, 6.2nH LQP15MN6N2B02 Murata 130mA, 500MHz 23 S1-S2 2 ULTRA-SMALL TACTILE SWITCH, SMT, B3U-1000P OMRON 2P, SPST-NO, 1.2x3x2.5mm, 0.05A, 12V R4-R5, R051, UNINSTALLED RESISTOR/JUMPER, 24 R061, R431, 0 SMT, 0402, 0 Ω, 5%, 1/16W 0Ω ERJ-2GE0R00X PANASONIC DNP R441 24a R7 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 0Ω ERJ-2GE0R00X PANASONIC 5%, 1/16W 25 R2-R3, R6 3 RESISTOR, SMT, 0402, THICK FILM, 330Ω ERJ-2GEJ331 PANASONIC 5%, 1/16W, 330 26 C431, C441 0 CAPACITOR, SMT, 0402, CER, 12pF, 12pF ECJ-0EC1H120J PANASONIC 50V, 5%, NPO 27 C401 1 CAPACITOR, SMT, 0402, CER, 2200pF, 0.0022uF ECJ-0EB1H222K PANASONIC 50V, 10%, X7R 28 R331 1 RESISTOR, SMT, THICK FILM, 56K, 56kΩ ERJ-2GEJ563 PANASONIC 1/16W, 5% 29 C081, C221, 4 CAPACITOR, SMT, 0603, CERAMIC, 10uF ECJ-1VB0J106M PANASONIC C411, C451 10uF, 6.3V, 20%, X5R SLAU278Q–May 2009–Revised February 2014 Hardware 127 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F5137RF900 www.ti.com Table B-33. EM430F5137RF900 Bill of Materials (continued) Item Reference No. per Description Value Manufacturer's Part Manufacturer Comment Board Number 30 R1 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 0Ω ERJ-2GE0R00X PANASONIC 5%, 1/16W 31 C041 0 UNINSTALLED CAP CERAMIC 4.7UF 4.7uF ECJ-1VB0J475K Panasonic DNP 6.3V X5R 0603 32 X1 1 SMA STRIGHT JACK, SMT 32K10A-40ML5 ROSENBERGER 33 Q2 0 Crystal, SMT, 32.768 kHz 32.768k MS3V-T1R Micro Crystal DNP 34 U1 1 DUT, SMT, PQFP, RGZ-48, 0.5mmLS, CC430F52x1 TI 7.15x7.15x1mm, THRM.PAD 35 JP1 1 Pin Connector 2x4pin 61300821121 WUERTH 36 CON1-CON9 0 Pin Connector 2x4pin 61300821121 WUERTH DNP 37 JP2 1 Pin Connector 1x3pin 61300311121 WUERTH 38 JP3, JP5, 3 Pin Connector 1x2pin 61300211121 WUERTH JP10 38a JP7, CON13 0 Pin Connector 1x2pin 61300211121 WUERTH DNP 39 JP4 1 Pin Connector 2x2pin 61300421121 WUERTH DNP 40 JP1a 1 Pin Connector 2x3pin 61300621121 WUERTH 128 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Power Management VCC01 = external VCC Vdd = DVCC Vdda1 = AVDD_RF / AVCC_RF Vdda2 = AVCC Port connectors CON1 .. CON5 = Port1 .. Port5 of cc430 CON6 = Vdd, GND, Vcore, COM0, LCDCAP CON7 = Vdda1, Vdda2, GND, AGND CON8 = JTAG_BASE (JTAG Port) CON9 = Vdd, GND, AGND (May beaddedcol se to therespective pins to reduce emissions at 5GHz to el vel required by ETSI) www.ti.com EM430F6137RF900 B.32 EM430F6137RF900 Figure B-63. EM430F6137RF900 Target board, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 129 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated JTAG connector External power connector CON12 GND GND VCC Open to disconnect LEDs jumper JP5/JP10 LED D2 (red) connected to P3.6 via JP10 LED D1 (green) connected to P1.0 via JP5 RF - Crystal Q1 26 MHz RF - Signal SMA Reset button S1 Push-button S2 connected to P1.7 Jumper JP1 Close JTAG position to debug in JTAG mode Jumper JP2 Close EXT for external supply Close INT for JTAG supply Close SBW position to debug in Spy-Bi-Wire mode Jumper JP1 Spy-Bi-Wire mode Footprint for 32kHz crystal Use 0 resistor for R541/R551 to makeP5.0/P5.1 available on connector port5 ! Open to measure current jumper JP3 C392 C422 L451 EM430F6137RF900 www.ti.com Figure B-64. EM430F6137RF900 Target board, PCB The battery pack that is included with the EM430F6137RF900 kit may be connected to CON12. Ensure correct battery insertion regarding the polarity as indicated in battery holder. 130 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com EM430F6137RF900 Table B-34. EM430F6137RF900 Bill of Materials No. Pos. Ref Des per Description Part No. Manufacturer Board 1 Q1 1 ( CUSTOMER SUPPLY ) CRYSTAL, SMT, ASX-531(CS) AKER 4P, 26MHz ELECTRONIC C1-C5, C112, C252, C381, CAPACITOR, SMT, 0402, CER, 16V, 10%, 2 C391, C421, 14 0.1uF 0402YC104KAT2A AVX C431, C451, C522, C562 3 C101 1 CAPACITOR, SMT, 0603, CERAMIC, 0.47uF, 0603YD474KAT2A AVX 16V, 10%, X5R 4 R511 1 RES0402, 47.0K CRCW04024702F100 DALE 5 CON11 1 HEADER, THU, MALE, 14P, 2X7, 09 18 514 6323 HARTING 25.4x9.2x9.45mm, 90deg 7 D1 1 LED, SMT, 0603, GREEN, 2.1V APT1608MGC KINGBRIGHT 8 D2 1 LED, SMT, 0603, RED, 2.0V APT1608EC KINGBRIGHT 10 CON12 1 HEADER, THU, MALE, 3P, 1x3, 22-03-5035 MOLEX 9.9x4.9x5.9mm 11 C361, C371 2 50V, ±5%, 27pF GRM36COG270J50 MURATA 12 L451 1 FERRITE, SMT, 0402, 1.0kΩ, 250mA BLM15HG102SN1D MURATA 13 C403 1 CAPACITOR, SMT, 0402, CERAMIC, 100pF, GRM1555C1H101JZ01 MURATA 50V, ±0.25pF, C0G(NP0) 14 L414 1 INDUCTOR, SMT, 0402, 2.2nH, ±0.2nH, LQW15AN2N2C10 MURATA 1000mA, 250MHz 15 L413, L415 2 INDUCTOR, SMT, 0402, 15nH, ±5%, 460mA, LQW15AN15NJ00 MURATA 250MHz 16 L402, L412 2 INDUCTOR, SMT, 0402, 18nH, ±5%, 370mA, LQW15AN18NJ00 MURATA 250MHz 17 C401 1 CAPACITOR, SMT, 0402, CER, 1pF, 50V, GJM1555C1H1R0CB01D MURATA ±0.25pF, NP0 18 C413 1 CAPACITOR, SMT, 0402, CERAMIC, 8.2pF, GRM1555C1H8R2CZ01 MURATA 50V, ±0.25pF, C0G(NP0) 19 C402, C411- 4 CAPACITOR, SMT, 0402, CERAMIC, 1.5pF, GRM1555C1H1R5CZ01 MURATA C412, C414 50V, ±0.25pF, C0G(NP0) 20 L401, L411 2 INDUCTOR, SMT, 0402, 12nH, ±5%, 500mA, LQW15AN12NJ00 MURATA 250MHz 21 C46-C48, 5 CAPACITOR, SMT, 0402, CERAMIC, 2.0pF, GRM1555C1H2R0CZ01 Murata C392, C422 50V, ±0.25pF, C0G(NP0) 22 L1 1 INDUCTOR, SMT, 0402, 6.2nH, ±0.1nH, LQW15AN6N2D00 Murata 700mA, 250MHz 23 S1-S2 2 ULTRA-SMALL TACTILE SWITCH, SMT, 2P, B3U-1000P OMRON SPST-NO, 1.2x3x2.5mm, 0.05A, 12V 24 R7 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 5%, ERJ-2GE0R00X (UN) PANASONIC 1/16W 25 R2-R3, R6 3 RESISTOR, SMT, 0402, THICK FILM, 5%, ERJ-2GEJ331 PANASONIC 1/16W, 330 27 C511 1 CAPACITOR, SMT, 0402, CER, 2200pF, ECJ-0EB1H222K PANASONIC 50V, 10%, X7R 28 C111, C251, 4 CAPACITOR, SMT, 0603, CERAMIC, 10uF, ECJ-1VB0J106M PANASONIC C521, C561 6.3V, 20%, X5R 28a C041 1 CAP CERAMIC 4.7UF 6.3V X5R 0603 ECJ-1VB0J475M PANASONIC 29 R441 1 RESISTOR, SMT, THICK FILM, 56K, 1/16W, ERJ-2RKF5602 PANASONIC 1% 30 R1 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 5%, ERJ-2GE0R00X PANASONIC 1/16W 31 X1 1 SMA STRIGHT JACK, SMT 32K10A-40ML5 ROSENBERGER SLAU278Q–May 2009–Revised February 2014 Hardware 131 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F6137RF900 www.ti.com Table B-34. EM430F6137RF900 Bill of Materials (continued) No. Pos. Ref Des per Description Part No. Manufacturer Board 33 U1 1 DUT, SMT, PQFP, RGC-64, 0.5mmLS, CC430F6137 TI 9.15x9.15x1mm, THRM.PAD 34 JP1 1 Pin Connector 2x4pin 61300821121 WUERTH 35 JP2 1 Pin Connector 1x3pin 61300311121 WUERTH 36a JP3, JP5, JP10 3 Pin Connector 1x2pin 61300211121 WUERTH 38 JP1a 1 Pin Connector 2x3pin 61300621121 WUERTH 132 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com EM430F6147RF900 B.33 EM430F6147RF900 Figure B-65. EM430F6147RF900 Target Board, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 133 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F6147RF900 www.ti.com Figure B-66. EM430F6147RF900 Target Board, PCB The battery pack which comes with the EM430F6147RF900 kit may be connected to CON12. Ensure correct battery insertion regarding the polarity as indicated in battery holder. 134 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com EM430F6147RF900 Table B-35. EM430F6147RF900 Bill of Materials No. Pos. Ref Des per Description Part No. Manufacturer Board 1 Q1 1 ( CUSTOMER SUPPLY ) CRYSTAL, SMT, ASX-531(CS) AKER 4P, 26MHz ELECTRONIC C1-5 C112 C252 C381 CAPACITOR, SMT, 0402, CER, 16V, 10%, 2 C391 C421 14 0.1uF 0402YC104KAT2A AVX C431 C451 C522 C562 3 C101 1 CAPACITOR, SMT, 0603, CERAMIC, 0.47uF, 0603YD474KAT2A AVX 16V, 10%, X5R 4 R511 1 RES0402, 47.0K CRCW04024702F100 DALE 5 CON11 1 HEADER, THU, MALE, 14P, 2X7, 09 18 514 6323 HARTING 25.4x9.2x9.45mm, 90deg 7 D1 1 LED, SMT, 0603, GREEN, 2.1V APT1608MGC KINGBRIGHT 8 D2 1 LED, SMT, 0603, RED, 2.0V APT1608EC KINGBRIGHT 10 CON12 1 HEADER, THU, MALE, 3P, 1x3, 22-03-5035 MOLEX 9.9x4.9x5.9mm 11 C361, C371 2 50V, ±5%, 27pF GRM36COG270J50 MURATA 12 L451 1 Inductor, SMD, 0402, 12nH, 5%, 370mA LQW15AN12NJ00 MURATA 13 C403 1 CAPACITOR, SMT, 0402, CERAMIC, 100pF, GRM1555C1H101JZ01 MURATA 50V, ±0.25pF, C0G(NP0) 14 L414 1 INDUCTOR, SMT, 0402, 2.2nH, ±0.2nH, LQW15AN2N2C10 MURATA 1000mA, 250MHz 15 L413 1 Inductor, SMD, 0402, 15nH, 5%, 370mA, LQW15AN15NJ00 MURATA 250MHz 15 L415 1 INDUCTOR,SMT,0402,15nH,±5%,460mA,250 LQW15AN15NJ00 MURATA MHz 16 L402, L412 2 Inductor, SMD, 0402, 18nH, 5%, 460mA, LQW15AN18NJ00 MURATA 250MHz 17 C401 1 CAPACITOR, SMT, 0402, CER, 1pF, 50V, GJM1555C1H1R0CB01D MURATA ±0.25pF, NP0 18 C413 1 CAPACITOR, SMT, 0402, CERAMIC, 8.2pF, GRM1555C1H8R2CZ01 MURATA 50V, ±0.25pF, C0G(NP0) 19 C402, C411- 4 CAPACITOR, SMT, 0402, CERAMIC, 1.5pF, GRM1555C1H1R5CZ01 MURATA C412, C414 50V, ±0.25pF, C0G(NP0) 20 L1, L401, L411 3 INDUCTOR, SMT, 0402, 12nH, ±5%, 500mA, LQW15AN12NJ00 MURATA 250MHz 21 C46-C48, 4 CAPACITOR, SMT, 0402, CERAMIC, 2.0pF, GRM1555C1H2R0CZ01 MURATA C392 50V, ±0.25pF, C0G(NP0) 22 L2 1 Inductor, SMD, 0805, 2.2uH, 20%, 600mA, LQM21PN2R2MC0 MURATA 50MHz 23 S1-S2 2 ULTRA-SMALL TACTILE SWITCH, SMT, 2P, B3U-1000P OMRON SPST-NO, 1.2x3x2.5mm, 0.05A, 12V 24 R1, R7, R551, 4 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 5%, ERJ-2GE0R00X (UN) PANASONIC R554 1/16W 25 R2-R3, R6 3 RESISTOR, SMT, 0402, THICK FILM, 5%, ERJ-2GEJ331 PANASONIC 1/16W, 330 27 C511 1 CAPACITOR, SMT, 0402, CER, 2200pF, ECJ-0EB1H222K PANASONIC 50V, 10%, X7R 28 C111, C251, 4 CAPACITOR, SMT, 0603, CERAMIC, 1uF, ECJ-1VB0J105K PANASONIC C521, C561 6.3V, 20%, X5R 28a C041 1 CAP CERAMIC 4.7UF 6.3V X5R 0603 ECJ-1VB0J475M PANASONIC 29 R441 1 RESISTOR, SMT, THICK FILM, 56K, 1/16W, ERJ-2RKF5602 PANASONIC 1% 30 X1 1 SMA STRIGHT JACK, SMT 32K10A-40ML5 ROSENBERGER SLAU278Q–May 2009–Revised February 2014 Hardware 135 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F6147RF900 www.ti.com Table B-35. EM430F6147RF900 Bill of Materials (continued) No. Pos. Ref Des per Description Part No. Manufacturer Board 31 U1 1 DUT, SMT, PQFP, RGC-64, 0.5mmLS, CC430F6147 TI 9.15x9.15x1mm, THRM.PAD 33 U2 1 IC, Step Down Converter with Bypass Mode TPS62370 TI for Low Power Wireless 34 JP1 1 Pin Connector 2x4pin 61300821121 WUERTH 35 JP2, JP6, JP8 3 Pin Connector 1x3pin 61300311121 WUERTH 36a JP3, JP5, JP9, 4 Pin Connector 1x2pin 61300211121 WUERTH JP10 38 JP1a 1 Pin Connector 2x3pin 61300621121 WUERTH 38 C7 1 Capacitor, Ceramic, 1206, 16V, X5R, 20% GRM31CR61C226ME15L MURATA 38 C8-9 2 CAP, SMD, Ceramic, 0402, 2.2uF, X5R GRM155R60J225ME15D MURATA 38 C041 1 CAP, SMD, Ceramic, 0603, 4.7uF, 16V, 10%, MURATA X5R 136 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430PIF B.34 MSP-FET430PIF Figure B-67. MSP-FET430PIF FET Interface Module, Schematic SLAU278Q–May 2009–Revised February 2014 Hardware 137 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430PIF www.ti.com Figure B-68. MSP-FET430PIF FET Interface Module, PCB 138 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430UIF B.35 MSP-FET430UIF Figure B-69. MSP-FET430UIF USB Interface, Schematic (1 of 4) SLAU278Q–May 2009–Revised February 2014 Hardware 139 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430UIF www.ti.com Figure B-70. MSP-FET430UIF USB Interface, Schematic (2 of 4) 140 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430UIF Figure B-71. MSP-FET430UIF USB Interface, Schematic (3 of 4) SLAU278Q–May 2009–Revised February 2014 Hardware 141 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430UIF www.ti.com Figure B-72. MSP-FET430UIF USB Interface, Schematic (4 of 4) 142 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430UIF Figure B-73. MSP-FET430UIF USB Interface, PCB SLAU278Q–May 2009–Revised February 2014 Hardware 143 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430UIF www.ti.com B.35.1 MSP-FET430UIF Revision History Revision 1.3 • Initial released hardware version Assembly change on 1.3 (May 2005) • R29, R51, R42, R21, R22, R74: value changed from 330R to 100R Changes 1.3 to 1.4 (Aug 2005) • J5: VBUS and RESET additionally connected • R29, R51, R42, R21, R22, R74: value changed from 330R to 100R • U1, U7: F1612 can reset TUSB3410; R44 = 0R added • TARGET-CON.: pins 6, 10, 12, 13, 14 disconnected from GND • Firmware-upgrade option through BSL: R49, R52, R53, R54 added; R49, R52 are currently DNP • Pullups on TCK and TMS: R78, R79 added • U2: Changed from SN74LVC1G125DBV to SN74LVC1G07DBV NOTE: Using a locally powered target board with hardware revision 1.4 Using an MSP-FET430UIF interface hardware revision 1.4 with populated R62 in conjunction with a locally powered target board is not possible. In this case, the target device RESET signal is pulled down by the FET tool. It is recommended to remove R62 to eliminate this restriction. This component is located close to the 14-pin connector on the MSP-FET430UIF PCB. See the schematic and PCB drawings in this document for the exact location of this component. Assembly change on 1.4a (January 2006) • R62: not populated 144 Hardware SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix C SLAU278Q–May 2009–Revised February 2014 Hardware Installation Guide This section describes the hardware installation process of the following USB debug interfaces on a PC running Windows XP: • MSP-FET430UIF • eZ430-F2013 • eZ430-RF2500 • eZ430-Chronos • eZ430-RF2780 • eZ430-RF2560 • MSP-WDSxx "Metawatch" • LaunchPad (MSP-EXP430G2) • MSP-EXP430FR5739 • MSP-EXP430F5529 The installation procedure for other supported versions of Windows is very similar and, therefore, not shown here. Topic ........................................................................................................................... Page C.1 Hardware Installation ....................................................................................... 146 SLAU278Q–May 2009–Revised February 2014 Hardware Installation Guide 145 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware Installation www.ti.com C.1 Hardware Installation Table C-1 shows the USB VIDs and PIDs used in MSP430 tools. Table C-1. USB VIDs and PIDs Used in MSP430 Tools Tool USB VID USB PID INF File Name eZ430-F2013 0x0451 0xF430 usbuart3410.inf eZ430-RF2500 0x0451 0xF432 430CDC.inf eZ430-RF2780 0x0451 0xF432 430CDC.inf eZ430-RF2560 0x0451 0xF432 430CDC.inf MSP-WDSxx "Metawatch" 0x0451 0xF432 430CDC.inf eZ430-Chronos 0x0451 0xF432 430CDC.inf MSP-FET430UIF(1) 0x2047 0x0010 msp430tools.inf LaunchPad (MSP-EXP430G2) 0x0451 0xF432 430CDC.inf MSP-EXP430FR5739 0x0451 0xF432 430CDC.inf MSP-EXP430F5529 0x0451 0xF432 430CDC.inf (1) The older MSP-FET430UIF used with IAR versions before v5.20.x and CCS versions before v5.1 has VID 0x0451 and PID 0xF430. With the firmware update, it is updated to the 0x2047 and 0x0010, respectively. 1. Before connecting of the USB Debug Interface with a USB cable to a USB port of the PC the one of IDEs (CCS or IAR) should be installed. The IDE installation isntalls also drivers for USB Debug Interfaces without user interaction. After IDE installation the USB Debug Interface can be connected and will be ready to work within few seconds. 2. The driver can be also installed manually. After plug in the USB Debug Interface to USB port of the PC the Hardware Wizard starts automatically and opens the "Found New Hardware Wizard" window. 3. Select "Install from a list or specific location (Advanced)" (see Figure C-1). Figure C-1. Windows XP Hardware Wizard 146 Hardware Installation Guide SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware Installation 4. Browse to the folder where the driver information files are located (see Figure C-2). For CCS, the default folder is: c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_CDC, or c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_FET_XP_XX, or c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_eZ-RF depending of firmware version of the tool. For IAR Embedded Workbench, the default folder is: \Embedded Workbench x.x\ 430\drivers\TIUSBFET\eZ430-UART, or \Embedded Workbench x.x\ 430\drivers\. Figure C-2. Windows XP Driver Location Selection Folder 5. The Wizard generates a message that an appropriate driver has been found. SLAU278Q–May 2009–Revised February 2014 Hardware Installation Guide 147 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware Installation www.ti.com 6. The wizard installs the driver files. 7. The wizard shows a message that it has finished the installation of the software USB Debug Interface. 8. The USB debug interface is installed and ready to use. The Device Manager lists a new entry as shown in Figure C-3, Figure C-4, or Figure C-5. Figure C-3. Device Manager Using USB Debug Interface using VID/PID 0x2047/0x0010 148 Hardware Installation Guide SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware Installation Figure C-4. Device Manager Using USB Debug Interface with VID/PID 0x0451/0xF430 SLAU278Q–May 2009–Revised February 2014 Hardware Installation Guide 149 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware Installation www.ti.com Figure C-5. Device Manager Using USB Debug Interface with VID/PID 0x0451/0xF432 150 Hardware Installation Guide SLAU278Q–May 2009–Revised February 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Document Revision History Document Revision History Version Changes SLAU278 Initial release SLAU278A Updated USB driver installation according to CCE v3.1 SR1 and CCS v4. SLAU278B Added information about MSP-FET430U80USB, MSP-TS430PN80USB, and eZ430-Chronos. SLAU278C Added bills of materials and updated some PCBs in Appendix B. Added information about MSP-TS430DA38, MSP-TS430DL48, MSP-TS430PW14, MSP-TS430PW28. SLAU278D Added information about MSP-TS430L092, MSP-TS430RSB40, MSP-TS430RGC64USB, MSP-TS430PZ100USB, MSPFET430F5137RF900 SLAU278E Added jumper information for MSP-TS430L092 PCBs to Appendix B. Added new supported devices in Chapter 1. Added information about MSP-TS430PW24, MSP-TS430PW28A, MSP-TS430RHA40A, MSP-TS430RGZ48B, MSPSLAU278F TS430RGC64B, MSP-TS430PN80A, and MSP-TS430PZ100B. Updated MSP-TS430RSB40 schematics SLAU278G Added information for MSP-TS430PZ100C SLAU278H Added information for MSP-TS430D8 and MSP-TS430RGC64C Updated Table 1-1. Replaced Figure 2-2. SLAU278I Added Figure 2-3. Replaced Figure B-37 and Figure B-67. Added Table C-1. Editorial changes throughout. SLAU278J Added EM430F6147RF900 Section B.33. Added battery pack connection information to all EM430Fx1x7RF900 kits. SLAU278K Added information for MSP-TS430RGZ48C and MSP-TS430PEU128. Updated Figure B-38. SLAU278L Changed descriptions in Section B.19 and Section B.30. Changed Figure B-60. SLAU278M Added information for MSP430G2x44 and MSP430G2x55 in Table 1-2. SLAU278N Updated Table 1-1. Updated Section 2.3. Changed Table 1-1 and Table 1-2 for MSP430TCH5E. Changed Figure 2-1 through Figure 2-3. SLAU278O Changed FAQ 12 in Section A.1. Changed Figure B-47, Figure B-49, and Figure B-69 through Figure B-73. Added information about F523x, F524x, and F525x to Table 1-2 and Section B.19. SLAU278P Changed Figure B-38. Added BSL information to note on Figure B-41. Figure B-15, Corrected JTAG mode selection jumpers (J4 to J7). SLAU278Q Section B.19, In last sentence, corrected jumper (JP4). Removed "RF Emission Testing" section. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. SLAU278Q–May 2009–Revised February 2014 Revision History 151 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety programs, please visit www.ti.com/esh or contact TI. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. REGULATORY COMPLIANCE INFORMATION As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal Communications Commission (FCC) and Industry Canada (IC) rules. For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. General Statement for EVMs including a radio User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization. For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant Caution This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and receiver. • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio/TV technician for help. For EVMs annotated as IC – INDUSTRY CANADA Compliant This Class A or B digital apparatus complies with Canadian ICES-003. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Concerning EVMs including radio transmitters This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concerning EVMs including detachable antennas Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. 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User’s Guide SWRU321A – May 2013 SmartRF™ is a trademark of Texas Instruments SmartRF06 Evaluation Board User’s Guide User’s Guide SWRU321A – May 2013 Page 3/32 Table of Contents 4.1 INSTALLING SMARTRF STUDIO AND USB DRIVERS ................................................................ 7 4.1.1 SmartRF Studio ................................................................................................................. 7 4.1.2 FTDI USB driver ................................................................................................................ 7 5.1 ABSOLUTE MAXIMUM RATINGS ........................................................................................... 11 6.1 XDS100V3 EMULATOR ...................................................................................................... 13 6.1.1 UART back channel ........................................................................................................ 14 6.2 POWER SOURCES ............................................................................................................. 14 6.2.1 USB Power ...................................................................................................................... 15 6.2.2 Battery Power .................................................................................................................. 15 6.2.3 External Power Supply .................................................................................................... 16 6.3 POWER DOMAINS .............................................................................................................. 17 6.3.1 XDS Domain ................................................................................................................... 17 6.3.2 EM Domain...................................................................................................................... 17 6.3.3 3.3 V Domain .................................................................................................................. 18 6.4 LCD ................................................................................................................................. 18 6.5 MICRO SD CARD SLOT ...................................................................................................... 19 6.6 ACCELEROMETER .............................................................................................................. 19 6.7 AMBIENT LIGHT SENSOR .................................................................................................... 20 6.8 BUTTONS .......................................................................................................................... 20 6.9 LEDS ............................................................................................................................... 21 6.9.1 General Purpose LEDs ................................................................................................... 21 6.9.2 XDS100v3 Emulator LEDs .............................................................................................. 21 6.10 EM CONNECTORS ............................................................................................................. 21 6.11 BREAKOUT HEADERS AND JUMPERS ................................................................................... 23 6.11.1 I/O Breakout Headers ..................................................................................................... 23 6.11.2 XDS100v3 Emulator Bypass Headers ............................................................................ 24 6.11.3 20-pin ARM JTAG Header .............................................................................................. 25 6.11.4 10-pin ARM Cortex Debug Header ................................................................................. 26 6.12 CURRENT MEASUREMENT .................................................................................................. 27 6.12.1 High-side current sensing ............................................................................................... 27 6.12.2 Current Measurement Jumper ........................................................................................ 27 7.1 20-PIN ARM JTAG HEADER .............................................................................................. 29 7.2 10-PIN ARM CORTEX DEBUG HEADER ............................................................................... 29 7.3 CUSTOM STRAPPING ......................................................................................................... 30 List of Figures Figure 1 – Driver install: a) Update driver, b) Specify path to FTDI drivers..................................... 8 Figure 2 – Driver install: a) VCP loaded and b) drivers successfully installed ................................ 8 Figure 3 – SmartRF06EB (rev. 1.2.1) with EM connected ............................................................ 10 Figure 4 – SmartRF06EB architecture .......................................................................................... 12 Figure 5 – SmartRF06EB revision 1.2.1 front side ........................................................................ 13 Figure 6 – SmartRF06EB revision 1.2.1 reverse side ................................................................... 13 Figure 7 – Jumper mounted on J5 to enable the UART back channel ......................................... 14 Figure 8 – Main power switch (P501) and source selection switch (P502) ................................... 15 Figure 9 – SmartRF06EB power selection switch (P502) in “USB” position ................................. 15 Figure 10 – SmartRF06EB power source selection switch (P502) in “BAT” position ................... 16 Figure 11 – SmartRF06EB external power supply header (J501) ................................................ 16 Figure 12 – Power domain overview of SmartRF06EB ................................................................. 17 Figure 13 – Mount a jumper on J502 to bypass EM domain voltage regulator ............................. 18 Figure 14 – Simplified schematic of Ambient Light Sensor setup ................................................. 20 Figure 15 – SmartRF06EB EM connectors RF1 and RF2 ............................................................ 21 User’s Guide SWRU321A – May 2013 Page 4/32 Figure 16 – SmartRF06EB I/O breakout overview ........................................................................ 23 Figure 17 – XDS100v3 Emulator Bypass Header (P408) ............................................................. 24 Figure 18 – 20-pin ARM JTAG header (P409) .............................................................................. 25 Figure 19 – 10-pin ARM Cortex Debug header (P410) ................................................................. 26 Figure 20 – Simplified schematic of high-side current sensing setup ........................................... 27 Figure 21 – Measuring current consumption using jumper J503 .................................................. 27 Figure 22 – Simplified connection diagram for different debugging scenarios ............................. 28 Figure 23 – Debugging external target using SmartRF06EB ........................................................ 29 Figure 24 – ARM JTAG header (P409) with strapping to debug external target .......................... 30 List of Tables Table 1 – SmartRF06EB features ................................................................................................... 5 Table 2 – Supply voltage: Recommended operating conditions and absolute max. ratings ........ 11 Table 3 – Temperature: Recommended operating conditions and storage temperatures ........... 11 Table 4 – UART Back channel signal connections ....................................................................... 14 Table 5 – Power domain overview of SmartRF06EB .................................................................... 17 Table 6 – LCD signal connections ................................................................................................. 19 Table 7 – Micro SD Card signal connections ................................................................................ 19 Table 8 – Accelerometer signal connections ................................................................................. 20 Table 9 – Ambient Light Sensor signal connections ..................................................................... 20 Table 10 – Button signal connections ........................................................................................... 20 Table 11 – General purpose LED signal connections ................................................................... 21 Table 12 – EM connector RF1 pin-out........................................................................................... 22 Table 13 – EM connector RF2 pin-out........................................................................................... 22 Table 14 – SmartRF06EB I/O breakout overview ......................................................................... 24 Table 15 – 20-pin ARM JTAG header pin-out (P409) ................................................................... 25 Table 16 – 10-pin ARM Cortex Debug header pin-out (P410) ...................................................... 26 Table 17 – Debugging external target: Minimum strapping (cJTAG support) ............................... 30 Table 18 – Debugging external target: Optional strapping ............................................................ 30 User’s Guide SWRU321A – May 2013 Page 5/32 1 Introduction The SmartRF06 Evaluation Board (SmartRF06EB or simply EB) is the motherboard in development kits for Low Power RF ARM Cortex®-M based System on Chips from Texas Instruments. The board has a wide range of features, listed in Table 1 below. Component Description TI XDS100v3 Emulator cJTAG and JTAG emulator for easy programming and debugging of SoCs on Evaluation Modules or external targets. High-speed USB 2.0 interface Easy plug and play access to full SoC control using SmartRF™ Studio PC software. Integrated serial port over USB enables communication between the SoC via the UART back channel. 64x128 pixels serial LCD Big LCD display for demo use and user interface development. LEDs Four general purpose LEDs for demo use or debugging. Micro SD card slot External flash for extra storage, over-the-air upgrades and more. Buttons Five push-buttons for demo use and user interfacing. Accelerometer Three-axis highly configurable digital accelerometer for application development and demo use. Light Sensor Ambient Light Sensor for application development and demo use. Current measurement Current sense amplifier for high side current measurements. Breakout pins Easy access to SoC GPIO pins for quick and easy debugging. Table 1 – SmartRF06EB features 2 About this manual This manual contains reference information about the SmartRF06EB. Chapter 4 will give a quick introduction on how to get started with the SmartRF06EB. It describes how to install SmartRF™ Studio to get the required USB drivers for the evaluation board. Chapter 5 briefly explains how the EB can be used throughout a project’s development cycle. Chapter 6 gives an overview of the various features and functionality provided by the board. A troubleshooting guide is found in chapter 8 and Appendix A contains the schematics for SmartRF06EB revision 1.2.1. The PC tools SmartRF™ Studio and SmartRF™ Flash Programmer have their own user manual. See chapter 9 for references to relevant documents and web pages. User’s Guide SWRU321A – May 2013 Page 6/32 3 Acronyms and Abbreviations ALS Ambient Light Sensor cJTAG Compact JTAG (IEEE 1149.7) CW Continuous Wave DK Development Kit EB Evaluation Board EM Evaluation Module FPGA Field-Programmable Gate Array I/O Input/Output JTAG Joint Test Action Group (IEEE 1149.1) LCD Liquid Crystal Display LED Light Emitting Diode LPRF Low Power RF MCU Micro Controller MISO Master In, Slave Out (SPI signal) MOSI Master Out, Slave In (SPI signal) NA Not Applicable / Not Available NC Not Connected RF Radio Frequency RTS Request to Send RX Receive SoC System on Chip SPI Serial Peripheral Interface TI Texas Instruments TP Test Point TX Transmit UART Universal Asynchronous Receive Transmit USB Universal Serial Bus VCP Virtual COM Port User’s Guide SWRU321A – May 2013 Page 7/32 4 Getting Started Before connecting the SmartRF06EB to the PC via the USB cable, it is highly recommended to perform the steps described below. 4.1 Installing SmartRF Studio and USB drivers Before your PC can communicate with the SmartRF06EB over USB, you will need to install the USB drivers for the EB. The latest SmartRF Studio installer [1] includes USB drivers both for Windows x86 and Windows x64 platforms. After you have downloaded SmartRF Studio from the web, extract the zip-file, run the installer and follow the instructions. Select the complete installation to include the SmartRF Studio program, the SmartRF Studio documentation and the necessary drivers needed to communicate with the SmartRF06EB. 4.1.1 SmartRF Studio SmartRF Studio is a PC application developed for configuration and evaluation of many RF-IC products from Texas Instruments. The application is designed for use with SmartRF Evaluation Boards, such as SmartRF06EB, and runs on Microsoft Windows operating systems. SmartRF Studio lets you explore and experiment with the RF-ICs as it gives full overview and access to the devices’ registers to configure the radio and has a control interface for simple radio operation from the PC. This means that SmartRF Studio will help radio system designers to easily evaluate the RF-IC at an early stage in the design process. It also offers a flexible code export function of radio register settings for software developers. The latest version of SmartRF Studio can be downloaded from the Texas Instruments website [1], where you will also find a complete user manual. 4.1.2 FTDI USB driver SmartRF PC software such as SmartRF Studio uses a proprietary USB driver from FTDI [2] to communicate with SmartRF06 evaluation boards. Connect your SmartRF06EB to the computer with a USB cable and turn it on. If you did a complete install of SmartRF Studio, Windows will recognize the device automatically and the SmartRF06EB is ready for use! 4.1.2.1 Install FTDI USB driver manually in Windows If the SmartRF06EB was not properly recognized after plugging it into your PC, try the following steps to install the necessary USB drivers. The steps described are for Microsoft Windows 7, but are very similar to those in Windows XP and Windows Vista. It is assumed that you have already downloaded and installed the latest version of SmartRF Studio 7 [1]. Open the Windows Device Manager and right click on the first “Texas Instruments XDS100v3” found under “Other devices” as shown in Figure 1a. Select “Update Driver Software…” and, in the appearing dialog, browse to \Drivers\ftdi as shown in Figure 1b. User’s Guide SWRU321A – May 2013 Page 8/32 a) b) Figure 1 – Driver install: a) Update driver, b) Specify path to FTDI drivers Press Next and wait for the driver to be installed. The selected device should now appear in the Device Manager as “TI XDS100v3 Channel x” (x = A or B) as seen in Figure 2b. Repeat the above steps for the second “Texas Instruments XDS100v3” listed under “Other devices”. 4.1.2.1.1 Enable XDS100v3 UART back channel on Windows If you have both “TI XDS100v3 Channel A” and “TI XDS100v3 Channel B” listed under Universal Serial Bus Controllers, you can proceed. Right click on “TI XDS100v3 Channel B” and select Properties. Under the Advanced tab, make sure “Load VCP” is checked as shown in Figure 2a. A “USB Serial Port” may be listed under “Other devices”, as seen in Figure 1a. Follow the same steps as for the “Texas Instruments XDS100v3” devices to install the VCP driver. When the drivers from \Drivers\ftdi is properly installed, you should see the USB Serial Port device be listed under “Ports (COM & LPT)” as shown in Figure 2b. The SmartRF06EB drivers are now installed correctly. Figure 2 – Driver install: a) VCP loaded and b) drivers successfully installed User’s Guide SWRU321A – May 2013 Page 9/32 4.1.2.2 Install XSD100v3 UART back channel on Linux The ports on SmartRF06EB will typically be mounted as ttyUSB0 or ttyUSB1. The UART back channel is normally mounted as ttyUSB1. 1. Download the Linux drivers from [2]. 2. Untar the ftdi_sio.tar.gz file on your Linux system. 3. Connect the SmartRF06EB to your system. 4. Install driver a. Verify the USB Product ID (PID) and Vendor ID (VID). The TI XDS100v3 USB VID is 0x0403 and the PID is 0xA6D1, but if you wish to find the PID using a terminal window/shell, use > lsusb | grep -i future b. Install driver using modprobe In a terminal window/shell, navigate to the ftdi_sio folder and run > sudo modprobe ftdi_sio vendor=0x403 product=0xA6D1 SmartRF06EB should now be correctly mounted. The above steps have been tested on Fedora and Ubuntu distributions. If the above steps failed, try uninstalling ‘brltty’ prior to step 5 (technical note TN_101, [2]). > sudo apt-get remove brltty User’s Guide SWRU321A – May 2013 Page 10/32 5 Using the SmartRF06 Evaluation Board The SmartRF06EB is a flexible test and development platform that works together with RF Evaluation Modules from Texas Instruments. An Evaluation Module (EM) is a small RF module with RF chip, balun, matching filter, SMA antenna connector and I/O connectors. The modules can be plugged into the SmartRF06EB which lets the PC take direct control of the RF device on the EM over the USB interface. SmartRF06EB currently supports: - CC2538EM SmartRF06EB is included in e.g. the CC2538 development kit. Figure 3 – SmartRF06EB (rev. 1.2.1) with EM connected The PC software that controls the SmartRF06EB + EM is SmartRF Studio. Studio can be used to perform several RF tests and measurements, e.g. to set up a CW signal and send/receive packets. User’s Guide SWRU321A – May 2013 Page 11/32 The EB+EM can be of great help during the whole development cycle for a new RF product. - Perform comparative studies. Compare results obtained with EB+EM with results from your own system. - Perform basic functional tests of your own hardware by connecting the radio on your board to SmartRF06EB. SmartRF Studio can be used to exercise the radio. - Verify your own software with known good RF hardware, by simply connecting your own microcontroller to an EM via the EB. Test the send function by transmitting packets from your SW and receive with another board using SmartRF Studio. Then transmit using SmartRF Studio and receive with your own software. - Develop code for your SoC and use the SmartRF06EB as a standalone board without PC tools. The SmartRF06EB can also be used as a debugger interface to the SoCs from IAR Embedded workbench for ARM or Code Composer Studio from Texas Instruments. For details on how to use the SmartRF06EB to debug external targets, see chapter 7. 5.1 Absolute Maximum Ratings The minimum and maximum operating supply voltages and absolute maximum ratings for the active components onboard the SmartRF06EB are summarized in Table 2. Table 3 lists the recommended operating temperature and storage temperature ratings. Please refer to the respective component’s datasheet for further details. Component Operating voltage Absolute max. rating Min. [V] Max. [V] Min. [V] Max. [V] XDS100v3 Emulator1 [4] +1.8 +3.6 -0.3 +3.75 LCD [5] +3.0 +3.3 -0.3 +3.6 Accelerometer [6] +1.62 +3.6 -0.3 +4.25 Ambient light sensor [7] +2.32 +5.5 NA +6 Table 2 – Supply voltage: Recommended operating conditions and absolute max. ratings Component Operating temperature Storage temperature Min. [˚C] Max. [˚C] Min. [˚C] Max. [˚C] XDS100v3 Emulator [4] -20 +70 -50 +110 LCD [5] -20 +70 -30 +80 Accelerometer [6] -40 +85 -50 +150 Ambient light sensor [7] -40 +85 -40 +85 Table 3 – Temperature: Recommended operating conditions and storage temperatures 1 The XDS100v3 Emulator is USB powered. Values refer to the supply and I/O pin voltages of the connected target. 2 Recommended minimum operating voltage. User’s Guide SWRU321A – May 2013 Page 12/32 6 SmartRF06 Evaluation Board Overview SmartRF06EB acts as the motherboard in development kits for ARM® Cortex™ based Low Power RF SoCs from Texas Instruments. The board has several user interfaces and connections to external interfaces, allowing fast prototyping and testing of both software and hardware. An overview of the SmartRF06EB architecture is found in Figure 4. The board layout is found in Figure 5 and Figure 6, while the schematics are located in Appendix A. This chapter will give an overview of the general architecture of the board and describe the available I/O. The following sub-sections will explain the I/O in more detail. Pin connections between the EM and the evaluation board I/O can be found in section 6.10. EM Domain (1.8 – 3.6 V) XDS Domain 3.3 V Domain EM Connectors Light Sensor Buttons LEDs Accelerometer XDS100v3 Emulator XDS LEDs Level shifter SD Card Reader Load switch 20-pin ARM JTAG Header Bypass Header UART back channel Level shifter 10-pin ARM Cortex Debug Header (c)JTAG USB I/O breakout headers 3.3 V Domain Enable LCD I/O Breakout Headers Figure 4 – SmartRF06EB architecture User’s Guide SWRU321A – May 2013 Page 13/32 EM current measurement testpoint and jumper XDS bypass header 20-pin ARM JTAG Header General purpose buttons UART back channel breakout XDS LEDs 10-pin ARM Cortex Header EM I/O breakout Main power switch Power source selection switch External power supply connector EM reset button Regulator bypass jumper Micro SD card slot LCD Accelerometer LEDs Ambient Light Sensor EM connectors UART back channel enable Jumper Figure 5 – SmartRF06EB revision 1.2.1 front side 1.5 V AAA Alkaline Battery holder XDS100v3 Emulator 1.5 V AAA Alkaline Battery holder CR2032 coin cell battery holder Figure 6 – SmartRF06EB revision 1.2.1 reverse side 6.1 XDS100v3 Emulator The XDS100v3 Emulator from Texas Instruments has cJTAG and regular JTAG support. cJTAG is a 2-pin extension to regular 4-pin JTAG. The XDS100v3 consists of a USB to JTAG chip from FTDI [2] and an FPGA to convert JTAG instructions to cJTAG format. User’s Guide SWRU321A – May 2013 Page 14/32 In addition to regular debugging capabilities using cJTAG or JTAG, the XDS100v3 Emulator supports a UART backchannel over a USB Virtual COM Port (VCP) to the PC. The UART back channel supports flow control, 8-N-1 format and data rates up to 12Mbaud. Please see the XDS100v3 emulator product page [4] for detailed information about the emulator. The XDS100v3 Emulator is powered over USB and is switched on as long as the USB cable is connected to the SmartRF06EB and the main power switch (S501) is in the ON position. The XDS100v3 Emulator supports targets with operating voltages between 1.8 V and 3.6. The min (max) operating temperature is -20 (+70) ˚C. 6.1.1 UART back channel The mounted EM can be connected to the PC via the XDS100v3 Emulator’s UART back channel. When connected to a PC, the XDS100v3 is enumerated as a Virtual COM Port (VCP) over USB. The driver used is a royalty free VCP driver from FTDI, available for e.g. Microsoft Windows, Linux and Max OS X. The UART back channel gives the mounted EM access to a four pin UART interface, supporting 8-N-1 format at data rates up to 12 Mbaud. To enable the SmartRF06EB UART back channel the “Enable UART over XDS100v3” jumper (J5), located on the lower right side of the EB, must be mounted (Figure 7). Table 4 shows an overview of the I/O signals related to UART Back Channel. Figure 7 – Jumper mounted on J5 to enable the UART back channel Signal name Description Probe header EM pin RF1.7_UART_RX UART Receive (EM data in) EM_UART_RX (P412.2) RF1.7 RF1.9_UART_TX UART Transmit (EM data out) EM_UART_TX (P412.3) RF1.9 RF1.3_UART_CTS UART Clear To Send signal EM_UART_CTS (P412.4) RF1.3 RF2.18_UART_RTS UART Request To Send signal EM_UART_RTS (P412.5) RF2.18 Table 4 – UART Back channel signal connections 6.2 Power Sources There are three ways to power the SmartRF06EB; batteries, USB bus and external power supply. The power source can be selected using the power source selection switch (S502) seen in Figure 8. The XDS100v3 Emulator can only be powered over USB. The main power supply switch (S501) cuts power to the SmartRF06EB. Never connect batteries and an external power source to the SmartRF06EB at the same time! Doing so may lead to excessive currents that may damage the batteries or cause onboard components to break. The CR2032 coin cell battery is in particular very sensitive to reverse currents (charging) and must never be combined with other power sources (AAA batteries or an external power source). User’s Guide SWRU321A – May 2013 Page 15/32 Figure 8 – Main power switch (P501) and source selection switch (P502) 6.2.1 USB Power When the SmartRF06EB is connected to a PC via a USB cable, it can draw power from the USB bus. The onboard voltage regulator supplies approximately 3.3 V to the mounted EM and the EB peripherals. To power the mounted EM and the EB peripherals from the USB bus, the power source selection switch (S502) should be in “USB” position (Figure 9). The maximum current consumption is limited by the regulator to 1500 mA3. Figure 9 – SmartRF06EB power selection switch (P502) in “USB” position 6.2.2 Battery Power The SmartRF06EB can be powered using two 1.5 V AAA alkaline batteries or a 3 V CR2032 coin cell battery. The battery holders for the AAA batteries and the CR2032 coin cell battery are located on the reverse side of the PCB. To power the mounted EM and the EB peripherals using batteries, the power source selection switch (S502) should be in “BAT” position (Figure 10). When battery powered, the EM power domain is by default regulated to 2.1 V. The voltage regulator may be bypassed by mounting a jumper on J502. See section 6.3.2 for more details. Do not power the SmartRF06EB using two 1.5 V AAA batteries and a 3 V CR2032 coin cell battery at the same time. Doing so may lead to excessive currents that may damage the batteries or cause onboard components to break. 3 Note that most USB power sources are limited to 500 mA. User’s Guide SWRU321A – May 2013 Page 16/32 Figure 10 – SmartRF06EB power source selection switch (P502) in “BAT” position 6.2.3 External Power Supply The SmartRF06EB can be powered using an external power supply. To power the mounted EM and the EB peripherals using an external power supply, the power source selection switch (S502) should be in “BAT” position (Figure 10 in section 6.2.2). The external supply’s ground should be connected to the SmartRF06EB ground, e.g. to the ground pad in the top left corner of the EB. Connect the positive supply connector to the external power header J501 (Figure 11). The applied voltage must be in the range from 2.1 V to 3.6 V and limited to max 1.5 A. When powered by an external power supply, the EM power domain is by default regulated to 2.1 V. The voltage regulator may be bypassed by mounting a jumper on J502. See section 6.3.2 for more details. There is a risk of damaging the onboard components if the applied voltage on the external power connector/header is lower than -0.3 V or higher than 3.6 V (combined absolute maximum ratings for onboard components). See section 5.1 for further information. Figure 11 – SmartRF06EB external power supply header (J501) User’s Guide SWRU321A – May 2013 Page 17/32 6.3 Power Domains The SmartRF06EB is divided into three power domains, described in detail in the following sections. The SmartRF06EB components, and what power domain they belong to, is shown in Figure 12 and Table 5 below. XDS domain (3.3 V) XDS100v3, XDS LEDs EM domain (1.8 - 3.6 V) ACC, ALS, keys, LEDs 3.3 V domain (3.3 V) LCD, SD card Power sources USB, batteries, external supply Level shifters Level shifters Mounted EM Figure 12 – Power domain overview of SmartRF06EB Component Power domain Power source Evaluation Module EM domain (LO_VDD) USB, battery, external General Purpose LEDs EM domain (LO_VDD) USB, battery, external Accelerometer EM domain (LO_VDD) USB, battery, external Ambient Light Sensor EM domain (LO_VDD) USB, battery, external Current measurement MSP MCU EM domain (LO_VDD) USB, battery, external LEDs EM domain (LO_VDD) USB, battery, external XDS100v3 Emulator XDS domain USB XDS100v3 LEDs XDS domain USB SD Card Slot 3.3 V domain (HI_VDD) Same as EM domain LCD 3.3 V domain (HI_VDD) Same as EM domain Table 5 – Power domain overview of SmartRF06EB 6.3.1 XDS Domain The XDS100v3 Emulator (see section 6.1) onboard the SmartRF06EB is in the XDS domain. The XDS domain is powered over USB. The USB voltage supply (+5 V) is down-converted to +3.3 V and +1.5 V for the different components of the XDS100v3 Emulator. The SmartRF06EB must be connected to e.g. a PC over USB for the XDS domain to be powered up. The domain is turned on/off by the SmartRF06EB main power switch. 6.3.2 EM Domain The mounted EM board and most of the SmartRF06EB peripherals are powered in the EM domain and signals in this domain (accessible by the EM), are prefixed “LV_” in the schematics. Table 5 lists the EB peripherals that are powered in the EM domain. The domain is turned on/off by the SmartRF06EB power switch. User’s Guide SWRU321A – May 2013 Page 18/32 The EM domain may be powered using various power sources; USB powered (regulated to 3.3 V), battery powered (regulated to 2.1 V or unregulated) and using an external power supply (regulated to 2.1 V or unregulated). When battery powered or powered by an external source, the EM power domain is by default regulated to 2.1 V using a step down converter. The step down converter may be bypassed by mounting a jumper on J502 (Figure 13), powering the EM domain directly from the source. When J502 is not mounted, the EM power domain is regulated to 2.1 V. The maximum current consumption of the EM power domain is then limited by the regulator to 410 mA. Figure 13 – Mount a jumper on J502 to bypass EM domain voltage regulator 6.3.3 3.3 V Domain The 3.3 V domain is a sub domain of the EM domain. The 3.3 V domain is regulated to 3.3 V using a buck-boost converter, irrespective of the source powering the EM domain. Signals in the 3.3V domain (controlled by the EM) are prefixed “HV_” for High Voltage in the schematics. Two EB peripherals are in the 3.3 V domain, the LCD and the SD card slot, as listed in Table 5. These peripherals are connected to the EM domain via level shifters U401 and U402. The 3.3 V domain may be switched on (off) completely by the mounted EM board by pulling signal LV_3.3V_EN to a logical 1 (0). See Table 14 in section 6.11.1 for details about the mapping between the EM and signals onboard the SmartRF06EB. 6.4 LCD The SmartRF06EB comes with a 128x64 pixels display from Electronic Assembly (DOGM128E-6) [4]. The LCD display is available to mounted EM via a SPI interface, enabling software development of user interfaces and demo use. Table 6 shows an overview of the I/O signals related to the LCD. The recommended operating condition for the LCD display is a supply voltage between 3.0 V and 3.3 V. The LCD display is powered from the 3.3 V power domain (HI_VDD). The min (max) operating temperature is -20 (+70) ˚C. The LCD connector on SmartRF06EB is very tight to ensure proper contact between the EM and the LCD. Be extremely cautious when removing the LCD to avoid the display from breaking. NOTE: Mounting a jumper on J502 will not have any effect if the SmartRF06EB is powered over USB (when the power source selection switch, S502, is in “USB” position). User’s Guide SWRU321A – May 2013 Page 19/32 Signal name Description Probe header EM pin LV_3.3V_EN 3.3 V domain enable signal4 RF1.15 (P407.1) RF1.15 LV_LCD_MODE LCD mode signal RF1.11 (P406.7) RF1.11 ¯L¯V¯_¯L¯C¯D¯_¯R¯¯E¯S¯E¯T¯ LCD reset signal (active low) RF1.13 (P406.9) RF1.13 ¯L¯V¯_¯L¯C¯D¯_¯C¯¯S LCD Chip Select (active low) RF1.17 (P407.3) RF1.17 LV_SPI_SCK SPI Clock RF1.16_SCK (P407.2) RF1.16 LV_SPI_MOSI SPI MOSI (LCD input) RF1.18_MOSI (P407.4) RF1.18 Table 6 – LCD signal connections 6.5 Micro SD Card Slot The SmartRF06EB has a micro SD card slot for connecting external SD/MMC flash devices (flash device not included). A connected flash device is available to the mounted EM via a SPI interface, giving it access to extra flash, enabling over-the-air upgrades and more. Table 8 shows an overview of I/O signals related to the micro SD card slot. The micro SD card is powered from the 3.3 V power domain (HI_VDD). Signal name Description Probe header EM pin LV_3.3V_EN 3.3 V domain enable signal4 RF1.15 (P407.1) RF1.15 ¯L¯V¯_¯S¯D¯C¯¯A¯R¯D¯_¯C¯¯S SD card Chip Select (active low) RF2.12 (P411.1) RF2.12 LV_SPI_SCK SPI Clock RF1.16_SCK (P407.2) RF1.16 LV_SPI_MOSI SPI MOSI (SD card input) RF1.18_MOSI (P407.4) RF1.18 LV_SPI_MISO SPI MISO (SD card output) RF1.20_MISO (P407.5) RF1.20 Table 7 – Micro SD Card signal connections 6.6 Accelerometer The SmartRF06EB is equipped with a BMA250 digital accelerometer from Bosch Sensortech [6]. The accelerometer is available to the mounted EM via an SPI interface and has two dedicated interrupt lines. The accelerometer is suitable for application development, prototyping and demo use. Table 8 shows an overview of I/O signals related to the accelerometer. The recommended operating condition for the accelerometer is a supply voltage between 1.62 V and 3.6 V. The min (max) operating temperature is -40 (+85) ˚C. Signal name Description Probe header EM pin LV_ACC_PWR Acc. power enable signal RF2.8 (P407.8) RF2.8 LV_ACC_INT1 Acc. interrupt signal RF2.16 (P411.5) RF2.16 LV_ACC_INT2 Acc. interrupt signal RF2.14 (P411.3) RF2.14 ¯L¯V¯_¯A¯C¯C¯¯¯C¯S¯ Acc. Chip Select (active low) RF2.10 (P407.9) RF2.10 LV_SPI_SCK SPI Clock RF1.16_SCK (P407.2) RF1.16 LV_SPI_MOSI SPI MOSI (acc. input) RF1.18_MOSI (P407.4) RF1.18 4 The LCD and SD card are both powered in the 3.3 V domain and cannot be powered on/off individually. User’s Guide SWRU321A – May 2013 Page 20/32 LV_SPI_MISO SPI MISO (acc. output) RF1.20_MISO (P407.5) RF1.20 Table 8 – Accelerometer signal connections 6.7 Ambient Light Sensor The SmartRF06EB has an analog SFH 5711 ambient light sensor (ALS) from Osram [7] that is available for the mounted EM via the EM connectors, enabling quick application development for demo use and prototyping. Figure 14 and Table 9 shows an overview of I/O signals related to the ambient light sensor. The recommended operating condition for the ambient light sensor is a supply voltage between 2.3 V and 5.5 V. The min (max) operating temperature is -40 (+85) ˚C. Ambient Light Sensor LV_ALS_OUT LV_ALS_PWR 22 kOhm Figure 14 – Simplified schematic of Ambient Light Sensor setup Signal name Description Probe header EM pin LV_ALS_PWR ALS power enable signal RF2.6 (P407.7) RF2.6 LV_ALS_OUT ALS output signal (analog) RF2.5 (P411.6) RF2.5 Table 9 – Ambient Light Sensor signal connections 6.8 Buttons There are 6 buttons on the SmartRF06EB. Status of the LEFT, RIGHT, UP, DOWN and SELECT buttons are available to the mounted EM. These buttons are intended for user interfacing and development of demo applications. The EM RESET button resets the mounted EM by pulling its reset line low (¯R¯F¯2¯.1¯5¯¯R¯¯E¯S¯E¯T¯). Table 10 shows an overview of I/O signals related to the buttons. Signal name Description Probe header EM pin LV_BTN_LEFT Left button (active low) RF1.6 (P406.4) RF1.6 LV_BTN_RIGHT Right button (active low) RF1.8 (P406.5) RF1.8 LV_BTN_UP Up button (active low) RF1.10 (P406.6) RF1.10 LV_BTN_DOWN Down button (active low) RF1.12 (P406.8) RF1.12 LV_BTN_SELECT Select button (active low) RF1.14 (P406.10) RF1.14 ¯L¯V¯_¯B¯T¯N¯_¯R¯¯E¯S¯E¯T¯ EM reset button (active low) ¯R¯F¯2¯.1¯5¯¯R¯¯E¯S¯E¯T¯ (P411.4) RF2.15 Table 10 – Button signal connections User’s Guide SWRU321A – May 2013 Page 21/32 6.9 LEDs 6.9.1 General Purpose LEDs The four LEDs D601, D602, D603, D604 can be controlled from the mounted EM and are suitable for demo use and debugging. The LEDs are active high. Table 11 shows an overview of I/O signals related to the LEDs. Signal name Description Probe header EM pin LV_LED_1 LED 1 (red) RF2.11 (P407.10) RF2.11 LV_LED_2 LED 2 (yellow) RF2.13 (P411.2) RF2.13 LV_LED_3 LED 3 (green) RF1.2 (P406.1) RF1.2 LV_LED_4 LED 4 (red-orange) RF1.4 (P406.2) RF1.4 Table 11 – General purpose LED signal connections 6.9.2 XDS100v3 Emulator LEDs The XDS100v3 emulator has two LEDs to indicate its status, D2 and D4. The LEDs are located on the top side of the SmartRF06EB. LED D2 is lit whenever the XDS100v3 Emulator is powered, while LED D4 (ADVANCED MODE) is lit when the XDS100v3 is in an active cJTAG debug state. 6.10 EM Connectors The EM connectors, shown in Figure 15, are used for connecting an EM board to the SmartRF06EB. The connectors RF1 and RF2 are the main interface and are designed to inhibit incorrect mounting of the EM board. The pin-out of the EM connectors is given in Table 12 and Table 13. Figure 15 – SmartRF06EB EM connectors RF1 and RF2 User’s Guide SWRU321A – May 2013 Page 22/32 EM pin Signal name Description Probe header Breakout header RF1.1 GND Ground RF1.2 RF1.2 GPIO signal to EM board P406.1 P403.1-2 RF1.3 RF1.3_UART_CTS UART back channel / GPIO P412.4 P408.15-16 RF1.4 RF1.4 GPIO signal to EM board P406.2 P403.3-4 RF1.5 RF1.5 GPIO signal to EM board P406.3 P403.5-6 RF1.6 RF1.6 GPIO signal to EM board P406.4 P403.7-8 RF1.7 RF1.7_UART_RX UART back channel (EM RX) P412.2 P408.11-12 RF1.8 RF1.8 GPIO signal to EM board P406.5 P403.9-10 RF1.9 RF1.9_UART_TX UART back channel (EM TX) P412.3 P408.13-14 RF1.10 RF1.10 GPIO signal to EM board P406.6 P403.11-12 RF1.11 RF1.11 GPIO signal to EM board P406.7 P403.13-14 RF1.12 RF1.12 GPIO signal to EM board P406.8 P403.15-16 RF1.13 RF1.13 GPIO signal to EM board P406.9 P403.17-18 RF1.14 RF1.14 GPIO signal to EM board P406.10 P403.19-20 RF1.15 RF1.15 GPIO signal to EM board P407.1 P404.1-2 RF1.16 RF1.16_SPI_SCK EM SPI Clock P407.2 P404.3-4 RF1.17 RF1.17 GPIO signal to EM board P407.3 P404.5-6 RF1.18 RF1.18_SPI_MOSI EM SPI MOSI P407.4 P404.7-8 RF1.19 GND Ground RF1.20 RF1.20_SPI_MISO EM SPI MISO P407.5 P404.9-10 Table 12 – EM connector RF1 pin-out EM pin Signal name Description Probe header Breakout header RF2.1 RF2.1_JTAG_TCK JTAG Test Clock P409.9 P408.1-2 RF2.2 GND Ground RF2.3 RF_VDD2 EM power TP10 J503.1-2 RF2.4 RF2.4_JTAG_TMS JTAG Test Mode Select P409.7 P408.3-4 RF2.5 RF2.5 GPIO signal to EM board P407.6 P404.11-12 RF2.6 RF2.6 GPIO signal to EM board P407.7 P404.13-14 RF2.7 RF_VDD1 EM power TP10 J503.1-2 RF2.8 RF2.8 GPIO signal to EM board P407.8 P404.15-16 RF2.9 RF_VDD1 EM power TP10 J503.1-2 RF2.10 RF2.10 GPIO signal to EM board P407.9 P404.17-18 RF2.11 RF2.11 GPIO signal to EM board P407.10 P404.19-20 RF2.12 RF2.12 GPIO signal to EM board P411.1 P405.1-2 RF2.13 RF2.13 GPIO signal to EM board P411.2 P405.3-4 RF2.14 RF2.14 GPIO signal to EM board P411.3 P405.5-6 RF2.15 ¯R¯F¯2¯.1¯5¯¯R¯¯E¯S¯E¯T¯ EM reset signal (active low) P411.4 P405.7-8 RF2.16 RF2.16 GPIO signal to EM board P411.5 P405.9-10 RF2.17 RF2.17_JTAG_TDI GPIO / JTAG Test Data In P409.5 P408.5-6 RF2.18 RF2.18_UART_RTS GPIO / UART Back Channel P412.5 P408.17-18 RF2.19 RF2.19_JTAG_TDO GPIO / JTAG Test Data Out P409.13 P408.7-8 RF2.20 GND Ground Table 13 – EM connector RF2 pin-out User’s Guide SWRU321A – May 2013 Page 23/32 6.11 Breakout Headers and Jumpers The SmartRF06EB has several breakout headers, giving access to all EM connector pins. An overview of the SmartRF06EB I/O breakout headers is given in Figure 16. Probe headers P406, P407, P411 and P412 give access to the I/O signals of the mounted EM. Breakout headers P403, P404 and P405 allow the user to map any EM I/O signal to any peripheral on the SmartRF06EB. The XDS bypass header (P408) makes it possible to disconnect the XDS100v3 Emulator onboard the EB from the EM. Using the 20-pin ARM JTAG header (P409) or the 10-pin ARM Cortex Debug Header (P410), it is possible to debug external targets using the onboard emulator. Evaluation Module Peripheral probe headers P406, P407, P411 I/O breakout headers P403, P404, P405 SmartRF06EB peripherals ACC, ALS, keys, LCD, LED, SD card XDS bypass header P408 XDS100v3 Emulator 20-pin ARM-JTAG Debug Header P409 10-pin Cortex Debug Header P410 UART back channel probe header P412 Figure 16 – SmartRF06EB I/O breakout overview 6.11.1 I/O Breakout Headers The I/O breakout headers on SmartRF06EB consist of pin connectors P406, P407, P411 and P412. P406, P407 and P411 are located at the top left side of SmartRF06EB. All EM signals available on these probe headers can be connected to or disconnected from SmartRF06EB peripherals using jumpers on headers P403, P404, P405. Probe header P412 is located near the bottom right corner of the SmartRF06EB. The signals available on P412 are connected to the XDS100v3 Emulator’s UART back channel using jumpers on header P408. The I/O breakout mapping between the SmartRF06EB and the mounted EM is given in Table 14. The leftmost column in the below table refers to the silk print seen on the SmartRF06EB. The rightmost column shows the corresponding CC2538 I/O pad on CC2538EM. NOTE: By default, all jumpers are mounted on P403, P404, P405 and P408. The default configuration is assumed in this user’s guide unless otherwise stated. User’s Guide SWRU321A – May 2013 Page 24/32 Probe header Silk print EB signal name EM connector CC2538EM I/O P406 RF1.2 LV_LED_3 RF1.2 PC2 RF1.4 LV_LED_4 RF1.4 PC3 RF1.5 NC RF1.5 PB1 RF1.6 LV_BTN_LEFT RF1.6 PC4 RF1.8 LV_BTN_RIGHT RF1.8 PC5 RF1.10 LV_BTN_UP RF1.10 PC6 RF1.11 LV_LCD_MODE RF1.11 PB2 RF1.12 LV_BTN_DOWN RF1.12 PC7 RF1.13 ¯L¯V¯_¯L¯C¯D¯_¯R¯¯E¯S¯E¯T¯ RF1.13 PB3 RF1.14 LV_BTN_SELECT RF1.14 PA3 P407 RF1.15 LV_3.3V_EN RF1.15 PB4 RF1.16_SCK LV_SPI_SCK RF1.16 PA2 RF1.17 ¯L¯V¯_¯L¯C¯D¯_¯C¯¯S RF1.17 PB5 RF1.18_MOSI LV_SPI_MOSI RF1.18 PA4 RF1.20_MISO LV_SPI_MISO RF1.20 PA5 RF2.5 LV_ALS_OUT RF2.5 PA6 RF2.6 LV_ALS_PWR RF2.6 PA7 RF2.8 LV_ACC_PWR RF2.8 PD4 RF2.10 ¯L¯V¯_¯A¯C¯C¯¯¯C¯S¯ RF2.10 PD5 RF2.11 LV_LED_1 RF2.11 PC0 P411 RF2.12 ¯L¯V¯_¯S¯D¯C¯¯A¯R¯D¯_¯C¯¯S RF2.12 PD0 RF2.13 LV_LED_2 RF2.13 PC1 RF2.14 LV_ACC_INT2 RF2.14 PD1 RF2.15_RESET ¯L¯V¯_¯B¯T¯N¯_¯R¯¯E¯S¯E¯T¯ RF2.15 nRESET RF2.16 LV_ACC_INT1 RF2.16 PD2 P412 EM_UART_RX RF1.7_UART_RX RF1.7 PA0 EM_UART_TX RF1.9_UART_TX RF1.9 PA1 EM_UART_CTS RF1.3_UART_CTS RF1.3 PB0 EM_UART_RTS RF2.18_UART_RTS RF2.18 PD3 Table 14 – SmartRF06EB I/O breakout overview 6.11.2 XDS100v3 Emulator Bypass Headers The XDS100v3 Emulator bypass header, P408, is by default mounted with jumpers (Figure 17), connecting the XDS100v3 Emulator to a mounted EM or external target. By removing the jumpers on P408, the XDS100v3 Emulator may be disconnected from the target. Figure 17 – XDS100v3 Emulator Bypass Header (P408) User’s Guide SWRU321A – May 2013 Page 25/32 6.11.3 20-pin ARM JTAG Header The SmartRF06EB comes with a standard 20-pin ARM JTAG header [8] (Figure 18), enabling the user to debug an external target using the XDS100v3 Emulator. The pin-out of the ARM JTAG header is given in Table 15. Chapter 7 has more information on how to debug an external target using the XDS100v3 Emulator onboard the SmartRF06EB. Figure 18 – 20-pin ARM JTAG header (P409) Pin Signal Description EB signal name XDS bypass header P409.1 VTRef Voltage reference VDD_SENSE P408.19-20 P409.2 VSupply Voltage supply NC P409.3 nTRST Test Reset NC P409.4 GND Ground GND P409.5 TDI Test Data In RF2.17_JTAG_TDI P408.5-6 P409.6 GND Ground GND P409.7 TMS Test Mode Select RF2.4_JTAG_TMS P408.3-4 P409.8 GND Ground GND P409.9 TCK Test Clock RF2.1_JTAG_TCK P408.1-2 P409.10 GND Ground GND P409.11 RTCK Return Clock NC P409.12 GND Ground GND P409.13 TDO Test Data Out RF2.19_JTAG_TDO P408.7-8 P409.14 GND Ground GND P409.15 nSRST System Reset ¯R¯F¯2¯.1¯5¯¯R¯¯E¯S¯E¯T¯ P408.9-10 P409.16 GND Ground GND P409.17 DBGRQ Debug Request NC P409.18 GND Ground GND P409.19 DBGACK Debug Acknowledge NC P409.20 GND Ground GND Table 15 – 20-pin ARM JTAG header pin-out (P409) User’s Guide SWRU321A – May 2013 Page 26/32 6.11.4 10-pin ARM Cortex Debug Header The SmartRF06EB comes with a standard 10-pin ARM Cortex debug header [8] (Figure 19), enabling the user to debug an external target using the XDS100v3 Emulator. The ARM Cortex debug header is located near the right hand edge of the EB. The header pin-out is given in Table 16. Chapter 7 has more information on how to debug an external target using the XDS100v3 Emulator onboard the SmartRF06EB. Figure 19 – 10-pin ARM Cortex Debug header (P410) Pin Signal Description EB signal name XDS bypass header P410.1 VCC Voltage reference VDD_SENSE P408.19-20 P410.2 TMS Test Mode Select RF2.4_JTAG_TMS P408.3-4 P410.3 GND Ground GND P410.4 TCK Test Clock RF2.1_JTAG_TCK P408.1-2 P410.5 GND Ground GND P410.6 TDO Test Data Out RF2.19_JTAG_TDO P408.7-8 P410.7 KEY Key NC P410.8 TDI Test Data In RF2.17_JTAG_TDI P408.5-6 P410.9 GNDDetect Ground detect GND P410.10 nRESET System Reset ¯R¯F¯2¯.1¯5¯¯R¯¯E¯S¯E¯T¯ P408.9-10 Table 16 – 10-pin ARM Cortex Debug header pin-out (P410) User’s Guide SWRU321A – May 2013 Page 27/32 6.12 Current Measurement The SmartRF06EB provides two options for easy measurements of the current consumption of a mounted EM. The following sections describe these two options in detail. 6.12.1 High-side current sensing The SmartRF06EB comes with a current sensing unit for measuring the current consumption of the mounted EM (Figure 20). The current sensing setup is “high-side”, that is, it measures the current going to the mounted EM. The current is converted to a voltage, available at the CURMEAS_OUTPUT test point (TP11), located near the right edge of the SmartRF06EB. Using the SmartRF06EB together with for example an oscilloscope makes it easy to measure the EM current consumption as a function of time. The relationship between the voltage measured at CURMEAS_OUTPUT, VCURMEAS, and the EM current consumption, IEM, is given by Equation 1 below. 15 V I CURMEAS EM (1) G = 100 0.15 Ohm To EM IEM VCURMEAS Figure 20 – Simplified schematic of high-side current sensing setup 6.12.2 Current Measurement Jumper SmartRF06EB has a current measurement header, J503, for easy measurement of EM current consumption. Header J503 is located on the upper right hand side of the EB. By replacing the jumper with an ammeter, as shown in Figure 21, the current consumption of the mounted EM can be measured. Figure 21 – Measuring current consumption using jumper J503 User’s Guide SWRU321A – May 2013 Page 28/32 7 Debugging an external target using SmartRF06EB You can easily use XDS100v3 Emulator onboard the SmartRF06EB to debug an external target. It is in this chapter assumed that the target is self-powered. When debugging an external, self-powered target using SmartRF06EB, make sure to remove the jumper from the current measurement header (J503) as shown in the second scenario of Figure 22. In this scenario, the onboard XDS100v3 senses the target voltage of the external target. In the left side scenario of the same figure, the XDS100v3 senses the target voltage of the EB’s EM domain. Having a jumper mounted on header J503 when debugging an external target will cause a conflict between the EB’s EM domain supply voltage and the target’s supply voltage. This may result in excess currents, damaging the onboard components of the SmartRF06EB or the target board. In Figure 22, the right hand side scenario shows how it is possible to debug an EM mounted on the SmartRF06EB using an external debugger. In this scenario, all the jumpers must be removed from the SmartRF06EB header P408 to avoid signaling conflicts between the onboard XDS100v3 Emulator and the external debugger. XDS100v3 06EB XDS + EM EM (EM domain) XDS100v3 06EB XDS + external target Ext. target (Target VDD) EM (EM domain) XDS100v3 External debugger + EM External debugger EM (EM domain) P408 (jumpers on) P408 (jumpers off) J503 (mounted) J503 (mounted) J503 (not mounted) Current measurement jumper XDS bypass header P408 (jumpers on) Debug header P409/P410 P409/P410 Figure 22 – Simplified connection diagram for different debugging scenarios User’s Guide SWRU321A – May 2013 Page 29/32 7.1 20-pin ARM JTAG Header The SmartRF06EB has a standard 20-pin ARM JTAG header mounted on the right hand side (P409). Make sure all the jumpers on the XDS bypass header (P408) are mounted and that the jumper is removed from header J503. Connect the external board to the 20-pin ARM JTAG header (P409) using a 20-pin flat cable as seen in Figure 23. Make sure pin 1 on P409 matches pin 1 on the external target. See sections 6.11.3 and 6.11.2 for more info about the 20-pin ARM JTAG header and the XDS bypass header, respectively. Figure 23 – Debugging external target using SmartRF06EB 7.2 10-pin ARM Cortex Debug Header The SmartRF06EB has a standard 10-pin ARM Cortex Debug header mounted on the right hand side (P410). Make sure all the jumpers on the XDS bypass header (P408) are mounted and that the jumper is removed from header J503. Connect the external board to the 10-pin ARM JTAG header using a 10-pin flat cable. Make sure pin 1 on P410 matches pin 1 on the external target See sections 6.11.4 and 6.11.2 for more info about the 10-pin ARM Cortex Debug header and the XDS bypass header, respectively. User’s Guide SWRU321A – May 2013 Page 30/32 7.3 Custom Strapping If the external board does not have a 20-pin ARM JTAG connector nor a 10-pin ARM Cortex connector, the needed signals may be strapped from the onboard XDS100v3 Emulator to the external target board. Make sure all the jumpers on the XDS bypass header (P408) are mounted and that the jumper is removed from header J503. Table 17 shows the signals that must be strapped between the SmartRF06EB and the target board. Table 18 shows additional signals that are optional or needed for debugging using 4-pin JTAG. Figure 24 shows where the signals listed in Table 17 and Table 18 can be found on the 20-pin ARM JTAG header. EB Signal Name EB Breakout Description VDD_SENSE P409.1 Target voltage supply GND P409.4 Common ground for EB and external board RF2.1_JTAG_TCK P409.9 Test Clock RF2.4_JTAG_TMS P409.7 Test Mode Select Table 17 – Debugging external target: Minimum strapping (cJTAG support) EB Signal Name EB Breakout Description RF2.17_JTAG_TDI P409.5 Test Data In (optional for cJTAG) RF2.19_JTAG_TDO P409.13 Test Data Out (optional for cJTAG) ¯R¯F¯2¯.1¯5¯¯R¯¯E¯S¯E¯T¯ P409.15 Target reset signal (optional) Table 18 – Debugging external target: Optional strapping VDD_SENSE RF2.17_JTAG_TDI RF2.4_JTAG_TMS RF2.1_JTAG_TCK RF2.19_JTAG_TDO GND 2-pin cJTAG 4-pin JTAG Optional + RF2.15_RESET Figure 24 – ARM JTAG header (P409) with strapping to debug external target User’s Guide SWRU321A – May 2013 Page 31/32 8 Frequently Asked Questions Q1 Nothing happens when I power up the evaluation board. Why? A1 Make sure you have a power source connected to the EB. Verify that the power source selection switch (S502) is set correctly according to your power source. When powering the EB from either batteries or an external power source, S502 should be in “BAT” position. When powering the EB over USB, the switch should be in “USB” position. Also, make sure the EM current measurement jumper (J503) is short circuited. Q2 Why are there two JTAG connectors on the SmartRF06EB, which one should I use? A2 The SmartRF06EB comes with two different standard debug connectors, the 20-pin ARM JTAG connector (P409) and the compact 10-pin ARM Cortex debug connector (P410). These debug connectors are there to more easily debug external targets without the need of customized strapping. For more details on how to debug external targets using the SmartRF06EB, see chapter 7. Q3 Can I use the SmartRF06EB to debug an 8051 SoC such as CC2530? A3 No, you cannot debug an 8051 SoC using the SmartRF06EB. Q4 When connecting my SmartRF06EB to my PC, no serial port appears. Why? A4 It may be that the virtual COM port on the SmartRF06EB’s XDS100 channel B hasn’t been enabled. Section 4.1.2.1.1 describes how to enable the Vritual COM Port in the USB driver. User’s Guide SWRU321A – May 2013 Page 32/32 9 References [1] SmartRF Studio Product Page http://www.ti.com/tool/smartrftm-studio [2] FTDI USB Driver Page http://www.ftdichip.com [3] SmartRF Flash Programmer Product Page http://www.ti.com/tool/flash-programmer [4] XDS100 Emulator Product Page http://processors.wiki.ti.com/index.php/XDS100 [5] Electronic Assembly DOGM128-6 Datasheet http://www.lcd-module.com/eng/pdf/grafik/dogm128e.pdf [6] Bosch Sensortec BMA250 Datasheet http://ae-bst.resource.bosch.com/media/products/dokumente/bma250/bst-bma250- ds002-05.pdf [7] Osram SFH 5711 http://www.osram-os.com [8] Cortex-M Debug Connectors http://infocenter.arm.com/help/topic/com.arm.doc.faqs/attached/13634/cortex_debu g_connectors.pdf 10 Document History Revision Date Description/Changes SWRU321A 2013-05-21 Minor fixes to Figure 4. Fixed incorrect EM mapping in Table 11. Added steps for installing SmartRF06EB on Linux. SWRU321 2012-09-07 Initial version. User’s Guide SWRU321A – May 2013 Appendix A Schematics SmartRF06EB 1.2.1 LOW VOLTAGE PERIPHERALS XDS100v3 - FPGA XDS100v3 - FTDI EM INTERFACE/ LEVEL SHIFTERS POWER SUPPLY HIGH VOLTAGE PERIPHERALS 1 FM2 FIDUCIAL_MARK_1mm 1 FM4 FIDUCIAL_MARK_1mm H2 HOLE_3 H3 HOLE_3 1 FM5 FIDUCIAL_MARK_1mm H1 HOLE_3 1 FM6 FIDUCIAL_MARK_1mm 1 FM1 FIDUCIAL_MARK_1mm H4 HOLE_3 1 FM3 FIDUCIAL_MARK_1mm TP13 TESTPOINT_PAD TP12 TESTPOINT_PAD ISSUED 1(7) SmartRF06EB - Top Level SCALE SHEET DWG NO. REV. DWG COMPANY NAME SIZE FSCM NO. CONTRACT NO. Texas Instruments A3 DRAWN 13/07/12 13/07/12 12/07/12 MAW 1.2.1 APPROVALS DATE CHECKED PRG_TDO EXT_SELECT ADV_MODE V_USB V_USB RESET_N VCCPLF T_TVD VTARGET UART_EN_N P3.3VXDS P1.8V P3.3VXDS P3.3VXDS +1.5V P3.3VXDS P3.3VXDS P3.3VXDS P3.3VXDS P3.3VXDS P3.3VXDS P3.3VXDS P3.3VXDS 1 2 3 4 STANDBY VDD OUTPUT ASDM GND O1 ASDM 100.000MHZ 1 2 3 Q1 BC846 1 2 3 4 5 6 7 8 9 10 INA+ INAOUTA OUTB V+ INB+ OPA2363 INBVENA ENB U6 OPA2363 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 GND GND GND GND GND UART_EN_N GND VCCPLF CLK_100M P1.5V P3.3VXDS RESET_N DTSA_BYP CBL_DIS EMU1 POD_RLS P3.3VXDS TVD CLK_FAIL SRST_OUT RTCK EMU0 EMU_EN TRST TMS TDO TDI TCK P1.5V P3.3VXDS SUSPEND ALT_FUNC PRG_TCK PRG_TMS PRG_TDI PRG_TDO PRG_TCK PRG_TDI PRG_TMS P3.3VXDS P3.3VXDS PRG_TDO PRG_TRST P3.3VXDS VTARGET P1.5V VTARGET PWRGOOD VTARGET P1.5V ADV_MODE EXT_SELECT T_DIS VTARGET IO32RSB0 GBC0/IO35RSB0 IO13RSB0 GAA0/IO00RSB0 GBC1/IO36RSB0 IO15RSB0 GAA1/IO01RSB0 GAC1/IO05RSB0 GBB0/IO37RSB0 IO19RSB0 GNDQ GBA2/IO41RSB0 GBA0/IO39RSB0 GBB1/IO38RSB0 GBA1/IO40RSB0 GCC2/IO59RSB0 GBB2/IO43RSB0 GDC1/IO61RSB0 IO09RSB0 GCC1/IO51RSB0 GDC0/IO62RSB0 GCC0/IO52RSB0 VMV0 GDA1/IO65RSB0 VCCIB0 GAB1/IO03RSB0 GCA1/IO55RSB0 TDO VCC GBC2/IO45RSB0 VCC VJTAG VCC VCCIB1 VCC IO11RSB0 VMV1 NC GCA0/IO56RSB0 TMS GAC0/IO04RSB0 TRST GDA2/IO70RSB1 IO84RSB1 TDI VPUMP IO87RSB1 GDB2/IO71RSB1 IO42RSB0 IO93RSB1 IO75RSB1 TCK IO96RSB1 IO94RSB1 GDC2/IO72RSB1 IO97RSB1 IO81RSB1 GND IO95RSB1 IO99RSB1 GCB2/IO58RSB0 GND IO100RSB1 IO47RSB0 IO102RSB1 GEC2/IO104RSB1 GEB2/IO105RSB1 GEA2/IO106RSB1 GNDQ VMV1 GEA0/IO107RSB1 GND GEA1/IO108RSB1 GEB0/IO109RSB1 GEB1/IO110RSB1 GEC0/IO111RSB1 GFA2/IO120RSB1 GFA1/IO121RSB1 VCCPLF GFA0/IO122RSB1 VCOMPLF GFB0/IO123RSB1 GFB1/IO124RSB1 IO129RSB1 IO130RSB1 GAC2/IO131RSB1 IO132RSB1 GAA2/IO67RSB1 GND GAB2/IO69RSB1 GND VCCIB1 VCCIB0 GND IO68RSB1 IO28RSB0 IO25RSB0 IO22RSB0 IO07RSB0 GAB0/IO02RSB0 A3PN125-ZVQG100 U11 A3PN125-VQFP 1 2 C23 C_4U7_0603_X5R_K_6 1 2 C27 C_4U7_0603_X5R_K_6 1 2 C26 C_4U7_0603_X5R_K_6 1 2 C24 C_100N_0402_X5R_K_10 1 2 C22 C_100N_0402_X5R_K_10 1 2 C21 C_100N_0402_X5R_K_10 1 2 C25 C_100N_0402_X5R_K_10 2 1 D1 CDBP0130L-G 2 1 R1 L_BEAD_102_0402 1 2 D4 LED_EL19-21SRC 1 2 J5 PINROW_SMD_1X2_2.54MM 1 2 T_TMS R47 R_10K_0402_F 1 2 R50 R_1K0_0402_F 1 2 R49 R_1K0_0402_F 1 2 R27 R_1K0_0402_F 1 2 R24 R_5K1_0402_J 1 2 R54 R_5K1_0402_J 1 2 R41 R_10K_0402_F 1 2 R48 R_10K_0402_F 1 2 R46 R_10K_0402_F 2 1 PWRGOOD R31 R_10K_0402_F 2 1 PRG_TMS R43 R_10K_0402_F 2 1 R44 R_10K_0402_F 1 2 T_EMU4 R52 R_51_0402_G 1 2 T_EMU2 R51 R_51_0402_G 1 2 T_EMU3 R53 R_51_0402_G 1 2 T_TDI R18 R_51_0402_G 1 2 T_RTCK R23 R_51_0402_G 1 2 T_TRST R19 R_51_0402_G 1 2 T_EMU5 R55 R_51_0402_G 1 2 T_TMS R15 R_51_0402_G 1 2 T_TDO R16 R_51_0402_G 1 2 T_TCK R17 R_51_0402_G 1 2 CLK_100M R33 R_51_0402_G 1 2 R30 R_120K_0402_F 2 1 R29 R_120K_0402_F 1 2 R25 R_120K_0402_F 1 2 R42 R_220_0402_J 1 2 T_EMU1 R20 R_470_0402_F 1 2 T_EMU0 R22 R_470_0402_F 1 2 T_SRST R21 R_470_0402_F 1 2 C34 C_15N_0402_X7R_K_25 1 2 T_DIS R12 R_0_0402 1 2 3 4 T_TVD 5 T_TDI T_TDO T_RTCK IO2 IO3 IO1 GND TPD4E002 IO4 TUP8D4E002 1 2 3 4 T_DIS 5 T_TRST T_EMU2 T_TMS IO2 IO3 IO1 GND TPD4E002 IO4 TUP7D4E002 1 2 3 4 T_TCK 5 T_EMU0 T_SRST T_EMU1 IO2 IO3 IO1 GND TPD4E002 IO4 TUP9D4E002 1 2 3 4 T_EMU5 5 T_EMU3 GND T_EMU4 IO2 IO3 IO1 GND TPD4E002 IO4 TUP12D4E002 TP7 PRG_TRST Testpoint_Circle_40mils TP6 PRG_TCK Testpoint_Circle_40mils TP5 PRG_TDI Testpoint_Circle_40mils TP9 Testpoint_Circle_40mils TP8 Testpoint_Circle_40mils TP4 PRG_TMS Testpoint_Circle_40mils PRG_TDO TP3 Testpoint_Circle_40mils ISSUED SmartRF06EB - XDS100v3 - FPGA SCALE SHEET 2(7) DWG NO. REV. DWG COMPANY NAME SIZE FSCM NO. CONTRACT NO. Texas Instruments A3 DRAWN 13/07/12 13/07/12 The XDS100 is connected to the EM through connector P408. See the EM interface page for details. 12/07/12 MAW 1.2.1 APPROVALS DATE CHECKED PWREN V_USB USBDP EEPROM_DATA EEPROM_CS EEPROM_CLK P3.3VXDS P3.3VXDPS3.3VXDS P3.3VXDSP3.3VXDS P3.3VXDS P3.3VXDS P3.3VXDS +1.5V P3.3VXDS P3.3VXDS P3.3VXDS +1.5V +1.5V +1.5V P1.8V P1.8V P1.8V P1.8V P3.3VXDS P3.3VXDS VBUS P1.8V P1.8V P3.3VXDS P3.3VXDS 1 2 R5 R_1K0_0402_F 1 2 3 4 5 6 7 DVBUS D+ ID GND Shield Shield P1 USB-B_MICRO 1 2 3 4 5 6 GND DO CLK 93AA46B CS VCC DIN U1 93AA46B 1 2 C9 C_4U7_0603_X5R_K_6 1 C15 2 C_4U7_0603_X5R_K_6 1 C19 2 C_4U7_0603_X5R_K_6 1 2 C3 C_4U7_0603_X5R_K_6 1 2 C28 C_4U7_0603_X5R_K_6 1 2 C18 C_27P_0402_NP0_J_50 1 2 C13 C_27P_0402_NP0_J_50 1 2 C29 C_100N_0402_X5R_K_10 1 2 C6 C_100N_0402_X5R_K_10 1 2 C12 C_100N_0402_X5R_K_10 1 2 C8 C_100N_0402_X5R_K_10 1 2 C17 C_100N_0402_X5R_K_10 1 2 C11 C_100N_0402_X5R_K_10 1 2 C20 C_100N_0402_X5R_K_10 1 2 C30 C_100N_0402_X5R_K_10 1 2 C5 C_100N_0402_X5R_K_10 1 2 C4 C_100N_0402_X5R_K_10 1 2 C16 C_100N_0402_X5R_K_10 1 2 C14 C_100N_0402_X5R_K_10 1 2 C31 C_100N_0402_X5R_K_10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 USBDM TCK TDI TDO TMS TRST EMU_EN EMU0 RTCK SRST_OUT CLK_FAIL TVD POD_RLS EMU1 CBL_DIS DTSA_BYP ALT_FUNC SUSPEND PRG_TCK PRG_TDI PRG_TDO PRG_TMS PRG_TRST PWREN EEPROM_DATA EEPROM_CLK EEPROM_CS EECLK EECS RESET REF DP FT2232H DM TEST VREGOUT OSCO BCBUS7 BCBUS6 BCBUS4 BCBUS3 BCBUS2 BCBUS1 VCORE BDBUS7 BDBUS6 VREGIN BDBUS5 BDBUS4 BDBUS3 BDBUS2 BDBUS1 VCCIO ACBUS7 ACBUS6 ACBUS5 ACBUS3 ADBUS7 VCORE OSCI ADBUS6 BCBUS5 ADBUS3 VPHY SUSPEND GND GND GND GND GND GND GND GND ACBUS4 AGND EEDATA BCBUS0 VCORE ACBUS0 BDBUS0 ACBUS2 ADBUS2 VCCIO VCCIO PWREN ADBUS4 VCCIO ADBUS1 ADBUS5 VPLL ACBUS1 ADBUS0 U4 FT2232HL 2 1 R8 L_BEAD_102_0402 2 1 R7 L_BEAD_102_0402 1 2 D2 LED_EL19-21SYGC 2 1 R2 R_0_0402 1 2 R3 R_1K0_0402_F 2 1 R9 R_1K0_0402_F 1 2 R4 R_1K0_0402_F 2 1 R6 R_2K7_0402_F 1 2 R10 R_12K_0402_F 1 2 R28 R_270_0402_F 1 2 3 4 5 GND IO2 IO1 NC VCC TPD2E001 U3 TPD2E001 1 2 3 4 Y1 X_12.000/30/30/10/20 ISSUED 3(7) SmartRF06EB - XDS100v3 - FTDI SCALE SHEET DWG NO. REV. DWG COMPANY NAME SIZE FSCM NO. CONTRACT NO. Texas Instruments A3 DRAWN 13/07/12 13/07/12 12/07/12 MAW 1.2.1 APPROVALS DATE CHECKED VDD_MEASURED LV_SDCARD_CS LV_LED_2 LV_BTN_RESET LV_ACC_INT1 LV_ACC_INT2 RF2.12 RF2.13 RF2.14 RF2.15_RESET RF_VDD1 RF_VDD2 RF1.4 RF1.5 RF1.6 RF1.8 RF1.10 RF1.11 RF1.12 RF1.13 RF1.14 RF1.16_SPI_SCK RF1.17 RF1.18_SPI_MOSI RF1.20_SPI_MISO RF2.5 RF2.6 RF2.8 RF2.10 RF2.11 LV_LED_4 LV_BTN_LEFT LV_BTN_RIGHT LV_BTN_UP LV_LCD_MODE LV_BTN_DOWN LV_LCD_RESET LV_BTN_SELECT LV_3.3V_EN LV_SPI_SCK LV_LCD_CS LV_SPI_MOSI LV_SPI_MISO LV_ALS_OUT LV_ALS_PWR LV_ACC_PWR LV_ACC_CS LV_LED_1 RF1.2 RF1.4 RF1.5 RF1.6 RF1.8 RF1.10 RF1.11 RF1.12 RF1.13 RF1.14 RF1.7_UART_RX RF1.9_UART_TX RF1.3_UART_CTS RF2.18_UART_RTS VDD_MEASURED LV_BTN_RESET VDD_SENSE LO_VDD LO_VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 RF2.1_JTAG_TCK GND RF_VDD2 RF2.4_JTAG_TMS RF2.5 RF2.6 RF_VDD1 RF2.8 RF_VDD1 RF2.10 RF2.11 RF2.12 RF2.13 RF2.14 RF2.15_RESET RF2.16 RF2.17_JTAG_TDI RF2.18_UART_RTS RF2.19_JTAG_TDO GND RF2 SMD_HEADER_2X10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 LV_LED_3 RF1.2 P403 PINROW_SMD_2X10_2.54MM 1 2 3 4 5 6 7 8 9 10 P406 PINROW_1X10 1 2 3 4 5 6 P412 PINROW_1X6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 VDD_SENSE GND RF2.17_JTAG_TDI GND RF2.4_JTAG_TMS GND RF2.1_JTAG_TCK GND GND RF2.19_JTAG_TDO GND RF2.15_RESET GND GND GND P409 PINROW_SMD_2X10_2.54MM 1 2 3 4 5 6 7 8 9 10 RF1.15 RF1.16_SPI_SCK RF1.17 RF1.18_SPI_MOSI RF1.20_SPI_MISO RF2.5 RF2.6 RF2.8 RF2.10 RF2.11 P407 PINROW_1X10 1 2 C403 C_100N_0402_X5R_K_10 1 2 C507 C_100N_0402_X5R_K_10 1 2 C404 C_100N_0402_X5R_K_10 1 2 C508 C_100N_0402_X5R_K_10 1 2 R402 R_0_0603 1 2 3 4 S606 PUSH_BUTTON_SKRAAK 1 2 J503 PINROW_SMD_1X2_2.54MM 1 2 3 4 5 6 7 8 9 10 RF2.16 P405 PINROW_SMD_2X5_2.54MM 1 2 3 4 5 6 7 8 9 10 VDD_SENSE RF2.4_JTAG_TMS RF2.1_JTAG_TCK RF2.19_JTAG_TDO RF2.17_JTAG_TDI RF2.15_RESET P410 PINROW_SMD_2X5_1.27MM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 T_TCK RF2.1_JTAG_TCK T_TMS RF2.4_JTAG_TMS T_TDI RF2.17_JTAG_TDI T_TDO RF2.19_JTAG_TDO T_SRST RF2.15_RESET T_EMU3 RF1.7_UART_RX T_EMU2 RF1.9_UART_TX T_EMU5 RF1.3_UART_CTS T_EMU4 RF2.18_UART_RTS T_TVD VDD_SENSE P408 PINROW_SMD_2X10_2.54MM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 GND RF1.2 RF1.3_UART_CTS RF1.4 RF1.5 RF1.6 RF1.7_UART_RX RF1.8 RF1.9_UART_TX RF1.10 RF1.11 RF1.12 RF1.13 RF1.14 RF1.15 RF1.16_SPI_SCK RF1.17 RF1.18_SPI_MOSI GND RF1.20_SPI_MISO RF1 SMD_HEADER_2X10 1 2 3 4 CURMEAS_OUTPUT R2 R1 IN- 1.6M GND OUT 1.6M INA216 IN+ U504 INA216A3 1 2 C402 C_0603 1 2 R502 R_0R15_0603_F 1 2 C401 C_0805 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 RF1.15 P404 PINROW_SMD_2X10_2.54MM 1 2 3 4 5 RF2.12 RF2.13 RF2.14 RF2.15_RESET RF2.16 P411 PINROW_1X5 TP10 Testpoint_Circle_40mils TP11 TESTPIN_SMALL TP20 TESTPIN_SMALL EM Interface / SmartRF06EB - Level Shifters ISSUED 4(7) EM DEBUG CONNECTION SCALE SHEET DWG NO. REV. DWG COMPANY NAME SIZE FSCM NO. CONTRACT NO. Texas Instruments A3 DRAWN 13/07/12 13/07/12 EM CONNECTORS 10-pin ARM Cortex JTAG Connector RESET Optional RC filter EM CURRENT MEASUREMENT 12/07/12 MAW 1.2.1 APPROVALS DATE 20-pin ARM JTAG Connector EM <--> EB BREAKOUT and PROBE HEADERS Rshunt = 0.15 Ohm Gain = 100 Vin = Ishunt x Rshunt Vout = Vin x Gain Saturation point for INA216 ----------------------------- Vout_max = LO_VDD (2.1V to 3.6V) Vin_max = LO_VDD / 100 = 21mV to 36mV Ishunt_max = 140mA to 240mA Bypass jumper block for connection between EM and XDS100v3 CHECKED V_USB P3.3V V_USB P2.1V V_UNREG V_UNREG VBAT VBUS P3.3VXDS VBAT HI_VDD P3.3VXDS +1.5V P3.3VXDS P3.3VXDS LO_VDD 3 2 1 + B503 CR2032_SOCKET 1 2 4 3 5 6 8 7 VOUT EN NC VIN GND NR TPS73533 GND U2 TPS73533 1 2 C33 C_100N_0402_X5R_K_10 1 2 3 6 5 4 V_UNREG V_USB S501 SMD_SWITCH_DPDT 2 1 D3 BAT54J 1 2 3 V_UNREG R11 R_0_0402_3PORT_2-3 1 2 C32 C_100N_0402_X5R_K_10 3 2 1 4 5 6 P2.1V P3.3V S502 SMD_SWITCH_DPDT 1 2 C503 C_2U2_0402_X5R_M_6P3VDC 1 2 C502 C_2U2_0402_X5R_M_6P3VDC 1 2 C1 C_100N_0402_X5R_K_10 1 2 C501 C_2U2_0402_X5R_M_6P3VDC 1 2 + B501 1XAAA_KEYSTONE 1 2 + B502 1XAAA_KEYSTONE 1 2 C2 C_18N_0603_X7R_J_50 1 2 C10 C_100N_0402_X5R_K_10 2 1 L502 L_2U2_0805_N_LQM21 1 2 C7 C_4U7_0603_X5R_K_6 2 1 L501 L_2U2_0805_N_LQM21 1 2 J502 PINROW_SMD_1X2_2.54MM 1 2 J501 PINROW_SMD_1X2_2.54MM 2 1 R403 R_10K_0402_F 1 2 C504 C_2U2_0402_X5R_M_6P3VDC 1 2 V_UNREG R501 R_47K_0402_F 2 4 1 3 LV_3.3V_EN ON GND VIN VOUT U601 TPS22902 1 2 3 4 5 SUSPEND TLV70015 NC4 VOUT EN GND VIN U5 TLV70015 1 2 R32 R_10K_0402_F 1 2 4 3 5 6 STAT SW GND VIN ON/BYP VOUT U501 TPS62730 1 2 3 4 6 5 7 8 9 10 11 V_UNREG LV_3.3V_EN FB Thermal VINA PS L1 GND PGND L2 EN VIN VOUT U502 TPS63031 TP2 Testpoint_Circle_40mils TP18 Testpoint_Circle_40mils TP1 Testpoint_Circle_40mils TP17 Testpoint_Circle_40mils TP19 Testpoint_Circle_40mils OFF MAIN ON/OFF SWITCH 2.1V REG ISSUED POWER SELECT SWITCH SmartRF06EB - USB (5V) ON 5(7) Power Supply USB TO 1.5V (FPGA) 3.3V FOR HV PERIPHERALS 3.3V REG USB TO 3.3V BATTERIES SCALE SHEET BATTERY or EXTERNAL DWG NO. REV. DWG COMPANY NAME BATTERY or EXTERNAL SIZE FSCM NO. CONTRACT NO. XDS 3.3V Texas Instruments A3 BATTERY REGULATORS REGULATOR BYPASS JUMPER DRAWN POWERED from USB (XDS100v3) XDS100v3 VOLTAGE REGULATORS BUCK (2.1V) BUCK/BOOST (3.3V) 13/07/12 13/07/12 CONNECTOR FOR EXTERNAL POWER POWERED from BATTERY or External Power Supply 2.1V FOR EM and LV PERIPHERALS USB 12/07/12 MAW 1.2.1 DATE Software controlled switch for enabling the "High Voltage" domain for board peripherals. APPROVALS CHECKED HV_SPI_MOSI HV_SPI_SCK HV_SPI_MISO LO_VDD HI_VDD HI_VDD HI_VDD HI_VDD HI_VDD LO_VDD HI_VDD LO_VDD LO_VDD LO_VDD HI_VDD HI_VDD HI_VDD HI_VDD HI_VDD LO_VDD LO_VDD LO_VDD 1 2 C601 C_1U_0402_X5R_K_6P3 NC(C2-) NC(A3+) NC(A2+) NC(A1+) V2 CAP2P VDD VSS RST CAP3P SI SCL INSERT: 1 pc SIP_SOCKET_SMD_1X20_2.54MM 2 pc SIP_SOCKET_SMD_1X3_2.54MM NC(C1-) NC(C3-) CAP1P A0 CAP2N VOUT CAP1N VSS V0 VDD2 CS1B V3 V4 V1 LCD LCD1 DOGM128W-6_NO_CON 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 LV_SPI_SCK LV_SPI_MOSI LV_SPI_MISO HV_SPI_MISO HV_SPI_MOSI HV_SPI_SCK LV_SDCARD_CS LV_3.3V_EN GND VCCA 1A1 1A2 2DIR 2A1 2A2 2OE 1B1 2B1 VCCB 2B2 1DIR 1OE GND 1B2 U401 SN74AVC4T245 1 2 3 4 5 6 7 8 HV_SDCARD_CS HV_SPI_MOSI HV_SPI_SCK HV_SPI_MISO VDD N/A GND N/A CS DI/MOSI DO/MISO SCLK MicroSD SPI-Mode J601 MICROSD-SPI 1 2 C605 C_1U_0805_X7R_K_16 1 2 C604 C_1U_0805_X7R_K_16 1 2 C607 C_1U_0805_X7R_K_16 1 2 C609 C_1U_0805_X7R_K_16 1 2 C608 C_1U_0805_X7R_K_16 1 2 C602 C_1U_0805_X7R_K_16 1 2 C603 C_1U_0805_X7R_K_16 1 2 C610 C_1U_0805_X7R_K_16 2 1 R602 R_10K_0402_F 2 1 R614 R_0_0603 1 2 C613 C_100N_0402_X5R_K_10 1 2 R601 R_10K_0402_F 1 2 C408 C_100N_0402_X5R_K_10 1 2 R612 R_10K_0402_F 1 2 C407 C_100N_0402_X5R_K_10 1 2 R13 R_10K_0402_F 1 2 3 LV_3.3V_EN LV_3.3V_EN Q2 2N7002F 1 2 C405 C_100N_0402_X5R_K_10 2 1 R606 R_0_0603 1 2 3 P3 SIP_SOCKET_SMD_1X3_2.54MM 2 1 R615 R_0_0603 1 2 C606 C_1U_0805_X7R_K_16 1 2 C406 C_100N_0402_X5R_K_10 2 1 R603 R_39_0603 2 1 R604 R_39_0603 2 1 R605 R_39_0603 1 2 3 P4 SIP_SOCKET_SMD_1X3_2.54MM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 HV_SPI_MOSI HV_SPI_SCK HV_LCD_MODE HV_LCD_RESET HV_LCD_CS P2 SIP_SOCKET_SMD_1X20_2.54MM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 LV_LCD_RESET LV_LCD_CS LV_LCD_MODE LV_SDCARD_CS HV_SDCARD_CS HV_LCD_MODE HV_LCD_CS HV_LCD_RESET LV_3.3V_EN LV_3.3V_EN GND VCCA 1A1 1A2 2DIR 2A1 2A2 2OE 1B1 2B1 VCCB 2B2 1DIR 1OE GND 1B2 U402 SN74AVC4T245 TP16 Testpoint_Circle_40mils TP14 Testpoint_Circle_40mils TP15 Testpoint_Circle_40mils High Voltage Peripherals ISSUED SCALE SHEET 6(7) DWG NO. REV. DWG COMPANY NAME SIZE FSCM NO. CONTRACT NO. Texas Instruments A3 SmartRF06EB - LCD DRAWN LEVEL SHIFTERS TRANSLATION : MICROSD 13/07/12 13/07/12 U401: LO HI 1A1 --> 1B1 1A2 --> 1B2 2A1 <-- 2B1 2A2 <-- 2B2 U402: LO HI 1A1 --> 1B1 1A2 --> 1B2 2A1 --> 2B1 2A2 --> 2B2 12/07/12 MAW 1.2.1 APPROVALS DATE LEVEL SHIFTERS CHECKED LV_ALS_OUT LO_VDD LO_VDD 1 2 3 4 5 6 7 8 9 10 11 12 LV_SPI_MISO LV_SPI_MOSI LV_ACC_INT1 LV_ACC_INT2 LV_ACC_PWR LV_ACC_CS LV_SPI_SCK INT1 VDDIO BMA250 NC VDD GNDIO INT2 SDx PS CSB SCx 3-AXIS Accelerometer GND SDO U602 BMA250 1 2 C614 C_100N_0402_X5R_K_10 1 2 LV_ACC_PWR C612 C_100N_0402_X5R_K_10 1 2 C615 C_100N_0402_X5R_K_10 1 2 LV_LED_1 D601 LED_EL19-21SRC 1 2 LV_LED_4 D604 LED_EL19-21SURC 1 2 LV_LED_3 D603 LED_EL19-21SYGC 1 2 3 4 LV_ALS_PWR Iout GND GND VDD LS601 LIGHT_SENSOR_SFH5711 1 2 3 4 S601 LV_BTN_LEFT PUSH_BUTTON_SKRAAK 1 2 3 4 LV_BTN_RIGHT S602 PUSH_BUTTON_SKRAAK 1 2 3 4 LV_BTN_SELECT S603 PUSH_BUTTON_SKRAAK 1 2 3 4 LV_BTN_UP S604 PUSH_BUTTON_SKRAAK 1 2 3 4 S605 LV_BTN_DOWN PUSH_BUTTON_SKRAAK 1 2 R613 R_22K_0603_G 1 2 LV_LED_2 D602 LED_EL19-21UYC_A2 2 1 R608 R_680_0402_G 2 1 R609 R_680_0402_G 2 1 R610 R_680_0402_G 2 1 R607 R_820_0402_G BUTTONS Low Voltage Peripherals ISSUED AMBIENT LIGHT SENSOR SmartRF06EB - YELLOW GREEN RED ACCELEROMETER SCALE SHEET DWG NO. REV. DWG COMPANY NAME SIZE FSCM NO. CONTRACT NO. Texas Instruments A3 LEDS RED-ORANGE 7(7) Accelerometer DRAWN RECOMMENDED 2.3V-5.5V Needs from 1.62V-3.6V 13/07/12 13/07/12 12/07/12 MAW 1.2.1 APPROVALS DATE CHECKED EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety programs, please visit www.ti.com/esh or contact TI. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. REGULATORY COMPLIANCE INFORMATION As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal Communications Commission (FCC) and Industry Canada (IC) rules. For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. General Statement for EVMs including a radio User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization. For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant Caution This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and receiver. • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio/TV technician for help. For EVMs annotated as IC – INDUSTRY CANADA Compliant This Class A or B digital apparatus complies with Canadian ICES-003. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Concerning EVMs including radio transmitters This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concerning EVMs including detachable antennas Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada. Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de l'utilisateur pour actionner l'équipement. Concernant les EVMs avec appareils radio Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER 【Important Notice for Users of this Product in Japan】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, 2. Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product, or 3. Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp 【ご使用にあたっての注】 本開発キットは技術基準適合証明を受けておりません。 本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。    上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・インスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル http://www.tij.co.jp SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end product. Your Sole Responsibility and Risk. You acknowledge, represent and agree that: 1. You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees, affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes. 2. You have full and exclusive responsibility to assure the safety and compliance of your products with all such laws and other applicable regulatory requirements, and also to assure the safety of any activities to be conducted by you and/or your employees, affiliates, contractors or designees, using the EVM. Further, you are responsible to assure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. 3. You will employ reasonable safeguards to ensure that your use of the EVM will not result in any property damage, injury or death, even if the EVM should fail to perform as described or expected. 4. You will take care of proper disposal and recycling of the EVM’s electronic components and packing materials. Certain Instructions. It is important to operate this EVM within TI’s recommended specifications and environmental considerations per the user guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, and environmental ranges) may cause property damage, personal injury or death. If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than 60°C as long as the input and output are maintained at a normal ambient operating temperature. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors which can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during normal operation, please be aware that these devices may be very warm to the touch. As with all electronic evaluation tools, only qualified personnel knowledgeable in electronic measurement and diagnostics normally found in development environments should use these EVMs. Agreement to Defend, Indemnify and Hold Harmless. You agree to defend, indemnify and hold TI, its licensors and their representatives harmless from and against any and all claims, damages, losses, expenses, costs and liabilities (collectively, "Claims") arising out of or in connection with any use of the EVM that is not in accordance with the terms of the agreement. This obligation shall apply whether Claims arise under law of tort or contract or any other legal theory, and even if the EVM fails to perform as described or expected. Safety-Critical or Life-Critical Applications. If you intend to evaluate the components for possible use in safety critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, such as devices which are classified as FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2013, Texas Instruments Incorporated CC Debugger User’s Guide SWRU197G SWRU197G January 2014 2/23 Table of Contents 1 Introduction ................................................................................................................................. 3 2 Abbreviations and Acronyms .................................................................................................... 3 3 Box Contents .............................................................................................................................. 4 4 Operating Conditions of the CC Debugger .............................................................................. 4 5 Initial Steps .................................................................................................................................. 5 5.1 Installing the USB driver ........................................................................................................... 5 5.2 Supported PC Tools .................................................................................................................. 5 6 Connecting the CC Debugger to the Device ............................................................................ 6 6.1 Target Connector Details .......................................................................................................... 6 6.2 Connecting the CC Debugger to a System on Chip ................................................................. 8 6.2.1 Minimum connection for debugging ....................................................................................................................... 8 6.2.2 Minimum connection for SmartRF Studio .............................................................................................................. 8 6.2.3 Minimum connection for SmartRF Packet Sniffer .................................................................................................. 9 6.3 Connecting the CC Debugger to a Transceiver ...................................................................... 10 6.4 Connecting the CC Debugger to a CC85xx ............................................................................ 12 7 Using the CC Debugger ........................................................................................................... 13 7.1 Understanding the LED ........................................................................................................... 13 8 Updating the Firmware ............................................................................................................. 14 8.1 Updating the firmware automatically in SmartRF Studio ........................................................ 14 8.2 Updating the firmware manually in SmartRF Flash Programmer ........................................... 16 8.3 Forced boot recovery mode .................................................................................................... 17 8.4 Resurrecting the CC Debugger ............................................................................................... 17 9 Troubleshooting ....................................................................................................................... 20 10 Schematics ................................................................................................................................ 21 11 References ................................................................................................................................ 21 12 Document History ..................................................................................................................... 22 SWRU197G January 2014 3/23 1 Introduction The CC Debugger is primarily used for flash programming and debugging software running on CCxxxx 8051-based System-on-Chip (SoC) devices from Texas Instruments. The PC tools available for these purposes are the SmartRF™ Flash Programmer [9] from Texas Instruments and IAR Embedded Workbench® for 8051 from IAR Systems [15]. When connected to the debugger, the SoC devices can be controlled directly from SmartRF™ Studio [8]. SmartRF Studio will also be able to control supported CCxxxx RF transceivers (CC2520, CC2500, CC110x, CC11xL, CC112x, CC120x) when they are connected to the debugger as explained in chapter 6.3. In addition, CC Debugger is used for configuring the CC85xx devices with PurePath Wireless Configurator [12] and controlling them with PurePath Wireless Commander [13]. 2 Abbreviations and Acronyms CSn Chip Select (active low) DC Debug Clock DD Debug Data DUT Device Under Test GND Ground LED Light Emitting Diode MISO Master In Slave Out MOSI Master Out Slave In RF Radio Frequency SCLK Serial Clock SoC System on Chip SPI Serial Peripheral Interface USB Universal Serial Bus Vdd Positive voltage on target SWRU197G January 2014 4/23 3 Box Contents  1 x CC Debugger  1 x USB-A to Mini-B USB cable  1 x 10-pin flat cable with 2x5 2.54 mm connector  1 x 10-pin flat cable with 2x5 1.27 mm connector  1 x Converter board 2.54 mm – 1.27 mm connector  Documentation 4 Operating Conditions of the CC Debugger Minimum target voltage: 1.2 Volt Maximum target voltage: 3.6 Volt Operating temperature: 0C to 85C Regulated voltage on CC Debugger: 3.3 Volt Maximum target current (*): 200 mA (*) Supported Operating Systems: Microsoft® Windows® 2000 Windows XP SP2/SP3 (32 bit versions) Windows Vista® (32 & 64 bit) Windows 7 (32 & 64 bit) (*) Only applicable if the target is powered from the CC Debugger Figure 1 - CC Debugger connected to a SoC Battery Board with a CC2530EM SWRU197G January 2014 5/23 5 Initial Steps 5.1 Installing the USB driver To get the required USB driver for the CC Debugger, it is necessary to install one of the tools listed below:  SmartRF Studio www.ti.com/tool/smartrftm-studio  SmartRF Flash Programmer www.ti.com/tool/flash-programmer  SmartRF Packet Sniffer www.ti.com/tool/packet-sniffer  PurePath Wireless Configurator www.ti.com/tool/purepath-wl-cfg  PurePath Wireless Commander www.ti.com/tool/purepath-wl-cmd Alternatively, you can download “Cebal – CCxxxx Development Tools USB Driver for Windows x86 and x64” [4] which is a standalone installer including only the device driver. After having installed the driver, connect the CC Debugger to the PC. The USB driver will be installed automatically. You can quickly check that the debugger has been associated correctly with the USB device driver by opening the Windows Device Manager. The debugger should appear as a “Cebal controlled device”. Figure 2 - Verify correct driver installation For further details or troubleshooting the driver installation process, please refer to “DN304 – CCxxxx Development Tools USB Driver Installation Guide” [5]. 5.2 Supported PC Tools Currently, the CC Debugger can be used together with the following PC Tools  IAR Embedded Workbench for 8051 In circuit debugging of system-on-chips  SmartRF Flash Programmer Flash programming of system-on-chips  SmartRF Studio RF testing of radio devices (transceivers and SoCs)  SmartRF Packet Sniffer Packet sniffing with selected radio devices  PurePath Wireless Configurator Programming of CC85xx devices  PurePath Wireless Commander Advanced control of CC85xx devices The debugger will operate as the interface between the RF device and the tools listed above. Please ensure correct connection between the device and CC Debugger before starting to use the tools. The connection of the device to the CC Debugger will be covered in the next chapter. SWRU197G January 2014 6/23 6 Connecting the CC Debugger to the Device 6.1 Target Connector Details The target connector, located on the lateral side of the debugger, is a 10-pin 2x5 2.54 mm pitch connector with a direction coded plastic guide. Suggested matching (male) surface mounted headers would be 95278-101A10LF from FCI or BB02-HP from GradConn. Figure 3 - Placement of Target Connector Pins The adapter board, which has a 10-pin 2x5 1.27 mm pitch connector, has the same pin placement. Suggested matching (male) surface mounted headers would be 20021121-000-10C4LF from FCI or FTS-105-01-F-DV from Samtec. Figure 4 - Placement of Target Connector Pins on Adapter Board The pin-out of the target connector is shown in Figure 5. Note that not all of these pins need to be connected to the target device for programming and debugging. Only Vdd, GND, DD, DC and RESET are required for System on Chips. The other pins are optional and/or for special features. Pin 1 Pin 2 Pin 1 Pin 2 SWRU197G January 2014 7/23 1 2 3 4 5 6 7 8 9 10 GND DC (Debug Clock) CSn (SPI Chip Select) RESETn 3.3V (from debugger) Target Voltage Sense DD (Debug Data) SCLK (SPI Clock) MOSI (SPI Data Out) MISO (SPI Data In) Figure 5 - Target Connector Pin-out Please note the concept with the target voltage sense signal. This signal is used by the level converters on the CC Debugger to handle different voltage levels on the target board and the debugger. Pin 2 on the target connector must be connected to Vdd on the target board. USB Controller Level Converter Vdd from target CC Debugger Vdd (local) TARGET Target Connector Figure 6 - Voltage from target to CC Debugger Alternatively, it is possible to power the target by connecting pin 9 to Vdd on the target. In that case, the CC Debugger will supply 3.3V to the target. SWRU197G January 2014 8/23 6.2 Connecting the CC Debugger to a System on Chip 6.2.1 Minimum connection for debugging For successful debugging of a TI 8051-based RF System on Chip, connect the two debug signals Debug Data (DD) and Debug Clock (DC) and the reset signal RESETn to the device. Note that DD is a bidirectional signal. In addition, the CC Debugger must be connected to GND and Vdd on the board. Vdd is used as an input to the level shifters on the CC Debugger, thus allowing a different operating voltage on the target than internally on the debugger. For CC111x, CC251x, CC243x, CC253x and CC254x, except CC2544 and CC2545, connect the DD signal to pin P2.1 and DC to pin P2.2. For CC2544, connect the DD signal to P1.3 and DC to P1.2. For CC2545, connect the DD signal to P1.3 and DC to P1.4. Note that it is possible to power the target board from the debugger by connecting the 3.3V signal on pin 9 on the connector to the target board. 1 2 3 4 5 6 7 8 9 10 GND DC (Debug Clock) RESETn 3.3V from debugger. Can optionally be used to power the target board DD (Debug Data) P2.2 SoC P2.1 RESETn Vdd GND Vdd CC Debugger Connector CCxxxx System-on-Chip NOTE 2 Vdd NOTE 1 10 kΩ 2.7 kΩ 1 nF Figure 7 - Minimum connection for debugging of 8051 SoC Note 1: Some early revisions of certain SoCs (CC2430, CC2510 and CC1110) needed an external pull-up to avoid unwanted transitions on the debug clock line during chip reset – thus inadvertently setting the device in debug mode. All new revisions of all SoCs now have an internal pull-up on P2.2, so this external component is not required. Note 2: The RESETn pin is sensitive to noise and can cause unintended reset of the chip. For reset lines susceptible to noise, it is recommended to add an external RC filter. Please refer to the respective SoC datasheet and reference designs for recommended RESET circuitry. The CC Debugger supports slow transitions on the reset line, using a 2 ms delay between any transition on the RESET line and other transitions on the DC and/or DD lines. 6.2.2 Minimum connection for SmartRF Studio Use the same connection as for debugging the SoC. SWRU197G January 2014 9/23 6.2.3 Minimum connection for SmartRF Packet Sniffer In order to use the packet sniffer capabilities of the CC Debugger, it is also necessary to connect the SPI bus to the SoC. The SPI interface is used by the CC Debugger for reading the captured RF packets from the SoC. 1 2 3 4 5 6 7 8 9 10 GND DC (Debug Clock) RESETn 3.3V from debugger. Can optionally be used to power the target board DD (Debug Data) P2.2 SoC P2.1 RESETn Vdd GND Vdd CC Debugger Connector CCxxxx System-on-Chip 2.7 kΩ 1 nF CSn SCLK MOSI MISO P1.7 P1.6 P1.5 P1.4 Figure 8 - Connection to SoC to enable Packet Sniffing Note that the packet sniffer will overwrite the flash on the SoC with special packet capture firmware. Note concerning the SPI interface to the SoC used for packet sniffing All of the current TI RF SoCs can be configured to operate as SPI slaves, with the SPI signals (CS, SCLK, MISO and MOSI) going to one of the USART peripherals. The packet sniffer application will program the SoC with firmware that configures one of the USART peripherals in order to communicate with the CC Debugger. The firmware can use any of the four possible pin configurations (USART 0 or 1, pin out alternative 1 or 2). However, only a subset is currently supported: USART0, alt 1 USART0, alt 2 USART1, alt 1 USART1, alt 2 CC243x - - - OK CC253x/CC254x - - - OK CC111x OK - - OK CC251x OK - - OK Table 1 - Supported SPI connections (marked OK) USART0, alt 1 USART1, alt 2 SCLK P0.5 P1.5 CS P0.4 P1.4 MOSI P0.3 P1.6 MISO P0.2 P1.7 Table 2 - USART pin out details In case of multiple supported interfaces, the Packet Sniffer application will let you choose which interface to use. SWRU197G January 2014 10/23 6.3 Connecting the CC Debugger to a Transceiver The SPI interface on the CC Debugger can be used to interface many of the CCxxxx transceivers and control them from SmartRF Studio. The transceivers/transmitters/receivers currently supported are:  CC1100  CC1101  CC1120  CC1121  CC1125  CC1175  CC110L  CC113L  CC115L  CC1200  CC1201  CC2500  CC2520 Note that the CC Debugger operates as the SPI Master. In a multi master system, it is necessary to make sure the debugger output signals (DC, DD, CSn, SCLK, MOSI and RESETn) do not interfere with the other SPI master on the board. The other SPI master would typically be the microcontroller on the board. The connection diagrams below show the interconnection between the debugger and the various supported transceivers. 1 2 3 4 5 6 7 8 9 10 GND DC RESETn 3.3V from debugger. Can optionally be used to power the target board DD GPIO3 VREG_EN RESETn Vdd GND Vdd CC Debugger Connector CC2520 CSn SCLK MOSI MISO SO SI SCLK CSn Figure 9 - CC Debugger connected to CC2520 SWRU197G January 2014 11/23 1 2 3 4 5 6 7 8 9 10 GND DC RESETn 3.3V from debugger. Can optionally be used to power the target board DD GPIO2 GPIO0 RESETn Vdd GND Vdd CC Debugger Connector CC112x CC1175 CC120x CSn SCLK MOSI MISO SO SI SCLK CSn Figure 10 - CC Debugger connected to CC112x/CC1175/CC120x 1 2 3 4 5 6 7 8 9 10 GND DC 3.3V from debugger. Can optionally be used to power the target board DD GDO2 GDO0 Vdd GND Vdd CC Debugger Connector CC110x CC11xL CC2500 CSn SCLK MOSI MISO SO SI SCLK CSn Figure 11 - CC Debugger connected to CC110x/CC11xL/CC2500 SWRU197G January 2014 12/23 6.4 Connecting the CC Debugger to a CC85xx In order to configure the CC85xx devices (i.e. program the flash on the device) with PurePath Wireless Configurator, the device’s SPI interface must be connected to the CC Debugger as shown in the figure below. 1 2 3 4 5 6 7 8 9 10 GND RESETn 3.3V from debugger. Can optionally be used to power the target board RESETn Vdd GND Vdd CC Debugger Connector CC85XX CSn SCLK MOSI MISO MISO MOSI SCLK CSn Figure 12 - CC Debugger connected to CC85XX SWRU197G January 2014 13/23 7 Using the CC Debugger After having connected the debugger to the target device, the debugger can be powered up by plugging in the USB cable. The debugger will immediately start a device detection process, looking for all known devices. If no devices are detected, the LED will be RED. If a device is detected, the LED will be GREEN. If the LED is GREEN, it is possible to start using the debugger together with one of the supported PC tools. 7.1 Understanding the LED OFF The debugger has no power or there is no valid firmware on the debugger. Make sure the debugger is properly powered via the USB cable or try to resurrect the debugger using the method described in chapter 8.4. AMBER (BOTH LEDS ON) The debugger is powered, but there is no valid firmware. Try to resurrect the debugger using the method described in chapter 8.4. RED LED BLINKING The Debugger is in Boot Recovery Mode. The debugger will briefly enter this state while the firmware is being upgraded (see chapter 8). The board might also enter this state if the firmware is corrupt or if the user has manually forced to board to start up in the special “boot recovery mode” (section 8.3). To go out of the state, reset the debugger by pressing the “Reset” button or by power-cycling the device. If the LED is still blinking, reprogram the unit by using the Flash Programmer Application. RED LED ON No device detected. This might be due to old firmware on the CC Debugger. New devices might not be supported with the current firmware on the debugger. Please refer to chapter 8 for the firmware upgrade procedure. There might also be a problem with the hardware connection. Check the connection to device and make sure the target board is properly powered and that Vdd on the target board is connected to pin 2 on the debug connector. Press and release the reset button to retry the target device detection GREEN LED ON The target device has been properly detected. It is possible to start using the supported tools (see chapter 5.2). SWRU197G January 2014 14/23 8 Updating the Firmware In order to make sure the CC Debugger works seamlessly with your device, it is important that it has the latest and greatest firmware. This chapter will describe how you can upgrade the firmware automatically from SmartRF Studio or manually from SmartRF Flash Programmer. The chapter will also describe how to resurrect a seemingly broken debugger. 8.1 Updating the firmware automatically in SmartRF Studio Updating the firmware on the CC Debugger can be done automatically by SmartRF Studio. Please follow the few steps described below. 1. Start SmartRF Studio. 2. Disconnect the debugger from any target board, and connect it to the PC via the USB cable. The debugger will appear in the list of connected devices in the lower part of the SmartRF Studio startup panel. Figure 13 - Auto FW upgrade 3. Double click on the item in the list, and a new window will appear. SWRU197G January 2014 15/23 Figure 14 - Auto FW upgrade 4. Click "Yes" and let SmartRF Studio do the rest. Figure 15 - Auto FW upgrade 5. Click "Done" and you're good to go. The device should appear in the list of connected devices, now showing the new firmware revision. SWRU197G January 2014 16/23 8.2 Updating the firmware manually in SmartRF Flash Programmer You can also update the firmware manually using SmartRF Flash Programmer. You can use this method if you like to have full control of the firmware image to be programmed on the controller of the debugger (i.e. programming custom firmware or old firmware revisions). 1. Start SmartRF Flash Programmer and select the tab called “EB application (USB)”. This tab will let you program compatible firmware on the CC Debugger (or evaluation boards) via the USB interface (i.e. no external programming device required). 2. Disconnect the debugger from any target board, and connect it to the PC via the USB cable. The debugger will appear in the list of connected devices. Chip type will be listed as N/A. 3. Select the flash image you want to program on the debugger. Normally, you would select: C:\Program Files (x86)\Texas Instruments\SmartRF Tools\Firmware\CC Debugger\cebal_fw_srf05dbg.hex1 4. Select the action “Erase, program and verify” 5. Click the “Perform actions” buttons. The programming procedure will start. Note that this will take several seconds. 6. The CC Debugger will reappear in the list of connected devices, now showing the new firmware revision in the device list. 7. Done! 1 Assuming default installation path of SmartRF Flash Programmer. 1 2 4 5 3 SWRU197G January 2014 17/23 8.3 Forced boot recovery mode If, for some reason, the firmware update fails and the CC Debugger appears to be non responsive, there is a way to force the board to only run the bootloader and stop all further execution. In this mode, no attempts will be made to start the firmware, and the board will only allow the user to perform a new firmware upgrade over USB. Disconnect the debugger from any power source and open the plastic enclosure. Figure 16 - Internal view of CC Debugger Short circuit the pins as depicted in Figure 17: P1.6 on the CC2511 must be connected to GND during the power-on reset to enter boot recovery mode. Figure 17 - Short-circuit pins for boot recovery mode When reconnecting the USB cable, the LED will start to blink with a RED light. This indicates that the bootloader is running and that the debugger is in boot recovery mode. At this point, follow the same firmware programming steps as describe at the beginning of this chapter. Please also note that the boot recovery mode can be used as a check to verify that the bootloader on the debugger is working. 8.4 Resurrecting the CC Debugger If the CC Debugger appears to be completely dead when applying power, there is a way to “unbrick” the board. The method consists of reprogramming the bootloader on the debugger using the debug connector inside the box. This will require an extra programming device. When opening the box, locate the debug connector header next to the target connector. Connect this header to another CC Debugger (see Figure 18) or to a SmartRF05EB (see Figure 19). When using SWRU197G January 2014 18/23 SmartRF05EB, connect a 10-pin flat cable from the “Ext SoC Debug” plug (P3) on the EB to the “USB Debug” plug (P2) on the CC Debugger. The dead debugger needs power, so connect the USB cable. Turn on the SmartRF05EB or debugger - it should detect the USB Controller (CC2511) on the debugger. Figure 18 - Programming the bootloader on the CC Debugger using another CC Debugger Figure 19 - Programming the bootloader on the CC Debugger using SmartRF05EB Next, use the SmartRF Flash Programmer to program the bootloader on the debugger. Follow these five steps (illustrated in Figure 20 below): SWRU197G January 2014 19/23 1. After starting the application, first select “Program Evaluation Board” in the “What do you want to program?” drop down box, then select the “EB Bootloader” tab. 2. In the upper left corner, select device: Use SmartRF05EB regardless of the device being used to program the debugger. I.e. select SmartRF05EB both when you are using a CC Debugger and when you are using a SmartRF05EB for the resurrection. 3. Next, select which flash image to program. The bootloader image is included when installing the flash programmer and it is usually located at “C:\Program Files (x86)\Texas Instruments\SmartRF Tools\Firmware\CC Debugger”. 4. It is also necessary to give the debugger a unique ID number – any 4 digit number will work. This number is used by the driver on the PC to uniquely identify devices if more than one debugger is connected at the same time. 5. Select “Erase, program and verify” 6. Press the “Perform Actions” buttons. The firmware upgrade takes a few seconds. Figure 20 - SmartRF Flash Programmer - Updating the bootloader Once the bootloader is programmed, you might be asked to install a USB driver on the PC. Just follow the same procedure as when the debugger was connected to the PC the first time (see chapter 5). The RED LED on the debugger should now be blinking, indicating that the bootloader is running but that no application has been loaded. If the RED LED is off, there is probably something wrong with the hardware. The debugger firmware can now be programmed directly over USB by following the procedure in either chapter 8.1 or 8.2. 1 2 4 5 6 3 SWRU197G January 2014 20/23 9 Troubleshooting Q1 Help! The debugger does not detect the SoC. What should I do? A1 There are several things to check. Upgrade the firmware. Many CC Debuggers have old firmware that will not automatically detect newer devices, like CC2543/44/45. Refer to chapter 8 for further instructions. Check that the cable is oriented correctly and that the pins are connected to the right signals on the debugger. Check that the debugger gets power from the target (i.e proper connection of the Target Voltage Sense signal). This is required in order for the level converters on the debugger to work. Check that ground on the target is connected to ground on the debugger. This is normally achieved through the target connector. Note that since the ground planes are the same, please be aware of any adverse effects caused by different ground planes on the target and on the PC (grounded via USB cable). Check that the cable is not broken. Especially the small flat cable is prone to stop working if handled a lot or being bent and stretched beyond normal operating conditions. Q2 Does IAR EW8051 support the CC Debugger as debugging device? A2 Yes – but make sure you have an up to date version of IAR with the new debug driver plug-in from Texas Instruments. You will need version 7.51A or higher. Q3 Can the debugger be used as an interface to the RF device for packet sniffing? A3 Yes, this is supported for selected devices. Use the same interconnection as in the diagrams in chapter 6. Q4 Is there a way to remove the plastic casing without damaging it? A4 Yes, there is. Hold the bottom piece of the plastic in one hand. With your other hand, take a firm grip on the long lateral sides of the upper part of the plastic and squeeze while moving the upper part away from the bottom. The two parts should separate from each other. To reassemble the plastic, just click the two pieces together. Q5 Is this a Mini or a Micro USB plug? A5 Mini USB type A. Q6 I have two CC Debuggers with the same EB ID, and I’m unable to use them together. What do I do? A6 Two EBs with the same EB ID cause a driver conflict. The solution is to resurrect one of the CC Debuggers and give it a new EB ID. 1. Connect one CC Debugger to your computer 2. Connect the CC Debugger you want to resurrect to a separate power source (e.g. another computer or a USB charger). 3. Follow the steps for resurrecting the CC Debugger, described in section 8.4. SWRU197G January 2014 21/23 10 Schematics See last page or refer to the complete bundle including gerber files, schematics and layout here [3]. 11 References [1] CC-Debugger product web site www.ti.com/tool/cc-debugger [2] CC-Debugger Quick Start Guide www.ti.com/lit/swru196 [3] CC-Debugger Layout and Schematics www.ti.com/lit/zip/swrr105 [4] Cebal – CCxxxx Development Tools USB Driver for Windows x86 and x64 www.ti.com/lit/zip/swrc212 [5] DN304 – CCxxxx Development Tools USB Driver Installation Guide www.ti.com/lit/swra366 [6] Texas Instruments Support support.ti.com [7] Texas Instruments Low Power RF Online Community www.ti.com/lprf-forum [8] SmartRF Studio www.ti.com/tool/smartrftm-studio [9] SmartRF Flash Programmer www.ti.com/tool/flash-programmer [10] SmartRF Packet Sniffer www.ti.com/tool/packet-sniffer [11] SmartRF Flash Programmer User Manual www.ti.com/lit/swru069 [12] PurePath Wireless Configurator www.ti.com/tool/purepath-wl-cfg [13] PurePath Wireless Commander www.ti.com/tool/purepath-wl-cmd [14] SoC Battery Board product web site www.ti.com/tool/soc-bb [15] IAR Embedded Workbench for 8051 www.iar.com/ew8051 SWRU197G January 2014 22/23 12 Document History Revision Date Description/Changes G 2013-01-15 Chapter 9: Added how to solve problem with CC Debuggers having the same EB ID. F 2013-06-20 CC1100, CC1101, CC2500, and CC1200 are now also supported by the debugger. Corrected typo in chapter 6.2.1: DD to pin P2.1 (not P2.2) and DC to pin P2.2 (not P2.1) for all SoCs except CC2544 and CC2545. Added debug pin-out for CC2545. Corrected pin-out in figure 10 and 11 (DC to GPIO2/GDO2, DD to GPIO0/GDO0). Added link to layout and gerber files. E 2012-03-01 Corrected typo in chapter 6.2.1. Special debug pin-out for CC2544, not CC2543. D 2012-02-22 Added information about connections for programming of CC85xx devices. Updated info about connections for supported transceivers. Updated driver installation information and added more details about firmware upgrade. Describe what it means when the LED is amber. Updated reference links. C 2010-09-19 Added more information about how to upgrade the firmware. B 2010-02-25 Fixed erroneous description of interconnection between CC Debugger and CC2520. The VREG_EN signal shall be connected to pin 4 on the target connector, not pin 3. A 2010-02-11 Added more details about the powering options. Added more information about connection options. - 2009-05-05 First revision. EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. 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REGULATORY COMPLIANCE INFORMATION As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal Communications Commission (FCC) and Industry Canada (IC) rules. For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. General Statement for EVMs including a radio User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization. For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant Caution This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and receiver. • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio/TV technician for help. For EVMs annotated as IC – INDUSTRY CANADA Compliant This Class A or B digital apparatus complies with Canadian ICES-003. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Concerning EVMs including radio transmitters This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concerning EVMs including detachable antennas Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada. Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de l'utilisateur pour actionner l'équipement. Concernant les EVMs avec appareils radio Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER 【Important Notice for Users of EVMs for RF Products in Japan】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, 2. Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product, or 3. Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2014, Texas Instruments Incorporated Material Safety Data Sheet A-4 Hardener 1 1. Chemical Product and Company Identification Product Name: A-4 Hardener Product Description: Liquid Epoxy Hardener Company: Cast-Coat, Inc. 354 West Street W. Bridgewater, MA 02379 Telephone: 1-800-527-4502 or 1-508-587-4502 Emergency Contact: Chemtrec: (domestic) 1-800-424-9300 (international) 1-703-527-3887 2. Composition / Information on Ingredients Components CAS # % 3,3’-oxybis(ethyleneoxy)bis(propylamine) 4246-51-9  98 2-(2-(3-aminopropoxy)ethoxy)ethanol 112-33-4 1 3. Hazards Identification Eye Contact: Corrosive to the eyes and may cause severe damage, including blindness. Vapors may be irritating. Skin Contact: Corrosive to the skin. May cause skin sensitization. May be toxic if absorbed through the skin. Inhalation: Vapors / mists may be corrosive to the upper respiratory tract. Repeated or prolonged exposure can result in lung damage. Ingestion: Not expected to be a relevant route of exposure, however, corrosive and may cause severe and permanent damage to the mouth, throat and stomach. Aggravated Medical Conditions: Pre-existing eye, skin and respiratory disorders may be aggravated by exposure to this product. Pre-existing respiratory and skin allergies may be increased from exposure to this product. 4. First Aid Measures General Advise: Good practice requires that gross amounts of any chemical be removed from the skin as soon as practical, especially before eating or smoking. Eye Contact: Immediately flush eyes with water for at least 30 minutes. Seek medical attention. Skin Contact: Remove contaminated clothing and wipe excess from skin. Promptly wash with soap and water for 15 minutes. Seek medical attention if irritation persists. Inhalation: Move to fresh air and provide oxygen if necessary. Ingestion: Rinse mouth with water. If conscious, give small quantities of water to drink. Do not induce vomiting. If vomiting occurs, keep victim’s head below hips to prevent vomit from entering lungs. Seek medical attention. Material Safety Data Sheet A-4 Hardener 2 5. Fire-Fighting Measures Flashpoint: 139’ C Autoignition Temperature: 260’ C Flammability limits in air - lower: 1.1 % (V) Flammability limits in air – upper: 4.5 % (V) Extinguishing Media: Carbon dioxide (CO2), dry chemical, water fog or “alcohol foam“ Protective Equipment: Do not enter confined space without full bunker gear (helmet with face shield, bunker coats, gloves and rubber boots). Use self contained, positive pressure breathing apparatus. Specific Hazards: Decomposition and combustion products may be toxic. Containers exposed to intense heat should be cooled with water to avoid vapor pressure buildup. 6. Accidental Release Measures Personal Protection: Eyes - Wear splash proof chemical goggles. Skin - Wear impervious gloves and protective clothing to prevent skin contact. Inhalation: Use NIOSH approved respirator suitable for organic vapors. Environmental Concerns: Construct a dike to prevent from entering sewers, rivers and waterways. Clean Up: Soak up residue with absorbent material and shovel into non leaking containers. 7. Handling and Storage Handling: Good practice requires that gross amounts of any chemical be removed from the skin as soon as practical, especially before eating or smoking. Wear splash proof chemical goggles, impervious gloves and protective clothing to prevent skin contact. Emergency eye wash stations should be readily accessible. Ventilation: Provide effective mechanical exhaust. Wear NIOSH approved respirator suitable for organic vapors in the absence of ventilation. Storage: Store in a cool, dry location in tightly sealed containers. Keep away from open flame and high temperatures. Do not pressurize containers to empty them. Material Safety Data Sheet A-4 Hardener 3 8. Exposure Controls/Personal Protection Engineering Controls: Provide effective mechanical exhaust to ensure concentration levels are below exposure limits. Respiratory Protection: Wear NIOSH approved air purifying respirator in the absence of ventilation. Eye Protection: Wear safety goggles or safety glasses with side shields. Emergency eye wash stations should be readily accessible. Skin Protection: Wear chemical resistant impervious gloves and protective clothing such as an apron to prevent skin contact. 9. Physical and Chemical Properties Appearance: Liquid Color: Clear to Amber Odor: Amine Specific Gravity: 0.98 Vapor Pressure: < 1.00 mmHg at 20’ C Solubility in Water: Miscible Flashpoint: 139’ C VOC Content: < 0.1% by weight 10. Stability and Reactivity Stability: Stable under normal conditions. Materials to Avoid: Avoid heat, flame and strong oxidizing agents. Hazardous Decomposition Products: Carbon monoxide, Carbon dioxide, Nitrous oxide. Comments: Hazardous polymerization will not occur. 11. Toxicological Information 3,3’-oxybis(ethyleneoxy)bis(propylamine), 2-(2-(3-aminopropoxy)ethoxy)ethanol: Oral: LD50 3,160 mg / kg species: rat Dermal: LD50 > 2,150 mg / kg species: rat Material Safety Data Sheet A-4 Hardener 4 12. Ecological Information Inherent Biodegradability: Zahn-Wellens - < 20 % (Difficult to eliminate) Golden Orfe, Static 96 hour LC50 - 220-460 mg / L (Practically nontoxic) Daphnid, Static 48 hour EC50 - 220 mg / L (Practically nontoxic) Acute algal toxicity, 72 hour EC50 - 69 mg / L (Test rating not found) Toxicity to bacteria - EC50, (17H) 220 mg / L (Test rating not found) 13. Disposal Considerations Comments: Dispose of in accordance with federal, state and local regulations. Incinerate or bury in a RCRA licensed facility. Do not discharge into drains, waterways, sewers, or groundwater. RCRA: D002 14. Transportation Information DOT: UN 2735 Amines, Liquid, Corrosive, N.O.S. (Trioxatridecanediamine) 8, II ERG - 153 IMDG: UN 2735 Amines, liquid, Corrosive, N.O.S. (Trioxatridecanediamine) 8, II IATA: UN 2735 Amines, Liquid, Corrosive, N.O.S. (Trioxatridecanediamine) 8, II 15. Regulatory Information TSCA : All ingredients are listed or exempt HSC Classification: Irritating material, Sensitizing material, Corrosive material Sara Section 312 Hazard Classification: Chronic health hazard, Acute health hazard Sara Section 313: None California prop. 65: None Hazard Ratings: Health Fire Reactivity 3 1 0 WHMIS Classification: D-2A, D-2B, Class E – Corrosive material Material Safety Data Sheet A-4 Hardener 5 16. Other Information All information appearing herein is based upon data obtained from the manufacturer and / or recognized technical sources. While the information is believed to be accurate, Cast-Coat makes no representations as to its accuracy or sufficiency. Conditions of use are beyond the control of Cast-Coat and therefore users are responsible to verify this data under their own operating conditions to determine whether the product is suitable for their purposes. Cast-Coat, Inc. assumes no responsibility for injury from the use of the product described herein. Prepared by: Robert S. Lothrop Title: Technical Director Revision: 04/18/2012 1 / 5 Revision Date November 2011 Revision 3 SDS No. 16447 SAFETY DATA SHEET ARALDITE FUSION HARDENER SECTION 1: IDENTIFICATION OF THE SUBSTANCE/MIXTURE AND OF THE COMPANY/UNDERTAKING 1.1. Product identifier Product name ARALDITE FUSION HARDENER Product No. 808300, 808409, 808416, 808423 1.2. Relevant identified uses of the substance or mixture and uses advised against 1.3. Details of the supplier of the safety data sheet Supplier BOSTIK LIMITED COMMON ROAD STAFFORD STAFFORDSHIRE ST16 3EH +44 1785 272625 sds.uk@bostik.com 1.4. Emergency telephone number SECTION 2: HAZARDS IDENTIFICATION 2.1. Classification of the substance or mixture Classification (1999/45/EEC) Xi;R36/38. 2.2. Label elements Labelling Irritant Risk Phrases R36/38 Irritating to eyes and skin. Safety Phrases S2 Keep out of the reach of children. S24/25 Avoid contact with skin and eyes. S26 In case of contact with eyes, rinse immediately with plenty of water and seek medical advice. S36/37/39 Wear suitable protective clothing, gloves and eye/face protection. S46 If swallowed, seek medical advice immediately and show this container or label. S56 Dispose of this material and its container to hazardous or special waste collection point. 2.3. Other hazards SECTION 3: COMPOSITION/INFORMATION ON INGREDIENTS 3.2. Mixtures 2 / 5 SDS No. 16447 ARALDITE FUSION HARDENER 1,8-DIAZABICYCLO[5.4.0]UNDEC-7-ENE 1-5% CAS-No.: 6674-22-2 EC No.: 229-713-7 Classification (67/548/EEC) Xn;R22. C;R34. R52/53. Classification (EC 1272/2008) Not classified. BIS(2-DIMETHYLAMINOETHYL)ETHER 1-5% CAS-No.: 3033-62-3 EC No.: 221-220-5 Classification (67/548/EEC) T;R23/24. Xn;R22. C;R35. Classification (EC 1272/2008) Not classified. TRIETHYLENETETRAMINE, PROPOXYLATED 5-10% CAS-No.: 26950-63-0 EC No.: 500-055-5 Classification (67/548/EEC) Xi;R38,R41. Classification (EC 1272/2008) Not classified. The Full Text for all R-Phrases and Hazard Statements are Displayed in Section 16. SECTION 4: FIRST AID MEASURES 4.1. Description of first aid measures Inhalation Remove victim immediately from source of exposure. Move the exposed person to fresh air at once. Get medical attention. Ingestion DO NOT induce vomiting. Get medical attention immediately. Skin contact Promptly wash contaminated skin with soap or mild detergent and water. Promptly remove clothing if soaked through and wash as above. Get medical attention if irritation persists after washing. Eye contact Rinse the eye with water immediately. Continue to rinse for at least 15 minutes and get medical attention. 4.2. Most important symptoms and effects, both acute and delayed 4.3. Indication of any immediate medical attention and special treatment needed SECTION 5: FIREFIGHTING MEASURES 5.1. Extinguishing media Extinguishing media This product is not flammable. Use fire-extinguishing media appropriate for surrounding materials. Use: Foam, carbon dioxide or dry powder. 5.2. Special hazards arising from the substance or mixture 5.3. Advice for firefighters SECTION 6: ACCIDENTAL RELEASE MEASURES 6.1. Personal precautions, protective equipment and emergency procedures 6.2. Environmental precautions 6.3. Methods and material for containment and cleaning up 3 / 5 SDS No. 16447 ARALDITE FUSION HARDENER Absorb in vermiculite, dry sand or earth and place into containers. 6.4. Reference to other sections SECTION 7: HANDLING AND STORAGE 7.1. Precautions for safe handling Avoid spilling, skin and eye contact. 7.2. Conditions for safe storage, including any incompatibilities Store at moderate temperatures in dry, well ventilated area. 7.3. Specific end use(s) SECTION 8: EXPOSURE CONTROLS/PERSONAL PROTECTION 8.1. Control parameters Ingredient Comments WEL = Workplace Exposure Limits 8.2. Exposure controls Protective equipment Engineering measures Provide adequate ventilation. Respiratory equipment If ventilation is insufficient, suitable respiratory protection must be provided. Hand protection Protective gloves must be used if there is a risk of direct contact or splash. Eye protection Wear splash-proof eye goggles to prevent any possibility of eye contact. Hygiene measures Wash promptly if skin becomes contaminated. Wash at the end of each work shift and before eating, smoking and using the toilet. SECTION 9: PHYSICAL AND CHEMICAL PROPERTIES 9.1. Information on basic physical and chemical properties Appearance Liquid Colour Light (or pale). Yellow. Odour Slight odour. Solubility Insoluble in water Relative density 1.14 Flash point (°C) 145 PM Closed cup. 9.2. Other information SECTION 10: STABILITY AND REACTIVITY 10.1. Reactivity 10.2. Chemical stability Stable under normal temperature conditions. 10.3. Possibility of hazardous reactions 10.4. Conditions to avoid 10.5. Incompatible materials 10.6. Hazardous decomposition products 4 / 5 SDS No. 16447 ARALDITE FUSION HARDENER SECTION 11: TOXICOLOGICAL INFORMATION 11.1. Information on toxicological effects Skin contact Irritating to skin. Eye contact Irritating to eyes. SECTION 12: ECOLOGICAL INFORMATION Ecotoxicity Not regarded as dangerous for the environment. 12.1. Toxicity 12.2. Persistence and degradability 12.3. Bioaccumulative potential 12.4. Mobility in soil 12.5. Results of PBT and vPvB assessment 12.6. Other adverse effects SECTION 13: DISPOSAL CONSIDERATIONS 13.1. Waste treatment methods Dispose of waste and residues in accordance with local authority requirements. SECTION 14: TRANSPORT INFORMATION General The product is not covered by international regulation on the transport of dangerous goods (IMDG, IATA, ADR/RID). 14.1. UN number Not applicable. 14.2. UN proper shipping name Not applicable. 14.3. Transport hazard class(es) Transport Labels No transport warning sign required. 14.4. Packing group Not applicable. 14.5. Environmental hazards Environmentally Hazardous Substance/Marine Pollutant No. 14.6. Special precautions for user Not applicable. 14.7. Transport in bulk according to Annex II of MARPOL73/78 and the IBC Code Not applicable. SECTION 15: REGULATORY INFORMATION 15.1. Safety, health and environmental regulations/legislation specific for the substance or mixture Statutory Instruments The Chemicals (Hazard Information and Packaging for Supply) Regulations 2009 (S.I 2009 No. 716). Control of Substances Hazardous to Health. 5 / 5 SDS No. 16447 ARALDITE FUSION HARDENER Approved Code Of Practice Safety Data Sheets for Substances and Preparations. Classification and Labelling of Substances and Preparations Dangerous for Supply. Guidance Notes Workplace Exposure Limits EH40. Introduction to Local Exhaust Ventilation HS(G)37. CHIP for everyone HSG(108). 15.2. Chemical Safety Assessment SECTION 16: OTHER INFORMATION General information This product should be used as directed by Bostik Ltd. For further information consult the product data sheet or contact Technical Services. Information Sources This safety data sheet was compiled using current safety information supplied by distributor of raw materials. Revision Comments NOTE: Lines within the margin indicate significant changes from the previous revision. This safety data sheet supersedes all previous issues and users are cautioned to ensure that it is current. Destroy all previous data sheets and if in doubt contact Bostik Limited. Issued By Approved LJ Revision Date November 2011 Revision 3 Date September 2007 Risk Phrases In Full R34 Causes burns. R35 Causes severe burns. R22 Harmful if swallowed. R52/53 Harmful to aquatic organisms, may cause long-term adverse effects in the aquatic environment. R38 Irritating to skin. R41 Risk of serious damage to eyes. R23/24 Toxic by inhalation and in contact with skin. ICOMP VCOMP VADJ Q1 Q2 L 10μH C1 10μF C10 10μF R1 40mΩ adaptateur secteur R2 20mΩ R4 2.2Ω R5 100K R8 130k 1% R9 10.2k, 1% C2 0.1μF C4 0.1μF C3 1μF 6.8nF C9 1μF C8 0.1μF ISL6251 ISL6251A C5 10nF flottant 4.2V/CELL R6 10k C7 1μF R10 4.7Ω BATSCL SDL Une entrée / D GND entrée de 5.15A limites actuelles 3 cellules hôte R11, R12, R13 10k D1 en option VDDP D2 D3 R7: 100Ω CSIP RCID BOOT UGATE PHASE LGATE PGND CSOP Cson cellules GND C11 3300pF D4 SYSTÈME DE CHARGE DCIN ACSET VDDP VDD ACPRN Chlim FR ICM ACLIM VREF ICOMP VCOMP VADJ R3: 18Ω C6 ISL6251 ISL6251A batterie paquet BAT + SCL SDL Temp BATBattery BATVCC sortie Sortie D / A Une entrée / D DIGITAL contribution AVDD / VREF CSIP RCID BOOT UGATE PHASE LGATE PGND CSOP Cson cellules GND FIGURE 13. ISL6251, ISL6251A circuit d'application typique avec micro-contrôleur ISL6251, ISL6251A 12 FN9202.2 10 mai 2006 Principe de fonctionnement introduction Le ISL6251, ISL6251A comprend toutes les fonctions nécessaire de charger 2 à 4 cellules Li-Ion et Li-polymère batteries. Une haute efficacité convertisseur abaisseur synchrone est utilisé pour contrôler la tension et le courant jusqu'à Charing Charing Les taux de 10A. Le ISL6251, ISL6251A a courant de limitation d'entrée et entrées analogiques pour régler le courant de charge et de la charge tension; Chlim entrées sont utilisées pour contrôler le courant de charge VADJ et les intrants sont utilisés pour contrôler la tension de charge. Le ISL6251, ISL6251A charger la batterie avec une constante courant de charge, fixé par Chlim entrée, jusqu'à ce que la tension de la batterie se dresse à la tension de charge programmé fixé par entrée VADJ; puis le chargeur commence à fonctionner à une tension constante de façon responsable. L'entrée EN permet l'arrêt du chargeur à travers le commande à partir du micro-contrôleur. Il utilise également un taux SÉCURITÉ Lorsque le chargeur de batterie est en arrêt extrêmement chaud Conditions. Le montant de la personnalisation de la visite actuelle est sur ​​le Sortie de l'ICM. La figure 11 montre le bloc fonctionnel IC organigramme. Le convertisseur abaisseur synchrone utilise à canal N externe MOSFET à convertir la tension d'entrée à l'requis courant Charing Charing et de la tension. La figure 12 montre l' ISL6251, ISL6251A circuit typique d'application de Charing Charing courant et tension fixe à des valeurs spécifiques. la circuit typique d'application de la figure 13 montre les ISL6251, ISL6251A circuit typique de l'application qui utilise la Réglez le micro-contrôleur de courant Charing fixé par Chlim entrée. La tension aux Chlim et la valeur de R1 définit le courant Charing. Le convertisseur DC / DC génère l' des signaux de commande pour entraîner deux MOSFET à canal N à l'extérieur course la tension et courant défini par le ACLIM, Chlim, Cellules et entrées VADJ. Le ISL6251, ISL6251A dispose la boucle de régulation de tension (VCOMP) et deux boucles de régulation de courant (ICOMP). la Boucle de régulation de la tension de VCOMP Moniteur Cson pour assurer que sa tension ne dépasse jamais la tension et régule l' tension de charge de la batterie fixé par VADJ. Le ICOMP courant boucles de régulation de course le courant batterie Charing Livré à la batterie pour s'assurer qu'elle ne dépasse jamais la Charing limites actuelles fixées par Chlim; et le courant ICOMP des boucles de régulation de course également le courant d'entrée tiré à partir de l'adaptateur secteur afin de s'assurer qu'il ne dépasse jamais l'entrée limite actuelle fixée par ACLIM, et évaluer la panne du système de pré-vente et AC de surcharge de l'adaptateur. contrôle PWM Le ISL6251, ISL6251A emploie le PWM à fréquence fixe Architecture de courant de commande de mode avec la charge d'alimentation vers l'avant fonction. La fonction de feed-forward maintient constant l' gain de modulateur de 11 pour réaliser la régulation de ligne rapide cum Buck tension d'entrée change. Lorsque la charge de la batterie tension s'approche de la tension d'entrée, le convertisseur DC / DC décrochage fonctionne à la mode, où il est la minuterie de prévente la fréquence de tomber dans la fréquence audible gamme. Il peut atteindre cyclique jusqu'à 99,6%. Taux de pré-amplification de la tension de bus de système, la batterie Lorsque chargé d'opérer dans la norme mode-Buck CSOPCSON DROPS ci-dessous 4.25mV. Une fois en mode buck-standard, hystérésis n'autorise pas le fonctionnement synchrone de la Convertisseur DC / DC jusqu'à Rises CSOP-dessus Cson 12.5mV. En route gâté adaptatif système est utilisé pour contrôler les morts temps entre deux Switcher. Les morts circuit de commande de temps Surveillez la sortie de LGATE et empêche la face supérieure MOSFET de Turning jusqu'à LGATE est entièrement éteint, la prévention croix-conduction et flèche à l'. Pour les morts circuit de temps pour travailler correctement, il doit être le faible résistance, faible chemin de l'inductance du conducteur de MOSFET LGATE corrompu, et à partir de la source de MOSFET à PGND. la diode Schottky externe est entre les broches et BOOT VDDP pings à garder le condensateur d'amorçage partagée. Réglage de la tension de la batterie règlement Le ISL6251, ISL6251A utilise la haute précision garni d'intervalle de bande de référence de tension à la batterie de Charing de course tension. L'entrée VADJ Régler la tension de sortie du chargeur, et la tension de commande de VADJ peut varier de 0 à VREF, fournir la plage de réglage de 10% (de 4,2 V-5% de taux 4.2V +5%) sur le régulateur de tension Cson. Dans l'ensemble, la tension précision meilleure que 0,5% est atteint. La tension de terminaison de la batterie par des cellules est la fonction de l' Basseterre chimie. Consultez le taux des fabricants de batteries déterminer cette tension. • Float VADJ pour régler la tension de la batterie = 4.2V × VCSON nombre de cellules, • Connectez-vous à VREF VADJ de mettre 4.41V nombre de × de cellules, • Brancher à la masse à mettre en VADJ 3.99V nombre de × de la cellules. Jump, la tension maximale de la batterie de 17.6V peut être atteint. Notez que l'autre tension de charge de la batterie peut être réglée par Raccordement du diviseur résistif de VREF à la terre. la diviseur à résistances doivent être dimensionnés pour attirer plus au nord que 100μA de VREF; ou connectez la source de tension à basse impédance comme Le convertisseur N / A dans le micro-contrôleur. le programmée tension de la batterie par la cellule peut être déterminé par ce qui suit équation: Le diviseur de résistance externe de VREF définit la tension au VADJ selon: VCELL VVADJ = 0175 + 3.99V VVADJ VREF Rbot_VADJ | | 514k Rtop_VADJ | | + 514k Rbot_VADJ | | 514k = × ------------------------------------------------ ------------------------------------------------- ISL6251, ISL6251A 13 FN9202.2 10 mai 2006 Où Rbot_VADJ et Rtop_VADJ sont des résistances externes à VADJ. Précision Taux de minimiser la perte due à l'interaction avec Diviseur de résistance interne de VADJ, S'assurer que la résistance en courant alternatif En regardant en arrière dans le diviseur de résistance externe est inférieure à 25k. Connectez cellules cum présentés dans le tableau 1 pour charger 2, 3 ou 4 + cellules. Lorsque Charing autres chimies cellulaires, utiliser des cellules à sélectionner la plage de tension de sortie du chargeur. le interne gm1 amplificateur d'erreur maintient la régulation de tension. la tension amplificateur d'erreur est compensée à VCOMP. le composant valeurs indiquées dans la figure 12 du fournisseur approprié pour tableaux de bord la plupart des applications. La rémunération individuelle de la tension réglementation et des boucles de courant régulation permet de optimale compensation. Réglage de la limite de courant de charge de batterie L'entrée de Chlim règle le courant maximum de Charing. la courant défini par la résistance de détection de courant relie entre CSOP et Cson. La tension différentielle à grande échelle entre les CSOP et Cson est 165mV pour Chlim = 3,3 V, le saut Charing courant maximal est 4.125A pour un 40mΩ Sensing résistance. Autre charge de la batterie seuil de détection de courant valeurs peuvent être définies par le diviseur résistif de Connexion VREF à la masse ou 3,3 V, ou en connectant la faible impédance source de tension comme un convertisseur N / A dans le micro-contrôleur. Contrairement VADJ et ACLIM, Chlim n'a pas le interne réseau diviseur à résistances. Le courant seuil de limite de charge est proposée par: Pour régler le courant de charge d'entretien pour le chargeur muet, le résistance en série avec les interrupteurs T3 (figure 12) commandé par Le micro-contrôleur est connecté à la broche de terre Chlim. Le courant de charge de maintien est déterminé par: Lorsque la tension est inférieure à 88mV Chlim (typique), il ll désactiver le chargeur de batterie. Au moment de choisir le courant résistance de détection, notez que la chute de tension dans la Causes outre la détection résistance dissipation de puissance, réduisant efficacité. Cependant, pour réduire la Chlim de réglage de tension tension à travers la résistance de détection de courant R1 Will dégradé précision en raison du signal plus faible à l'entrée du courant Amplificateur de lecture. Il est le compromis entre précision et dissipation de puissance. Un filtre passe-bas est recommandé de Mise à éliminer le bruit. Connecter la résistance à la CSOP broches au lieu de les pings Cson, cum la broche CSOP a faible courant de polarisation et moins d'influence sur le courant-sens Précision La précision et le régulateur de tension. Réglage de l'entrée limites actuelles Le courant total d'entrée de l'adaptateur secteur, ou d'un autre DC la source, est fonction du courant d'alimentation du système et de la courant par batterie Charing. L'entrée actuelle limites régulateur le courant d'entrée en réduisant le courant de Charing, Lorsque le courant d'entrée dépasse l'entrée imparti point actuel. Actuelle du système varie normalement usure sperme du système sont alimentés vers le haut ou vers le bas. Sans réglementation actuelle d'entrée, la source doit être capable de fournir le maximum du système et le courant maximal d'entrée du chargeur simultanément. En utilisant le courant d'entrée limité, le courant Capacité de l'adaptateur secteur peut être réduit, ce qui réduit le coût du système. Le ISL6251, ISL6251A limite le courant de charge de la batterie Lorsque le seuil de limitation du courant d'entrée est dépassée, assurant le chargeur de batterie ne se charge pas en bas de l'adaptateur secteur tension. Ce règlement courant d'entrée constante permet à l' adapter entièrement dans le système d'alimentation et de la pré-AC adaptateur de surcharge et de s'écraser le bus système. L'amplificateur interne compare la tension entre gm3 CSIP et RCID au courant d'entrée tension de seuil limite fixé par ACLIM. Connectez taux ACLIM REF, Float et GND pour la pleine échelle tension d'entrée de seuil limite de 100 mV, 75mV et 50mV, respectivement, ou utiliser le diviseur résistif de VREF à la masse pour définir la limite de courant d'entrée cum la suivante équation: Le diviseur de résistance externe de VREF définit la tension au ACLIM de fonction: Où Rbot_ACLIM et Rtop_ACLIM sont des résistances externes à ACLIM. Précision Taux de minimiser la perte due à l'interaction avec Diviseur de résistance interne de ACLIM, S'assurer que la résistance en courant alternatif En regardant en arrière dans le diviseur de résistance externe est inférieure à 25k. Lors du choix de la résistance de détection de courant, noter que la chute de tension dans cette résistance provoque plus de puissance la dissipation, ce qui réduit l'efficacité. Le courant de l'adaptateur secteur Précision sincère est très important. Utilisez la tolérance de 1% résistance de détection de courant. La plus grande précision de ± 3% est obtenue avec 100 mV de mesure du courant pour la tension de seuil ACLIM = VREF, mais il a la dissipation de puissance la plus élevée. pour exemple, il a 400mW dissipation de puissance nominale pour 4A AC la personnalisation et 1W Sensing maillage de résistance doivent être utilisés. ± 4% et ± 6% La précision peut être obtenue avec 75mV et 50mV sens de courant tension de seuil pour ACLIM = flottant et ACLIM = GND, respectivement. Programmation du nombre de cellules TABLEAU 1. NOMBRE cellules CELL DMV 4 GND 3 float 2 ICHG 165mV R1 ------------------- VCHLIM 3.3V = --------------------- ICHG 165mV R1 ------------------- VCHLIM, filet 3.3V = --------------------------------------- ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ = V + 0,050 VREF 0,05 R I 1 ACLIM 2 contribution VACLIM VREF Rbot_ACLIM | | 152k Rtop_ACLIM | | 152k + Rbot_ACLIM | | 152k = × ------------------------------------------------------------------------------------------------------ ISL6251, ISL6251A 14 FN9202.2 10 mai 2006 Un filtre passe-bas est d'éliminer la commutation suggéré bruit. Connecter la résistance à RCID broches au lieu de broches CSIP parce RCID a pings inférieurs courant Bias et moins influents sur la précision de mesure du courant. Personnalisation de détection AC Connectez la tension de l'adaptateur secteur à travers la résistance diviseur de ACSET Lorsque l'alimentation secteur est disponible pour détecter, cum montre Figure 12. ACPRN est une sortie à drain ouvert est élevée et lorsque ACSET est inférieure à Vth, RISE, et est actif bas Quand ACSET ci-dessus Ve, tomber. Ve, RISE et Ve, automne sont donnés par: Où est l'entrée de courant et de l'hystérésis Bias Ihys ACSET VACSET = 1.24V (min), 1.26V (typ) et 1.28V (max). la hystérésis est IhysR8, Où Ihys = 2.2μA (min), 3.4μA (typ) et 4.4μA (max). mesure de courant Utilisez ICM pour contrôler le courant d'entrée détecté Être travers CSIP et RCID. La plage de tension de sortie est de 0 à 2,5 V. la Tension de ICM est proportionnelle à la chute de tension aux bornes de CSIP et RCID, et est donnée par l'équation suivante: de INPUT Où est le courant continu tirée de l'adaptateur secteur. ICM a ± 3% Précision. Un filtre passe-bas connecté à l'ICM est utilisé pour délivrer en sortie du filtre Le bruit de commutation. Régulateur LDO 5.075V VDD la tension d'alimentation du fournisseur de la LDO interne Régulateur de DCIN et peut fournir jusqu'à 30mA de courant. Les pilotes MOSFET sont alimentés par VDDP, qui doit être connecté à VDDP cum le montre la figure 12. VDDP connecte à travers la résistance externe à la DMV. Bypass VDD et VDDP avec le 1μF condensateur. fermeture Le ISL6251, ISL6251A dispose la veille à faible consommation mode. Conduite EN bas arrête le chargeur. Dans l'arrêt, Le convertisseur DC / DC est désactivé, et VCOMP et ICOMP sont tirés à la terre. L'ICM, sorties ACPRN continuer à fonction. FR peut être entraîné par la thermistance Autoriser automatique arrêt Lorsque la batterie est chaude. Souvent, les NTC thermistance est inclus à l'intérieur de la batterie pour mesurer son Température. Lorsqu'il est connecté au chargeur, la thermistance forme le diviseur de tension résistif avec le pull-up à la VREF. La tension de seuil de 1.06V avec 60mV hystérésis est EN. La thermistance peut être sélectionnée pour que le rapport de la résistance Température caractéristique qui diminue brutalement au-dessus de l' Température critique. Cette ferme automatiquement arrangement Lorsque la batterie le chargeur est au-dessus de la critique Température. Une autre méthode pour inhiber taux Charing est Chlim force ci-dessous 88mV (typ). Short Circuit Protection et 0V Batterie Charing Le courant de charge sur le chargeur de batterie Will course les limites fixées par Chlim, il a automatiquement court-circuit protection et est en mesure de charger le fournisseur actuel WAKE taux en batterie extrêmement déchargée. Protection contre la surchauffe Si la température de la filière dépasse 150 ° C, il s'arrête Charing. Une fois que l' DROPS meurent température inférieure à 125 ° C, Charing va recommencer. Renseignements sur la demande La conception de chargeur de batterie qui suit fait référence à la typique Circuit d'application de la figure 12, où la batterie typique de configuration 4S2P est utilisé. Cette section décrit comment Sélectionnez les composants externes, y compris l'inducteur, entrée et des condensateurs de sortie, MOSFET de commutation et de courant Sentant résistances. sélection d'inductance La sélection de l'inducteur a compromis entre le coût, la taille et efficacité. Par exemple, l'inductance de l'abaisser, l' la plus petite taille, mais est courant supérieur d'ondulation. C'est ce qui ressort également des pertes supérieur AC dans le noyau magnétique et les enroulements, qui réduisent l'efficacité du système. D'autre part, Les résultats d'inductance plus élevés dans l'ondulation inférieure actuelle et un filtrage plus petites condensateurs de sortie, mais elle a supérieur DCR (DC résistance de l'inducteur) perte, et a transitoire lent réponse. Sauter, la conception pratique de l'inducteur est basée sur l' inductance ondulation de courant Etre ± (15-20)% du maximum en cours de fonctionnement à courant continu à la tension d'entrée maximale. la inductance nécessaire peut être calculée à partir de: Où VIN, MAX, VBAT, et FS sont l'entrée maximale tension, la tension de la batterie et de la fréquence de commutation respectivement. Le courant ΔI inductance d'ondulation se trouve de: Lorsque le courant maximal crête-à-crête d'ondulation est de 30% le courant de charge maximum est utilisé. Pour VIN, MAX = 19V, VBAT = 16.8V, TABI, MAX = 2.6A, et FS = 300kHz, l'inductance calculée est 8.3μH. Choisir La valeur standard Placard donne L = 10μH. Noyaux de ferrite sont souvent le meilleur choix, car ils sont à taux Optimisé 300kHz ACSET 9 8 e, hausse de 1 V R • ⎟ V R ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ + ACSET hys 8 9 8 e, Fall 1 V I R R R V - • ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ + ICM = 19,9 de INPUT • • R2 IN, MAX s BAT L IN, MAX BAT V f V je V V L Δ - = Δ IL = 30% ⋅ TABI, MAX ISL6251, ISL6251A 15 FN9202.2 10 mai 2006 Opération de 600kHz avec une faible perte de base. Le noyau doit être honoré PAS assez pour saturer au courant de bobine crête IPeak: Sélection de condensateur de sortie CONDENSATEUR La sortie en parallèle avec la batterie est utilisée pour suce l'ondulation de courant à haute fréquence et de commutation lisser la tension de sortie. La valeur efficace de la sortie ondulation Ieff est donné par: Lorsque le rapport cyclique D est le rapport de la tension de sortie (tension de batterie) sur la tension d'entrée continue pour Le fonctionnement en mode de conduction qui est typique pour la batterie téléchargés. Au cours de la période de charge de la batterie, la tension de sortie varie à partir de sa tension de batterie à la batterie initiale classé tension. Sauter, le rapport cyclique peut être modifié dans la plage de entre 0,53 et 0,88 pour la tension de batterie minimale de 10V (2.5V/Cell) et la tension maximale de la batterie de 16.8V. Pour VIN, MAX = 19V, VBAT = 16.8V, L = 10μH, et FS = 300kHz, le courant maximal RMS est 0.19A. Un typique CONDENSATEUR 10F céramique est un bon choix pour ce suce courant et a également de très petite taille. Le condensateur au tantale Ormerod Connu mécanismes de défaillance Lorsqu'il est soumis à une grande Courant de choc. Considérations EMI marquent généralement souhaitable de minimiser ondulation du courant dans les câbles de la batterie. Perles eBay maille ajoutée dans série avec la batterie à l'augmentation de la batterie impédance à 300kHz Fréquence de commutation. ondulation de commutation splits de courant entre la batterie et le condensateur de sortie en fonction de l'ESR de la production et de la batterie CONDENSATEUR impédance. Si l'ESR du condensateur de sortie est 10M et l'impédance de la batterie est élevée à 2Ω avec le talon, alors que 0,5% du courant d'ondulation dans la batterie 'vais couler. sélection de MOSFET Le chargeur de batterie pour ordinateur portable synchrone avec convertisseur abaisseur a la tension d'entrée à partir de la sortie de l'adaptateur AC. la tension de sortie maximum de l'adaptateur secteur ne dépasse pas 25V. Par conséquent, la logique MOSFET 30V doit être utilisé. Le MOSFET côté haut doit être capable de dissiper la les pertes de conduction, plus les pertes de commutation. Pour la batterie application chargée, la tension d'entrée de l'synchrone convertisseur abaisseur est égale à la tension de sortie de l'adaptateur, qui est relativement constante. L'efficacité maximale est réalisé par Sélection du MOSFET côté haute qui a le les pertes de conduction correspondant aux pertes de commutation. Assurez-vous que ISL6251, ISL6251A LGATE gâté conducteur peut fournir suffisamment taux actuel périssables prévente à partir de conduction, qui est due à le courant injecté dans le parasite drain-source en condensateur (Miller CONDENSATEUR CGD), et causée par la tension phase ascendante de la rareté au noeud à l'instant de la high-side Transformer un MOSFET; Sinon, des problèmes inter-conduction maille se produisent. Ralentissement raisonnable tourner sur la vitesse de la MOSFET côté en connectant la résistance entre le Goupille de BOOT et la source d'alimentation du variateur gâté, et le haut de cinq Capacité actuelle du pilote de MOSFET côté bas gâtée aide réduire la possibilité de cross-conduction. Pour le MOSFET côté, le pire des cas conduction les pertes se produisent à la tension d'entrée minimum: L'efficacité optimale lorsqu'on les pertes de commutation égaler les pertes de conduction. Cependant, il est difficile d' calculer les pertes de commutation dans le MOSFET côté car il doit permettre facteur difficile à quantifier que influent sur ​​la tour-et temps turn-off. Ce facteur Impliquer la résistance interne MOSFET gâté, gâté charge, tension de seuil, l'inductance parasite, pull-up et pull-down résistance du conducteur gâté. La perte de commutation suivante estimations de calcul approximatif du fournisseur. Où Qgd: drainer à périssable charge, Qrr: recouvrement inverse totale Charge de la diode de corps MOSFET côté bas, ILV: inductance actuelle vallée, ILP: courant de crête d'inductance, IG, et cinq IG, la source de pointe sont la source gâtée lecteur / cinq cours du 1er trimestre, respectivement. Pour atteindre les pertes de commutation faible, il nécessite peu d'drain-périssables charge Qgd. Généralement, plus la charge entre drain et périssable, Le supérieur de la sur-résistance. Par conséquent, il est le compromis entre la résistance et sur ​​la charge de vidange à périssable. bon Sélection de MOSFET est basée sur le facteur de mérite (FORM), qui est le produit de la charge totale et la détérioration sur-résistance. Habituellement, plus la valeur de la forme, le plus le rendement pour la même application. Pour le MOSFET côté bas, la dissipation de puissance pire des cas se produit à la tension de batterie minimale et maximale d'entrée tension: Choisissez le MOSFET côté bas qui a le plus bas possible sur la résistance avec le paquet de taille moyenne comme le SO-8 et est d'un prix raisonnable. Les pertes de commutation sont notés sur émettre pour le MOSFET côté bas, car il fonctionne à zéro de commutation de tension. Choisir la diode Schottky en parallèle avec le transistor MOSFET du côté bas Q2 avec la chute de tension assez basse pour la prévente bas-côté MOSFET corps diode de Q2 lors d'un virage sur la temps mort. Cela réduit également la perte de puissance dans le haut-côté MOSFET associés à la récupération inverse de la bas-côté corps MOSFET diode Q2. BAT Peak, MAX IL 2 I = 1 + Δ D (1 D) 12 L f V je s IN, MAX RMS = - DSON 2 BAT EN août Q1, je conduction R V V P = EN rr s g, k péché gd EN LP s g, la source gd Q1, commutation de LV Q V de f je Q I f V 2 1 je Q I f V 2 P = 1 + + DSON 2 BAT EN août Q2 I R V V 1 P ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ = - ISL6251, ISL6251A 16 FN9202.2 10 mai 2006 En règle générale, sélectionnez la diode avec DC Note courant égal à un tiers du courant de charge. Une option est de choisir le combiné avec la diode Schottky dans le MOSFET GaGa emballage. Les ensembles intégrés maille travail mieux pratiquer parce qu'il ya moins inductance parasite en raison de la courte connexion. Cette diode Schottky est facultative et mesh eBay Suppression hyphes perte d'efficacité peut être tolérée. En outre, Veiller à ce que le courant d'entraînement requis totale gâté pour la MOSFET sélectionné doit être inférieur à 24mA. Jump, le total charge périssables pour les high-side et low-side MOSFET est limité par l'équation suivante: Où IGATE est le courant d'attaque totale et gâté Si eBay moins de 24mA. En substituant IGATE = 24mA et FS = 300kHz dans les rendements de l'équation ci-dessus que le périssables de la charge totale doit être inférieure à 80nC. Par conséquent, la ISL6251, ISL6251A entraîne facilement le courant de charge de la batterie jusqu'à 10 bis. Sélection de condensateur d'entrée Le condensateur d'entrée absorbe le courant d'ondulation de la Convertisseur de puissance synchrone, qui est donnée par: Cette RMS ondulation de courant doit être inférieure aux évaluée de RMS courant dans le condensateur de fiche technique. Chimies Nom-tantale (céramique, aluminium, ou OSCON) sont préférés en raison de leur résistance à la mise sous tension des courants de surtension Lorsque l'adaptateur secteur est branché sur le chargeur de batterie. Pour la batterie d'ordinateur portable applications chargées, il est recommandé que céramique condensateurs ou des condensateurs en polymère de Sanyo eBay utilisés pour un duo leur petite taille et de coût raisonnable. Le tableau 2 montre les listes de composants pour l'application typique circuit de la figure 12. Compensation de boucle de conception ISL6251, ISL6251A utilise le mode courant de fréquence constante contrôler l'architecture de la boucle pour atteindre une réponse transitoire rapide. Dans résistance PRÉCIS en série avec la sortie de courant de détection inducteur est utilisé pour la course du courant de charge, et l' signal de courant détecté est injectée dans le taux de la boucle de tension ATTEINDRE mode actuelle pour simplifier la boucle de régulation conception de la rémunération. L'inducteur est pas considéré comme un variables d'état pour le contrôle en mode courant et le système GaGa devient payable système. Il est beaucoup plus facile de concevoir la Compensateur pour stabiliser la tension de la boucle de tension de mode contrôle. La figure 14 montre le petit modèle de signal de l' synchrone régulateur abaisseur. PWM comparateur Gain Fm: Le gain PWM comparateur Fm pour le pic de contrôle en mode courant est donné par: Fonctions Power Stage de transfert La fonction de transfert F1 (S) de contrôle de tension de sortie est: Lorsque, La fonction de transfert F2 (S) de commande de courant de l'inductance est la suivante: , Où. LISTE COMPOSANTS TABLEAU 2. CHIFFRES ET PIECES fabricant C1, C10 10μF/25V condensateur céramique, Taiyo Yuden TMK325 MJ106MY X5R (3.2x2.5x1.9mm) C2, C4, C8 0.1μF/50V condensateur céramique C3, C7, C9 1μF/10V condensateur céramique, Taiyo Yuden LMK212BJ105MG C5 CONDENSATEUR 10nF céramique C6 6.8nF condensateur céramique 3300pF condensateur céramique C11 Diode Schottky D1 30V/3A, EC31QS03L (facultatif) D2, D3 diode Schottky 100mA/30V, Central Semiconductor D4 8A/30V Schottky redresseur, STPS8L30B (facultatif) L 10μH/3.8A/26mΩ, Sumida, CDRH104R-100 Q1, Q2 30V/35mΩ, FDS6912A, Fairchild. s porte GATE f je Q ≤ () EN En août BAT V RMS V V V I I. - = Signal Q3 à canal N MOSFET, 2N7002 R1 40mΩ, ± 1%, LRC-LR2512-01-R040-F, IRC R2 20mΩ, ± 1%, LRC-LR2010-01-R020-F, IRC R3 18Ω, ± 5%, (0805) R4 2.2Ω, ± 5%, (0805) R5 100kΩ, ± 5%, (0805) R6 10k, ± 5%, (0805) R7 100Ω ± 5%, (0805) R8, R11 130 K, ± 1%, (0805) R9 10.2kΩ, ± 1%, (0805) R10 4.7Ω, ± 5%, (0805) R12 20kΩ, ± 1%, (0805) R13 1.87kΩ, ± 1%, (0805) LISTE COMPOSANTS TABLEAU 2. (Suite) CHIFFRES ET PIECES fabricant M 11 VIN = ---------. () 1 Q S S 1 S V de v F S 2 o p o 2 ESR dans o 1 + + + == ω ω ω , R C 1 c o ωesr = L C Q R o p ≈ o o o LC ω = 1 () 1 Q S S 1 S R R V de je F S 2 o p o 2 z o L L en 2 + + + + == ω ω ω o o z R C ω ≈ 1 ISL6251, ISL6251A 17 FN9202.2 10 mai 2006 Gain de boucle de courant Ti (S) est le sperme impressionné suivante équation: où RT est la trans-résistance dans la boucle de courant. RT est généralement égal au produit du courant de détection Charing la résistance et le gain de l'amplificateur de détection de courant, CA2. Pour ISL6251, ISL6251A, RT = 20R1. Le gain en tension de la boucle de courant est ouvert: Lorsque, VFB est la tension de contre-réaction de la tension l'amplificateur d'erreur. Le gain de la boucle de tension de la boucle de courant fermée est donnée par: Cum DM Petit (S) >> 1, alors il peut être simplifié suit: De l'équation ci-dessus, il est démontré que le système est le système de commande de GaGa, qui a le pôle de noisette situé à Avant la moitié de la fréquence de commutation. Par conséquent, franc de type II Compensateur peut être facilement utilisé pour stabiliser le système. La figure 15 montre le compensateur de boucle de tension, et son fonction de transfert est cum impressionné suit: où Objectif de conception du compensateur: • haut gain DC • boucle de bande passante FC: • La marge de gain:> 10dB • La marge de phase: 40 ° La procédure de conception du compensateur est cum suit: . 1 Putt Compensateur zéro à: 2. Compensateur Mettez un pôle à la fréquence zéro pour atteindre DC gain élevé, et Putt autre pôle du compensateur à répétitions ESR fréquence nulle ou demi-fréquence de commutation valeur la plus faible. Le gain Tv (S) de la boucle à fréquence de croisement FC de l'unité a gagner. Par conséquent, la résistance R1 est Compensateur déterminé par: Lorsque MM est la trans-conductance de l'erreur de la boucle de tension amplificateur. Compensateur condensateur C1 est alors donnée par: Exemple: Vin = 19V, Vo = 16.8V, 2.6A = nght, FS = 300kHz, Co = 10μF/10mΩ, L = 10μH, GM = 250μs, RT = 0.8Ω, VFB = 2,1 V, FC = 20 kHz, alors Compensateur résistance R1 = 10kO. Choisissez R1 = 10kO. Mettez le compensateur zéro à 1,5 kHz. Le compensateur est condensateur C1 = 6.5nF. Par conséquent, Choisissez tension boucle compensateur: R1 = 10k, C1 = 6.5nF. Petit (S) = 0,25 RTF2 (S) M Tv (S) = KM F1 (S) AV (S) o FB V V K = () 1 T (S) T S L (S) je v v + = LV (S) 4VFB VO -------------- (RO + RL) RT ----------------------------- 1 S ωesr + ------------ 1 Sω P + ------- ------------------------ AV (S) ωP 1 ROCO =, ≈ ----------------- ωp FIGURE 14. MODEL PETIT SIGNAL DE synchrone BUCK REGULATEUR de devenir de ville iin L + 1: D + IL Cie. rc ro -Av (S) de Vcomp RT 11/Vin + Petit (S) Q valeur Tv (S) - VCA2 0.25VCA2 VindILdin () Caroline du Sud 1 S sol v v S 1 CZ je FB échantillon v ω + == R C 1 1 1 ωcz = - + R1 C1 VREF VFB VO GM VCOMP FIGURE 15. LOOP tension Compensateur FS 20 1 5 1 ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ - () o o CZ R C ω = 1 à 3 jan R1 8πfCVOCORT gmVFB = --------------------------------------- 1 CZ R 1 C 1 ω = ISL6251, ISL6251A 18 FN9202.2 10 mai 2006 Aspects de l'agencement PCB Secteur et signal couches placement sur ​​le PCB En règle générale, les couches d'alimentation doivent être rapprochés, répète sur le haut ou le bas de la carte, avec des couches de signaux sur le côté opposé de la carte. Comme exemple, la couche Agencement sur un panneau 4-couche est indiqué ci-dessous: . 1 Top Layer: les lignes de signaux, ou demi-pension pour les lignes de signaux et L'autre demi-pension pour les lignes électriques 2. Signal Ground . 3 couches de puissance: Puissance sol . 4 Couche inférieure: MOSFET de puissance, inductances et autres traces de puissance Séparer la tension d'alimentation et le chemin de circulation de courant à partir de le chemin de signal de contrôle et de niveau logique. Le contrôleur IC rester sur la couche de signal, qui est isolée par le signal terre pour les traces de signal de puissance. Placement de composants Le MOSFET de puissance devrait être proche de l'IC que le saut signaux gâté d'entraînement, le LGATE, UGATE, PHASE, et BOOT, traces peuvent être à court. Une telle place les composants de la façon que l'aire sous la IC a moins de bruit retrace avec de hauts DVD / dt et de dire / dt, tel cum signaux gâtés et les signaux de noeuds de phase. Signal Ground et Ground Power Connection. Au moins, la vaste zone raisonnable de cuivre, qui Protégez autre couplage de bruit à travers le CI, devrait être utilisé masse du signal cum sous le IC. Le meilleur lien entre les points la masse du signal et la masse de l'alimentation est au négatif CONDENSATEUR de chaque côté de la face de sortie, où il existe peu de bruit; La trace bruyant sous la CI n'est pas recommandé. GND et VDD PIN Au moins une haute qualité en céramique bouchon de découplage Si eBay utilisé pour franchir ces deux Pins. Le bouchon de découplage peut être mis près de l'IC. LGATE PIN C'est le butin du signal de commande pour le MOSFET bas Buck Converter. Le signal passant par cette trace est à la fois élevés DVD / dt et ladite haute / dt, et le pic et Charing courant de décharge est très élevé. Ces deux traces Si eBay court, large, et loin d'autres traces. S'il n'y a pas D'autres traces en parallèle avec ces traces sur une couche. PGND PIN Si les repères eBay PGND prévue sur le côté négatif de la bouchon de sortie pertinente avec des traces distinctes. Le côté négatif de la capacité de production doit être proche du noeud source de le transistor MOSFET de fond. Cette trace est le chemin de LGATE de retour. PIN PHASE Cette trace doit être court, et positionné à l'écart des autres faibles traces de signal. Ce nœud a la très grande dvds / dt avec le excursion de tension de la tension d'entrée à la masse. n ° trace devrait être en parallèle avec elle. Cette trace est également le trajet de retour pour UGATE. Connectez cette broche à la MOSFET côté la source. UGATE PIN Cette broche a la forme carrée de forme d'onde avec de hauts DVD / dt. il Fournisseur gâché le courant d'attaque pour charger et décharger le haut MOSFET à haute voix / dt. Cette trace devrait être large, Bref, et loin des autres traces semblables à la LGATE. PIN BOOT Disons / dt de cette broche est la cum cum UGATE élevé; Par conséquent, cette trace doit être court cum cum réalisable. CSOP, Cson Pins La résistance de détection de courant connecte à l'Cson et l' CSOP Pins à travers le filtre passe-bas. La broche est également Cson AS utilisé les évaluations de tension de la batterie. Les traces Si eBay loin de la haute DVD / dt et dire / dit Pins comme PHASE, BOOT Pins. En général, la résistance de détection de courant doit être proche à l'IC. D'autres dispositions de mise en page doit être ajustée en conséquence. EN PIN Cet axe reste à haute et basse au ralenti permettent la mode et de la mode est relativement robuste. Activer signaux doivent se référer au signal sol. DCIN PIN Cet axe se connecte à AC tension de sortie de l'adaptateur, et devrait eBay moins sensible au bruit. Taille du cuivre pour le noeud de phase La capacité de phase devrait être aussi des taux très bas minimiser sonner. Il serait préférable de limiter la taille de la Noeud CUIVRE PHASE en stricte conformité avec le courant et la gestion thermique de l'application. Identifier le terrain secteur et signal Les condensateurs des convertisseurs d'entrée et de sortie, la source terminale de la commutation MOSFET bas Si PGND connecter à la terre électrique. Les autres composants doivent connecter à la masse du signal. Signal et masse de l'alimentation sont tiède ensemble à un moment donné. Serrage condensateur pour MOSFET de commutation Il est recommandé que les bouchons en céramique utilisés eBay étroitement reliée au drain du MOSFET côté, et la la source du MOSFET côté bas. Cela réduit la capacité le bruit et la perte du MOSFET de puissance. ISL6251, ISL6251A 19 FN9202.2 10 mai 2006 ISL6251, ISL6251A Quad Flat No-Lead paquet en plastique (QFN) Micro Cadre de plomb paquet en plastique (MLFP) INDEX D1 / 2 D1 D / 2 ré E1 / 2 E / 2 E A 2x 0,15 B C 0,10 M C A B A N plan SIÈGES N 6 3 2 23 et 1 1 0,08 TERMINAL POUR ODD / SIDE POUR TERMINAL Même / SIDE C C SECTION "C-C" NX b A1 C 2x 0,15 C 0,15 2x B 0 REF. (ND-1) Xe (NRE-E1F) X. et 5 A1 4x P A C C 4x P B 2x 0,15 C A A2 A3 D2 D2 E2 E2 / 2 TYPE TERMINAL VUE DE CÔTÉ VUE DE DESSUS 7 VUE DU BAS 7 5 CL CL et e E1 2 NX k NX b 8 NX L 8 8 9 ZONE 9 4x / / C 0,10 9 (La référence B) (Donnée A) INDEX 6 ZONE N 9 CORNER Options 4x L1 L 10 l1 L 10 L28.5x5 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VHHD-1 ISSUE I) SYMBOL MILLIMETERS MIN NOMINAL MAX NOTES A 0.80 0.90 1.00 - A1 - 0.02 0.05 - A2 - 0.65 1.00 9 A3 0.20 REF 9 b 0.18 0.25 0.30 5,8 D 5.00 BSC - D1 4.75 BSC 9 D2 2.95 3.10 3.25 7,8 E 5.00 BSC - E1 4.75 BSC 9 E2 2.95 3.10 3.25 7,8 e 0.50 BSC - k 0.20 - - - L 0.50 0.60 0.75 8 N 28 2 Nd 7 3 Ne 7 3 P - - 0.60 9 θ - - 12 9 Rev1 11/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation. 20 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN9202.2 May 10, 2006 ISL6251, ISL6251A Shrink Small Outline Plastic Packages (SSOP) Quarter Size Outline Plastic Packages (QSOP) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.10mm (0.004 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: INCHES. Converted millimeter dimensions are not necessarily exact. α INDEX AREA E D N 1 2 3 -B- 0.17(0.007) M C A B S e -AB M -CA1 A SEATING PLANE 0.10(0.004) h x 45° C H 0.25(0.010) M B M L 0.25 0.010 GAUGE PLANE A2 M24.15 24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE (0.150” WIDE BODY) SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A 0.053 0.069 1.35 1.75 - A1 0.004 0.010 0.10 0.25 - A2 - 0.061 - 1.54 - B 0.008 0.012 0.20 0.30 9 C 0.007 0.010 0.18 0.25 - D 0.337 0.344 8.55 8.74 3 E 0.150 0.157 3.81 3.98 4 e 0.025 BSC 0.635 BSC - H 0.228 0.244 5.80 6.19 - h 0.0099 0.0196 0.26 0.49 5 L 0.016 0.050 0.41 1.27 6 N 24 24 7 α 0° 8° 0° 8° - Rev2 6/04 1 ® FN3282.13 DG411, DG412, DG413 Monolithic Quad SPST, CMOS Analog Switches The DG411 series monolithic CMOS analog switches are drop-in replacements for the popular DG211 and DG212 series devices. They include four independent single pole throw (SPST) analog switches, and TTL and CMOS compatible digital inputs. These switches feature lower analog ON-resistance (<35Ω) and faster switch time (tON<175ns) compared to the DG211 or DG212. Charge injection has been reduced, simplifying sample and hold applications. The improvements in the DG411 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling 40VP-P signals. Power supplies may be single-ended from +5V to 44V, or split from ±5V to ±20V. The four switches are bilateral, equally matched for AC or bidirectional signals. The ON-resistance variation with analog signals is quite low over a ±15V analog input range. la switches in the DG411 and DG412 are identical, differing only in the polarity of the selection logic. Two of the switches in the DG413 (#2 and #3) use the logic of the DG211 and DG411 (i.e., a logic “0” turns the switch ON) and the other two switches use DG212 and DG412 positive logic. This permits independent control of turn-on and turn-off times for SPDT configurations, permitting “break-before-make” or “makebefore- break” operation with a minimum of external logic. Features • ON-Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . .35Ω • Low Power Consumption (PD) . . . . . . . . . . . . . . . . . .<35μW • Fast Switching Action - tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175ns - tOFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145ns • Low Charge Injection • Upgrade from DG211, DG212 • TTL, CMOS Compatible • Single or Split Supply Operation • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Audio Switching • Battery Operated Systems • Data Acquisition • Hi-Rel Systems • Sample and Hold Circuits • Communication Systems • Automatic Test Equipment Data Sheet June 20, 2007 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1993, 1994, 1997, 1999, 2002, 2004-2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 2 FN3282.13 June 20, 2007 Pinout DG411, DG412, DG413 (16 LD PDIP, SOIC, TSSOP) TOP VIEW Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # DG411DJ DG411DJ -40 to +85 16 Ld PDIP E16.3 DG411DJZ (Note) DG411DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3 DG411DY* DG411DY -40 to +85 16 Ld SOIC (150 mil) M16.15 DG411DYZ* (Note) DG411DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15 DG411DVZ* (Note) DG411 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173 DG412DJ DG412DJ -40 to +85 16 Ld PDIP E16.3 DG412DJZ (Note) DG412DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3 DG412DY* DG412DY -40 to +85 16 Ld SOIC (150 mil) M16.15 DG412DYZ* (Note) DG412DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15 DG412DVZ* (Note) DG412 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173 DG413DJ DG413DJ -40 to +85 16 Ld PDIP E16.3 DG413DJZ (Note) DG413DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3 DG413DY* DG413DY -40 to +85 16 Ld SOIC (150 mil) M16.15 DG413DYZ* (Note) DG413DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15 DG413DVZ* (Note) DG413 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173 *Add “-T” suffix for tape and reel. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. TRUTH TABLE LOGIC DG411 DG412 DG413 SWITCH SWITCH SWITCH 1, 4 SWITCH 2, 3 0 On Off Off On 1 Off On On Off NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 IN1 D1 S1 VGND S4 IN4 D4 IN2 S2 V+ VL S3 D3 IN3 D2 Pin Descriptions PIN SYMBOL DESCRIPTION 1 IN1 Logic Control for Switch 1. 2 D1 Drain (Output) Terminal for Switch 1. 3 S1 Source (Input) Terminal for Switch 1. 4 V- Negative Power Supply Terminal. 5 GND Ground Terminal (Logic Common). 6 S4 Source (Input) Terminal for Switch 4. 7 D4 Drain (Output) Terminal for Switch 4. 8 IN4 Logic Control for Switch 4. 9 IN3 Logic Control for Switch 3. 10 D3 Drain (Output) Terminal for Switch 3. 11 S3 Source (Input) Terminal for Switch 3. 12 VL Logic Reference Voltage. 13 V+ Positive Power Supply Terminal (Substrate). 14 S2 Source (Input) Terminal for Switch 2. 15 D2 Drain (Output) Terminal for Switch 2. 16 IN2 Logic Control for Switch 2. DG411, DG412, DG413 3 FN3282.13 June 20, 2007 Functional Diagrams Four SPST Switches per Package Switches Shown for Logic “1” Input Schematic Diagram (1 Channel) S1 D1 S2 D2 S3 D3 S4 D4 DG411 S1 D1 S2 D2 S3 D3 S4 D4 IN1 DG412 IN2 IN3 IN4 S1 D1 S2 D2 S3 D3 S4 D4 IN1 DG413 IN2 IN3 IN4 IN2 IN3 IN4 IN1 S V+ INX GND VVVL ré V+ DG411, DG412, DG413 4 FN3282.13 June 20, 2007 Absolute Maximum Ratings Thermal Information V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44V GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25V VL. . . . . . . . . . . . . . . . . .............(GND -0.3V) to (V+) +0.3V Digital Inputs, VS, VD (Note 1). . . . . (V-) -2V to (V+) + 2V or 30mA, Whichever Occurs First Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . 100mA Operating Conditions Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V (Max) Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V (Max) Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (Min) Input Rise and Fall Time ..................... .... ...≤20ns Thermal Resistance (Typical, Note 2) θJA (°C/W) PDIP Package* ............................ 90 SOIC Package ................. . . . . . . . . . . . . 110 TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .150 Maximum Junction Temperature (Plastic Packages). . . . . . .+150°C Maximum Storage Temperature Range. . . . . . . . ..-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . ..see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp (SOIC and TSSOP - Lead Tips Only) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. 2. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS DYNAMIC CHARACTERISTICS Turn-ON Time, tON RL = 300Ω, CL = 35pF, VS = ±10V (Figure 1) 25 - 110 175 ns 85 - - 220 ns Turn-OFF Time, tOFF 25 - 100 145 ns 85 - - 160 ns Break-Before-Make Time Delay DG413 Only, RL = 300Ω, CL = 35pF (Figure 2) 25 - 25 - ns Charge Injection, Q (Figure 3) CL = 10nF, VG = 0V, RG = 0Ω 25 - 5 - pC OFF Isolation (Figure 5) RL = 50Ω, CL = 5pF, f = 1MHz 25 - 68 - dB Crosstalk (Channel-to-Channel), (Figure 4) 25 - -85 - dB Source OFF Capacitance, CS(OFF) f = 1MHz (Figure 6) 25 - 9 - pF Drain OFF Capacitance, CD(OFF) 25 - 9 - pF Channel ON Capacitance, CD(ON) + CS(ON) 25 - 35 - pF DIGITAL INPUT CHARACTERISTICS Input Current VIN Low, IIL VIN Under Test = 0.8V, All Others = 2.4V Full -0.5 0.005 0.5 μA Input Current VIN High, IIH VIN Under Test = 2.4V, All Others = 0.8V Full -0.5 0.005 0.5 μA ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG IS = 10mA Full -15 - 15 V Drain-Source ON Resistance, rDS(ON) IS = 10mA, VD = ±8.5V, V+ = 13.5V, V- = -13.5V 25 - 25 35 Ω Full - - 45 Ω ± ± DG411, DG412, DG413 5 FN3282.13 June 20, 2007 Source OFF Leakage Current, IS(OFF) V+ = 16.5V, V- = -16.5V, VD = ±15.5V, VS = 15.5V 25 -0.25 ±0.1 0.25 nA Full -5 - +5 nA Drain OFF Leakage Current, ID(OFF) 25 -0.25 ±0.1 0.25 nA Full -5 - +5 nA Channel ON Leakage Current, ID(ON) + IS(ON) V+ = 16.5V, V- = -16.5V, VS = VD = ±15.5V 25 -0.4 ±0.1 0.4 nA Full -10 - +10 nA POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V 25 - 0.0001 1 μA 85 - - 5 μA Negative Supply Current, I- 25 -1 -0.0001 - μA 85 -5 - - μA Logic Supply Current, IL 25 - 0.0001 1 μA 85 - - 5 μA Ground Current, IGND 25 -1 -0.0001 - μA 85 -5 - - μA Electrical Specifications (Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS DYNAMIC CHARACTERISTICS Turn-ON Time, tON RL = 300Ω, CL = 35pF, VS = 8V, (Figure 1) 25 - 175 250 ns 85 - - 315 ns Turn-OFF Time, tOFF 25 - 95 125 ns 85 - - 140 ns Break-Before-Make Time Delay DG413 Only, RL = 300Ω, CL = 35pF, VS = 8V 25 - 25 - ns Charge Injection, Q CL = 10nF, VG = 6.0V, RG = 0Ω 25 - 25 - pC ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Full 0 - 12 V Drain-Source ON-Resistance, rDS(ON) IS = -10mA, VD = 3V, 8V V+ = 10.8V 25 - 40 80 Ω Full - - 100 Ω Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS ± DG411, DG412, DG413 6 FN3282.13 June 20, 2007 POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 13.2V, V- = 0V VIN = 0V or 5V 25 - 0.0001 1 μA 85 - - 5 μA Negative Supply Current, I- 25 -1 -0.0001 - μA 85 -5 - - μA Logic Supply Current, IL 25 - 0.0001 1 μA 85 - - 5 μA Ground Current, IGND 25 -1 -0.0001 - μA 85 -5 - - μA NOTES: 3. VIN = input voltage to perform proper function. 4. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 5. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Test Circuits and Waveforms VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform. NOTE: Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENTS POINTS Repeat test for all IN and S. For load conditions, see Specifications. CL includes fixture and stray capacitance. FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES FIGURE 2A. MEASUREMENT POINTS FIGURE 2B. TEST CIRCUITS FIGURE 2. BREAK-BEFORE-MAKE TIME Electrical Specifications (Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS 50% tr < 20ns tf < 20ns tOFF 90% 3V 0V VS 0V tON VO LOGIC INPUT SWITCH INPUT SWITCH OUTPUT 90% VO VS RL RL + rDS(ON) = ------------------------------------ SWITCH INPUT LOGIC INPUT S1 IN1 V+ D1 RL CL VO GND VVL +5V +15V SWITCH OUTPUT -15V tD 3V 0V VS1 0V tD LOGIC INPUT SWITCH OUTPUT SWITCH OUTPUT 90% 0V VS2 (V01) VO2 90% S1 IN1, IN2 V+ D1 RL1 CL1 VO1 GND VVL VS1 = 10V 300Ω +5V +15V S2 D2 35pF RL2 CL2 VO2 VS2 = 10V 300Ω 35pF -15V LOGIC INPUT CL includes fixture and stray capacitance. DG411, DG412, DG413 7 FN3282.13 June 20, 2007 FIGURE 3A. TEST CIRCUIT NOTE: INX dependent on switch configuration, input polarity determined by sense of switch. FIGURE 3B. MEASUREMENT POINTS FIGURE 3. CHARGE INJECTION FIGURE 4. CROSSTALK TEST CIRCUIT FIGURE 5. OFF ISOLATION TEST CIRCUIT FIGURE 6. SOURCE/DRAIN CAPACITANCES TEST CIRCUIT Test Circuits and Waveforms (Continued) V+ D1 CL VO GND VVIN = 3V RG VG SWITCH ΔVO INX OFF ON INX OFF OFF OFF ON Q = ΔVO x CL OUTPUT 0V, 2.4V ANALYZER +15V C V+ 0dBm VS SIGNAL GENERATOR RL GND IN1 VD IN2 50Ω 0V, 2.4V NC V- -15V C VD ANALYZER RL +15V 0dBm SIGNAL GENERATOR C V+ V- -15V C 0V, 2.4V VS VD INX GND +15V C V+ GND VS VD INX V- -15V C IMPEDANCE ANALYZER f = 1MHz 0V, 2.4V DG411, DG412, DG413 8 FN3282.13 June 20, 2007 Application Information Single Supply Operation The DG411, DG412, DG413 can be operated with unipolar supplies from 5V to 44V. These devices are characterized and tested for single supply operation at 12V to facilitate the majority of applications. To function properly, 12V is tied to Pins 13 and 0V is tied to Pin 4. Pin 12 still requires 5V for TTL compatible switching. Summing Amplifier When driving a high impedance, high capacitance load such as shown in Figure 7, where the inputs to the summing amplifier have some noise filtering, it is necessary to have shunt switches for rapid discharge of the filter capacitor, thus preventing offsets from occurring at the output. VIN1 R1 R2 VOUT + - C1 VIN2 R3 R4 C2 DG413 R5 R6 FIGURE 7. SUMMING AMPLIFIER DG411, DG412, DG413 9 FN3282.13 June 20, 2007 Typical Performance Curves FIGURE 8. ON RESISTANCE vs VD AND POWER SUPPLY VOLTAGE FIGURE 9. SWITCHING TIME vs TEMPERATURE FIGURE 10. LEAKAGE CURRENTS vs ANALOG VOLTAGE FIGURE 11. SUPPLY CURRENT vs INPUT SWITCHING FREQUENCY FIGURE 12. CHARGE INJECTION vs SOURCE VOLTAGE FIGURE 13. CHARGE INJECTION vs DRAIN VOLTAGE TA = +25°C 50 A: ±5V B: ±8V C: ±10V D: ±12V E: ±15V F: ±20V 45 40 35 30 25 20 15 10 5 0 -20 -15 -10 -5 0 5 10 15 20 A B C ré E fa DRAIN VOLTAGE (V) rDS(ON) (Ω) V+ = 15V, V- = -15V VL = 5V, VS = 10V tON tOFF -55 -15 5 25 45 65 85 105 125 TEMPERATURE (°C) -35 0 240 210 180 150 120 90 60 30 tON, tOFF (ns) V+ = 15V, V- = -15V VL = 5V, TA = +25°C -15 -5 0 5 10 15 VS, VD (V) -10 -60 20 10 0 -10 -20 -30 -40 -50 IS, ID (pA) IS(OFF) ID(OFF) 30 40 ID(ON) + IS(ON) ISUPPLY 100mA 1mA 100μA 10μA 1μA 100nA 10nA 10mA 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) IL I+, I- 1SW 1SW 4SW 4SW V+ = 15V, V- = -15V VL = 5V CL = 10nF CL = 1nF -15 -5 0 5 10 15 VS (V) -10 -60 60 40 20 0 -20 -40 Q (pC) 80 100 V+ = 15V, V- = -15V VL = 5V CL = 10nF CL = 1nF -15 -5 0 5 10 15 VD (V) -10 -60 60 40 20 0 -20 -40 Q (pC) 100 140 120 80 V+ = 15V, V- = -15V VL = 5V DG411, DG412, DG413 10 FN3282.13 June 20, 2007 Die Characteristics DIE DIMENSIONS: 2760mm x 1780mm x 485mm METALLIZATION: Type: SiAl Thickness: 12kÅ ±1kÅ PASSIVATION: Type: Nitride Thickness: 8kÅ ±1kÅ WORST CASE CURRENT DENSITY: 1.5 x 105 A/cm2 Metallization Mask Layout DG411, DG412, DG413 S1 (3) V- (4) GND (5) S4 (6) D1 IN1 IN2 (11) S3 (12) VL (13) V+ SUBSTRATE (14) S2 (15) D2 (2) (1) (16) D4 IN4 IN3 D3 (7) (8) (9) (10) DG411, DG412, DG413 11 FN3282.13 June 20, 2007 DG411, DG412, DG413 Thin Shrink Small Outline Plastic Packages (TSSOP) NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) α INDEX AREA E1 ré N 1 2 3 -B- 0.10(0.004) M C A B S et -Ab M -CA1 A SEATING PLANE 0.10(0.004) c E 0.25(0.010) M B M L 0.25 0.010 GAUGE PLANE A2 0.05(0.002) M16.173 16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A - 0.043 - 1.10 - A1 0.002 0.006 0.05 0.15 - A2 0.033 0.037 0.85 0.95 - b 0.0075 0.012 0.19 0.30 9 c 0.0035 0.008 0.09 0.20 - D 0.193 0.201 4.90 5.10 3 E1 0.169 0.177 4.30 4.50 4 e 0.026 BSC 0.65 BSC - E 0.246 0.256 6.25 6.50 - L 0.020 0.028 0.50 0.70 6 N 16 16 7 a 0o 8o 0o 8o - Rev1 2/02 12 FN3282.13 June 20, 2007 DG411, DG412, DG413 Dual-In-Line Plastic Packages (PDIP) NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and are measured with the leads constrained to be perpendicular to datum . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). eA -CCL E eA C eB eC -BE1 INDEX 1 2 3 N/2 N AREA SEATING BASE PLANE PLANE -CD1 B1 B et ré D1 A2 A L A1 -A- 0.010 (0.25) M C A B S E16.3 (JEDEC MS-001-BB ISSUE D) 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - D 0.735 0.775 18.66 19.68 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N 16 16 9 Rev0 12/93 13 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN3282.13 June 20, 2007 DG411, DG412, DG413 Small Outline Plastic Packages (SOIC) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. INDEX AREA E ré N 1 2 3 -B- 0.25(0.010) M C A B S et -AL B M -CA1 A SEATING PLANE 0.10(0.004) h x 45° C H 0.25(0.010) M B M α M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3859 0.3937 9.80 10.00 3 E 0.1497 0.1574 3.80 4.00 4 e 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N 16 16 7 α 0° 8° 0° 8° - Rev1 6/05 1 ® July 2004 HIP4081A 80V/2.5A Peak, High Frequency Full Bridge FET Driver The HIP4081A is a high frequency, medium voltage Full Bridge N-Channel FET driver IC, available in 20 lead plastic SOIC and DIP packages. The HIP4081A can drive every possible switch combination except those which would cause a shoot-through condition. The HIP4081A can switch at frequencies up to 1MHz and is well suited to driving Voice Coil Motors, high-frequency switching power amplifiers, and power supplies. For example, the HIP4081A can drive medium voltage brush motors, and two HIP4081As can be used to drive high performance stepper motors, since the short minimum “on-time” can provide fine micro-stepping capability. Short propagation delays of approximately 55ns maximizes control loop crossover frequencies and dead-times which can be adjusted to near zero to minimize distortion, resulting in rapid, precise control of the driven load. A similar part, the HIP4080A, includes an on-chip input comparator to create a PWM signal from an external triangle wave and to facilitate “hysteresis mode” switching. The Application Note for the HIP4081A is the AN9405. Features • Independently Drives 4 N-Channel FET in Half Bridge or Full Bridge Configurations • Bootstrap Supply Max Voltage to 95VDC • Drives 1000pF Load at 1MHz in Free Air at 50°C with Rise and Fall Times of Typically 10ns • User-Programmable Dead Time • On-Chip Charge-Pump and Bootstrap Upper Bias Supplies • DIS (Disable) Overrides Input Control • Input Logic Thresholds Compatible with 5V to 15V Logic Levels • Very Low Power Consumption • Undervoltage Protection • Pb-free Available Applications • Medium/Large Voice Coil Motors • Full Bridge Power Supplies • Switching Power Amplifiers • High Performance Motor Controls • Noise Cancellation Systems • Battery Powered Vehicles • Peripherals • U.P.S. Pinout HIP4081A (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP RANGE (°C) PACKAGE PKG. DWG. # HIP4081AIP -40 to 85 20 Ld PDIP E20.3 HIP4081AIPZ (Note) -40 to 85 20 Ld PDIP (Pb-free) E20.3 HIP4081AIB -40 to 85 20 Ld SOIC (W) M20.3 HIP4081AIBZ (Note) -40 to 85 20 Ld SOIC (W) (Pb-free) M20.3 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 BHB 1 BHI DIS VSS BLI ALI HDEL AHI LDEL AHB BHO BLO BLS VDD BHS VCC ALS ALO AHS AHO Data Sheet FN3659.7 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Harris Corporation. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 2 HIP4081A Application Block Diagram Functional Block Diagram (1/2 HIP4081A) 80V GND LOAD HIP4081A GND 12V AHI ALI BLI BHI BLO BHS BHO ALO AHS AHO CHARGE PUMP VDD AHI DIS ALI HDEL LDEL VSS TURN-ON DELAY TURN-ON DELAY DRIVER DRIVER AHB AHO AHS VCC ALO ALS CBF TO VDD (PIN 16) CBS DBS HIGH VOLTAGE BUS ≤ 80VDC +12VDC LEVEL SHIFT AND LATCH 14 10 11 12 15 13 16 7 3 6 8 9 4 BIAS SUPPLY UNDERVOLTAGE 3 Typical Application (PWM Mode Switching) 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 BHB BHI DIS VSS BLI ALI HDEL AHI LDEL AHB BHO BLO BLS VDD BHS VCC ALS ALO AHS AHO 80V 12V + - 12V DIS GND 6V GND TO OPTIONAL CURRENT CONTROLLER PWM LOAD INPUT HIP4081/HIP4081A HIP4081A 4 HIP4081A Absolute Maximum Ratings Thermal Information Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . . .-0.3V to 16V Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . .-0.3V to VDD +0.3V Voltage on AHS, BHS . . .-6.0V (Transient) to 80V (25°C to 125°C) Voltage on AHS, BHS . . .-6.0V (Transient) to 70V (-55°C to 125°C) Voltage on ALS, BLS . . . . . . .-2.0V (Transient) to +2.0V (Transient) Voltage on AHB, BHB . . . . . . . .VAHS, BHS -0.3V to VAHS, BHS +VDD Voltage on ALO, BLO . . . . . . . . . . . ..VALS, BLS -0.3V to VCC +0.3V Voltage on AHO, BHO . . . . . . .VAHS, BHS -0.3V to VAHB, BHB +0.3V Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . .-5mA to 0mA Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20V/ns NOTE: All Voltages relative to VSS, unless otherwise specified. Thermal Resistance (Typical, Note 1) θJA (°C/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85 DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75 Storage Temperature Range. . . . . . . . . . . . . . . . . . .-65°C to 150°C Operating Max.Junction Temperature . . . . . . . . . . . . . . . . . .125°C Lead Temperature (Soldering 10s)). . . . . . . . . . . . . . . . . ....300°C (For SOIC - Lead Tips Only Operating Conditions Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . +9.5V to +15V Voltage on ALS, BLS ................... .... ..-1.0V to +1.0V Voltage on AHB, BHB . . . . . . . . .VAHS, BHS +5V to VAHS, BHS +15V Input Current, HDEL and LDEL . . . . . . . . . . . . . . ..-500μA to -50μA Operating Ambient Temperature Range . . . . . . . . . ..-40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS TJ = 25°C TJS = -40°C TO 125°C MIN TYP MAX MIN MAX UNITS SUPPLY CURRENTS AND CHARGE PUMPS VDD Quiescent Current IDD All inputs = 0V 8.5 10.5 14.5 7.5 14.5 mA VDD Operating Current IDDO Outputs switching f = 500kHz 9.5 12.5 15.5 8.5 15.5 mA VCC Quiescent Current ICC All Inputs = 0V, IALO = IBLO = 0 - 0.1 10 - 20 μA VCC Operating Current ICCO f = 500kHz, No Load 1 1.25 2.0 0.8 3 mA AHB, BHB Quiescent Current - Qpump Output Current IAHB, IBHB All Inputs = 0V, IAHO = IBHO = 0 VDD = VCC = VAHB = VBHB = 10V -50 -30 -11 -60 -10 μA AHB, BHB Operating Current IAHBO, IBHBO f = 500kHz, No Load 0.6 1.2 1.5 0.5 1.9 mA AHS, BHS, AHB, BHB Leakage Current IHLK VBHS = VAHS = 80V, VAHB = VBHB = 93V - 0.02 1.0 - 10 μA AHB-AHS, BHB-BHS Qpump Output Voltage VAHB-VAHS VBHB-VBHS IAHB = IAHB = 0, No Load 11.5 12.6 14.0 10.5 14.5 V INPUT PINS: ALI, BLI, AHI, BHI, AND DIS Low Level Input Voltage VIL Full Operating Conditions - - 1.0 - 0.8 V High Level Input Voltage VIH Full Operating Conditions 2.5 - - 2.7 - V Input Voltage Hysteresis - 35 - - - mV Low Level Input Current IIL VIN = 0V, Full Operating Conditions -130 -100 -75 -135 -65 μA High Level Input Current IIH VIN = 5V, Full Operating Conditions -1 - +1 -10 +10 μA TURN-ON DELAY PINS: LDEL AND HDEL LDEL, HDEL Voltage VHDEL, VLDEL IHDEL = ILDEL = -100μA 4.9 5.1 5.3 4.8 5.4 V GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO Low Level Output Voltage VOL IOUT = 100mA 0.7 0.85 1.0 0.5 1.1 V High Level Output Voltage VCC-VOH IOUT = -100mA 0.8 0.95 1.1 0.5 1.2 V Peak Pullup Current IO+ VOUT = 0V 1.7 2.6 3.8 1.4 4.1 A 5 HIP4081A Peak Pulldown Current IO- VO UT = 12V 1.7 2.4 3.3 1.3 3.6 A Undervoltage, Rising Threshold UV+ 8.1 8.8 9.4 8.0 9.5 V Undervoltage, Falling Threshold UV- 7.6 8.3 8.9 7.5 9.0 V Undervoltage, Hysteresis HYS 0.25 0.4 0.65 0.2 0.7 V Switching Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K, CL = 1000pF. PARAMETER SYMBOL TEST CONDITIONS TJ = 25°C TJS = -40°C TO 125°C MIN TYP MAX MIN MAX UNITS Lower Turn-off Propagation Delay (ALI-ALO, BLI-BLO) TLPHL - 30 60 - 80 ns Upper Turn-off Propagation Delay (AHI-AHO, BHI-BHO) THPHL - 35 70 - 90 ns Lower Turn-on Propagation Delay (ALI-ALO, BLI-BLO) TLPLH RHDEL = RLDEL = 10K - 45 70 - 90 ns Upper Turn-on Propagation Delay (AHI-AHO, BHI-BHO) THPLH RHDEL = RLDEL = 10K - 60 90 - 110 ns Rise Time TR - 10 25 - 35 ns Fall Time TF - 10 25 - 35 ns Turn-on Input Pulse Width TPWIN-ON RHDEL = RLDEL = 10K 50 - - 50 - ns Turn-off Input Pulse Width TPWIN-OFF RHDEL = RLDEL = 10K 40 - - 40 - ns Turn-on Output Pulse Width TPWOUT-ON RHDEL = RLDEL = 10K 40 - - 40 - ns Turn-off Output Pulse Width TPWOUT-OFF RHDEL = RLDEL = 10K 30 - - 30 - ns Disable Turn-off Propagation Delay (DIS - Lower Outputs) TDISLOW - 45 75 - 95 ns Disable Turn-off Propagation Delay (DIS - Upper Outputs) TDISHIGH - 55 85 - 105 ns Disable to Lower Turn-on Propagation Delay (DIS - ALO and BLO) TDLPLH - 40 70 - 90 ns Refresh Pulse Width (ALO and BLO) TREF-PW 240 410 550 200 600 ns Disable to Upper Enable (DIS - AHO and BHO) TUEN - 450 620 - 690 ns TRUTH TABLE INPUT OUTPUT ALI, BLI AHI, BHI U/V DIS ALO, BLO AHO, BHO X X X 1 0 0 1 X 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 X X 1 X 0 0 NOTE: X signifies that input can be either a “1” or “0”. Electrical Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS TJ = 25°C TJS = -40°C TO 125°C MIN TYP MAX MIN MAX UNITS 6 HIP4081A Pin Descriptions PIN NUMBER SYMBOL DESCRIPTION 1 BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30μA out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. 2 BHI B High-side Input. Logic level input that controls BHO driver (Pin 20). BLI (Pin 5) high level input overrides BHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides BHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 3 DIS DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 4 VSS Chip negative supply, generally will be ground. 5 BLI B Low-side Input. Logic level input that controls BLO driver (Pin 18). If BHI (Pin 2) is driven high or not connected externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 6 ALI A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 7 AHI A High-side Input. Logic level input that controls AHO driver (Pin 11). ALI (Pin 6) high level input overrides AHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides AHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 8 HDEL High-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V. 9 LDEL Low-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V. 10 AHB A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30μA out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. 11 AHO A High-side Output. Connect to gate of A High-side power MOSFET. 12 AHS A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 13 ALO A Low-side Output. Connect to gate of A Low-side power MOSFET. 14 ALS A Low-side Source connection. Connect to source of A Low-side power MOSFET. 15 VCC Positive supply to gate drivers. Must be same potential as VDD (Pin 16). Connect to anodes of two bootstrap diodes. 16 VDD Positive supply to lower gate drivers. Must be same potential as VCC (Pin 15). De-couple this pin to VSS (Pin 4). 17 BLS B Low-side Source connection. Connect to source of B Low-side power MOSFET. 18 BLO B Low-side Output. Connect to gate of B Low-side power MOSFET. 19 BHS B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 20 BHO B High-side Output. Connect to gate of B High-side power MOSFET. 7 HIP4081A Timing Diagrams FIGURE 1. INDEPENDENT MODE FIGURE 2. BISTATE MODE FIGURE 3. DISABLE FUNCTION U/V = DIS = 0 XLI XHI XLO XHO TLPHL THPHL THPLH TLPLH TR (10% - 90%) TF (10% - 90%) X = A OR B, A AND B HALVES OF BRIDGE CONTROLLER ARE INDEPENDENT U/V = DIS = 0 XLI XHI = HI OR NOT CONNECTED XLO XHO (10% - 90%) (10% - 90%) U/V OR DIS XLI XHI XLO XHO TDLPLH TDIS TUEN TREF-PW 8 HIP4081A Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified FIGURE 4. QUIESCENT IDD SUPPLY CURRENT vs VDD SUPPLY VOLTAGE FIGURE 5. IDDO, NO-LOAD IDD SUPPLY CURRENT vs FREQUENCY (kHz) FIGURE 6. SIDE A, B FLOATING SUPPLY BIAS CURRENT vs FREQUENCY (LOAD = 1000pF) FIGURE 7. ICCO, NO-LOAD ICC SUPPLY CURRENT vs FREQUENCY (kHz) TEMPERATURE FIGURE 8. IAHB, IBHB, NO-LOAD FLOATING SUPPLY BIAS CURRENT vs FREQUENCY FIGURE 9. ALI, BLI, AHI, BHI LOW LEVEL INPUT CURRENT IIL vs TEMPERATURE 6 8 10 12 14 2.0 4.0 6.0 8.0 10.0 12.0 14.0 IDD SUPPLY CURRENT (mA) VDD SUPPLY VOLTAGE (V) 0 100 200 300 400 500 600 700 800 900 1000 8.0 8.5 9.0 9.5 10.0 10.5 11.0 IDD SUPPLY CURRENT (mA) SWITCHING FREQUENCY (kHz) 0 100 200 300 400 500 600 700 800 900 1000 0.0 5.0 10.0 15.0 20.0 25.0 30.0 FLOATING SUPPLY BIAS CURRENT (mA) SWITCHING FREQUENCY (kHz) 0 100 200 300 400 500 600 700 800 900 1000 0.0 1.0 2.0 3.0 4.0 5.0 ICC SUPPLY CURRENT (mA) SWITCHING FREQUENCY (kHz) 75°C 25°C 125°C -40°C 0°C 0.5 1 1.5 2 2.5 0 200 400 600 800 1000 FLOATING SUPPLY BIAS CURRENT (mA) SWITCHING FREQUENCY (kHz) -50 -25 0 25 50 75 100 125 -120 -110 -100 -90 LOW LEVEL INPUT CURRENT (μA) JUNCTION TEMPERATURE (°C) 9 HIP4081A Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K and TA = 25°C, Unless Otherwise Specified FIGURE 10. AHB - AHS, BHB - BHS NO-LOAD CHARGE PUMP VOLTAGE vs TEMPERATURE FIGURE 11. UPPER DISABLE TURN-OFF PROPAGATION DELAY TDISHIGH vs TEMPERATURE FIGURE 12. DISABLE TO UPPER ENABLE, TUEN, PROPAGATION DELAY vs TEMPERATURE FIGURE 13. LOWER DISABLE TURN-OFF PROPAGATION DELAY TDISLOW vs TEMPERATURE FIGURE 14. TREF-PW REFRESH PULSE WIDTH vs TEMPERATURE FIGURE 15. DISABLE TO LOWER ENABLE TDLPLH PROPAGATION DELAY vs TEMPERATURE -40 -20 0 20 40 60 80 100 120 10.0 11.0 12.0 13.0 14.0 15.0 NO-LOAD FLOATING CHARGE PUMP VOLTAGE (V) JUNCTION TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 30 40 50 60 70 80 PROPAGATION DELAY (ns) JUNCTION TEMPERATURE (°C) 425 450 475 500 525 -50 -25 0 25 50 75 100 125 150 JUNCTION TEMPERATURE (°C) PROPAGATION DELAY (ns) -40 -20 0 20 40 60 80 100 120 30 40 50 60 70 80 PROPAGATION DELAY (ns) JUNCTION TEMPERATURE (°C) 350 375 400 425 450 -50 -25 0 25 50 75 100 125 150 REFRESH PULSE WIDTH (ns) JUNCTION TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 20 30 40 50 60 70 80 PROPAGATION DELAY (ns) JUNCTION TEMPERATURE (°C) 10 HIP4081A FIGURE 16. UPPER TURN-OFF PROPAGATION DELAY THPHL vs TEMPERATURE FIGURE 17. UPPER TURN-ON PROPAGATION DELAY THPLH vs TEMPERATURE FIGURE 18. LOWER TURN-OFF PROPAGATION DELAY TLPHL vs TEMPERATURE FIGURE 19. LOWER TURN-ON PROPAGATION DELAY TLPLH vs TEMPERATURE FIGURE 20. GATE DRIVE FALL TIME TF vs TEMPERATURE FIGURE 21. GATE DRIVE RISE TIME TR vs TEMPERATURE Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K and TA = 25°C, Unless Otherwise Specified (Continued) -40 -20 0 20 40 60 80 100 120 20 30 40 50 60 70 80 PROPAGATION DELAY (ns) JUNCTION TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 20 30 40 50 60 70 80 PROPAGATION DELAY (ns) JUNCTION TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 20 30 40 50 60 70 80 PROPAGATION DELAY (ns) JUNCTION TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 20 30 40 50 60 70 80 PROPAGATION DELAY (ns) JUNCTION TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 8.5 9.5 10.5 11.5 12.5 13.5 GATE DRIVE FALL TIME (ns) JUNCTION TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 8.5 9.5 10.5 11.5 12.5 13.5 TURN-ON RISE TIME (ns) JUNCTION TEMPERATURE (°C) 11 HIP4081A Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified FIGURE 22. VLDEL, VHDEL VOLTAGE vs TEMPERATURE FIGURE 23. HIGH LEVEL OUTPUT VOLTAGE VCC - VOH vs BIAS SUPPLY AND TEMPERATURE AT 100mA FIGURE 24. LOW LEVEL OUTPUT VOLTAGE VOL vs BIAS SUPPLY AND TEMPERATURE AT 100mA FIGURE 25. PEAK PULLDOWN CURRENT IO vs BIAS SUPPLY VOLTAGE FIGURE 26. PEAK PULLUP CURRENT IO+ vs BIAS SUPPLY VOLTAGE FIGURE 27. LOW VOLTAGE BIAS CURRENT IDD (LESS QUIESCENT COMPONENT) vs FREQUENCY AND GATE LOAD CAPACITANCE -40 -20 0 20 40 60 80 100 120 4.0 4.5 5.0 5.5 6.0 HDEL, LDEL INPUT VOLTAGE (V) JUNCTION TEMPERATURE (°C) 10 12 14 0 250 500 750 1000 1250 1500 VCC - VOH (mV) BIAS SUPPLY VOLTAGE (V) 75°C 25°C 125°C -40°C 0°C 12 14 0 250 500 750 1000 1250 1500 VOL (mV) BIAS SUPPLY VOLTAGE (V) 10 75°C 25°C 125°C -40°C 0°C 6 7 8 9 10 11 12 13 14 15 16 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 GATE DRIVE SINK CURRENT (A) VDD, VCC, VAHB, VBHB (V) 6 7 8 9 10 11 12 13 14 15 16 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 GATE DRIVE SINK CURRENT (A) VDD, VCC, VAHB, VBHB (V) 1 2 5 10 20 50 100 200 500 1000 0.1 1 10 100 500 50 5 0.5 200 20 2 0.2 LOW VOLTAGE BIAS CURRENT (mA) SWITCHING FREQUENCY (kHz) 100pF 1,000pF 10,000pF 3,000pF 12 HIP4081A FIGURE 28. HIGH VOLTAGE LEVEL-SHIFT CURRENT vs FREQUENCY AND BUS VOLTAGE FIGURE 29. UNDERVOLTAGE LOCKOUT vs TEMPERATURE FIGURE 30. MINIMUM DEAD-TIME vs DEL RESISTANCE Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified (Continued) 10 20 50 100 200 500 1000 10 100 1000 20 50 200 500 LEVEL-SHIFT CURRENT (μA) SWITCHING FREQUENCY (kHz) 8.2 8.4 8.6 8.8 9.0 50 25 0 25 50 75 100 125 150 UV+ UVTEMPERATURE (°C) BIAS SUPPLY VOLTAGE, VDD (V) 10 50 100 150 200 250 0 30 60 90 120 150 HDEL/LDEL RESISTANCE (kΩ) DEAD-TIME (ns) 13 HIP4081A 1 2 3 1 2 3 1 2 3 5 6 1 2 3 1 2 13 12 1 2 3 11 10 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 L1 R21 Q1 Q3 Q4 R22 L2 R23 C1 C3 JMPR1 R24 R30 R31 C2 R34 C4 CR2 CR1 Q2 JMPR5 JMPR3 JMPR2 JMPR4 R33 C5 C6 CX CY C8 U1 CW CW + B+ IN2 IN1 BO OUT/BLI IN-/AHI COM IN+/ALI +12V +12V BLS AO HEN/BHI ALS CD4069UB CD4069UB CD4069UB CD4069UB HIP4080A/81A SECTION CONTROL LOGIC POWER SECTION DRIVER SECTION AHB AHO LDEL AHS HDEL ALO IN-/AHI ALS IN+/ALI VCC OUT/BLI VDD VSS BLS DIS BLO HEN/BHI BHS BHB BHO R29 U2 U2 U2 U2 3 4 9 8 R32 je O O CD4069UB CD4069UB ENABLE IN U2 U2 NOTES: 1. DEVICE CD4069UB PIN 7 = COM, PIN 14 = +12V. 2. COMPONENTS L1, L2, C1, C2, CX, CY, R30, R31, NOT SUPPLIED. REFER TO APPLICATION NOTE FOR DESCRIPTION OF INPUT LOGIC OPERATION TO DETERMINE JUMPER LOCATIONS FOR JMPR1 - JMPR4. FIGURE 31. HIP4081A EVALUATION PC BOARD SCHEMATIC 14 HIP4081A R22 1 Q3 L1 JMPR2 JMPR5 R31 R33 CR2 R23 R24 R27 R28 R26 1 Q4 1 JMPR3 Q2 U1 R21 GND L2 C3 C4 JMPR4 JMPR1 R30 CR1 U2 R34 R32 je O C8 R29 C7 C6 C5 CY CX 1 Q1 COM +12V B+ IN1 IN2 AHO BHO ALO BLO BLS BLS LDEL HDEL DIS ALS ALS O + + HIP4080/81 FIGURE 32. HIP4081A EVALUATION BOARD SILKSCREEN 15 HIP4081A Dual-In-Line Plastic Packages (PDIP) NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and are measured with the leads constrained to be perpendicular to datum . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). eA -CCL E eA C eB eC -BE1 INDEX 1 2 3 N/2 N AREA SEATING BASE PLANE PLANE -CD1 B1 B et ré D1 A2 A L A1 -A- 0.010 (0.25) M C A B S E20.3 (JEDEC MS-001-AD ISSUE D) 20 LEAD DUAL-IN-LINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.55 1.77 8 C 0.008 0.014 0.204 0.355 - D 0.980 1.060 24.89 26.9 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N 20 20 9 Rev0 12/93 16 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com HIP4081A Small Outline Plastic Packages (SOIC) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. INDEX AREA E ré N 1 2 3 -B- 0.25(0.010) M C A B S et -AL B M -CA1 A SEATING PLANE 0.10(0.004) h x 45o C H μ 0.25(0.010) M B M α M20.3 (JEDEC MS-013-AC ISSUE C) 20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.014 0.019 0.35 0.49 9 C 0.0091 0.0125 0.23 0.32 - D 0.4961 0.5118 12.60 13.00 3 E 0.2914 0.2992 7.40 7.60 4 e 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N 20 20 7 α 0o 8o 0o 8o - Rev1 1/02 http://www.farnell.com/datasheets/32553.pdf 1 ® FN3663.5 HFA3101 Gilbert Cell UHF Transistor Array The HFA3101 is an all NPN transistor array configured as a Multiplier Cell. Based on Intersil’s bonded wafer UHF-1 SOI process, this array achieves very high fT (10GHz) while maintaining excellent hFE and VBE matching characteristics that have been maximized through careful attention to circuit design and layout, making this product ideal for communication circuits. For use in mixer applications, the cell provides high gain and good cancellation of 2nd order distortion terms. Pinout HFA3101(SOIC) TOP VIEW Features •Pb-free Available as an Option •High Gain Bandwidth Product (fT) . . . . . . . . . . . . .10GHz •High Power Gain Bandwidth Product. . . . . . . . . . . .5GHz •Current Gain (hFE). . . . . . . . . . . . . . . . . . . . . . . . . . . ..70 •Low Noise Figure (Transistor) . . . . . . . . . . . . . . . . .3.5dB •Excellent hFE and VBE Matching •Low Collector Leakage Current . . . . . . . . . . . . . .<0.01nA •Pin to Pin Compatible to UPA101 Applications •Balanced Mixers •Multipliers •Demodulators/Modulators •Automatic Gain Control Circuits •Phase Detectors •Fiber Optic Signal Processing •Wireless Communication Systems •Wide Band Amplification Stages •Radio and Satellite Communications •High Performance Instrumentation Ordering Information PART NUMBER (BRAND) TEMP. RANGE (°C) PACKAGE PKG. DWG. # HFA3101B (H3101B) -40 to 85 8 Ld SOIC M8.15 HFA3101BZ (H3101B) (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15 HFA3101B96 (H3101B) -40 to 85 8 Ld SOIC Tape and Reel M8.15 HFA3101BZ96 (H3101B) (Note) -40 to 85 8 Ld SOIC Tape and Reel (Pb-free) M8.15 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C. 12348765Q5Q6Q1Q2Q3Q4NOTE: Q5 and Q6 - 2 Paralleled 3μm x 50μm Transistors Q1, Q2, Q3, Q4 - Single 3μm x 50μm Transistors Data Sheet September 2004 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 1998, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 2 Absolute Maximum Ratings Thermal Information VCEO, Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . .8.0V VCBO, Collector to Base Voltage. . . . . . . . . . . . . . . . . . . . . . .12.0V VEBO, Emitter to Base Voltage . . . . . . . . . . . . . . . . . . . . . . . . .5.5V IC, Collector Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30mA Operating Conditions Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . .-40oC to 85oC Thermal Resistance (Typical, Note 1)θJA (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . ..175oC Maximum Junction Temperature (Plastic Package). . . . . . . ..150oC Maximum Storage Temperature Range. . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . ..300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsTA = 25oC PARAMETER TEST CONDITIONS (NOTE 2) TEST LEVEL MIN TYP MAX UNITS Collector to Base Breakdown Voltage, V(BR)CBO, Q1 thru Q6 IC = 100μA, IE = 0 A 12 18 - V Collector to Emitter Breakdown Voltage, V(BR)CEO, Q5 and Q6 IC = 100μA, IB = 0 A 8 12 - V Emitter to Base Breakdown Voltage, V(BR)EBO, Q1 thru Q6 IE = 10μA, IC = 0 A 5.5 6 - V Collector Cutoff Current, ICBO, Q1 thru Q4 VCB = 8V, IE = 0 A - 0.1 10 nA Emitter Cutoff Current, IEBO, Q5 and Q6 VEB = 1V, IC = 0 A - - 200 nA DC Current Gain, hFE, Q1 thru Q6 IC = 10mA, VCE = 3V A 40 70 - Collector to Base Capacitance, CCB Q1 thru Q4 VCB = 5V, f = 1MHz C - 0.300 - pF Q5 and Q6 - 0.600 - pF Emitter to Base Capacitance, CEB Q1 thru Q4 VEB = 0, f = 1MHz B - 0.200 - pF Q5 and Q6 - 0.400 - pF Current Gain-Bandwidth Product, fT Q1 thru Q4 IC = 10mA, VCE = 5V C - 10 - GHz Q5 and Q6 IC = 20mA, VCE = 5V C - 10 - GHz Power Gain-Bandwidth Product, fMAX Q1 thru Q4 IC = 10mA, VCE = 5V C - 5 - GHz Q5 and Q6 IC = 20mA, VCE = 5V C - 5 - GHz Available Gain at Minimum Noise Figure, GNFMIN, Q5 and Q6 IC = 5mA, VCE = 3V f = 0.5GHz C - 17.5 - dB f = 1.0GHz C - 11.9 - dB Minimum Noise Figure, NFMIN, Q5 and Q6 IC = 5mA, VCE = 3V f = 0.5GHz C - 1.7 - dB f = 1.0GHz C - 2.0 - dB 50Ω Noise Figure, NF50Ω, Q5 and Q6 IC = 5mA, VCE = 3V f = 0.5GHz C - 2.25 - dB f = 1.0GHz C - 2.5 - dB DC Current Gain Matching, hFE1/hFE2, Q1 and Q2, Q3 and Q4, and Q5 and Q6 IC = 10mA, VCE = 3V A 0.9 1.0 1.1 Input Offset Voltage, VOS, (Q1 and Q2), (Q3 and Q4), (Q5 and Q6) IC = 10mA, VCE = 3V A - 1.5 5 mV Input Offset Current, IC, (Q1 and Q2), (Q3 and Q4), (Q5 and Q6) IC = 10mA, VCE = 3V A - 5 25 μA Input Offset Voltage TC, dVOS/dT, (Q1 and Q2, Q3 and Q4, Q5 and Q6) IC = 10mA, VCE = 3V C - 0.5 - μV/oC Collector to Collector Leakage, ITRENCH-LEAKAGE ΔVTEST = 5V B - 0.01 - nA NOTE: 2. Test Level: A. Production Tested, B. Typical or Guaranteed Limit Based on Characterization, C. Design Typical for Information Only. HFA3101 3-3 PSPICE Model for a 3 μm x 50μm Transistor .Model NUHFARRY NPN + (IS = 1.840E-16 XTI = 3.000E+00 EG = 1.110E+00 VAF = 7.200E+01 + VAR = 4.500E+00 BF = 1.036E+02 ISE = 1.686E-19 NE = 1.400E+00 + IKF = 5.400E-02 XTB = 0.000E+00 BR = 1.000E+01 ISC = 1.605E-14 + NC = 1.800E+00 IKR = 5.400E-02 RC = 1.140E+01 CJC = 3.980E-13 + MJC = 2.400E-01 VJC = 9.700E-01 FC = 5.000E-01 CJE = 2.400E-13 + MJE = 5.100E-01 VJE = 8.690E-01 TR = 4.000E-09 TF = 10.51E-12 + ITF = 3.500E-02 XTF = 2.300E+00 VTF = 3.500E+00 PTF = 0.000E+00 + XCJC = 9.000E-01 CJS = 1.689E-13 VJS = 9.982E-01 MJS = 0.000E+00 + RE = 1.848E+00 RB = 5.007E+01 RBM = 1.974E+00 KF = 0.000E+00 + AF = 1.000E+00) Common Emitter S-Parameters of 3 μm x 50μm Transistor FREQ. (Hz) |S11| PHASE(S11) |S12| PHASE(S12) |S21| PHASE(S21) |S22| PHASE(S22) VCE = 5V and IC = 5mA 1.0E+08 0.83 -11.78 1.41E-02 78.88 11.07 168.57 0.97 -11.05 2.0E+08 0.79 -22.82 2.69E-02 68.63 10.51 157.89 0.93 -21.35 3.0E+08 0.73 -32.64 3.75E-02 59.58 9.75 148.44 0.86 -30.44 4.0E+08 0.67 -41.08 4.57E-02 51.90 8.91 140.36 0.79 -38.16 5.0E+08 0.61 -48.23 5.19E-02 45.50 8.10 133.56 0.73 -44.59 6.0E+08 0.55 -54.27 5.65E-02 40.21 7.35 127.88 0.67 -49.93 7.0E+08 0.50 -59.41 6.00E-02 35.82 6.69 123.10 0.62 -54.37 8.0E+08 0.46 -63.81 6.27E-02 32.15 6.11 119.04 0.57 -58.10 9.0E+08 0.42 -67.63 6.47E-02 29.07 5.61 115.57 0.53 -61.25 1.0E+09 0.39 -70.98 6.63E-02 26.45 5.17 112.55 0.50 -63.96 1.1E+09 0.36 -73.95 6.75E-02 24.19 4.79 109.91 0.47 -66.31 1.2E+09 0.34 -76.62 6.85E-02 22.24 4.45 107.57 0.45 -68.37 1.3E+09 0.32 -79.04 6.93E-02 20.53 4.15 105.47 0.43 -70.19 1.4E+09 0.30 -81.25 7.00E-02 19.02 3.89 103.57 0.41 -71.83 1.5E+09 0.28 -83.28 7.05E-02 17.69 3.66 101.84 0.40 -73.31 1.6E+09 0.27 -85.17 7.10E-02 16.49 3.45 100.26 0.39 -74.66 1.7E+09 0.25 -86.92 7.13E-02 15.41 3.27 98.79 0.38 -75.90 1.8E+09 0.24 -88.57 7.17E-02 14.43 3.10 97.43 0.37 -77.05 1.9E+09 0.23 -90.12 7.19E-02 13.54 2.94 96.15 0.36 -78.12 2.0E+09 0.22 -91.59 7.21E-02 12.73 2.80 94.95 0.35 -79.13 2.1E+09 0.21 -92.98 7.23E-02 11.98 2.68 93.81 0.35 -80.09 2.2E+09 0.20 -94.30 7.25E-02 11.29 2.56 92.73 0.34 -80.99 2.3E+09 0.20 -95.57 7.27E-02 10.64 2.45 91.70 0.34 -81.85 2.4E+09 0.19 -96.78 7.28E-02 10.05 2.35 90.72 0.33 -82.68 2.5E+09 0.18 -97.93 7.29E-02 9.49 2.26 89.78 0.33 -83.47 2.6E+09 0.18 -99.05 7.30E-02 8.96 2.18 88.87 0.33 -84.23 2.7E+09 0.17 -100.12 7.31E-02 8.47 2.10 88.00 0.33 -84.97 HFA3101 4 2.8E+09 0.17 -101.15 7.31E-02 8.01 2.02 87.15 0.33 -85.68 2.9E+09 0.16 -102.15 7.32E-02 7.57 1.96 86.33 0.33 -86.37 3.0E+09 0.16 -103.11 7.32E-02 7.16 1.89 85.54 0.33 -87.05 VCE = 5V and IC = 10mA 1.0E+08 0.72 -16.43 1.27E-02 75.41 15.12 165.22 0.95 -14.26 2.0E+08 0.67 -31.26 2.34E-02 62.89 13.90 152.04 0.88 -26.95 3.0E+08 0.60 -43.76 3.13E-02 52.58 12.39 141.18 0.79 -37.31 4.0E+08 0.53 -54.00 3.68E-02 44.50 10.92 132.57 0.70 -45.45 5.0E+08 0.47 -62.38 4.05E-02 38.23 9.62 125.78 0.63 -51.77 6.0E+08 0.42 -69.35 4.31E-02 33.34 8.53 120.37 0.57 -56.72 7.0E+08 0.37 -75.26 4.49E-02 29.47 7.62 116.00 0.51 -60.65 8.0E+08 0.34 -80.36 4.63E-02 26.37 6.86 112.39 0.47 -63.85 9.0E+08 0.31 -84.84 4.72E-02 23.84 6.22 109.36 0.44 -66.49 1.0E+09 0.29 -88.83 4.80E-02 21.75 5.69 106.77 0.41 -68.71 1.1E+09 0.27 -92.44 4.86E-02 20.00 5.23 104.51 0.39 -70.62 1.2E+09 0.25 -95.73 4.90E-02 18.52 4.83 102.53 0.37 -72.28 1.3E+09 0.24 -98.75 4.94E-02 17.25 4.49 100.75 0.35 -73.76 1.4E+09 0.22 -101.55 4.97E-02 16.15 4.19 99.16 0.34 -75.08 1.5E+09 0.21 -104.15 4.99E-02 15.19 3.93 97.70 0.33 -76.28 1.6E+09 0.20 -106.57 5.01E-02 14.34 3.70 96.36 0.32 -77.38 1.7E+09 0.20 -108.85 5.03E-02 13.60 3.49 95.12 0.31 -78.41 1.8E+09 0.19 -110.98 5.05E-02 12.94 3.30 93.96 0.31 -79.37 1.9E+09 0.18 -113.00 5.06E-02 12.34 3.13 92.87 0.30 -80.27 2.0E+09 0.18 -114.90 5.07E-02 11.81 2.98 91.85 0.30 -81.13 2.1E+09 0.17 -116.69 5.08E-02 11.33 2.84 90.87 0.30 -81.95 2.2E+09 0.17 -118.39 5.09E-02 10.89 2.72 89.94 0.29 -82.74 2.3E+09 0.16 -120.01 5.10E-02 10.50 2.60 89.06 0.29 -83.50 2.4E+09 0.16 -121.54 5.11E-02 10.13 2.49 88.21 0.29 -84.24 2.5E+09 0.16 -122.99 5.12E-02 9.80 2.39 87.39 0.29 -84.95 2.6E+09 0.15 -124.37 5.12E-02 9.49 2.30 86.60 0.29 -85.64 2.7E+09 0.15 -125.69 5.13E-02 9.21 2.22 85.83 0.29 -86.32 2.8E+09 0.15 -126.94 5.13E-02 8.95 2.14 85.09 0.29 -86.98 2.9E+09 0.15 -128.14 5.14E-02 8.71 2.06 84.36 0.29 -87.62 3.0E+09 0.14 -129.27 5.15E-02 8.49 1.99 83.66 0.29 -88.25 Common Emitter S-Parameters of 3 μm x 50 μm Transistor (Continued) FREQ. (Hz) |S11| PHASE(S11) |S12| PHASE(S12) |S21| PHASE(S21) |S22| PHASE(S22) HFA3101 3-5 Application Information The HFA3101 array is a very versatile RF Building block. It has been carefully laid out to improve its matching properties, bringing the distortion due to area mismatches, thermal distribution, betas and ohmic resistances to a minimum. The cell is equivalent to two differential stages built as two “variable transconductance multipliers” in parallel, with their outputs cross coupled. This configuration is well known in the industry as a Gilbert Cell which enables a four quadrant multiplication operation. Due to the input dynamic range restrictions for the input levels at the upper quad transistors and lower tail transistors, the HFA3101 cell has restricted use as a linear four quadrant multiplier. However, its configuration is well suited for uses where its linear response is limited to one of the inputs only, as in modulators or mixer circuit applications. Examples of these circuits are up converters, down converters, frequency doublers and frequency/phase detectors. Although linearization is still an issue for the lower pair input, emitter degeneration can be used to improve the dynamic range and consequent linearity. The HFA3101 has the lower pair emitters brought to external pins for this purpose. In modulators applications, the upper quad transistors are used in a switching mode where the pairs Q1/Q2 and Q3/Q4 act as non saturating high speed switches. These switches are controlled by the signal often referred as the carrier input. The signal driving the lower pair Q5/Q6 is commonly used as the modulating input. This signal can be linearly transferred to the output by either the use of low signal levels (Well below the thermal voltage of 26mV) or by the use of emitter degeneration. The chopped waveform appearing at the output of the upper pair (Q1 to Q4) resembles a signal that is multiplied by +1 or -1 at every half cycle of the switching waveform. Figure 1 shows the typical input waveforms where the frequency of the carrier is higher than the modulating signal. The output waveform shows a typical suppressed carrier output of an up converter or an AM signal generator. Carrier suppression capability is a property of the well known Balanced modulator in which the output must be zero when one or the other input (carrier or modulating signal) is equal to zero. however, at very high frequencies, high frequency mismatches and AC offsets are always present and the suppression capability is often degraded causing carrier and modulating feedthrough to be present. Being a frequency translation circuit, the balanced modulator has the properties of translating the modulating frequency (ωM) to the carrier frequency (ωC), generating the two side bands ωU = ωC + ωM and ωL = ωC - ωM. Figure 2 shows some translating schemes being used by balanced mixers. CARRIER SIGNALMODULATING SIGNALDIFFERENTIAL OUTPUT+1-1FIGURE 1. TYPICAL MODULATOR SIGNALS FIGURE 2A. UP CONVERSION OR SUPPRESSED CARRIER AM FIGURE 2B. DOWN CONVERSION FIGURE 2C. ZERO IF OR DIRECT DOWN CONVERSION FIGURE 2. MODULATOR FREQUENCY SPECTRUM ωC + ωMωC - ωMωC IF (ωC - ωM)FOLDED BACKωMωC BASEBANDωCωM HFA3101 6 The use of the HFA3101 as modulators has several advantages when compared to its counterpart, the diode doublebalanced mixer, in which it is required to receive enough energy to drive the diodes into a switching mode and has also some requirements depending on the frequency range desired, of different transformers to suit specific frequency responses. The HFA3101 requires very low driving capabilities for its carrier input and its frequency response is limited by the fT of the devices, the design and the layout techniques being utilized. Up conversion uses, for UHF transmitters for example, can be performed by injecting a modulating input in the range of 45MHz to 130MHz that carries the information often called IF (Intermediate frequency) for up conversion (The IF signal has been previously modulated by some modulation scheme from a baseband signal of audio or digital information) and by injecting the signal of a local oscillator of a much higher frequency range from 600MHz to 1.2GHz into the carrier input. Using the example of a 850MHz carrier input and a 70MHz IF, the output spectrum will contain a upper side band of 920MHz, a lower side band of 780MHz and some of the carrier (850MHz) and IF (70MHz) feedthrough. A Band pass filter at the output can attenuate the undesirable signals and the 920MHz signal can be routed to a transmitter RF power amplifier. Down conversion, as the name implies, is the process used to translate a higher frequency signal to a lower frequency range conserving the modulation information contained in the higher frequency signal. One very common typical down conversion use for example, is for superheterodyne radio receivers where a translated lower frequency often referred as intermediate frequency (IF) is used for detection or demodulation of the baseband signal. Other application uses include down conversion for special filtering using frequency translation methods. An oscillator referred as the local oscillator (LO) drives the upper quad transistors of the cell with a frequency called ωC. The lower pair is driven by the RF signal of frequency ωM to be translated to a lower frequency IF. The spectrum of the IF output will contain the sum and difference of the frequencies ωC and ωM. Notice that the difference can become negative when the frequency of the local oscillator is lower than the incoming frequency and the signal is folded back as in Figure 2. NOTE: The acronyms RF, IF and LO are often interchanged in the industry depending on the application of the cell as mixers or modulators. The output of the cell also contains multiples of the frequency of the signal being fed to the upper quad pair of transistors because of the switching action equivalent to a square wave multiplication. In practice, however, not only the odd multiples in the case of a symmetrical square wave but some of the even multiples will also appear at the output spectrum due to the nature of the actual switching waveform and high frequency performance. By-products of the form M*ωC + N*ωM with M and N being positive or negative integers are also expected to be present at the output and their levels are carefully examined and minimized by the design. This distortion is considered one of the figures of merit for a mixer application. The process of frequency doubling is also understood by having the same signal being fed to both modulating and carrier ports. The output frequency will be the sum of ωC and ωM which is equivalent to the product of the input frequency by 2 and a zero Hz or DC frequency equivalent to the difference of ωC and ωM. Figure 2 also shows one technique in use today where a process of down conversion named zero IF is made by using a local oscillator with a very pure signal frequency equal to the incoming RF frequency signal that contains a baseband (audio or digital signal) modulation. Although complex, the extraction or detection of the signal is straightforward. Another useful application of the HFA3101 is its use as a high frequency phase detector where the two signals are fed to the carrier and modulation ports and the DC information is extracted from its output. In this case, both ports are utilized in a switching mode or overdrive, such that the process of multiplication takes place in a quasi digital form (2 square waves). One application of a phase detector is frequency or phase demodulation where the FM signal is split before the modulating and carrier ports. The lower input port is always 90 degrees apart from the carrier input signal through a high Q tuned phase shift network. The network, being tuned for a precise 90 degrees shift at a nominal frequency, will set the two signals 90 degrees apart and a quiescent output DC level will be present at the output. When the input signal is frequency modulated, the phase shift of the signal coming from the network will deviate from 90 degrees proportional to the frequency deviation of the FM signal and a DC variation at the output will take place, resembling the demodulated FM signal. The HFA3101 could also be used for quadrature detection, (I/Q demodulation), AGC control with limited range, low level multiplication to name a few other applications. Biasing Various biasing schemes can be employed for use with the HFA3101. Figure 3 shows the most common schemes. The biasing method is a choice of the designer when cost, thermal dependence, voltage overheads and DC balancing properties are taken into consideration. Figure 3A shows the simplest form of biasing the HFA3101. The current source required for the lower pair is set by the voltage across the resistor RBIAS less a VBE drop of the lower transistor. To increase the overhead, collector resistors are substituted by an RF choke as the upper pair functions as a current source for AC signals. The bases of the upper and lower transistors are biased by RB1 and RB2 respectively. The voltage drop across the resistor R2 must be higher than a VBE with an increase sufficient to assure that the collector to base junctions of the lower pair are always reverse biased. Notice that this same voltage also sets the VCE of operation of the lower pair which is important for the optimization of gain. Resistors REE are nominally zero for applications where the input signals are well below 25mV peak. Resistors REE are used to increase the linearity HFA3101 3-7 of the circuit upon higher level signals. The drop across REE must be taken into consideration when setting the current source value. Figure 3B depicts the use of a common resistor sharing the current through the cell which is used for temperature compensation as the lower pair VBE drop at the rate of -2mV/oC. Figure 3C uses a split supply. Design Example: Down Converter Mixer Figure 4 shows an example of a low cost mixer for cellular applications. The design flexibility of the HFA3101 is demonstrated by a low cost, and low voltage mixer application at the 900MHz range. The choice of good quality chip components with their self resonance outside the boundaries of the application are important. The design has been optimized to accommodate the evaluation of the same layout for various quiescent current values and lower supply voltages. The choice of RE became important for the available overhead and also for maintaining an AC true impedance for high frequency signals. The value of 27Ω has been found to be the optimum minimum for the application. The input impedances of the HFA3101 base input ports are high enough to permit their termination with 50Ω resistors. Notice the AC termination by decoupling the bias circuit through good quality capacitors. The choice of the bias has been related to the available power supply voltage with the values of R1, R2 and RBIAS splitting the voltages for optimum VCE values. For evaluation of the cell quiescent currents, the voltage at the emitter resistor RE has been recorded. The gain of the circuit, being a function of the load and the combined emitter resistances at high frequencies have been kept to a maximum by the use of an output match network. The high output impedance of the HFA3101 permits FIGURE 3A. FIGURE 3B. FIGURE 3C. FIGURE 3. VCCRB1R1R2RBIASREREEREELCH12348765Q5Q6Q1Q2Q3Q4RB2 VCCRB1R1R2RBIASREREEREE12348765Q5Q6Q1Q2Q3Q4RB2RCLCH VEERB1R1RBIASREREEREE12348765Q5Q6Q1Q2Q3Q4RB2VCCLCHR2 27LCH12348765Q5Q6Q1Q2Q3Q4VCC390nH0.010.011102200.1VCC3V75MHz2K5p TO 12pLO IN51825MHz51900MHzIF OUTRF IN0.010.010.01330FIGURE 4. 3V DOWN CONVERTER APPLICATION HFA3101 8 broadband match if so desired at 50Ω (RL = 50Ω to 2kΩ) as well as with tuned medium Q matching networks (L, T etc.). Stability The cell, by its nature, has very high gain and precautions must be taken to account for the combination of signal reflections, gain, layout and package parasitics. The rule of thumb of avoiding reflected waves must be observed. It is important to assure good matching between the mixer stage and its front end. Laboratory measurements have shown some susceptibility for oscillation at the upper quad transistors input. Any LO prefiltering has to be designed such the return loss is maintained within acceptable limits specially at high frequencies. Typical off the shelf filters exhibits very poor return loss for signals outside the passband. It is suggested that a “pad” or a broadband resistive network be used to interface the LO port with a filter. The inclusion of a parallel 2K resistor in the load decreases the gain slightly which improves the stability factor and also improves the distortion products (output intermodulation or 3rd order intercept). The employment of good RF techniques shall suffice the stability requirements. Evaluation The evaluation of the HFA3101 in a mixer configuration is presented in Figures 6 to 11, Table 1 and Table 2. The layout is depicted in Figure 5. The output matching network has been designed from data taken at the output port at various test frequencies with the setup as in Table 1. S22 characterization is enough to assure the calculation of L, T or transmission line matching networks. FIGURE 5. UP/DOWN CONVERTER LAYOUT, 400%; MATERIAL G10, 0.031 TABLE 1. S22 PARAMETERS FOR DOWN CONVERSION, LCH = 10μH FREQUENCY RESISTANCE REACTANCE 10MHz 265Ω 615Ω 45MHz 420Ω - 735Ω 75MHz 122Ω - 432Ω 100MHz 67Ω - 320Ω TABLE 2. TYPICAL PARAMETERS FOR DOWN CONVERSION, LCH = 10μH PARAMETER LO LEVEL VCC = 3V, IBIAS = 8mA Power Gain -6dBm 8.5dB TOI Output -6dBm 11.5dBm NF SSB -6dBm 14.5dB Power Gain 0dBm 8.6dB TOI Output 0dBm 11dBm NF SSB 0dBm 15dB PARAMETER LO LEVEL VCC = 4V, IBIAS = 19mA Power Gain -6dBm 10dB TOI Output -6dBm 13dBm NF SSB -6dBm 20dB Power Gain 0dBm 11dB TOI Output 0dBm 12.5dBm NF SSB 0dBm 24dB TABLE 3. TYPICAL VALUES OF S22 FOR THE OUTPUT PORT. LCH = 390nH IBIAS = 8mA (SET UP OF FIGURE 11) FREQUENCY RESISTANCE REACTANCE 300MHz 22Ω -115Ω 600MHz 7.5Ω -43Ω 900MHz 5.2Ω -14Ω 1.1GHz 3.9Ω 0Ω TABLE 4. TYPICAL VALUES OF S22. LCH = 390nH, IBIAS = 18mA FREQUENCY RESISTANCE REACTANCE 300MHz 23.5Ω -110Ω 600MHz 10.3Ω -39Ω 900MHz 8.7Ω -14Ω 1.1GHz 8Ω 0Ω HFA3101 3-9 Up Converter Example An application for a up converter as well as a frequency multiplier can be demonstrated using the same layout, with an addition of matching components. The output port S22 must be characterized for proper matching procedures and depending on the frequency desired for the output, transmission line transformations can be designed. The return loss of the input ports maintain acceptable values in excess of 1.2GHz which can permit the evaluation of a frequency doubler to 2.4GHz if so desired. The addition of the resistors REE can increase considerably the dynamic range of the up converter as demonstrated at Figure 13. The evaluation results depicted in Table 5 have been obtained by a triple stub tuner as a matching network for the output due to the layout constraints. Based on the evaluation results it is clear that the cell requires a higher Bias current for overall performance. FIGURE 6. OUTPUT PORT S22 TEST SET UP FIGURE 7. LO PORT RETURN LOSS FIGURE 8. RF PORT RETURN LOSS FIGURE 9. IF PORT RETURN LOSS, WITH MATCHING NETWORK FIGURE 10. TYPICAL IN BAND OUTPUT SPECTRUM, VCC = 3V FIGURE 11. TYPICAL OUT OF BAND OUTPUT SPECTRUM VCC 3V0.1LCH12348765Q5Q6Q1Q2Q3Q42K S110dB5dB/DIV100MHz1.1GHzLOG MAG3V4V 0dB10dB/DIV100MHz1.1GHzS11LOG MAG 0dB5dB/DIV10MHzS22LOG MAG110MHz 76MHz64M11*LO - 10RF88M12RF - 13LOIFSPAN40MHzLO = 825MHz -6dBmRF = 901MHz - 25dBm-17dBm10dB/DIV 67575082590097510dB/DIVLO + 2RFSPAN500MHzLO - 2RF-26dBm-36dBm-58dBm-53dBmLO = 825MHz -6dBmRF = 900MHz -25dBm HFA3101 10 Design Example: Up Converter Mixer Figure 12 shows an example of an up converter for cellular applications. Conclusion The HFA3101 offers the designer a number of choices and different applications as a powerful RF building block. Although isolation is degraded from the theoretical results for the cell due to the unbalanced, nondifferential input schemes being used, a number of advantages can be taken into consideration like cost, flexibility, low power and small outline when deciding for a design. TABLE 5. TYPICAL PARAMETERS FOR THE UP CONVERTER EXAMPLE PARAMETER VCC = 3V, IBIAS = 8mA VCC = 4V, IBIAS = 18mA Power Gain, LO = -6dBm 3dB 5.5dBm Power Gain, LO = 0dBm 4dB 7.2dB RF Isolation, LO = 0dBm 15dBc 22dBc LO Isolation, LO = 0dBm 28dBc 28dBc FIGURE 12. UP CONVERTER FIGURE 13. TYPICAL SPECTRUM PERFORMANCE OF UP CONVERTER RF IN0.01390nH900MHz5.2nHVCC 3V0.112348765Q5Q6Q1Q2Q3Q411p0.0175MHz27220REEREE51LO INVCC0.010.011103303V825MHz0.010.015147-100pF 9019128902LO - 10RF12RFOUTPUT WITHOUT EMITTER DEGENERATIONRF = 76MHzLO = 825MHzSPAN50MHzOUTPUT WITH EMITTER DEGENERATION REE = 4.7Ω825900976EXPANDED SPECTRUM REE = 4.7Ω HFA3101 3-11 Typical Performance Curves for Transistors FIGURE 14. IC vs VCE FIGURE 15. HFE vs IC FIGURE 16. GUMMEL PLOT FIGURE 17. fT vs IC FIGURE 18. GAIN AND NOISE FIGURE vs FREQUENCY NOTE: Figures 14 through 18 are only for Q5 and Q6. VCE (V)IC (mA)02.06.04.0070605040302010IB = 800μAIB = 1mAIB = 200μAIB = 400μAIB = 600μA hFEIC ( A)10-1010-810-610-410-2100140120100806040200VCE = 5V VBE (V)IC AND IB (A)10-1010-810-610-410-210010-120.200.400.600.801.0VCE = 3V IC (A)fT (GHz)12108642010-410-310-210-1 20181614121046NOISE FIGURE ( dB)FREQUENCY (GHz)|S21| (dB)0.51.51.02.002.53.04.84.64.44.24.03.83.63.43.28 HFA3101 12 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Die Characteristics PROCESS UHF-1 DIE DIMENSIONS: 53 mils x 52 mils x 14 mils 1340μm x 1320μm x 355.6μm METALLIZATION: Type: Metal 1: AlCu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.5kÅ Type: Metal 2: AlCu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ PASSIVATION: Type: Nitride Thickness: 4kÅ ±0.5kÅ SUBSTRATE POTENTIAL (Powered Up): Floating Metallization Mask Layout HFA31011122334455667788 HFA3101 16-Bit Low Power Sigma-Delta ADC Data Sheet AD7171 RevA Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.Specifications subject to change without notice. Non. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2009–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Output data rate: 125 Hz Pin-programmable power-down and reset Status function Internal clock oscillator Current: 135 μA Power supply: 2.7 V to 5.25 V –40°C to +105°C temperature range Package: 10-lead 3 mm x 3 mm LFCSP INTERFACE 2-wire serial (read-only device) SPI compatible Schmitt trigger on SCLK APPLICATIONS Weigh scales Pressure measurement Industrial process control Portable instrumentation FUNCTIONAL BLOCK DIAGRAM 16-BIT Σ-ΔADCAD7171GNDINTERNALCLOCKVDDREFIN(+)AIN(+)AIN(–)REFIN(–)DOUT/RDYSCLKPDRST08417-001 Figure 1. Table 1. VREF = VDD RMS Noise P-P Noise P-P Resolution ENOB 5 V 11.5 μV 76 μV 16 bits 16 bits 3 V 6.9 μV 45 μV 16 bits 16 bits GENERAL DESCRIPTION The AD7171 is a very low power 16-bit analog-to-digital converter (ADC). It contains a precision 16-bit sigma-delta (Σ-Δ) ADC and an on-chip oscillator. Consuming only 135 μA, the AD7171 is particularly suitable for portable or battery operated products where very low power is a requirement. The AD7171 also has a power-down mode in which the device consumes 5 μA, thus increasing the battery life of the product. For ease-of-use, all the features of the AD7171 are controlled by dedicated pins. Each time a data read occurs, eight status bits are appended to the 16-bit conversion. These status bits contain a pattern sequence that can be used to confirm the validity of the serial transfer. The output data rate of the AD7171 is 125 Hz, whereas the settling time is 24 ms. The AD7171 has one differential input and a gain of 1. This is useful in applications where the user needs to use an external amplifier to implement system-specific filtering or gain requirements. The AD7171 operates with a power supply from 2.7 V to 5.25 V. It is available in a 10-lead LFCSP package. The AD7170 is a 12-bit version of the AD7171. It has the same feature set as the AD7171 and is pin-for-pin compatible. 1 Low-Noise 24-bit Delta Sigma ADC ISL26132, ISL26134 The ISL26132 and ISL26134 are complete analog front ends for high resolution measurement applications. These 24-bit Delta-Sigma Analog-to-Digital Converters include a very low-noise amplifier and are available as either two or four differential multiplexer inputs. The devices offer the same pinout as the ADS1232 and ADS1234 devices and are functionally compatible with these devices. The ISL26132 and ISL26134 offer improved noise performance at 10Sps and 80Sps conversion rates. The on-chip low-noise programmable-gain amplifier provides gains of 1x/2x/64x/128x. The 128x gain setting provides an input range of ±9.766mVFS when using a 2.5V reference. la high input impedance allows direct connection of sensors such as load cell bridges to ensure the specified measurement accuracy without additional circuitry. The inputs accept signals 100mV outside the supply rails when the device is set for unity gain. The Delta-Sigma ADC features a third order modulator providing up to 21.6-bit noise-free performance. The device can be operated from an external clock source, crystal (4.9152MHz typical), or the on-chip oscillator. The two channel ISL26132 is available in a 24 Ld TSSOP package and the four channel ISL26134 is available in a 28 Ld TSSOP package. Both are specified for operation over the automotive temperature range (-40°C to +105°C). Features • Up to 21.6 Noise-free bits. • Low Noise Amplifier with Gains of 1x/2x/64x/128x • RMS noise: 10.2nV @ 10Sps (PGA = 128x) • Linearity Error: 0.0002% FS • Simultaneous rejection of 50Hz and 60Hz (@ 10Sps) • Two (ISL26132) or four (ISL26134) channel differential input multiplexer • On-chip temperature sensor (ISL26132) • Automatic clock source detection • Simple interface to read conversions • +5V Analog, +5 to +2.7V Digital Supplies • Pb-Free (RoHS Compliant) • TSSOP packages: ISL26132, 24 pin; ISL26134, 28 pin Applications • Weigh Scales • Temperature Monitors and Controls • Industrial Process Control • Pressure Sensors ADC PGA 1x/2x/64x/ 128x INTERNAL CLOCK SDO/RDY SCLK AVDD DVDD AGND DGND XTALIN/CLOCK VREF+ EXTERNAL OSCILLATOR XTALOUT A0 A1/TEMP VREFAIN1+ AIN1- AIN2+ AIN2- AIN3+ AIN3- AIN4+ AIN4- INPUT MULTIPLEXER ISL26134 Only CAP CAP GAIN0 GAIN1 PWDN SPEED DGND DGND NOTE for A1/TEMP pin: Functions as A1 on ISL26134; Functions as TEMP on ISL26132 FIGURE 1. BLOCK DIAGRAM September 9, 2011 FN6954.1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL26132, ISL26134 2 FN6954.1 September 9, 2011 Ordering Information PART NUMBER (Notes 2, 3) PART MARKING TEMPERATURE RANGE (°C) PACKAGE (Pb-free) PKG. DWG NUMBER ISL26132AVZ 26132 AVZ -40 to +105 24 Ld TSSOP M24.173 ISL26132AVZ-T (Note 1) 26132 AVZ -40 to +105 24 Ld TSSOP (Tape & Reel) M24.173 ISL26132AVZ-T7A (Note 1) 26132 AVZ -40 to +105 24 Ld TSSOP (Tape & Reel) M24.173 ISL26134AVZ 26134 AVZ -40 to +105 28 Ld TSSOP M28.173 ISL26134AVZ-T (Note 1) 26134 AVZ -40 to +105 28 Ld TSSOP (Tape & Reel) M28.173 ISL26134AVZ-T7A (Note 1) 26134 AVZ -40 to +105 28 Ld TSSOP (Tape & Reel) M28.173 ISL26134AV28EV1Z Evaluation Board NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL26132, ISL26134. For more information on MSL please see techbrief TB363. TABLE 1. KEY DIFFERENCES OF PARTS PART NUMBER NUMBER OF CHANNELS ON-CHIP TEMPERATURE SENSOR NUMBER OF PINS ISL26132 2 YES 24 ISL26134 4 NO 28 Pin Configurations ISL26132 (24 LD TSSOP) TOP VIEW ISL26134 (28 LD TSSOP) TOP VIEW 1 2 3 4 5 6 7 8 9 10 11 12 16 17 18 19 20 21 22 23 24 15 14 13 DVDD DGND XTALIN/CLOCK XTALOUT DGND DGND TEMP A0 CAP CAP AIN1+ AIN1- SDO/RDY PDWN SPEED GAIN1 GAIN0 AGND VREFAIN2+ AIN2- SCLK AVDD VREF+ 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DVDD DGND XTALIN/CLOCK XTALOUT DGND DGND A1 A0 CAP CAP AIN1+ AIN1- AIN3+ AIN3- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SDO/RDY PDWN SPEED GAIN1 GAIN0 AGND VREFAIN2+ AIN2- AIN4+ AIN4- SCLK AVDD VREF+ ISL26132, ISL26134 3 FN6954.1 September 9, 2011 Pin Descriptions NAME PIN NUMBER ANALOG/DIGITAL ISL26132 ISL26134 INPUT/OUTPUT DESCRIPTION DVDD 1 1 Digital Digital Power Supply (2.7V to 5.25V) DGND 2, 5, 6 2, 5, 6 Digital Digital Ground XTALIN/CLOCK 3 3 Digital/Digital Input External Clock Input: typically 4.9152MHz. Tie low to activate internal oscillator. Can also use external crystal across XTALIN/CLOCK and XTALOUT pins. XTALOUT 4 4 Digital External Crystal connection TEMP 7 - Digital Input On-chip Temperature Diode Enable A1 A0 - 8 7 8 Digital Input CAP 9, 10 9, 10 Analog PGA Filter Capacitor AIN1+ 11 11 Analog Input Positive Analog Input Channel 1 AIN1- 12 12 Analog Input Negative Analog Input Channel 1 AIN3+ - 13 Analog Input Positive Analog Input Channel 3 AIN3- - 14 Analog Input Negative Analog Input Channel 3 AIN4- - 15 Analog Input Negative Analog Input Channel 4 AIN4+ - 16 Analog Input Positive Analog Input Channel 4 AIN2- 13 17 Analog Input Negative Analog Input Channel 2 AIN2+ 14 18 Analog Input Positive Analog Input Channel 2 VREF- 15 19 Analog Input Negative Reference Input VREF+ 16 20 Analog Input Positive Reference Input AGND 17 21 Analog Analog Ground AVDD 18 22 Analog Analog Power Supply 4.75V to 5.25V GAIN0 GAIN1 19 20 23 24 Digital Input TABLE 2. INPUT MULTIPLEXER SELECT ISL26134 ISL26132 A1 A0 CHANNEL 0 0 AIN1 0 1 AIN2 1 0 AIN3 1 1 AIN4 TABLE 3. GAIN SELECT GAIN1 GAIN0 GAIN 0 0 1 0 1 2 1 0 64 1 1 128 ISL26132, ISL26134 4 FN6954.1 September 9, 2011 Circuit Description The ISL26132 (2-channel) and ISL26134 (4-channel) devices are very low noise 24-bit delta-sigma ADCs that include a programmable gain amplifier and an input multiplexer. la ISL26132 offers an on-chip temperature measurement capability. The ISL26132, ISL26134 provide pin compatibility and output data compatibility with the ADS1232/ADS1234, and offer the same conversion rates of 10Sps and 80Sps. All the features of the ISL26132, ISL26134 are pin-controllable, while offset calibration, standby mode, and output conversion data are accessible through a simple 2-wire interface. The clock can be selected to come from an internal oscillator, an external clock signal, or crystal (4.9152MHz typical). SPEED 21 25 Digital Input PDWN 22 26 Digital Input Power-Down: Holding this pin low powers down the entire converter and resets the ADC. SCLK 23 27 Digital Input Serial Clock: Clock out data on the rising edge. Also used to initiate Offset Calibration and Sleep modes. See “Serial Clock Input (SCLK)” on page 14 for more details. SDO/RDY 24 28 Digital Output Dual-Purpose Output: Data Ready: Indicate valid data by going low. Data Output: Outputs data, MSB first, on the first rising edge of SCLK. Pin Descriptions (Continued) NAME PIN NUMBER ANALOG/DIGITAL ISL26132 ISL26134 INPUT/OUTPUT DESCRIPTION TABLE 4. DATA RATE SELECT SPEED DATA RATE 0 10Sps 1 80Sps ISL26132, ISL26134 5 FN6954.1 September 9, 2011 Absolute Maximum Ratings Thermal Information AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +0.3V Analog In to AGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 to AVDD+0.3V Digital In to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 to DVDD+0.3V Input Current Momentary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mA Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10mA ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . . . . . . . . ..7.5kV Machine Model (Per JESD22-A115). . . . . . . . . . . . . . . . . . . . . . . . . .450V Charged Device Model (Per JESD22-C101) . . . . . . . . . . . . . . . . . . . . . . . .2kV Latch-up (Per JEDEC JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mA @ Room and Hot (+105°C) Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 24 Ld TSSOP (Notes 4, 5) . . . . . . . . . . . . . .65 18 28 Ld TSSOP (Notes 4, 5) . . . . . . . . . . . . . .63 18 Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80mW Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . ..+150°C Maximum Storage Temperature Range . . . . . . . . . . . . ..-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..-40°C to +105°C AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..4.75V to 5.25V DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 5.25V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. For θJC, the “case temp” location is taken at the package top center. Electrical Specifications VREF+ = 5V, VREF- = 0V, AVDD = 5V, DVDD = 5V, AGND = DGND = 0V, MCLK = 4.9152MHz, and TA = -40°C to +105°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C SYMBOL PARAMETER TEST LEVEL or NOTES MIN (Note 6) TYP MAX (Note 6) UNITS ANALOG INPUTS Differential Input Voltage Range ±0.5VREF/ Gain V Common Mode Input Voltage gamme Gain = 1, 2 AGND - 0.1 AVDD + 0.1 V Gain = 64, 128 AGND+1.5 AVDD - 1.5 V Differential Input Current Gain = 1 ±20 nA Gain = 2 ±40 nA Gain = 64, 128 ±1 nA SYSTEM PERFORMANCE Resolution No Missing Codes 24 Bits Data Rate Internal Osc. SPEED = High 80 SPS Internal Osc. SPEED = Low 10 SPS External Osc. SPEED = High fCLK/61440 SPS External Osc. SPEED = Low fCLK/49152 0 SPS Digital Filter Settling Time Full Setting 4 Conversions INL Integral Nonlinearity Differential Input Gain = 1, 2 ±0.0002 ±0.001 % of FSR (Note 7) Differential Input Gain = 64, 128 ±0.0004 % of FSR (Note 7) Input Offset Error Gain = 1 ±0.4 ppm of FS Gain = 128 ±1.5 ppm of FS Input Offset Drift Gain = 1 0.3 μV/°C Gain = 128 10 nV/°C Gain Error (Note 8) Gain = 1 ±0.007 ±0.02 % Gain = 128 ±0.02 % Gain Drift Gain = 1 0.5 ppm/°C Gain = 128 7 ppm/°C ISL26132, ISL26134 6 FN6954.1 September 9, 2011 CMRR Common Mode Rejection At DC, Gain = 1, ΔV = 1V 85 100 dB At DC, Gain = 128, ΔV = 0.1V 100 dB 50Hz/60Hz Rejection (Note 9) External 4.9152MHz Clock 130 dB PSRR Power Supply Rejection At DC, Gain = 1, ΔV = 1V 82 100 dB At DC, Gain = 128, ΔV = 0.1V 100 105 dB Input Referred Noise See “Typical Characteristics” beginning on page 8 Noise Free Bits See “Typical Characteristics” beginning on page 8 VOLTAGE REFERENCE INPUT VREF Voltage Reference Input VREF = VREF+ - VREF- 1.5 AVDD AVDD + 0.1 V VREF- Negative Reference Input AGND - 0.1 VREF+ - 1.5 V VREF+ Positive Reference Input VREF- + 1.5 AVDD + 0.1 V IREF Voltage Reference Input Current ±350 nA POWER SUPPLY REQUIREMENTS AVDD Analog Supply Voltage 4.75 5.0 5.25 V DVDD Digital Supply Voltage 2.7 3.3 5.25 V AIDD Analog Supply Current Normal Mode, AVDD = 5, Gain = 1, 2 7 8.5 mA Normal Mode, AVDD = 5, Gain = 64, 128 9 12 mA Standby Mode 0.2 3 μA Power-Down 0.2 2.5 μA DIDD Digital Supply Current Normal Mode, AVDD = 5, Gain = 1, 2 750 950 μA Normal Mode, AVDD = 5, Gain = 64, 128 750 950 μA Standby Mode 1.5 26 μA Power-Down 1 26 μA PD Power Dissipation, Total Normal Mode, AVDD = 5, Gain = 1, 2 49.6 mW Normal Mode, AVDD = 5, Gain = 64, 128 68 mW Standby Mode 0.14 mW Power-Down 0.14 mW DIGITAL INPUTS VIH 0.7 DVDD V VIL 0.2 DVDD V VOH IOH = -1mA DVDD - 0.4 V VOL IOL = 1mA 0.2 DVDD V Input Leakage Current ±10 μA External Clock Input Frequency 0.3 4.9152 MHz Serial Clock Input Frequency 1 MHz NOTE: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 7. FSR = Full Scale Range = VREF/Gain 8. Gain accuracy is calibrated at the factory (AVDD = +5V). 9. Specified for word rate equal to 10Sps. Electrical Specifications VREF+ = 5V, VREF- = 0V, AVDD = 5V, DVDD = 5V, AGND = DGND = 0V, MCLK = 4.9152MHz, and TA = -40°C to +105°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C (Continued) SYMBOL PARAMETER TEST LEVEL or NOTES MIN (Note 6) TYP MAX (Note 6) UNITS ISL26132, ISL26134 7 FN6954.1 September 9, 2011 Noise Performance The ISL26132 and ISL26134 provide excellent noise performance. The noise performance on each of the gain settings of the PGA at the selected word rates is shown in Tables 5 and 6. Resolution in bits decreases by 1-bit if the ADC is operated as a single-ended input device. Noise measurements are input-referred, taken with bipolar inputs under the specified operating conditions, with fCLK = 4.9152MHz. TABLE 5. AVDD = 5V, VREF = 5V, DATA RATE = 10Sps GAIN RMS NOISE (nV) PEAK-TO-PEAK NOISE (nV) (Note 10) NOISE-FREE BITS (Note 11) 1 243 1604 21.6 2 148 977 21.3 64 10.8 71 20.1 128 10.2 67 19.1 TABLE 6. AVDD = 5V, VREF = 5V, DATA RATE = 80Sps GAIN RMS NOISE (nV) PEAK-TO-PEAK NOISE (nV) (Note 10) NOISE-FREE BITS (Note 11) 1 565 3730 20.4 2 285 1880 20.3 64 28.3 187 18.7 128 27 178 17.7 NOTES: 10. The peak-to-peak noise number is 6.6 times the rms value. This encompasses 99.99% of the noise excursions that may occur. This value best represents the worst case noise that could occur in the output conversion words from the converter. 11. Noise-Free Bits is defined as: Noise-Free Bits = ln(FSR/peak-to-peak noise)/ln(2) where FSR is the full scale range of the converter, VREF/Gain. ISL26132, ISL26134 8 FN6954.1 September 9, 2011 Typical Characteristics FIGURE 2. NOISE AT GAIN = 1, 10Sps FIGURE 3. NOISE HISTOGRAM AT GAIN = 1, 10Sps FIGURE 4. NOISE AT GAIN = 2, 10Sps FIGURE 5. NOISE HISTOGRAM AT GAIN = 2, 10Sps FIGURE 6. NOISE AT GAIN = 64, 10Sps FIGURE 7. NOISE HISTOGRAM AT GAIN = 64, 10Sps -10 -5 0 5 10 0 200 400 600 800 1000 GAIN = 1 RATE = 10Sps TIME (SAMPLES) OUTPUT CODE (LSB) 0 50 100 150 200 250 300 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 OUTPUT CODE (LSB) GAIN = 1, N = 1024 RATE = 10Sps STD DEV = 1.635 LSB VREF = 2.5V COUNTS - 10 -5 0 5 10 0 200 400 600 800 1000 TIME (SAMPLES) OUTPUT CODE (LSB) GAIN = 2 RATE = 10Sps 0 50 100 150 200 250 -8 -6 -4 -2 0 2 4 6 8 GAIN = 2, N = 1024 RATE = 10Sps STD DEV = 1.989 LSB VREF = 2.5V OUTPUT CODE (LSB) COUNTS -15 -10 -5 0 5 10 15 20 0 200 400 600 800 1000 TIME (SAMPLES) OUTPUT CODE (LSB) GAIN = 64 RATE = 10Sps 0 20 40 60 80 100 120 -20 -15 -10 -5 0 5 10 15 20 GAIN = 64, N = 1024 RATE = 10Sps STD DEV = 4.627 LSB VREF = 2.5V OUTPUT CODE (LSB) COUNTS ISL26132, ISL26134 9 FN6954.1 September 9, 2011 FIGURE 8. NOISE AT GAIN = 128, 10Sps FIGURE 9. NOISE HISTOGRAM AT GAIN = 128, 10Sps FIGURE 10. NOISE AT GAIN = 1, 80Sps FIGURE 11. NOISE HISTOGRAM AT GAIN = 1, 80Sps FIGURE 12. NOISE AT GAIN = 2, 80Sps FIGURE 13. NOISE HISTOGRAM AT GAIN = 2, 80Sps Typical Characteristics (Continued) -50 -30 -10 10 30 50 0 200 400 600 800 1000 GAIN = 128 RATE = 10Sps TIME (SAMPLES) OUTPUT CODE (LSB) 0 10 20 30 40 50 60 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 OUTPUT CODE (LSB) COUNTS GAIN = 128, N = 1024 RATE = 10Sps STD DEV = 8.757 LSB VREF = 2.5V -25 -20 -15 -10 -5 0 5 10 15 20 25 0 200 400 600 800 1000 GAIN = 1 RATE = 80Sps TIME (SAMPLES) OUTPUT CODE (LSB) 0 20 40 60 80 100 120 -15 -10 -5 0 5 10 15 OUTPUT CODE (LSB) COUNTS GAIN = 1, N = 1024 RATE = 80Sps STD DEV = 3.791 LSB VREF = 2.5V -25 -15 -5 5 15 25 0 200 400 600 800 1000 GAIN = 2 RATE = 80Sps TIME (SAMPLES) OUTPUT CODE (LSB) 0 20 40 60 80 100 120 -15 -10 -5 0 5 10 15 OUTPUT CODE (LSB) COUNTS GAIN = 2, N = 1024 RATE = 80Sps STD DEV = 3.831 LSB VREF = 2.5V ISL26132, ISL26134 10 FN6954.1 September 9, 2011 FIGURE 14. NOISE AT GAIN = 64, 80Sps FIGURE 15. NOISE HISTOGRAM AT GAIN = 64, 80Sps FIGURE 16. NOISE AT GAIN = 128, 80Sps FIGURE 17. NOISE HISTOGRAM AT GAIN = 128, 80Sps FIGURE 18. ANALOG CURRENT vs TEMPERATURE FIGURE 19. DIGITAL CURRENT vs TEMPERATURE Typical Characteristics (Continued) -100 -50 0 50 100 0 200 400 600 800 1000 GAIN = 64 RATE = 80Sps TIME (SAMPLES) OUTPUT CODE (LSB) 0 10 20 30 40 50 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 OUTPUT CODE (LSB) COUNTS GAIN = 64, N = 1024 RATE = 80Sps STD DEV = 12.15 LSB VREF = 2.5V -200 -160 -120 -80 -40 0 40 80 120 160 0 200 400 600 800 1000 GAIN = 128 RATE = 80Sps TIME (SAMPLES) OUTPUT CODE (LSB) 0 5 10 15 20 25 30 -80 -60 -40 -20 0 20 40 60 80 OUTPUT CODE (LSB) COUNTS GAIN = 128, N = 1024 RATE = 80Sps STD DEV = 23.215 LSB VREF = 2.5V 0 2 4 6 8 10 -40 -10 20 50 80 110 TEMPERATURE (°C) CURRENT (mA) NORMAL MODE, PGA = 64.128 NORMAL MODE, PGA = 1, 2 1 10 100 1000 10000 -40 -10 20 50 80 110 TEMPERATURE (°C) CURRENT (μA) NORMAL MODE, ALL PGA GAINS POWERDOWN MODE ISL26132, ISL26134 11 FN6954.1 September 9, 2011 FIGURE 20. TYPICAL WORD RATE vs TEMPERATURE USING INTERNAL OSCILLATOR FIGURE 21. NOISE DENSITY vs FREQUENCY AT GAIN = 1, 80Sps FIGURE 22. NOISE DENSITY vs FREQUENCY AT GAIN = 128, 80Sps Typical Characteristics (Continued) 9.6 9.8 10.0 10.2 10.4 10.6 10.8 11.0 -40 -10 20 50 80 110 TEMPERATURE (°C) DATA RATE (Sps) WORD RATE = 10Sps 10 100 1000 10000 0.01 0.1 1 10 FREQUENCY (Hz) NOISE (nV/√Hz) GAIN = 1, 80Sps 64k FFT 25 AVERAGES 1 10 100 0.01 0.1 1 10 FREQUENCY (Hz) NOISE (nV/√Hz) GAIN = 128, 80Sps 64k FFT 25 AVERAGES ISL26132, ISL26134 12 FN6954.1 September 9, 2011 Functional Description Analog Inputs The analog signal inputs to the ISL26132 connect to a 2-Channel differential multiplexer and the ISL26134 connect to a 4-Channel differential multiplexer (Mux). The multiplexer connects a pair of inputs to the positive and negative inputs (AINx+, AINx-), selected by the Channel Select Pins A0 and A1 (ISL26134 only). Input channel selection is shown in Table 7. On the ISL26132, the TEMP pin is used to select the Temperature Sensor function. Whenever the MUX channel is changed (i.e. if any one of the following inputs - A0/A1, Gain1/0, SPEED is changed), the digital logic will automatically restart the digital filter and will cause SDO/RDY to go low only when the output is fully settled. But if the input itself is suddenly changed, then the user needs to ignore first four RDY pulses (going low) to get an accurate measurement of the input signal. The input span of the ADC is ±0.5 VREF/GAIN. For a 5V VREF and a gain of 1x, the input span will be 5VP-P fully differential as shown in Figure 23. Note that input voltages that exceed the supply rails by more than 100mV will turn on the ESD protection diodes and degrade measurement accuracy. If the differential input exceeds well above the +VE or the -VE FS (by ~1.5x times) the output code will clip to the corresponding FS value. Under such conditions, the output data rate will become 1/4th of the original value as the Digital State Machine will RESET the Delta-Sigma Modulator and the Decimation Filter. Temperature Sensor (ISL26132 only) When the TEMP pin of the ISL26132 is set High, the input multiplexer is connected to a pair of diodes, which are scaled in both size and current. The voltage difference measured between them corresponds to the temperature of the die according to Equation 1: Note: Valid only for GAIN = 1x or 2x Where T is the temperature of the die, and Gain = the PGA Gain Setting. At a temperature of +25°C, the measured voltage will be approximately 111.7mV. Note that this measurement indicates only the temperature of the die itself. Applying the result to correct for the temperature drift of a device external to the package requires that thermal coupling between the sensor and the die be taken into account. Low-Noise Programmable Gain Amplifier (PGA) The chopper-stabilized programmable gain amplifier features a variety of gain settings to achieve maximum dynamic range and measurement accuracy from popular sensor types with excellent low noise performance, input offset error, and low drift, and with minimal external parts count. The GAIN0 and GAIN1 pins allow the user to select gain settings of 1x, 2x, 64x, or 128x. A block diagram is shown in Figure 24. The differential input stage provides a gain of 64, which is bypassed when the lower gain settings are selected. The lower gain settings (1 and 2) will accept inputs with common mode voltages up to 100mV outside the rails, allowing the device to accept ground-referred signals. At gain settings of 64 or 128 the common mode voltage at the inputs is limited to 1.5V inside the supply rails while maintaining specified measurement accuracy. TABLE 7. INPUT CHANNEL SELECTION CHANNEL SELECT PINS ANALOG INPUT PINS SELECTED A1 A0 AIN+ AIN- 0 0 AIN1+ AIN1- 0 1 AIN2+ AIN2- 1 0 AIN3+ AIN3- 1 1 AIN4+ AIN4- 3.75 2.50 1.25 1.25V INPUT VOLTAGE RANGE = ±0.5VREF/GAIN VREF = 5V, GAIN = 1X 3.75 2.50 1.25 AIN+ AIN- 2.50V FIGURE 23. DIFFERENTIAL INPUT FOR VREF = 5V, GAIN = 1X V= 102.2mV + (379μV∗T(°C))∗Gain (EQ. 1) ISL26132, ISL26134 13 FN6954.1 September 9, 2011 Filtering PGA Output Noise The programmable gain amplifier, as shown in Figure 24, includes a passive RC filter on its output. The resistors are located inside the chip on the outputs of the differential amplifier stages. The capacitor (nominally a 100nF C0G ceramic or a PPS film (Polyphenylene sulfide)) for the filter is connected to the two CAP pins of the chip. The outputs of the differential amplifier stages of the PGA are filtered before their signals are presented to the delta-sigma modulator. This filter reduces the amount of noise by limiting the signal bandwidth and filters the chopping artifacts of the chopped PGA stage. Voltage Reference Inputs (VREF+, VREF-) The voltage reference for the ADC is derived from the difference in the voltages presented to the VREF+ and VREF- pins; VREF = (VREF+ - VREF-). The ADCs are specified with a voltage reference value of 5V, but a voltage reference as low as 1.5V can be used. For proper operation, the voltage on the VREF+ pin should not be greater than AVDD + 0.1V and the voltage on the VREF- pin should not be more negative than AGND - 0.1V. Clock Sources The ISL26132, ISL26134 can operate from an internal oscillator, an external clock source, or from a crystal connected between the XTALIN/CLOCK and XTALOUT pins. See the block diagram of the clock system in Figure 25. When the ADC is powered up, the CLOCK DETECT block determines if an external clock source is present. If a clock greater than 300kHz is present on the XTALIN/CLOCK pin, the circuitry will disable the internal oscillator on the chip and use the external clock as the clock to drive the chip circuitry. If the ADC is to be operated from the internal oscillator, the XTALIN/CLOCK pin should be grounded. If the ADC is to be operated from a crystal, it should be located close to the package pins of the ADC. Note that external loading capacitors for the crystal are not required as there are loading capacitors built into the silicon, although the capacitor values are optimized for operation with a 4.9152MHz crystal. The XTALOUT pin is not intended to drive external circuits. Digital Filter Characteristics The digital filter inside the ADC is a fourth-order Siinc filter. Figures 26 and 27 illustrate the filter response for the ADC when it is operated from a 4.9152MHz crystal. The internal oscillator is factory trimmed so the frequency response for the filter will be much the same when using the internal oscillator. The figures illustrate that when the converter is operated at 10Sps the digital filter provides excellent rejection of 50Hz and 60Hz line interference. FIGURE 24. SIMPLIFIED PROGRAMMABLE GAIN AMPLIFIER BLOCK DIAGRAM + - A1 - + A2 AINx- AINx+ ADC RINT RINT R1 RF1 RF2 CAP CAP FIGURE 25. CLOCK BLOCK DIAGRAM XTALIN/ CRYSTAL OSCILLATOR XTALOUT TO ADC INTERNAL OSCILLATOR CLOCK DETECT MUX EN CLOCK ISL26132, ISL26134 14 FN6954.1 September 9, 2011 Serial Clock Input (SCLK) The serial clock input is provided with hysteresis to minimize false triggering. Nevertheless, care should be taken to ensure reliable clocking. Filter Settling Time and ADC Latency Whenever the analog signal into the ISL26132, ISL26134 converters is changed, the effects of the digital filter must be taken into account. The filter takes four data ready periods for the output code to fully reflect a new value at the analog input. DM the multiplexer control input is changed, the modulator and the digital filter are reset, and the device uses four data ready periods to fully settle to yield a digital code that accurately represents the analog input. Therefore, from the time the control inputs for the multiplexer are changed until the SDO/RDY goes low, four data ready periods will elapse. The settling time delay after a multiplexer channel change is listed in Table 8 for the converter operating in continuous conversion mode. 0 -50 -100 -150 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (Hz) GAIN (dB) DDAATTAA RRAATTEE == 1100 SSpPsS FIGURE 26. 10Sps: FREQUENCY RESPONSE OUT TO 100Hz -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 45 50 55 60 65 FREQUENCY (Hz) GAIN (dB) DATA RATE = 10Sps FIGURE 27. 10Sps: 50/60Hz NOISE REJECTION, 45Hz TO 65Hz TABLE 8. SETTLING TIME PARAMETER DESCRIPTION (fCLK = 4.9152MHz) MIN MAX UNITS tS A0, A1, SPEED, Gain1, Gain0 change set-up time 40 50 μs t1 Settling time SPEED = 1 54 55 ms SPEED = 0 404 405 ms FIGURE 28. SDO/RDY DELAY AFTER MULTIPLEXER CHANGE SDO/RDY tS t1 A0, A1, SPEED, Gain1, Gain0 ISL26132, ISL26134 15 FN6954.1 September 9, 2011 Conversion Data Rate The SPEED pin is used to select between the 10Sps and 80Sps conversion rates. The 10Sps rate (SPEED = Low) is preferred in applications requiring 50/60Hz noise rejection. Note that the sample rate is directly related to the oscillator frequency, as 491,520 clocks are required to perform a conversion at the 10Sps rate, and 61,440 clocks at the 80Sps rate. Output Data Format The 24-bit converter output word is delivered in two’s complement format. Input exceeding full scale results in a clipped output which will not return to in-range values until after the input signal has returned to the specified allowable voltage range and the digital filter has settled as discussed previously. Reading Conversion Data from the Serial Data Output/Ready SDO/RDY Pin When the ADC is powered, it will automatically begin doing conversions. The SDO/RDY signal will go low to indicate the completion of a conversion. After the SDO/RDY signal goes low, the MSB data bit of the conversion word will be output from the SDO/RDY pin after SCLK is transitioned from a low to a high. Each subsequent new data bit is also output on the rising edge of SCLK (see Figure 30). The receiving device should use the falling edge of SCLK to latch the data bits. After the 24th SCLK, the SDO/RDY output will remain in the state of the LSB data bit until a new conversion is completed. At this time, the SDO/RDY will go high if low and then go low to indicate that a new conversion word is available. If not all data bits are read from the SDO/RDY pin prior to the completion of a new conversion, they will be overwritten. SCLK should be low during time t6, as shown in Figure 30, when SDO/RDY is high. If the user wants the SDO/RDY signal to go high after reading the 24 bits of the conversion data word, a 25th SCLK can be issued. The 25th SCLK will force the SDO/RDY signal to go high and remain high until it falls to signal that a new conversion word is available. Figure 31 illustrates the behavior of the SDO/RDY signal when a 25th SCLK is used. FIGURE 29. SDO/RDY DELAY AFTER MULTIPLEXER CHANGE SDO/RDY TABLE 9. OUTPUT CODES CORRESPONDING TO INPUT INPUT SIGNAL OUTPUT CODE (HEX) ≥ + 0.5VREF/GAIN 7FFFFF (+0.5VREF/GAIN)/(223 - 1) 000001 0 000000 (-0.5VREF/GAIN)/(223 - 1) FFFFFF ≤ - 0.5VREF/GAIN 800000 FIGURE 30. OUTPUT DATA WAVEFORMS USING 24 SCLKS TO READ CONVERSION DATA SDO/RDY DATA READY DATA MSB LSB NEW DATA READY 23 22 21 0 SCLK t4 t2 1 t3 24 t5 t6 t3 t7 ISL26132, ISL26134 16 FN6954.1 September 9, 2011 Offset Calibration Control The offset internal to the ADC can be removed by performing an offset calibration operation. Offset calibration can be initiated immediately after reading a conversion word with 24 SCLKs by issuing two additional SCLKs. The offset calibration operation will begin immediately after the 26th SCLK occurs. Figure 32 illustrates the timing details for the offset calibration operation. During offset calibration, the analog inputs are shorted internally and a regular conversion is performed. This conversion generates a conversion word that represents the offset error. This value is stored and used to digitally remove the offset error from future conversion words. The SDO/RDY output will fall to indicate the completion of the offset calibration operation. TABLE 10. INTERFACE TIMING CHARACTERISTICS PARAMETER DESCRIPTION MIN TYP MAX UNITS t2 SDO/RDY Low to first SLK 0 ns t3 SCLK pulsewidth, Low or High 100 ns t4 SCLK High to Data Valid 50 ns t5 Data Hold after SCLK High 0 ns t6 Register Update Time 39 μs t7 Conversion Period SPEED = 1 12.5 ms SPEED = 0 100 ms FIGURE 31. OUTPUT DATA WAVEFORMS FOR SDO/RDY POLLING DATA READY NEW DATA READY SDO/RDY SCLK 23 22 21 0 1 24 25 DATA 25TH SCLK FORCES SDO/RDY HIGH FIGURE 32. OFFSET CALIBRATION WAVEFORMS DATA READY AFTER CALIBRATION CALIBRATION BEGINS SDO/RDY SCLK 23 22 21 0 23 1 24 25 26 t8 FIGURE 33. STANDBY MODE WAVEFORMS DATA READY START CONVERSION STANDBY MODE SDO/RDY SCLK 23 22 21 0 1 24 t10 t11 t9 23 TABLE 11. SDO/RDY DELAY AFTER CALIBRATION PARAMETER MIN MAX UNITS t8 SPEED = 1 108 109 ms SPEED = 0 808 809 ms ISL26132, ISL26134 17 FN6954.1 September 9, 2011 Standby Mode Operation The ADC can be put into standby mode to save power. Standby mode reduces the power to all circuits in the device except the crystal oscillator amplifier. To enter the standby mode, take the SCLK signal high and hold it high after SDO/RDY falls. la converter will remain in standby mode as long as SCLK is held high. To return to normal operation, take SCLK back low and wait for the SDO/RDY to fall to indicate that a new conversion has completed. Figure 33 and Table 12 illustrate the details of standby mode. Supply currents are equal in Standby and Power-down modes unless a Crystal is used. If the Crystal is used, the Crystal amplifier is turned ON, even in the standby mode. Performing Offset Calibration After Standby mode To perform an offset calibration automatically upon returning from standby, deliver 2 or more additional SCLKs following a data read cycle, and then set and hold SCLK high. The device will remain in Standby as long as SCLK remains high. A calibration cycle will begin once SCLK is brought low again to resume normal operation. Additional time will be required to perform the calibration after returning from Standby. Figure 34 and Table 13 illustrate the details of performing offset calibration after standby mode. TABLE 12. STANDBY MODE TIMING PARAMETER DESCRIPTION MIN MAX UNITS t9 SCLK High after SDO/RDY Low SPEED = 1 0 12.44 ms SPEED = 0 0 99.94 t10 Standby Mode Delay SPEED = 1 12.5 SPEED = 0 100 t11 SDO/RDY falling edge after SCLK Low SPEED = 1 50 60 SPEED = 0 400 410 TABLE 13. OFFSET CALIBRATION TIMING AFTER STANDY PARAMETER DESCRIPTION MIN MAX UNITS t12 SDO/RDY Low after SCLK Low SPEED = 1 108 113 ms SPEED = 0 808 813 ms FIGURE 34. OFFSET CALIBRATION WAVEFORMS AFTER STANDBY SDO/RDY SCLK 23 22 21 0 1 24 25 STANDBY MODE DATA READY AFTER CALIBRATION BEGIN 23 CALIBRATION t10 t12 ISL26132, ISL26134 18 FN6954.1 September 9, 2011 Operation of PDWN PDWN must transition from low to high after both power supplies have settled to specified levels in order to initiate a correct power-up reset (Figure 35). This can be implemented by an external controller or a simple RC delay circuit, as shown in Figure 36. In order to reduce power consumption, the user can assert the Power-down mode by bringing PDWN Low as shown in Figure 37. All circuitry is shut down in this mode, including the Crystal Oscillator. After PDWN is brought High to resume operation, the reset delay varies depending on the clock source used. While an external clock source will resume operation immediately, a circuit utilizing a crystal will incur about a 20 millisecond delay due to the inherent start-up time of this type of oscillator. FIGURE 35. POWER-DOWN TIMING RELATIVE TO SUPPLIES ≥10μs AVDD DVDD PDWN FIGURE 36. PDWNDELAY CIRCUIT DVDD 1kΩ 2.2nF CONNECT TO PDWN PIN FIGURE 37. POWER-DOWN MODE WAVEFORMS SDO/RDY SCLK t11 PDWN POWER-DOWN MODE START CONVERSION DATA CLK READY SOURCE WAKEUP t13 tt1144 TABLE 14. POWER-DOWN RECOVERY TIMING PARAMETER DESCRIPTION TYP UNITS t13 Clock Recovery after PDWN High Internal Oscillator 7.95 μs External Clock Source 0.16 μs 4.9152MHz Crystal Oscillator 5.6 ms t14 PDWN Pulse Duration 26 μs (min) ISL26132, ISL26134 19 FN6954.1 September 9, 2011 Applications Information Power-up Sequence – Initialization and Configuration The sequence to properly power-up and initialize the device are as follows. For details on individual functions, refer to their descriptions. 1. AVDD, DVDD ramp to specified levels 2. Apply External Clock 3. Pull PDWN High to initiate Reset 4. Device begins conversion 5. SDO/RDY goes low at end of first conversion OPTIONAL ACTIONS • Perform Offset Calibration • Place device in Standby • Return device from Standby • Read on-chip Temperature (applicable to ISL26132 only) Application Examples WEIGH SCALE SYSTEM Figure 38 illustrates the ISL26132 connected to a load cell. la A/D converter is configured for a gain of 128x and a sample rate of 10Sps. If a load cell with 2mV/V sensitivity is used, the full scale output from the load cell will be 10mV. On a gain of 128x and sample rate of 10Sps, the converter noise is 67nVP-P. la converter will achieve 10mV/67nVP-P = 149,250 noise free counts across its 10mV input signal. This equates to 14,925 counts per mV of input signal. If five output words are averaged together this can be improved by √5 to yield √5*14925 counts = 33,370 counts per mV of input signal with an effective update rate of 2 readings per second. THERMOCOUPLE MEASUREMENT Figure 39 illustrates the ISL26132 in a thermocouple application. As shown, the 4.096V reference combined with the PGA gain set to 128x sets the input span of the converter to ±16mV. This supports the K type thermocouple measurement for temperatures from -270°C at -6.485mV to +380°C at about 16mV. If a higher temperature is preferred, the PGA can be set to 64x to provide a converter span of ±32mV. The will allow the converter to support temperature measurement with the K type thermocouple up to about +765°C. In the circuit shown, the thermocouple is referenced to a voltage dictated by the resistor divider from the +5V supply to ground. These set the common mode voltage at about 2.5V. The 5M resistors provide a means for detection of an open thermocouple. If the thermocouple fails open or is not connected, the bias through the 5M resistors will cause the input to the PGA to go to full scale. AVDD VREF+ CAP CAP AIN+1 AIN-1 AIN+2 AIN-2 VREFAGND DGND TEMP A0 SPEED XTALOUT PDWN SCLK SDO/RDY GAIN0 GAIN1 DVDD ISL26132 XTALIN/CLOCK - + 0.1μF VDD MICRO CONTROLLER GND 16 9 10 11 12 14 13 15 17 2, 5, 6 7 8 21 3 4 22 23 24 19 20 GAIN = 128 5V 3V 0.1μF 18 1 FIGURE 38. WEIGH SCALE APPLICATION ISL26132, ISL26134 20 FN6954.1 September 9, 2011 PCB Board Layout and System Configuration The ISL26132,ISL26134 ADC is a very low noise converter. taux achieve the full performance available from the device will require attention to the printed circuit layout of the circuit board. Care should be taken to have a full ground plane without impairments (traces running through it) directly under the chip on the back side of the circuit board. The analog input signals should be laid down adjacent (AIN+ and AIN- for each channel) to achieve good differential signal practice and routed away from any traces carrying active digital signals. The connections from the CAP pins to the off-chip filter capacitor should be short, and without any digital signals nearby. The crystal, if used should be connected with relatively short leads. No active digital signals should be routed near or under the crystal case or near the traces, which connect it to the ADC. The AGND and DGND pins of the ADC should be connected to a common solid ground plane. All digital signals to the chip should be powered from the same supply, as that used for DVDD (do not allow digital signals to be active high unless the DVDD supply to the chip is alive). Route all active digital signals in a way to keep distance from any analog pin on the device (AIN, VREF, CAP, AVDD). Power on the AVDD supply should be active before the VREF voltage is present. PCB layout patterns for the chips (ISL26132 and ISL26134) are found on the respective package outline drawings on pages 22, and 23. AVDD VREF+ AIN+1 AIN-1 AIN+2 AIN-2 VREFAGND DGND TEMP A0 SPEED XTALOUT PDWN SCLK SDO/RDY GAIN0 GAIN1 DVDD XTALIN/CLOCK MICRO CONTROLLER 16 11 12 14 13 15 17 2, 5, 6 7 8 21 3 4 22 23 24 19 20 +5V +3V 0.1μF 18 1 FIGURE 39. THERMOCOUPLE MEASUREMENT APPLICATION 4.9152 MHz ISL21009 4.096V 10nF 1μF 10k 10k 0.1μF TYPE K 5M 5M ISL26132, ISL26134 21 Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6954.1 September 9, 2011 For additional products, see www.intersil.com/product_tree Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL26132, ISL26134 To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION CHANGE 09/08/11 FN6954.1 Power Supply Requirements on page 6 - AIDD - Analog Supply Current - Normal Mode, AVDD = 5, Gain = 1,2 changed TYP and MAX from “6, 7.3” to “7, 8.5” Power Dissipation, Total Normal Mode, AVDD = 5, Gain = 1, 2 changed from “43.3” to “49.6” mW (Max) 08/22/11 FN6954.0 Initial Release. ISL26132, ISL26134 22 FN6954.1 September 9, 2011 Package Outline Drawing M24.173 24 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 1, 5/10 DETAIL "X" TYPICAL RECOMMENDED LAND PATTERN TOP VIEW SIDE VIEW END VIEW Dimension does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 per side. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. Dimensions are measured at datum plane H. Dimensioning and tolerancing per ASME Y14.5M-1994. Dimension does not include dambar protrusion. Allowable protrusion shall be 0.08mm total in excess of dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm. Dimension in ( ) are for reference only. Conforms to JEDEC MO-153. 6. 3. 5. 4. 2. Une. NOTES: 7. 5 SEATING PLANE C H 2 3 1 24 B 12 1 3 13 A PLANE GAUGE 0.05 MIN 0.15 MAX 0°-8° 0.60± 0.15 0.90 1.00 REF 0.25 SEE DETAIL "X" 0.15 0.25 (0.65 TYP) (5.65) (0.35 TYP) (1.45) 6.40 4.40 ±0.10 0.65 1.20 MAX PIN #1 I.D. MARK 7.80 ±0.10 +0.05 -0.06 -0.06 +0.05 -0.10 +0.15 0.20 C B A 0.10 C - 0.05 0.10 M C B A ISL26132, ISL26134 23 FN6954.1 September 9, 2011 Package Outline Drawing M28.173 28 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 1, 5/10 DETAIL "X" TYPICAL RECOMMENDED LAND PATTERN TOP VIEW SIDE VIEW END VIEW Dimension does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 per side. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. Dimensions are measured at datum plane H. Dimensioning and tolerancing per ASME Y14.5M-1994. Dimension does not include dambar protrusion. Allowable protrusion shall be 0.08mm total in excess of dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm. Dimension in ( ) are for reference only. Conforms to JEDEC MO-153. 6. 3. 5. 4. 2. Une. NOTES: 7. 5 SEATING PLANE C H 2 3 1 28 B 14 1 3 15 A PLANE GAUGE 0.05 MIN 0.15 MAX 0°-8° 0.60 ±0.15 0.90 1.00 REF 0.25 SEE DETAIL "X" 0.25 (0.65 TYP) (5.65) (0.35 TYP) (1.45) 6.40 4.40 ± 0.10 0.65 1.20 MAX PIN #1 I.D. MARK 9.70± 0.10 -0.06 0.15 +0.05 -0.10 +0.15 -0.06 +0.05 0.20 C B A 0.10 C - 0.05 0.10 M C B A Both, the Deltabell® E and Plus feature engineer friendly features such as the unique levelling mechanism and modular components that make simple sounder installations a reality. Both external sounders incorporate the same features that are described overleaf. However, the Deltabell® Plus has a fully back-light option, which enables around the clock visual deterrent to maximise your security. The Deltabell® E and Plus are available in a variety of different colours: Low power external sounder with strobe Low power external sounder with strobe and back-light Available Base Colours: Red, Green, White, Amber, Blue and Black Available Lid Colours: Red, White, Yellow, Black*, Blue* and Chrome* *Not recommended for Deltabell® Plus 2012 Pyronix Ltd. Pyronix, the Pyronix Blades device, Deltabell are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. Other cover colour options available. White cover recommended for use with backlit Deltabell PLUS for optimum visual clarity. RMKT090001-7 © 2009 Pyronix Ltd. Pyronix and the Pyronix Blades device are trademarks of Pyronix Ltd. As part of our continued development programme specifications of the V2 TEL and V2 GSM may change. RMKT090057-1 © 2009 Pyronix Ltd. Pyronix, the Pyronix Blades device, TMD15 and TriCover are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. RMKT080064-4 © 2009 Pyronix Ltd. Pyronix, the Pyronix Blades device, TMD15 and TriCover are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. RMKT090057-1 www.pyronix.com marketing@pyronix.com 01709 700100 www.pyronix.com marketing@pyronix.com 01709 700100 www.pyronix.com marketing@pyronix.com 01709 700100 www.pyronix.com marketing@pyronix.com 01709 700100 2010 Pyronix Ltd. Pyronix, the Pyronix Blades device, Deltabell are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. Other cover colour options available. White cover recommended for use with backlit Deltabell PLUS for optimum visual clarity. RMKT090150 www.pyronix.com marketing@pyronix.com 01709 700100Current consumption feature Deltabell® Plus only The Deltabell® incorporates a LDR (Light Dependant Resistor) circuit which turns the Light off during daylight hours when it is not needed, saving on the product current consumption. When the day turns from dusk to dark the Lightbox illuminates so that your external visual deterrent can be seen on the darkest of nights. Visual alarm warning feature Deltabell® Plus only In addition to the strobe which is present on all of the Deltabell® models, the Deltabell® PLUS has the added feature that the illuminated cover will strobe when the alarm is activated, giving you the added peace of mind that your alarm will be seen in ‘alarm mode’ from a much greater distance than standard sounders that do not have back lighting facilities. Security and peace of mind The Deltabell® has front and rear tamper protection and in the event of a potential sabotage attack, the 104dBA sounder provides a distinctive audible warning. The electronic elements on the printed circuit board are protected by a fully sealed unit with a rubber gasket providing added protection in harsh environments and giving your customer peace of mind that the Deltabell® will always sound in the event of an alarm activation. 104 dBA sounder Piezo sounder with high decibel output.   Engineer hold-off facility The Deltabell® engineer hold-off facility means that when initially powered with the tamper switch open, the sounder will not activate. Remote engineer hold-off facility There is also the capability for remote engineer hold-off which is invaluable when you are servicing the system enabling easy maintenance. It can be turned on at any time by applying 0V to this dedicated terminal which will then disable the tamper. Unique levelling mechanism A spirit level is supplied so that you can easily mount the Deltabell®. In addition, to make the installation as simple as possible, revolving guide holes are used to save time lining up screw and drill holes. SCB/SAB Mode Self Contained Bell or Self Activating Bell mode. Hinged cover The Deltabell® has a hinged cover that locks into place so that both your hands are free to work on the sounder. Fully back-lit cover The Deltabell® low power modular unit back-lights the cover (Deltabell® Plus only)  Electrical specification Operating Voltage Supply: 9-16 V DC (13.5 nominal) Protected: Reverse polarity protected Current Consumption Quiescent Current: < 60 mA Alarm Current: < 300 mA Strobe Strobe Duration: 100 ms Strobe Frequency: 1Hz Dimensions [W] 290 mm [H] 285 mm [D] 50 mm Compliance Europe. Suitable for use in EN50131-1 systems Security grade 2 or 3, Environmental class IV [H] [W] [D] Packing information Minimum quantity: 10 Minimum order for screen print: 40 Warranty: 2 years Designed: UK   Dummy bases also available 2012 Pyronix Ltd. Pyronix, the Pyronix Blades device, Deltabell are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. Other cover colour options available. White cover recommended for use with backlit Deltabell PLUS for optimum visual clarity. RMKT090001-7 © 2009 Pyronix Ltd. Pyronix and the Pyronix Blades device are trademarks of Pyronix Ltd. As part of our continued development programme specifications of the V2 TEL and V2 GSM may change. RMKT090057-1 © 2009 Pyronix Ltd. Pyronix, the Pyronix Blades device, TMD15 and TriCover are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. RMKT080064-4 © 2009 Pyronix Ltd. Pyronix, the Pyronix Blades device, TMD15 and TriCover are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. RMKT090057-1 www.pyronix.com marketing@pyronix.com 01709 700100 www.pyronix.com marketing@pyronix.com 01709 700100 www.pyronix.com marketing@pyronix.com 01709 700100 www.pyronix.com marketing@pyronix.com 01709 700100 2010 Pyronix Ltd. Pyronix, the Pyronix Blades device, Deltabell are all trademarks of Pyronix Ltd. UK Registered Design. As part of our continued development programme specifications may change. Other cover colour options available. White cover recommended for use with backlit Deltabell PLUS for optimum visual clarity. RMKT090150 www.pyronix.com marketing@pyronix.com 01709 700100 Serial File Transfer Cables The cables feature either the traditional 25 D type RS232 connector or the now more commonly fitted 9 D type serial connector. As the serial port on most PCs is a plug or male the most common interface cable tends to be a socket to socket (female to female). Caractéristiques: • Multi-headed cable allows either 9 D or 25 D connection - providing complete serial port flexibility • Both serial port configurations (Pt Nos 4070 & 4062) available from stock • High quality moulded cables manufactured using foil screened cable • Custom lengths can be made up upon request • Now recognised as conforming to the most standard file transfer wiring configuration 4070 Stock No Description PC AT to PC AT 4070 DB9F to DB9F Null Modem Cable 2Mtr 4070-3 DB9F to DB9F Null Modem Cable 3Mtr 4070-5 DB9F to DB9F Null Modem Cable 5Mtr 4070-10 DB9F to DB9F Null Modem Cable 10Mtr 4070-15 DB9F to DB9F Null Modem Cable 15Mtr PC XT to PC XT 4062 DB25F to DB25F Null Modem Cable 2Mtr 4062-3 DB25F to DB25F Null Modem Cable 3Mtr 4062-5 DB25F to DB25F Null Modem Cable 5Mtr 4062-10 DB25F to DB25F Null Modem Cable 10Mtr PC XT to PC AT 4063 DB9F to DB25F Null Modem Cable 2Mtr 4063-3 9DS TO 25DS NULL MODEM 3M 4063-5 9DS TO 25DS NULL MODEM 5M 4063-10 9DS TO 25DS NULL MODEM 10M Multi-head Serial Cables 4090 DB9F+DB25F to DB9F+DB25F Null Modem Cable 2Mtr 4090-3 DB9F+DB25F to DB9F+DB25F Null Modem Cable 3Mtr 4090-5 DB9F+DB25F to DB9F+DB25F Null Modem Cable 5Mtr Amplifier Internet Radio Terrestrial Tuner Features Feature Description vols Sources 6 – Internet Radio, MP3, CD, Terrestrial Radio, Auxiliary Input. Portable Yes, two part system. The Internet Radio is completely portable receiving all data and audio over a wireless link from the transmitter part connected to the PC USB port. LCD Display 20 character 5 x 7 dot matrix display with icons, EL blue backlight. Power Source 8 x C size 1.5 volt alkaline battery or AC mains – 220 - 240 volt Europe, 110 volt US. Operation Time Approx 30 hours continuous play at mid volume on one set of alkaline batteries. Feature Description Output Power (RMS) 2 x 2.2 watts Total Power 4.4 watts Music Power 2 x 4.4 watts PMPO 65 watts Feature Description Radio presets 6 with station name display Feature Description Digital Tuner bands FM Stereo Tuner presets 6 for each band Antenna FM YesLoudspeaker Connections Wireless Link Dimensions Frequency Display Yes, 4 digit Feature Description No. of way speaker system 1 – way full range driver Impedance 2 x 8 ohm Rated Power (RMS) 2 x 6 watts Size 67 mm x 106 mm, Elliptical Magnetic Shielding Yes Feature Description stéréo headphone Yes Auxiliary Input Yes, 2 x phono socket Auxiliary Output Yes, 2 x phono socket USB connection Yes, transmitter connects to PC USB port with 1.5 metre cable Feature Description Stereo Audio Channel Europe 863 MHz 10 mW erp, USA 925 MHz 10 mW erp, user selectable band switching to avoid interference. Data Channel Europe + USA, 433 MHz , bi-directional, user selectable band switching to avoid interference. Feature Description Radio Remote Module Front to Back 155mm (6.1"), Side to Side 283mm (11.1"), Height 150mm (5.9") USB Base Module Front to Back 120mm (4.7"), Side to Side 135mm (5.3"), Height 41mm (1.6") 1 / 5 Date de révision November 2011 Révision 3 No FDS 16447 FICHE DE DONNEES DE SECURITE ARALDITE FUSION HARDENER SECTION 1: IDENTIFICATION DE LA SUBSTANCE/DU MÉLANGE ET DE LA SOCIÉTÉ/L’ENTREPRISE 1.1. Identificateur de produit Nom commercial ARALDITE FUSION HARDENER No du produit 808300, 808409, 808416, 808423 1.2. Utilisations identifiées pertinentes de la substance ou du mélange et utilisations déconseillées 1.3. Renseignements concernant le fournisseur de la fiche de données de sécurité Distributeur BOSTIK LIMITED COMMON ROAD STAFFORD STAFFORDSHIRE ST16 3EH UNITED KINGDOM +44 1785 255141 +44 1785 272650 (24Hour Emergency) sds.uk@bostik.com 1.4. Numéro d’appel d’urgence SECTION 2: IDENTIFICATION DES DANGERS 2.1. Classification de la substance ou du mélange Classification (1999/45/CEE) Xi;R36/38. 2.2. Éléments d’étiquetage Étiquetage Irritant Phrases De Risque R36/38 Irritant pour les yeux et la peau. Conseils De Prudence S2 Conserver hors de la portée des enfants. S24/25 Éviter le contact avec la peau et les yeux. S26 En cas de contact avec les yeux, laver immédiatement et abondamment avec de l'eau et consulter un spécialiste. S36/37/39 Porter un vêtement de protection approprié, des gants et un appareil de protection des yeux/ du visage. S46 En cas d'ingestion, consulter immédiatement un médecin et lui montrer l'emballage ou l'étiquette. S56 Éliminer ce produit et son récipient dans un centre de collecte des déchets dangereux ou spéciaux. 2.3. Autres dangers SECTION 3: COMPOSITION/INFORMATIONS SUR LES COMPOSANTS 3.2. Mélanges 2 / 5 No FDS 16447 ARALDITE FUSION HARDENER 1,8-DIAZABICYCLO[5.4.0]UNDEC-7-ENE 1-5% No CAS : 6674-22-2 No CE : 229-713-7 Classification (67/548/CEE) Xn;R22. C;R34. R52/53. Classification (CE 1272/2008) Non classé. BIS(2-DIMETHYLAMINOETHYL)ETHER 1-5% No CAS : 3033-62-3 No CE : 221-220-5 Classification (67/548/CEE) T;R23/24. Xn;R22. C;R35. Classification (CE 1272/2008) Non classé. TRIETHYLENETETRAMINE, PROPOXYLATED 5-10% No CAS : 26950-63-0 No CE : 500-055-5 Classification (67/548/CEE) Xi;R38,R41. Classification (CE 1272/2008) Non classé. L'intégralité du texte des phrases de risque et des mentions de danger figure à la Section 16. SECTION 4: PREMIERS SECOURS 4.1. Description des premiers secours Inhalation Éloigner immédiatement la victime de la source d'exposition. Emmener immédiatement à l'air frais la personne exposée. Consulter un médecin. Ingestion NE PAS faire vomir. Consulter immédiatement un médecin. Contact avec la peau Rincer rapidement la peau contaminée avec du savon ou un détergent doux et de l'eau. Enlever rapidement les vêtements imbibés et les laver comme indiqué ci-dessus. Consulter un médecin si l'irritation persiste après le lavage. Contact avec les yeux Rincer immédiatement les yeux avec de l'eau. Continuer à rincer pendant au moins 15 minutes et consulter un médecin. 4.2. Principaux symptômes et effets, aigus et différés 4.3. Indication des éventuels soins médicaux immédiats et traitements particuliers nécessaires SECTION 5: MESURES DE LUTTE CONTRE L’INCENDIE 5.1. Moyens d’extinction Moyens d'extinction Ce produit est ininflammable. Choisir le moyen d'extinction d'incendie en tenant compte d'autres produits chimiques éventuels. Utiliser : Mousse, dioxyde de carbone ou poudre sèche. 5.2. Dangers particuliers résultant de la substance ou du mélange 5.3. Conseils aux pompiers SECTION 6: MESURES À PRENDRE EN CAS DE DISPERSION ACCIDENTELLE 6.1. Précautions individuelles, équipement de protection et procédures d’urgence 6.2. Précautions pour la protection de l’environnement 3 / 5 No FDS 16447 ARALDITE FUSION HARDENER 6.3. Méthodes et matériel de confinement et de nettoyage Absorber avec de la vermiculite, du sable sec ou de la terre, puis placer en récipient. 6.4. Référence à d’autres sections SECTION 7: MANIPULATION ET STOCKAGE 7.1. Précautions à prendre pour une manipulation sans danger Faire très attention de ne pas renverser la matière et éviter du contact avec la peau et les yeux. 7.2. Conditions d’un stockage sûr, y compris d’éventuelles incompatibilités Entreposer à une température modérée dans un endroit sec et bien aéré. 7.3. Utilisation(s) finale(s) particulière(s) SECTION 8: CONTRÔLES DE L’EXPOSITION/PROTECTION INDIVIDUELLE 8.1. Paramètres de contrôle Description Des Ingrédients WEL = Workplace Exposure Limits 8.2. Contrôles de l’exposition Équipements de protection Mesures d'ingénierie Assurer une ventilation efficace. Protection respiratoire Si la ventilation est insuffisante, une protection respiratoire appropriée doit être disponible. Protection des mains Porter des gants de protection en cas de risque de contact direct ou d'éclaboussures. Protection des yeux Porter des lunettes de sécurité lunettes anti-éclaboussures pour éviter tout contact avec les yeux. Mesures d'hygiène Se laver rapidement en cas de contamination de la peau. Se laver après le travail et avant de manger, de fumer et avant d'aller aux toilettes. SECTION 9: PROPRIÉTÉS PHYSIQUES ET CHIMIQUES 9.1. Informations sur les propriétés physiques et chimiques essentielles Aspect Liquide Couleur Clair (ou pâle). Jaune. Odeur Odeur faible. Solubilité Insoluble dans l'eau Densité relative 1.14 Point d'éclair (°C) 145 Creuset fermé Pensky-Martens. 9.2. Autres informations SECTION 10: STABILITÉ ET RÉACTIVITÉ 10.1. Réactivité 10.2. Stabilité chimique Stable aux températures normales. 10.3. Possibilité de réactions dangereuses 10.4. Conditions à éviter 4 / 5 No FDS 16447 ARALDITE FUSION HARDENER 10.5. Matières incompatibles 10.6. Produits de décomposition dangereux SECTION 11: INFORMATIONS TOXICOLOGIQUES 11.1. Informations sur les effets toxicologiques Contact avec la peau Irritant pour la peau. Contact avec les yeux Irritant pour les yeux. SECTION 12: INFORMATIONS ÉCOLOGIQUES Écotoxicité Non reconnu comme dangereux pour l'environnement. 12.1. Toxicité 12.2. Persistance et dégradabilité 12.3. Potentiel de bioaccumulation 12.4. Mobilité dans le sol 12.5. Résultats des évaluations PBT et vPvB 12.6. Autres effets néfastes SECTION 13: CONSIDÉRATIONS RELATIVES À L’ÉLIMINATION 13.1. Méthodes de traitement des déchets Éliminer les déchets et résidus conformément aux règlements municipaux. SECTION 14: INFORMATIONS RELATIVES AU TRANSPORT Généralités Le produit n'est pas soumis à la réglementation internationale sur le transport des marchandises dangereuses (IMDG, ICAO/IATA, ADR/RID). 14.1. Numéro ONU Non applicable. 14.2. Nom d’expédition des Nations unies Non applicable. 14.3. Classe(s) de danger pour le transport Étiquettes De Transport Aucun panneau d'avertissement de transport requis. 14.4. Groupe d’emballage Non applicable. 14.5. Dangers pour l’environnement Substance Dangereuse Pour L'Environnement/Polluant Marin Non. 14.6. Précautions particulières à prendre par l’utilisateur Non applicable. 14.7. Transport en vrac conformément à l’annexe II de la convention Marpol 73/78 et au recueil IBC Non applicable. SECTION 15: INFORMATIONS RÉGLEMENTAIRES 5 / 5 No FDS 16447 ARALDITE FUSION HARDENER 15.1. Réglementations/législation particulières à la substance ou au mélange en matière de sécurité, de santé et d’ environnement 15.2. Évaluation de la sécurité chimique SECTION 16: AUTRES INFORMATIONS Informations générales This product should be used as directed by Bostik Ltd.For further information consult the product data sheet or contact Technical Services. Références Littéraires This safety data sheet was compiled using current safety information supplied by distributor of raw materials. Commentaires De Mise À Jour OBS: Lignes en marges signifient des corrections importantes par rapport à la version précédente. This safety data sheet supersedes all previous issues and users are cautioned to ensure that it is current. Destroy all previous data sheets and if in doubt contact Bostik Limited. Émise Par Approved LJ Date de révision November 2011 Révision 3 Date September 2007 Phrases - R (Texte Intégral) R34 CAUSE DES BRÛLURES. R38 Irritant pour la peau. R22 Nocif en cas d’ingestion. Nocif pour les organismes aquatiques, peut entraîner des effets néfastes à long terme pour l'environnement aquatique. R52/53 R35 Provoque de graves brûlures. R41 Risque de lésions oculaires graves. R23/24 Toxique par inhalation et par contact avec la peau. October 2011 Araldite® Fusion Page 1 of 3 Huntsman Advanced Materials DIY Adhesives AralditeÒ Fusion Two component very fast epoxy adhesive Other commercial names • Araldite® Super Glue + • Araldite® Instant Clear • Araldite® Instant • Araldite® 90 Segundos Fusion • Araldite® 90 seconds Fusion • Araldite® 90 seconds Key properties • Very fast curing at room temperature • Transparent / pale coloured • 1 : 1 mixing • Solvent free Description Araldite® Fusion is a two part transparent epoxy adhesive gelling in 90 seconds. The product may be used to bond metals, ceramics and many common plastics. Product data Property Araldite® Fusion / Resin Araldite® Fusion / Hardener Araldite® Fusion / mixed Colour (visual) transparent pale yellow pale yellow Specific gravity 1.15 – 1.2 1.1 – 1.2 ca. 1.2 Viscosity at 25°C (Pa.s) 50 - 75 10 - 20 30 - 50 Pot Life (100 g at 25°C) - - 90 seconds Processing Pretreatment The strength and durability of a bonded joint are dependant on proper treatment of the surfaces to be bonded. At the very least, joint surfaces should be cleaned with a good degreasing agent such as acetone, iso-propanol (for plastics) or proprietary degreasing agent in order to remove all traces of oil, grease and dirt. Low grade alcohol, gasoline (petrol) or paint thinners should never be used. The strongest and most durable joints are obtained by either mechanically abrading or chemically etching (“pickling”) the degreased surfaces. Abrading should be followed by a second degreasing treatment. Mix ratio Parts by weight Parts by volume Araldite® Fusion / Resin 100 100 Araldite® Fusion / Hardener 100 100 October 2011 Araldite® Fusion Page 2 of 3 Huntsman Advanced Materials Application of adhesive The resin/hardener mix is applied directly or with a spatula to the pretreated and dry joint surfaces. A layer of adhesive 0.05 to 0.10 mm thick will normally impart the greatest lap shear strength to the joint. Huntsman stresses that proper adhesive joint design is also critical for a durable bond. The joint components should be assembled and secured in a fix position as soon as the adhesive has been applied. Equipment maintenance All tools should be cleaned with hot water and soap before adhesives residues have had time to cure. The removal of cured residues is a difficult and time-consuming operation. If solvents such as acetone are used for cleaning, operatives should take the appropriate precautions and, in addition, avoid skin and eye contact. Times to minimum shear strength Temperature °C 23 Cure time to reach hours LSS > 1MPa minutes 5 Cure time to reach hours LSS > 10MPa minutes 90 LSS = Lap shear strength. Typical cured properties Average lap shear strengths of typical joints (ISO 4587) Cured for 16 hours at 40°C and tested at 23°C. Pre-treatment: plastics abraded and degreased, metals sandblasted and degreased. 0 2 4 6 8 10 12 14 16 18 20 Aluminium Steel 37/11 Stainless steel V4A Copper SMC ABS PVC Polycarbonate Polyamides PMMA PC MPa October 2011 Araldite® Fusion Page 3 of 3 Huntsman Advanced Materials Lap shear strength versus temperature (ISO 4587) (typical average values) Carried out on sandblasted and degreased aluminium, cure 16 hours at 40°C 0 5 10 15 20 -40 -20 0 20 40 60 80 100 °C MPa Storage Araldite® Fusion may be stored for up to 2 years at room temperature provided the components are stored in sealed containers. Handling precautions Caution Our products are generally quite harmless to handle provided that certain precautions normally taken when handling chemicals are observed. The uncured materials must not, for instance, be allowed to come into contact with foodstuffs or food utensils, and measures should be taken to prevent the uncured materials from coming in contact with the skin, since people with particularly sensitive skin may be affected. The wearing of impervious rubber or plastic gloves will normally be necessary; likewise the use of eye protection. The skin should be thoroughly cleaned at the end of each working period by washing with soap and warm water. The use of solvents is to be avoided. Disposable paper - not cloth towels - should be used to dry the skin. Adequate ventilation of the working area is recommended. These precautions are described in greater detail in the Material Safety Data sheets for the individual products and should be referred to for fuller information. Huntsman Advanced Materials warrants only that its products meet the specifications agreed with the buyer. Typical properties, where stated, are to be considered as representative of current production and should not be treated as specifications. The manufacture of materials is the subject of granted patents and patent applications; freedom to operate patented processes is not implied by this publication. While all the information and recommendations in this publication are, to the best of our knowledge, information and belief, accurate at the date of publication, NOTHING HEREIN IS TO BE CONSTRUED AS A WARRANTY, EXPRESS OR OTHERWISE. IN ALL CASES, IT IS THE RESPONSIBILITY OF THE USER TO DETERMINE THE APPLICABILITY OF SUCH INFORMATION AND RECOMMENDATIONS AND THE SUITABILITY OF ANY PRODUCT FOR ITS OWN PARTICULAR PURPOSE. The behaviour of the products referred to in this publication in manufacturing processes and their suitability in any given end-use environment are dependent upon various conditions such as chemical compatibility, temperature, and other variables, which are not known to Huntsman Advanced Materials. It is the responsibility of the user to evaluate the manufacturing circumstances and the final product under actual end-use requirements and to adequately advise and warn purchasers and users thereof. Products may be toxic and require special precautions in handling. The user should obtain Safety Data Sheets from Huntsman Advanced Materials containing detailed information on toxicity, together with proper shipping, handling and storage procedures, and should comply with all applicable safety and environmental standards. Hazards, toxicity and behaviour of the products may differ when used with other materials and are dependent on manufacturing circumstances or other processes. Such hazards, toxicity and behaviour should be determined by the user and made known to handlers, processors and end users. Except where explicitly agreed otherwise, the sale of products referred to in this publication is subject to the general terms and conditions of sale of Huntsman Advanced Materials LLC or of its affiliated companies including without limitation, Huntsman Advanced Materials (Europe) BVBA, Huntsman Advanced Materials Americas Inc., and Huntsman Advanced Materials (Hong Kong) Ltd. Huntsman Advanced Materials is an international business unit of Huntsman Corporation. Huntsman Advanced Materials trades through Huntsman affiliated companies in different countries including but not limited to Huntsman Advanced Materials LLC in the USA and Huntsman Advanced Materials (Europe) BVBA in Europe. Araldite® is a registered trademark of Huntsman Corporation or an affiliate thereof. Copyright © 2011 Huntsman Corporation or an affiliate thereof. All rights reserved. Huntsman Advanced Materials (Switzerland) GmbH Klybeckstrasse 200 4057 Basel Switzerland Tel: +41 (0)61 299 11 11 www.go-araldite.com Emergency number : + 32 35 751 234 ARALDITE FUSION IDENTIFICATION DE LA SUBSTANCE/PRÉPARATION ET DE LA SOCIÉTÉ/ENTREPRISE FICHE DE DONNÉES DE SÉCURITÉ Nom du produit ARALDITE FUSION Conforme au règlement (CE) n° 1907/2006 (REACH), Annexe II - France 1. Numéro de téléphone d'appel d'urgence : Fournisseur : : Identification de la substance ou de la préparation Type de produit : Liquide. Pour toutes questions de Sécurité, Hygiène et Environnement relatives à ce document ou son contenu, veuillez contacter: E-Mail: global_product_ehs_admat@huntsman.com Utilisation de la substance/préparation : Système adhésif bi-composants EUROPE: +32 35 75 1234 France ORFILA: +33(0)145425959 ASIA: +65 6336-6011 China: +86 20 39377888 Australia: 1800 786 152 New Zealand: 0800 767 437 USA: +1/800/424.9300 Huntsman Advanced Materials (Europe)BVBA Everslaan 45 3078 Everberg / Belgium Tel.: +41 61 299 20 41 Fax: +41 61 299 20 40 Description du produit : Working pack (preparation) 2. IDENTIFICATION DES DANGERS Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. 3. COMPOSITION/INFORMATIONS SUR LES COMPOSANTS Substance/préparation : Working pack (preparation) Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. 4. PREMIERS SECOURS Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. 5. MESURES DE LUTTE CONTRE L'INCENDIE Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. 6. MESURES À PRENDRE EN CAS DE REJET ACCIDENTEL Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. Date d'édition/Date de révision : 11/13/2009. 1/6 ARALDITE FUSION Manipulation MANIPULATION ET STOCKAGE Stockage 7. Revêtir un équipement de protection individuelle approprié (voir Section 8). Il est interdit de manger, boire ou fumer dans les endroits où ce produit est manipulé, entreposé ou mis en oeuvre. Il est recommandé au personnel de se laver les mains et la figure avant de manger, boire ou fumer. Les personnes ayant des antécédents de sensibilisation cutanée ne doivent pas intervenir dans les processus utilisant ce produit. Ne pas mettre en contact avec les yeux, la peau ou les vêtements. Ne pas ingérer. Éviter de respirer les vapeurs ou le brouillard. Éviter le rejet dans l'environnement. Consulter les instructions spéciales/la fiche de données de sécurité. Garder dans le conteneur d'origine ou dans un autre conteneur de substitution homologué fabriqué à partir d'un matériau compatible et tenu hermétiquement clos lorsqu'il n'est pas utilisé. Les conteneurs vides retiennent des résidus de produit et peuvent présenter un danger. Ne pas réutiliser ce conteneur. Matériaux d'emballage Stocker conformément à la réglementation locale. Stocker dans le récipient d'origine à l'abri de la lumière directe du soleil dans un endroit sec, frais et bien ventilé à l'écart des matériaux incompatibles (cf. la section 10). Garder le récipient hermétiquement fermé lorsque le produit n'est pas utilisé. Les récipients ayant été ouverts doivent être refermés avec soin et maintenus en position verticale afin d'éviter les fuites. Ne pas stocker dans des conteneurs non étiquetés. Utiliser un récipient approprié pour éviter toute contamination du milieu ambiant. : : Recommandé : Utiliser le récipient d'origine. Température de stockage : Stocker conformément à la réglementation locale. Stocker dans le récipient d'origine à l'abri de la lumière directe du soleil dans un endroit sec, frais et bien ventilé à l'écart des matériaux incompatibles (cf. la section 10). Garder le récipient hermétiquement fermé lorsque le produit n'est pas utilisé. Les récipients ayant été ouverts doivent être refermés avec soin et maintenus en position verticale afin d'éviter les fuites. Ne pas stocker dans des conteneurs non étiquetés. Utiliser un récipient approprié pour éviter toute contamination du milieu ambiant. Stocker entre les températures suivantes: 2 à 40°C (35.6 à 104°F). Classe de danger de stockage Huntsman Advanced Materials : Classe de stockage 10, Liquide nocif pour l'ambience Nom des composants Limites d'exposition professionnelle Valeurs limites d'exposition 8. CONTRÔLE DE L'EXPOSITION/PROTECTION INDIVIDUELLE Aucune valeur de limite d'exposition connue. Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. PROPRIÉTÉS PHYSIQUES ET CHIMIQUES État physique Liquide. Point d'éclair Coupe fermée: >145°C (>293°F) [DIN 51758 EN 22719 (Pensky-Martens Closed Cup)] 9. : : Informations générales Aspect Informations importantes relatives à la santé, à la sécurité et à l'environnement Masse volumique : 1.15 g/cm3 [20°C (68°F)] Solubilité dans l'eau : Insoluble Date d'édition/Date de révision : 11/13/2009. 2/6 ARALDITE FUSION STABILITÉ 10. ET RÉACTIVITÉ Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. 11. INFORMATIONS TOXICOLOGIQUES Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. 12. INFORMATIONS ÉCOLOGIQUES Se référer aux fiches de données de sécurité des composants individuels de l'emballage de travail. 13. CONSIDÉRATIONS RELATIVES À L'ÉLIMINATION 070208 Catalogue Européen des Déchets : Déchets Dangereux : Il se peut que la classification du produit satisfasse les critères de déchets dangereux. Il est recommandé d'éviter ou réduire autant que possible la production de déchets. Les conteneurs vides ou les saches internes peuvent retenir des restes de produit. Ne se débarrasser de ce produit et de son récipient qu'en prenant toutes précautions d'usage. Élimination des produits excédentaires et non recyclables par une entreprise autorisée de collecte des déchets. La mise au rebut de ce produit, des solutions et des sous-produits devra en permanence respecter les exigences légales en matière de protection de l'environnement et de mise au rebut des déchets ainsi que les exigences de toutes les autorités locales. Évitez la dispersion des matériaux déversés, ainsi que leur écoulement et tout contact avec le sol, les cours d'eau, les égouts et conduits d'évacuation. Méthodes d'élimination des : déchets 07 02 08* autres résidus de réaction et résidus de distillation Il faut dans tous les cas appliquer toutes les lois locales régionales et nationales ainsi que les directives européennes. Il appartient à l'utilisateur final de déterminer le code des déchets spécifique à chaque secteur industriel en utilisant le code Européen approprié du catalogue européen des déchets. Il est recommandé que tous les détails soient indiqués par le responsable des déchets. 14. Réglementation internationale du transport INFORMATIONS RELATIVES AU TRANSPORT Nom d'expédition ADR : Matière dangereuse du point de vue de l'environnement, liquide, n.s.a. BISPHENOL A/F EPOXY RESIN IMDG : Environmentally hazardous substance, liquid, n.o.s. (BISPHENOL A/F EPOXY RESIN) IATA : Environmentally hazardous substance, liquid, n.o.s. (BISPHENOL A/F EPOXY RESIN) Informations réglementaires Numéro ONU Classes Groupe d'emballage Étiquette Autres informations 9 Classe ADR/RID UN3082 9 III Classe IMDG UN3082 9 III 9 Emergency schedules (EmS) F-A, S-F Code de classificationM6 Numéro d'identification du danger 90 Date d'édition/Date de révision : 11/13/2009. 3/6 ARALDITE FUSION 14. INFORMATIONS RELATIVES AU TRANSPORT Passenger and Cargo Aircraft Quantity limitation: 450 L Packaging instructions: 914 Cargo Aircraft OnlyQuantity limitation: 450 L Packaging instructions: 914 9 Classe IATA UN3082 9 III 15. INFORMATIONS RÉGLEMENTAIRES Conseils de prudence S24- Éviter le contact avec la peau. S37/39- Porter des gants appropriés et un appareil de protection des yeux/du visage. S61- Éviter le rejet dans l'environnement. Consulter les instructions spéciales/la fiche de données de sécurité. R36/38- Irritant pour les yeux et la peau. R43- Peut entraîner une sensibilisation par contact avec la peau. R51/53- Toxique pour les organismes aquatiques, peut entraîner des effets néfastes à long terme pour l'environnement aquatique. Symbole(s) de danger Phrases de risque Réglementations de l'Union Européenne Réglementations nationales Contient du (de la) : : : : Phrases d'avertissement supplémentaire : Non applicable. Irritant, Dangereux pour l'environnement produit de réaction: bisphénol-A-épichlorhydrine; résines époxydiques (poids moléculaire moyen < 700) résine époxidique à base de bisphénol F Déterminés en accord avec les directives de l'UE 67/548/EEC et 1999/45/EC (y compris les amendements), la classification et l'étiquetage prennent en compte l'usage prévu du produit. Surveillance médicale renforcée : Arrêté du 11 Juillet 1977 fixant la liste des travaux nécessitant une surveillance médicale renforcée: non concerné Réglementations Internationales Listes internationales : Inventaire des substances chimiques d'Australie (AICS): Tous les composants sont répertoriés ou exclus. Inventaire des substances chimiques existantes en Chine (IECSC): Tous les composants sont répertoriés ou exclus. Inventaire du Japon (ENCS): Un composant au moins n'est pas répertorié. Inventaire du Japon (ISHL): Indéterminé. Inventaire de Corée (KECI): Tous les composants sont répertoriés ou exclus. Inventaire néo-zélandais des substances chimiques (NZIoC): Indéterminé. Inventaire des substances chimiques des Philippines (PICCS): Un composant au moins n'est pas répertorié. Inventaire des États-Unis (TSCA 8b): Tous les composants sont répertoriés ou exclus. Inventaire d'Europe: Tous les composants sont répertoriés ou exclus. Inventaire du Canada: Tous les composants sont répertoriés ou exclus. Xi, N Etiquetage exceptionnel pour préparations spéciales : Contient des composés époxydiques. Voir les informations transmises par le fabricant. Date d'édition/Date de révision : 11/13/2009. 4/6 ARALDITE FUSION AUTRES DONNÉES 11/13/2009. Historique 16. Date d'impression Date d'édition/ Date de révision Version Avis au lecteur Date de la précédente édition : : : : R23/24- Toxique par inhalation et par contact avec la peau. R22- Nocif en cas d'ingestion. R35- Provoque de graves brûlures. R41- Risque de lésions oculaires graves. R38- Irritant pour la peau. R36/38- Irritant pour les yeux et la peau. R43- Peut entraîner une sensibilisation par contact avec la peau. R50/53- Très toxique pour les organismes aquatiques, peut entraîner des effets néfastes à long terme pour l'environnement aquatique. R51/53- Toxique pour les organismes aquatiques, peut entraîner des effets néfastes à long terme pour l'environnement aquatique. R53- Peut entraîner des effets néfastes à long terme pour l'environnement aquatique. Texte complet des phrases : R citées dans les sections 2 et 3 - France Référence du texte complet des classifications se trouvant dans les Sections 2 et 3 - France : T - Toxique C - Corrosif Xn - Nocif Xi - Irritant N - Dangereux pour l'environnement Indique quels renseignements ont été modifiés depuis la version précédente. 11/13/2009. Aucune validation antérieure. 1 Epoxy Resins and Curing Agents; Toxicology, Health, Safety and Environmental Aspects (Plastics Europe, May 2006) Les informations et recommandations figurant dans cette publication sont fondées sur notre expérience générale et sont fournies de bonne foi au mieux de nos connaissances actuelles, MAIS RIEN DANS LES PRESENTES NE DOIT ÊTRE INTERPRETE COMME CONSTITUANT UNE GARANTIE OU UNE DECLARATION, EXPRESSE, IMPLICITE OU AUTRE. DANS TOUS LES CAS, IL INCOMBE A L'UTILISATEUR DE DETERMINER ET DE VERIFIER L'EXACTITUDE, AINSI QUE LE CARACTERE SUFFISANT ET APPLICABLE DE TELLES INFORMATIONS ET RECOMMANDATIONS, DE MEME QUE L'ADEQUATION ET L'ADAPTATION D'UN QUELCONQUE PRODUIT A UNE UTILISATION SPECIFIQUE OU DANS UN BUT PARTICULIER. LES PRODUITS MENTIONNES PEUVENT PRESENTER DES RISQUES INCONNUS ET DOIVENT ETRE UTILISES AVEC PRECAUTION. MEME SI CERTAINS RISQUES SONT DECRITS DANS CETTE PUBLICATION, IL N'EXISTE AUCUNE GARANTIE QU'IL S'AGIT DES SEULS RISQUES EXISTANTS. Les risques, la toxicité et le comportement des produits peuvent différer lorsque ceux-ci sont utilisés avec d'autres matériaux et dépendent des conditions de fabrication et d'autres processus. Ces risques, cette toxicité et ces comportements doivent être déterminés par l'utilisateur et portés à la connaissance des personnes ou entités chargés du transport ou de la manutention, du traitement ou de la transformation, ainsi que de tous utilisateurs finaux. Pour toute demande, contactez le bureau commercial Huntsman Sales le plus proche ou directement Huntsman (Belgium) BVBA, Everslaan 45, B-3078 Everberg, Belgique. Tél. +32 2 758 9211 - Fax +32 758 9946. Huntsman Belgium (BVBA) Everslaan 45 B-3078 Everberg Belgium Tel.:+32-(0)2-758-9211 Références Date d'édition/Date de révision : 11/13/2009. 5/6 ARALDITE FUSION 16. AUTRES DONNÉES NO PERSON OR ORGANIZATION EXCEPT A DULY AUTHORIZED HUNTSMAN EMPLOYEE IS AUTHORIZED TO PROVIDE OR MAKE AVAILABLE DATA SHEETS FOR HUNTSMAN PRODUCTS. DATA SHEETS FROM UNAUTHORIZED SOURCES MAY CONTAIN INFORMATION THAT IS NO LONGER CURRENT OR ACCURATE. NO PART OF THIS DATA SHEET MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM, OR BY ANY MEANS, WITHOUT PERMISSION IN WRITING FROM HUNTSMAN. ALL REQUESTS FOR PERMISSION TO REPRODUCE MATERIAL FROM THIS DATA SHEET SHOULD BE DIRECTED TO HUNTSMAN, MANAGER, PRODUCT SAFETY AT THE ABOVE ADDRESS. Date d'édition/Date de révision : 11/13/2009. 6/6 FICHE DE DONNÉES DE SÉCURITÉ Section 1: Identification de la substance/du mélange et de la société/l’entreprise Identificateur de produit Nom commercial ou désignation du mélange Contralube 770 Numéro - d'enregistrement Synonymes Aucun(e)(s). Code de produit Contralube 770 Date de la première publication le 06-04-06 Numéro de version 12 le 17-02-11 le 06-01-11 Date de révision Date d'entrée en vigueur de la nouvelle version Utilisations identifiées pertinentes de la substance ou du mélange et utilisations déconseillées Utilisations identifiées Non disponible. Utilisations déconseillées Aucun connu. Renseignements concernant le fournisseur de la fiche de données de sécurité Newgate Simms Ltd. Broughton Mills Road, Bretton Chester, CH4 0BY, United Kingdom info@newgatesimms.co.uk Section 2: Identification des dangers Classification de la substance ou du mélange Les dangers physiques, sanitaires et environnementaux du mélange ont été évalués et/ou testés, et la classification suivante s'applique. Classification selon la directive 67/548/CEE ou 1999/45/CEE et ses amendements Cette préparation ne répond pas aux critères de classification de la directive 1999/45/CE et ses amendements. Classification selon le règlement (CE) n° 1272/2008 et ses amendements Ce mélange ne répond pas aux critères de classification du règlement (CE) 1272/2008 et ses amendements. Résumé des dangers Risques physiques Pas de classification pour les dangers physiques. Risques pour la santé Pas de classification pour les dangers sanitaires. Dangers pour l’environnement Pas de classification pour les dangers pour l'environnement. Risques particuliers Non disponible. Principaux symptômes Non disponible. Éléments d’étiquetage Étiquettage selon le règlement (CE) n° 1272/2008 et ses amendements Numéro d'identification - Mentions de danger La substance ne répond pas aux critères de classification. Conseils de prudence Prévention Non disponible. Réaction Non disponible. Stockage Non disponible. Élimination Non disponible. Informations supplémentaires de l'étiquette Sans objet. Autres dangers Non affecté. Nom de la matière: Contralube 770 FDS n° Contralube 770 N° version: 12 Date de révision: le 17-02-11 Date d'impression: le 17-02-11 1 / 7 SDS FRANCE Section 3: Composition/informations sur les composants Mélange Les composants ne sont pas dangereux ou sont en dessous des limites de déclaration légales. Section 4: Premiers secours Description des premiers secours Inhalation Si des symptômes se développent, éloigner la personne touchée de la source d'exposition et la sortir au grand air. Consulter immédiatement un médecin. Contact avec la peau Laver avec de l'eau et du savon. Consulter un médecin en cas de symptômes. Laver séparément les vêtements avant réutilisation. Contact avec les yeux Laver immédiatement les yeux à grande eau pendant au moins 15 minutes. Consulter immédiatement un médecin. Ingestion Du fait de la nature physique de ce matériau, il est improbable qu'une ingestion ne se produise. S'il se produit tout de même l'ingestion d'une grande quantité, solliciter des soins médicaux. S'il se produit tout de même l'ingestion d'une grande quantité, Ne pas faire vomir sans l'avis d'un médecin. Si le vomissement se produit naturellement, incliner la victime vers l'avant pour réduire le risque d'aspiration. Ne jamais faire avaler quelque chose à une victime inconsciente ou souffrant de convulsions. Principaux symptômes et effets, aigus et différés Non disponible. Indication des éventuels soins médicaux immédiats et traitements particuliers nécessaires Non disponible. Section 5: Mesures de lutte contre l’incendie Risques d'incendie généraux Ce produit est ininflammable. Moyens d’extinction Moyen d'extinction approprié Brouillard d’eau. Mousse. Dioxyde de carbone (CO2). Produit chimique sec. Moyens d’extinction inappropriés Eau. En cas d'incendie ne pas utiliser de jet d'eau car celà dispersera le feu. Dangers particuliers résultant de la substance ou du mélange Non disponible. Conseils aux pompiers Equipements de protection particuliers des pompiers Porter un équipement de protection adéquat. Procédures spéciales de lutte contre l'incendie Porter des vêtements de protection complets, y compris un casque, un appareil autonome de respiration à pression positive ou à demande de pression, des vêtements de protection et un masque anti-poussière. Éloigner les contenants de la zone de feu si cela peut se faire sans risque. Éloigner les récipients de l'incendie si cela peut se faire sans risque. Section 6: Mesures à prendre en cas de dispersion accidentelle Précautions individuelles, équipement de protection et procédures d’urgence Pour les non-secouristes Tenir à l’écart le personnel superflu. Prévenir les autorités locales si des fuites significatives ne peuvent pas être contenues. Ne pas toucher les récipients endommagés ou le produit déversé à moins d'être vêtu d'une tenue protectrice appropriée. Garder les personnes à l'écart de l'endroit de l'écoulement/de la fuite et contre le vent. Observer les précautions indiquées dans les autres sections. Pour les secouristes Non disponible. Précautions pour la protection de l’environnement Empêcher l'infiltration dans les cours d'eau, les égouts, les sous-sols ou les endroits clos. Nom de la matière: Contralube 770 FDS n° Contralube 770 N° version: 12 Date de révision: le 17-02-11 Date d'impression: le 17-02-11 2 / 7 SDS FRANCE Méthodes et matériel de confinement et de nettoyage Déversements importants : Arrêter le débit de matière, si ceci est sans risque. Enlever avec un absorbant inerte. Endiguer le matériau renversé si cela est possible. Couvrir d'une bâche de plastique pour éviter la dispersion. Absorber avec de la vermiculite, du sable sec ou de la terre, puis placer en récipient. Nettoyer soigneusement la surface contaminée. Après avoir récupéré le produit, rincer la zone à l'eau. Déversements mineurs : Essuyer avec une matière absorbante (p.ex. tissu, laine). Nettoyer à fond la surface pour éliminer toute contamination résiduelle. Ne jamais réintroduire le produit répandu dans son récipient d'origine en vue d'une réutilisation. Pour les conseils relatifs à l'élimination, voir la rubrique 13. Ne pas toucher les containers endommagés ou la matière répandue. Il se peut que les dégâts au container extérieur aient été sans conséquences pour le container interne. Si le container interne est endommagé et fuit, le couvrir avec une serviette ou un ch Le produit ramassé ainsi que les chiffons de nettoyage seront jetés dans les containers prévus à cet effet. Référence à d'autres sections Pour les conseils relatifs à l'élimination, voir la rubrique 13. Section 7: Manipulation et stockage Précautions à prendre pour une manipulation sans danger NE PAS mettre sous pression, couper, chauffer ou souder les récipients. Les récipients vides peuvent contenir des résidus du produit. Éviter tout contact prolongé ou répété de la peau avec ce matériau. Ne pas manipuler ou stocker à proximité d'une flamme nue, d'une source de chaleur ou toute autre source d'ignition. Éviter de respirer les gaz/vapeurs/brouillards/fumées. Ne pas ingérer. Ne pas goûter ni avaler. Éviter le contact avec les yeux. Se laver soigneusement après manipulation. Conditions d’un stockage sûr, y compris d’éventuelles incompatibilités Tenir à l'écart de la chaleur et des sources d'ignition. Entreposer dans un endroit frais. Conserver dans un récipient fermé, à l'écart des matières incompatibles. Utilisation(s) finale(s) particulière(s) Non disponible. Section 8: Contrôles de l’exposition/protection individuelle Paramètres de contrôle Valeurs limites d’exposition professionnelle Il n'y a pas de limites d'exposition pour ce ou ces ingrédients. Valeurs limites biologiques Il n'y a pas de limites d'exposition biologique pour ce ou ces ingrédients. Procédures de suivi actuellement recommandées Non disponible. DNEL Non disponible. PNEC Non disponible. Contrôles de l’exposition Contrôles techniques appropriés Porter des gants thermorésistants, étanches, et des vêtements de protection pour éviter tout contact avec la peau. Mesures de protection individuelle, telles que les équipements de protection individuelle Généralités Non disponible. Protection des yeux/du visage Portez des lunettes de sécurité ou des lunettes de protection contre les substances chimiques (en cas de risque de projection). Protection de la peau - Protection des mains Non nécessaire en général. - Divers Porter un vêtement de protection approprié. Porter des gants en nitrile, néoprène, PVC ou en viton. Choisir l'équipement de protection conformément aux normes CEN en vigueur et en coopération avec le fournisseur de l'équipement de protection. Protection respiratoire Aucun équipement de protection respiratoire individuel n'est normalement nécessaire. Un appareil respiratoire purificateur d'air doté d'une cartouche de vapeur organique peut être utilisé dans certains cas l'où on s'attend à ce que les concentrations aéroportées dépassent les limites d'exposition, ou en cas d'irritation ou d'apparition de symptômes. Risques thermiques Non disponible. Mesures d'hygiène Lors de l'utilisation, ne pas manger, boire ou fumer. Se laver soigneusement les mains après manipulation. Laver les vêtements contaminés avant de les porter à nouveau. Contrôles d’exposition liés à la protection de l’environnement Non disponible. Section 9: Propriétés physiques et chimiques Informations sur les propriétés physiques et chimiques essentielles État physique Liquide. Nom de la matière: Contralube 770 FDS n° Contralube 770 N° version: 12 Date de révision: le 17-02-11 Date d'impression: le 17-02-11 3 / 7 SDS FRANCE Forme Liquide. Semi solide Couleur Clair Odeur Légère Seuil olfactif Non disponible. pH Sans objet. Point de fusion/point de congélation Non disponible. Point d'ébullition, point d'ébullition initial et gamme d'ébullition Non disponible. Point d'éclair Sans objet. Température d’autoignition Sans objet. Inflammabilité (solide, gaz) Non disponible. Limite d'inflammabilité - inférieure (%) Non disponible. Limite d'inflammabilité - supérieure (%) Non disponible. Propriétés comburantes Sans objet. Propriétés explosives Sans objet. Limite d'explosivité Sans objet. Pression de vapeur Sans objet. Densité de vapeur Sans objet. Taux d’évaporation Sans objet. Densité relative Non disponible. Densité 0,92 g/cm³ Solubilité (dans l'eau) Non disponible. Coefficient de partition (n-octanol/eau) Non disponible. Température de décomposition Non disponible. Viscosité Non disponible. Fraction volatile Non disponible. Autres informations Aucune information pertinente supplémentaire n'est disponible. Section 10: Stabilité et réactivité Réactivité Aucun connu. Stabilité chimique Ce produit est stable dans des conditions normales. Stable. Possibilité de réactions dangereuses Non disponible. Conditions à éviter Chaleur, flammes et étincelles. Matières incompatibles Acides forts, alcalis et agents d'oxydation. Produits de décomposition dangereux Monoxyde de carbone, dioxyde de carbone et/ou hydrocarbures à faible poids moléculaire. Section 11: Informations toxicologiques Généralités Non disponible. Informations sur les voies d’exposition probables Ingestion Non disponible. Inhalation Non disponible. Contact avec la peau Non disponible. Contact avec les yeux Non disponible. Symptômes Non disponible. Informations sur les effets toxicologiques Toxicité aiguë Non disponible. Corrosion ou irritation de la peau Nom de la matière: Contralube 770 FDS n° Contralube 770 N° version: 12 Date de révision: le 17-02-11 Date d'impression: le 17-02-11 4 / 7 SDS FRANCE Blessure ou irritation grave des yeux Non disponible. Sensibilisation respiratoire Non disponible. Sensibilisation cutanée Non disponible. Mutagénicité des cellules germinales Non disponible. Cancérogénicité Ce produit ne contient aucune substance carcinogène ou substance potentiellement carcinogène selon la liste du CIRC. Toxicité pour la reproduction Non disponible. Toxicité spécifique au niveau de l'organe cible suite à une exposition unique Non disponible. Toxicité spécifique au niveau de l'organe cible suite des expositions répétées Non disponible. Risque en cas d’inhalation Non disponible. Informations sur les mélanges et informations sur les substances Non disponible. Autres informations Ce produit n'est associé à aucun effet négatif connu sur la santé de l'homme. Section 12: Informations écologiques Toxicité Il n'y a pas de données de toxicité pour ce ou ces ingrédients. Persistance et dégradabilité Aucune donnée n’est disponible sur la biodégradabilité du produit. Potentiel de bioaccumulation Non disponible. Mobilité Non disponible. Devenir dans l’environnement - Coefficient de partage Non disponible. Mobilité dans le sol Non disponible. Résultats des évaluations PBT et VPVB Non disponible. Autres effets néfastes Non disponible. Section 13: Considérations relatives à l’élimination Méthodes de traitement des déchets Déchets résiduaires Non disponible. Emballages contaminés Les conteneurs vides doivent être acheminés vers un site agréé pour le traitement des déchets à des fins de recyclage ou d'élimination. Code de déchet européen Non disponible. Sent out for translation Recueillir et réutiliser ou éliminer dans des récipients scellés dans un centre de collecte de déchets agréés. Élimination des contenus/contenants conformément aux dispositions locales / régionales /nationales / internationales en vigueur. Section 14: Informations relatives au transport ADR Non réglementé comme une marchandise dangereuse. RID Non réglementé comme une marchandise dangereuse. ADN Non réglementé comme une marchandise dangereuse. IATA Non réglementé comme une marchandise dangereuse. Nom de la matière: Contralube 770 FDS n° Contralube 770 N° version: 12 Date de révision: le 17-02-11 Date d'impression: le 17-02-11 5 / 7 SDS FRANCE IMDG Non réglementé comme une marchandise dangereuse. Transport en vrac conformément à l’annexe II de la convention Marpol 73/78 et au recueil IBC Pas d'information disponible. Section 15: Informations réglementaires Réglementations/législation particulières à la substance ou au mélange en matière de sécurité, de santé et d’environnement Réglementations de l’UE Règlement (CE) nº 2037/2000 relatif à des substances qui appauvrissent la couche d'ozone, Annexe I N'est pas listé. Règlement (CE) nº 2037/2000 relatif à des substances qui appauvrissent la couche d'ozone, Annexe II N'est pas listé. Règlement (CE) n° 850/2004 concernant les polluants organiques persistants, Annexe I N'est pas listé. Règlement (CE) no 689/2008 concernant les exportations et importations de produits chimiques dangereux, Annexe I, Partie 1 N'est pas listé. Règlement (CE) no 689/2008 concernant les exportations et importations de produits chimiques dangereux, Annexe I, Partie 2 N'est pas listé. Règlement (CE) no 689/2008 concernant les exportations et importations de produits chimiques dangereux, Annexe I, Partie 3 N'est pas listé. Règlement (CE) no 689/2008 concernant les exportations et importations de produits chimiques dangereux, Annexe V N'est pas listé. Directive 96/61/CEE relative à la prévention et à la réduction intégrées de la pollution (IPPC) : Article 15, registre européen des émissions polluantes (EPER) N'est pas listé. Règlement (CE) n° 1907/2006, Article 59(1). Liste candidate N'est pas listé. Autres réglementations Le produit ne nécessite pas d'étiquetage conformément aux directives de la CE et aux réglementations nationales du pays concerné. Cette fiche de données de sécurité est conforme aux exigences de la Directive 2001/58/CE. Cette fiche de données de sécurité est conforme aux spécifications du Règlement (CE) N° 1907/2006. Réglementations nationales Non disponible. Évaluation de la sécurité chimique Aucune évaluation de sécurité chimique n'a été mise en oeuvre. Section 16: Autres informations Liste des abréviations Non disponible. Références Non disponible. Informations sur la méthode d'évaluation utilisée pour classer le mélange Non disponible. Texte intégral des avertissements ou phrases R et H en Sections 2 à 15 Aucun(e)(s). Informations de révision Identification du produit et de l'entreprise : Identification du produit et de l'entreprise Section 5: Mesures de lutte contre l’incendie: Equipements de protection particuliers des pompiers Section 5: Mesures de lutte contre l’incendie: Risques d'incendie généraux Section 6: Mesures à prendre en cas de dispersion accidentelle: Référence à d'autres sections Section 8: Contrôles de l’exposition/protection individuelle: - Divers Informations de formation Non disponible. Édité par Ralph Patrizio Avis de non-responsabilité Les informations fournies dans cette fiche technique de sécurité sont à notre connaissance exactes et fiables à la date de leur publication. Les informations fournies sont uniquement des conseils pour la manutention, l’utilisation, le traitement, le stockage, le transport, l’évacuation et le rejet du produit en toute sécurité. Newgate Simms Ltd. ne fournit aucune garantie quant aux informations mises à disposition et exclut toute responsabilité à cet égard. Les informations contenues dans cette fiche sont exactes dans l'état actuel des connaissances et reposent sur les données disponibles au moment de la préparation du document. Nom de la matière: Contralube 770 FDS n° N° version: 12 Date de révision: le 17-02-11 Date d'impression: le 17-02-11 6 / 7 SDS FRANCE Date d'émission le 17-02-11 Date de révision le 17-02-11 Date d'impression le 17-02-11 Nom de la matière: NYOGEL 760G FDS n° NYOGEL 760G N° version: 12 Date de révision: le 17-02-11 Date d'impression: le 17-02-11 7 / 7 SDS FRANCE CRC Industries France SAS 6, Avenue du Marais – B.P. 90028 F-95102 Argenteuil Cedex. - France Tél.: + 33 (0)1 34 11 20 00 Fax.:+ 33 (0)1 34 11 09 96 S.A au capital de 1.936.667 € - R.C.S. Pontoise B 391 513 314 – APE 515 L www.crcind.com 1/2 Protection 1. Description générale Spécialement étudié pour décaper le vernis KF1280 ND, ce produit permet d’enlever la plupart des vernis modifiés acryliques existants (frais ou polymérisés depuis plusieurs années) des circuits imprimés et cela sans altérer les composants électroniques. 2. Caractéristiques  Liquide incolore à base de solvants oxygénés  Faible odeur  Bonne compatibilité avec les composants électroniques.  N’altère pas les circuits imprimés dans des conditions normales d’utilisation. Il est toutefois recommandé de faire des essais préalablement.  Évaporation relativement rapide accéléré par l’usage d’air comprimé ou d’un dépoussiérant « Aero Clean X Force ». 3. Applications Electronique, Aéronautique, électricité. Décapage du vernis KF1280 ND (réf. 1141 & 2046) sur les circuits imprimés ou autres matériels électroniques. Permet de réaliser des interventions de remises en état ou d’amélioration sur des circuits imprimés protégés par des vernis durs et résistants. 4. Mode d’emploi Au pinceau/ au pistolet / en trempage: Enduire ou pulvériser soigneusement les surfaces à traiter. Afin d’éliminer les résidus de vernis, faire ruisseler du produit sur l’ensemble du circuit et laisser sécher. Accélérer l’évaporation par l’utilisation d’air comprimé ou d’un dépoussiérant Aero Clean X force. Selon l’équipement disponible à l’utilisateur, celui peut déterminer l’utilisation par sa propre expérience. Une fiche de données de sécurité (FDS) conforme à la reglementation EC N° 1907/2006 Art.31 et amendements est disponible pour tous les produits KF. Décapant KF 1280 ND Pour vernis CRC Industries France SAS 6, Avenue du Marais – B.P. 90028 F-95102 Argenteuil Cedex. - France Tél.: + 33 (0)1 34 11 20 00 Fax.:+ 33 (0)1 34 11 09 96 S.A au capital de 1.936.667 € - R.C.S. Pontoise B 391 513 314 – APE 515 L www.crcind.com 2/2 Protection 5. Caractéristiques typiques du produit Aspect : incolore Odeur : légère Faible viscosité Densité : 0,913 Point éclair : > 64 °C Ne contient pas d’aromatiques polycycliques, ni des métaux lourds, ni de composés chlorés Recouvrable par un nouveau vernis : après séchage complet 6. Conditionnement Réf. : 2045 - Bidon de 5 L Carton de 2 bidons Toutes les données dans cette publication sont basées sur l'expérience et les tests de laboratoire. Vu l’importante variété des conditions et des appareillages employés, ainsi que des facteurs humains imprévisibles qui peuvent avoir une influence importante sur les résultats de l’application, nous vous conseillons de vérifier la compatibilité du produit avant son utilisation. Toutes ces informations sont données suivant la plus grande objectivité, mais sans garantie de notre part exprimée ou implicite. Cette fiche technique peut déjà, à ce moment précis, être révisée pour des raisons liées à la législation, à la disponibilité des composants, ou à des expériences nouvellement acquises. La dernière version de cette fiche technique, qui est la seule valable, vous sera envoyée sur simple demande, ou peut être trouvée sur notre site Internet: www.crcind.com. Nous vous recommandons de vous enregistrer sur notre site Internet pour ce produit, afin de recevoir automatiquement chaque dernière version future. Version: 0 02 1204 01 Date: 20 mars 2012 Pour vernis Décapant KF 1280 ND Manufactured by : CRC Industries Europe BVBA Touwslagerstraat 1 – 9240 Zele – Belgium Tel (32) (0) 52/45.60.11 Fax (32) (0) 52/45.00.34 www.crcind.com FICHE TECHNIQUE 1/2 CRC HANDCLEANER Nettoyant mains Réf. :10535 1. DESCRIPTION GENERALE Nettoyant pour les mains, contenant de la lanoline. S’emploi sans eau. La formule du Nettoyant Mains CRC permet de répondre aux exigences sévères des professionnels dans l’industrie et est axée principalement sur le nettoyage des mains. Elle est à base de solvants hydrocarbonés doux et de surfactants biodégradables. Le Nettoyant Mains CRC peut être employé sans eau; il est donc idéal pour les travaux, tant à l'intérieur qu'à l'extérieur, aux endroits où l’on ne dispose pas d'eau. 2. CARACTERISTIQUES • Enlève la plupart des saletés et des salissures tenaces. • Extrêmement efficace sur la graisse, les peintures ordinaires, les encres, les ciment-colles, les bitumes, le carbone et bien d'autres composants chimiques. • Peut être utilisé avec ou sans eau. • Nettoie rapidement. • Contient de la lanoline pour protéger la peau. • Ses agents antiseptiques réduisent les risques d'infection bactérienne. • Sans abrasifs. • Après traitement, la peau des mains reste douce. • Biodégradable. 3. UTILISATIONS Pour débarrasser les mains de: • huiles et graisses • dépôts et salissures, • ciment et colles, • bitumes et goudrons • peintures et encres ordinaires Remplace les savons ordinaires: • dans les usines • dans les mines, • dans les fermes, • sur les chantiers de construction, • à domicile. 4. INSTRUCTIONS • Ne pas mouiller les mains. • Appliquer suffisamment de nettoyant (environ une cuillère à thé) sur les mains souillées sèches. • Bien frotter jusqu'à ce que les salissures soient complètement liquéfiées et détachées. • Il suffit d'essuyer les mains avec du papier ménager, ou un chiffon. Eventuellement rincer à l'eau et essuyer. • Eviter le contact avec les yeux. Tenir hors de portée des enfants. • Une fiche de sécurité (MSDS) selon EU93/112 est disponible pour tous les produits CRC. Manufactured by : CRC Industries Europe BVBA Touwslagerstraat 1 – 9240 Zele – Belgium Tel (32) (0) 52/45.60.11 Fax (32) (0) 52/45.00.34 www.crcind.com FICHE TECHNIQUE 2/2 CRC HANDCLEANER Nettoyant mains Réf. :10535 5. DONNEES TYPIQUES DU PRODUIT (sans le gaz propulseur) Aspect : crème semi-solide, Couleur : blanc cassé Odeur : typique, parfum peu prononcé Densité (à 20°C) : 1 ± 0,1 pH (à 5% dans de l'eau) : 6,25 – 6,75 Viscosité : 8000 – 9000 cp Teneur en matières solides (6 h à 100°C) : 12,0% Stabilité thermique 48 h à 45°C : bonne 48 h à 0°C : bonne Caractéristiques du solvant hydrocarboné Intervalle de distillation : 195-245°C Point éclair (en vase fermée) : 73°C Teneur en composants aromatiques : < 0,1% pds 6. CONDITIONNEMENT Tube 12 x 150 ml Bidon 6 x 2,5 l Un distributeur et un support pour le bidon de 2,5 litres sont disponibles. Toutes les données dans cette publication sont basées sur l'expérience et les tests de laboratoire. Vu l’importante variété des conditions et des appareillages employés, ainsi que des facteurs humains imprévisibles qui peuvent avoir une influence importante sur les résultats de l’application, nous vous conseillons de vérifier la compatibilité du produit avant son utilisation. Toutes ces informations sont données suivant la plus grande objectivité, mais sans garantie de notre part exprimée ou implicite. Cette fiche technique peut déjà, à ce moment précis, être révisée pour des raisons liées à la législation, à la disponibilité des composants, ou à des expériences nouvellement acquises. La dernière version de cette fiche technique, qui est la seule valable, vous sera envoyée sur simple demande, ou peut être trouvée sur notre site Internet : www.crcind.com. Nous vous recommandons de vous enregistrer sur notre site Internet pour ce produit, afin de recevoir automatiquement chaque dernière version future. Version : 10535 02 1200 03 Date : 29 september 2003 CRC Industries Europe BVBA Touwslagerstraat 1 – 9240 Zele - Belgium Tel (32) (0) 52/45.60.11 Fax (32) (0) 52/45.00.34 www.crcind.com FICHE TECHNIQUE 1/3 Dusters Dust Off 67, Dust Off 360, Jet Clean 360, Dust Off HF Ref. : 20575; 20576; 20812; 20855, 1. DESCRIPTION GENERALE Grâce à un jet de gaz pressurisé, sec et inerte ces produits sèchent et dépoussièrent. 2. CARACTERISTOQUES Les produits sont un mélange de gaz liquides sous pression, qui fonctionne à la fois comme propulseur et produit actif. Le jet de gaz sec et inerte, agit comme de l’air comprimé. Il enlève rapidement poussières et autres contaminants secs d’instruments délicats, d’endroits d’accès difficile ou d’équipement électrique et électronique. Les produits éliminent les pannes dues à l’humidité (eau; huile,…) incluse dans la poussière et la saleté. Ces dépoussiérants sont essentiels pour les opérations de nettoyage où les nettoyants à base de solvants ne sont pas conseillés. Ils nettoient rapidement et sans danger, n’attaquent ni matières plastiques, ni composants sensitifs. Ne laissent ni résidu, ni condensation. Remplacent avantageusement, où possible, le nettoyage laborieux et coûteux à l’air comprimé. Les dépoussiérants peuvent être employés pour écarter les poussières, là où les méthodes conventionnelles ne conviennent pas : équipement électrique, PCB’s, connections de câbles, équipement de traitement de données et de communication, ensembles micro-miniaturisés, horloges et instruments de précision, vidéo & caméras, dispositifs optiques et lentes, … 3. UTILISATIONS Dust Off 67  Dépoussiérant universel.  Equipé d’une valve normale, bouton-poussoir et tube-rallonge.  L’aérosol doit être tenu droit.  Disponible en 200 ml net (270 ml brut) et 400 ml net (520 ml brut). Dust Off 360  Dépoussiérant universel, peut être employé tête en bas.  Equipé d’une valve normale, bouton-poussoir et tube-rallonge.  L’aérosol peut être utilisé en position droite mais également renversé.  Disponible en 200 ml net (520 ml brut). Jet Clean 360  Dépoussiérant pour emploi renversé, pour une application précise.  Muni d’une valve spécial avec embout fileté.  Une valve spéciale pour un jet précis est également disponible comme pièce détachée.  L’aérosol peut être utilisé dans une position droite ou renversée.  Disponible en 200 ml net (520 ml brut) Dust Off HF  Dépoussiérant grand débit, conçu pour des applications haute performance.  Equipé d’une valve/boutton-poussoir qui permet un soufflement très puissant.  L’aérosol ne peut être employé qu’en position droite.  Disponible en 300 ml net (520 ml brut). CRC Industries Europe BVBA Touwslagerstraat 1 – 9240 Zele - Belgium Tel (32) (0) 52/45.60.11 Fax (32) (0) 52/45.00.34 www.crcind.com FICHE TECHNIQUE 2/3 Dusters Dust Off 67, Dust Off 360, Jet Clean 360, Dust Off HF Ref. : 20575; 20855, 20574, 20576 4. INSTRUCTIONS Instruction Generale: Vaporiser le gaz sur les objets et surfaces à nettoyer. Le meilleur résultat est obtenu par pressions brèves. Après une utilisation continue, attendre quelques minutes, afin de rétablir la pression interne dans l’aérosol et continuer l’application. Ne pas secouer ou remuer l’aérosol pendant l’application. Dust Off 67 Utiliser le tube-rallonge pour les endroits d’accès difficile. Tenir l’aérosol droit durant l’application (ne pas incliner de plus de 30°). Dust Off 360 Utiliser le tube-rallonge pour les endroits d’accès difficile. Vaporiser en position droite ou tête en bas (ne pas utiliser horizontalement). Jet Clean 360 Ajuster le pistolet de précision (peut être obtenu comme pièce détachée). Vaporiser en position droite ou tête en bas (ne pas utiliser horizontalement). Dust Off HF Tenir l’aérosol droit durant l’application (ne pas incliner de plus de 30°). Une fiche de sécurité selon la directive EU 91/155/EEC et ses amendements est disponible pour tous les produits CRC. 5. DONNEES TYPIQUES DU PRODUIT (sans le gaz propulseur) Densité @ 20°C Aérosol (gaz liquéfié) : 1,01 g/cm 3 Test d’extension de flamme (FEA 607) : Négative (**) Fl amabilité ( FEA x 610 200 L) : Convient (> 60s) (**) Pression @ 20°C : 420 kPa Débit Dust Off 67 : 17,1 g/10s Dust Off 360 : 17,1 g/10s Jet Clean 360 : 19,1 g/10s Dust Off HF : 94,4 g/10s CRC Industries Europe BVBA Touwslagerstraat 1 – 9240 Zele - Belgium Tel (32) (0) 52/45.60.11 Fax (32) (0) 52/45.00.34 www.crcind.com FICHE TECHNIQUE 3/3 Dusters Dust Off 67, Dust Off 360, Jet Clean 360, Dust Off HF Ref. : 20575; 20855, 20574, 20576 6. CONDITIONNEMENT Uniquement en aérosol, voir page précédente : données typique et applications. ** Le produit liquide contient max 7 % de matières inflammable, mais le mélange des vapeurs est ininflammable celons les méthodes de tests indiquées. Toutes les données dans cette publication sont basées sur l'expérience et les tests de laboratoire. Vu l’importante variété des conditions et des appareillages employés, ainsi que des facteurs humains imprévisibles qui peuvent avoir une influence importante sur les résultats de l’application, nous vous conseillons de vérifier la compatibilité du produit avant son utilisation. Toutes ces informations sont données suivant la plus grande objectivité, mais sans garantie de notre part exprimée ou implicite. Cette fiche technique peut déjà, à ce moment précis, être révisée pour des raisons liées à la législation, à la disponibilité des composants, ou à des expériences nouvellement acquises. La dernière version de cette fiche technique, qui est la seule valable, vous sera envoyée sur simple demande, ou peut être trouvée sur notre site Internet : www.crcind.com. Nous vous recommandons de vous enregistrer sur notre site Internet pour ce produit, afin de recevoir automatiquement chaque dernière version future. Version : 20575 02 1003 01 Date : 23 August 2006 Pa rt of Ant Group Ltd Silica Gel MSDS Order Now www.antistat.co.uk t +44 (0) 1473 836 200 Component Packaging Silica Gel Silica-gel is a high-activity sorbing material, the outcome of chemical reaction of sodium silicate and sulfuric acid, ageing and sour bathing process. Silica-gel is an amorphous substance. It’s molecular formula is mSiO2.nH2O. It features a stable chemical property and never reacts with any substance except strong alkali and hydrofuoric acid. PROPERTY PARAMETERS QUALITY ITEMS CRITERIA (Test methods JIS-Z0701) A: Bulk density >750g/L B: Loss on drying <3% C: Moisture absorption rate RH=20% >8% RH=40% >20% RH=80% >30% PH 4--8 Specific resistance Ohm* cm >3000 INGREDIENTS NAME PERCENTAGE (%) SiO2 99.6 Na2O 0.17 Fe2O3 0.02 MgO 0.01 CaO 0.04 A12O3 0.16 HARMFUL ELEMENTS RATE Cd <2ppm Pb <2ppm Hg <2ppm Cr(VI) <2ppm PBBS <5ppm PBDES <5ppm DOSAGE VOLUME MIN DOSAGE 0.1------1L 1------2g 1------10L 2------20g 10------100L 20------200g 100------1000L 200------1600g PACKAGING Weight Packs are available from 1g to 1kg. Packaging materials Non-woven fabrics PRINTING The packages are printed in Chinese, English, Japanese and French. STORAGE Silica-gel should be kept sealed when not in use. 1.0 REV 2014-03-24 DATE SSt BY CSo CHECKED Würth Elektronik eiSos GmbH & Co. KG EMC & Inductive Solutions Max-Eyth-Str. 1 74638 Waldenburg Germany Tel. +49 (0) 79 42 945 - 0 www.we-online.com eiSos@we-online.com DESCRIPTION WE-WPCC Wireless Power Charging Receiver Coil Order.- No. 760308102210 SIZE A4 Size: 3737 A Dimensions: [mm] B Recommended hole pattern: [mm] C Schematic: D Electrical Properties: Properties Inductance Q-factor Rated current Saturation current DC Resistance DC Resistance Self resonant frequency Test conditions 125 kHz/ 10 mA 125 kHz/ 10 mA ΔT = 40 K @ 20°C @ 20°C L Q IR Isat RDC RDC fres Value 7.5 50 3.0 6.0 0.15 0.2 22 Unit μH A A Ω Ω MHz Tol. ±10% typ. max. typ. typ. max. E General information: It is recommended that the temperature of the part does not exceed +105°C under worst case conditions. •Storage Temperature: -20°C to 60°C •Operating Temperature: -20°C to 105°C •Test conditions of Electrical Properties: 20°C, 33% RH if not specified differently This electronic component has been designed and developed for usage in general electronic equipment only. This product is not authorized for use in equipment where a higher safety standard and reliability standard is especially required or where a failure of the product is reasonably expected to cause severe personal injury or death, unless the parties have executed an agreement specifically governing such use. Moreover Würth Elektronik eiSos GmbH & Co KG products are neither designed nor intended for use in areas such as military, aerospace, aviation, nuclear control, submarine, transportation (automotive control, train control, ship control), transportation signal, disaster prevention, medical, public information network etc.. Würth Elektronik eiSos GmbH & Co KG must be informed about the intent of such usage before the design-in stage. In addition, sufficient reliability evaluation checks for safety must be performed on every electronic component which is used in electrical circuits that require high safety and reliability functions or performance. ARALDITE® 2014-1 SAFETY DATA SHEET Product name ARALDITE® 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) : 1.1 Product identifier 1.3 Details of the supplier of the safety data sheet e-mail address of person responsible for this SDS : Global_Product_EHS_AdMat@huntsman.com Product description : Not available. 1.2 Relevant identified uses of the substance or mixture and uses advised against SECTION 1: Identification of the substance/mixture and of the company/undertaking Product code : 00057058 1.4 Emergency telephone number Supplier Telephone number : EUROPE: +32 35 75 1234 France ORFILA: +33(0)145425959 ASIA: +65 6336-6011 China: +86 20 39377888 Australia: 1800 786 152 New Zealand: 0800 767 437 USA: +1/800/424.9300 2-Component Product use : adhesive system Supplier : Huntsman Advanced Materials (Europe)BVBA Everslaan 45 3078 Everberg / Belgium Tel.: +41 61 299 20 41 Fax: +41 61 299 20 40 Classification Xi; R41, R38 R43 N; R51/53 : Human health hazards : Risk of serious damage to eyes. Irritating to skin. May cause sensitisation by skin contact. Environmental hazards : Toxic to aquatic organisms, may cause long-term adverse effects in the aquatic environment. See Section 11 for more detailed information on health effects and symptoms. SECTION 2: Hazards identification 2.1 Classification of the substance or mixture Product definition : Working pack (preparation) See Section 16 for the full text of the R phrases or H statements declared above. Classification according to Directive 1999/45/EC [DPD] The product is classified as dangerous according to Directive 1999/45/EC and its amendments. 2.2 Label elements Hazard symbol or symbols : Date of issue / Date of revision : 3 August 2011 1/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 2/17 SECTION 2: Hazards identification Other hazards which do : not result in classification Not available. Containers to be fitted with child-resistant fastenings Not applicable. Tactile warning of danger Not applicable. : : Special packaging requirements Safety phrases S26- In case of contact with eyes, rinse immediately with plenty of water and seek medical advice. S39- Wear eye/face protection. S61- Avoid release to the environment. Refer to special instructions/safety data sheet. R41- Risk of serious damage to eyes. R38- Irritating to skin. R43- May cause sensitisation by skin contact. R51/53- Toxic to aquatic organisms, may cause long-term adverse effects in the aquatic environment. Risk phrases Hazardous ingredients : : : Irritant, Dangerous for the environment reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) bisphenol F-epoxy resin butanedioldiglycidyl ether N(3-dimethylaminopropyl)-1,3-propylenediamine Indication of danger : 2.3 Other hazards Supplemental label elements : Contains epoxy constituents. See information supplied by the manufacturer. Substance/mixture : Working pack (preparation) Product/ingredient Identifiers 67/548/EEC name SECTION 3: Composition/information on ingredients reaction product: bisphenol A- (epichlorhydrin); epoxy resin (number average molecular weight < 700) REACH #: 01- 2119456619-26 CAS: 25068-38-6 13 - 30 Xi; R36/38 R43 N; R51/53 Skin Irrit. 2, H315 Eye Irrit. 2, H319 Skin Sens. 1, H317 Aquatic Chronic 2, H411 [1] bisphenol F-epoxy resin REACH #: 01- 2119454392-40 CAS: 9003-36-5 3 - 7 Xi; R36/38 R43 N; R51/53 Skin Irrit. 2, H315 Eye Irrit. 2, H319 Skin Sens. 1, H317 Aquatic Chronic 2, H411 [1] butanedioldiglycidyl ether REACH #: 01- 2119494060-45 CAS: 2425-79-8 1 - 3 Xn; R20/21 Xi; R36/38 R43 R52/53 Acute Tox. 4, H312 Acute Tox. 4, H332 Skin Irrit. 2, H315 Eye Irrit. 2, H319 Skin Sens. 1, H317 [1] N(3- dimethylaminopropyl)- 1,3-propylenediamine CAS: 10563-29-8 1 - 3 Xn; R21/22 C; R34 R43 Acute Tox. 4, H302 Acute Tox. 4, H312 Skin Corr. 1B, H314 Eye Dam. 1, H318 [1] % Regulation (EC) No. Type 1272/2008 [CLP] Classification Date of issue / Date of revision : 3 August 2011 2/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 3/17 SECTION 3: Composition/information on ingredients Occupational exposure limits, if available, are listed in Section 8. There are no additional ingredients present which, within the current knowledge of the supplier and in the concentrations applicable, are classified as hazardous to health or the environment and hence require reporting in this section. Skin Sens. 1, H317 terephthalic acid diglycidylester CAS: 7195-44-0 0.1 - 1 Xi; R36/38 R43 N; R51/53 Skin Irrit. 2, H315 Eye Irrit. 2, H319 Skin Sens. 1, H317 Aquatic Chronic 2, H411 [1] trimellitic acid triglycidylester CAS: 7237-83-4 0.1 - 1 Xi; R36/38 R43 N; R51/53 Skin Irrit. 2, H315 Eye Irrit. 2, H319 Skin Sens. 1, H317 Aquatic Chronic 2, H411 [1] See section 16 for the full text of the Rphrases declared above See Section 16 for the full text of the H statements declared above. [1] Substance classified with a health or environmental hazard [2] Substance with a workplace exposure limit [3] Substance meets the criteria for PBT according to Regulation (EC) No. 1907/2006, Annex XIII [4] Substance meets the criteria for vPvB according to Regulation (EC) No. 1907/2006, Annex XIII Type Wash out mouth with water. Remove dentures if any. Remove victim to fresh air and keep at rest in a position comfortable for breathing. If material has been swallowed and the exposed person is conscious, give small quantities of water to drink. Stop if the exposed person feels sick as vomiting may be dangerous. Do not induce vomiting unless directed to do so by medical personnel. If vomiting occurs, the head should be kept low so that vomit does not enter the lungs. Get medical attention if adverse health effects persist or are severe. Never give anything by mouth to an unconscious person. If unconscious, place in recovery position and get medical attention immediately. Maintain an open airway. Loosen tight clothing such as a collar, tie, belt or waistband. Skin contact Get medical attention immediately. Immediately flush eyes with plenty of water, occasionally lifting the upper and lower eyelids. Check for and remove any contact lenses. Continue to rinse for at least 10 minutes. Chemical burns must be treated promptly by a physician. Flush contaminated skin with plenty of water. Remove contaminated clothing and shoes. Wash contaminated clothing thoroughly with water before removing it, or wear gloves. Continue to rinse for at least 10 minutes. Get medical attention. In the event of any complaints or symptoms, avoid further exposure. Wash clothing before reuse. Clean shoes thoroughly before reuse. 4.1 Description of first aid measures Remove victim to fresh air and keep at rest in a position comfortable for breathing. If not breathing, if breathing is irregular or if respiratory arrest occurs, provide artificial respiration or oxygen by trained personnel. It may be dangerous to the person providing aid to give mouth-to-mouth resuscitation. Get medical attention if adverse health effects persist or are severe. If unconscious, place in recovery position and get medical attention immediately. Maintain an open airway. Loosen tight clothing such as a collar, tie, belt or waistband. In case of inhalation of decomposition products in a fire, symptoms may be delayed. The exposed person may need to be kept under medical surveillance for 48 hours. Ingestion Inhalation Eye contact : : : : SECTION 4: First aid measures Date of issue / Date of revision : 3 August 2011 3/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 4/17 SECTION 4: First aid measures Notes to physician In case of inhalation of decomposition products in a fire, symptoms may be delayed. The exposed person may need to be kept under medical surveillance for 48 hours. : Specific treatments Protection of first-aiders : No action shall be taken involving any personal risk or without suitable training. It may be dangerous to the person providing aid to give mouth-to-mouth resuscitation. Wash contaminated clothing thoroughly with water before removing it, or wear gloves. 4.2 Most important symptoms and effects, both acute and delayed Potential acute health effects Inhalation : Exposure to decomposition products may cause a health hazard. Serious effects may be delayed following exposure. Irritating to Ingestion : mouth, throat and stomach. Skin contact : Irritating to skin. May cause sensitisation by skin contact. Eye contact : Severely irritating to eyes. Risk of serious damage to eyes. Over-exposure signs/symptoms Skin contact Ingestion Inhalation No specific data. No specific data. Adverse symptoms may include the following: irritation redness : : : Eye contact : Adverse symptoms may include the following: pain or irritation watering redness 4.3 Indication of any immediate medical attention and special treatment needed : Symptomatic treatment and supportive therapy as indicated. Following severe exposure the patient should be kept under medical review for at least 48 hours. Hazardous thermal decomposition products Hazards from the substance or mixture Decomposition products may include the following materials: carbon dioxide carbon monoxide nitrogen oxides sulfur oxides metal oxide/oxides In a fire or if heated, a pressure increase will occur and the container may burst. Use an extinguishing agent suitable for the surrounding fire. 5.1 Extinguishing media : : None known. Suitable extinguishing media : Unsuitable extinguishing media : SECTION 5: Firefighting measures 5.2 Special hazards arising from the substance or mixture 5.3 Advice for firefighters Date of issue / Date of revision : 3 August 2011 4/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 5/17 SECTION 5: Firefighting measures Promptly isolate the scene by removing all persons from the vicinity of the incident if there is a fire. No action shall be taken involving any personal risk or without suitable training. This material is toxic to aquatic organisms. Fire water contaminated with this material must be contained and prevented from being discharged to any waterway, sewer or drain. Fire-fighters should wear appropriate protective equipment and self-contained breathing apparatus (SCBA) with a full face-piece operated in positive pressure mode. Clothing for fire-fighters (including helmets, protective boots and gloves) conforming to European standard EN 469 will provide a basic level of protection for chemical incidents. Special protective equipment for fire-fighters : Special precautions for fire-fighters : 6.2 Environmental precautions Stop leak if without risk. Move containers from spill area. Approach the release from upwind. Prevent entry into sewers, water courses, basements or confined areas. Wash spillages into an effluent treatment plant or proceed as follows. Contain and collect spillage with non-combustible, absorbent material e.g. sand, earth, vermiculite or diatomaceous earth and place in container for disposal according to local regulations. Dispose of via a licensed waste disposal contractor. Contaminated absorbent material may pose the same hazard as the spilt product. Avoid dispersal of spilt material and runoff and contact with soil, waterways, drains and sewers. Inform the relevant authorities if the product has caused environmental pollution (sewers, waterways, soil or air). Water polluting material. May be harmful to the environment if released in large quantities. Large spill : Stop leak if without risk. Move containers from spill area. Dilute with water and mop up if water-soluble. Alternatively, or if water-insoluble, absorb with an inert dry material and place in an appropriate waste disposal container. Dispose of via a licensed waste disposal contractor. Small spill : 6.3 Methods and materials for containment and cleaning up SECTION 6: Accidental release measures 6.1 Personal precautions, protective equipment and emergency procedures For non-emergency personnel : For emergency responders : 6.4 Reference to other sections See Section 1 for emergency contact information. See Section 8 for information on appropriate personal protective equipment. See Section 13 for additional waste treatment information. No action shall be taken involving any personal risk or without suitable training. Evacuate surrounding areas. Keep unnecessary and unprotected personnel from entering. Do not touch or walk through spilt material. Avoid breathing vapour or mist. Provide adequate ventilation. Wear appropriate respirator when ventilation is inadequate. Put on appropriate personal protective equipment. If specialised clothing is required to deal with the spillage, take note of any information in Section 8 on suitable and unsuitable materials. See also Section 8 for additional information on hygiene measures. : : SECTION 7: Handling and storage The information in this section contains generic advice and guidance. The list of Identified Uses in Section 1 should be consulted for any available use-specific information provided in the Exposure Scenario(s). 7.1 Precautions for safe handling Protective measures : Put on appropriate personal protective equipment (see Section 8). Persons with a history of skin sensitization problems should not be employed in any process in which this product is used. Do not get in eyes or on skin or clothing. Do not ingest. Avoid breathing vapour or mist. Avoid release to the environment. Refer to special instructions/safety data sheet. Keep in the original container or an approved alternative made from a compatible material, kept tightly closed when not in use. Empty containers retain product residue and can be hazardous. Do not reuse container. Date of issue / Date of revision : 3 August 2011 5/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 6/17 SECTION 7: Handling and storage Store between the following temperatures: 2 to 40°C (35.6 to 104°F). Store in accordance with local regulations. Store in original container protected from direct sunlight in a dry, cool and well-ventilated area, away from incompatible materials (see section 10) and food and drink. Keep container tightly closed and sealed until ready for use. Containers that have been opened must be carefully resealed and kept upright to prevent leakage. Do not store in unlabelled containers. Use appropriate containment to avoid environmental contamination. Advice on general occupational hygiene : 7.2 Conditions for safe storage, including any incompatibilities 7.3 Specific end use(s) Recommendations : Industrial sector specific : solutions Not available. Not available. Eating, drinking and smoking should be prohibited in areas where this material is handled, stored and processed. Workers should wash hands and face before eating, drinking and smoking. Remove contaminated clothing and protective equipment before entering eating areas. See also Section 8 for additional information on hygiene measures. : Storage hazard class Huntsman Advanced Materials : Storage class 10, Environmentally hazardous liquids Recommended monitoring procedures Occupational exposure limits If this product contains ingredients with exposure limits, personal, workplace atmosphere or biological monitoring may be required to determine the effectiveness of the ventilation or other control measures and/or the necessity to use respiratory protective equipment. Reference should be made to European Standard EN 689 for methods for the assessment of exposure by inhalation to chemical agents and national guidance documents for methods for the determination of hazardous substances. : No exposure limit value known. No DELs available. Predicted effect concentrations No PECs available. SECTION 8: Exposure controls/personal protection The information in this section contains generic advice and guidance. The list of Identified Uses in Section 1 should be consulted for any available use-specific information provided in the Exposure Scenario(s). 8.1 Control parameters Derived effect levels Workplace exposure limits (for total dust and inhalable quartz dust) must be complied with. If this is not possible, then suitable dust masks must be worn. W A R N I N G ! This product contains quartz, which has been classified by IARC as carcinogenic for humans (Group 1), and which can cause silicosis and lung cancer following exposure to respirable dust. It is therefore important to take particular care to avoid inhalation exposure when mechanically processing cured material (e.g. grinding, sanding, sawing). QUARTZ (CAS RN 14808-60-7): United Kingdom: TWA: 0.1 mg/m³ 8 hour(s). Form: respirable dust Ireland: OELV-8hr: 0.1 mg/m³ 8 hour(s). Form: respirable dust Switzerland: TWA: 0.15 mg/m³ 8 hour(s). Form: respirable dust Australia: TWA: 0.1 mg/m³ 8 hour(s) Date of issue / Date of revision : 3 August 2011 6/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 7/17 SECTION 8: Exposure controls/personal protection Hand protection In case of inadequate ventilation wear respiratory protection. Respirator selection must be based on known or anticipated exposure levels, the hazards of the product and the safe working limits of the selected respirator. Chemical-resistant, impervious gloves complying with an approved standard should be worn at all times when handling chemical products if a risk assessment indicates this is necessary. Safety eyewear complying with an approved standard should be used when a risk assessment indicates this is necessary to avoid exposure to liquid splashes, mists or dusts. Eye/face protection Respiratory protection : : : Skin protection Personal protective equipment for the body should be selected based on the task being performed and the risks involved and should be approved by a specialist before handling this product. : Environmental exposure controls : Emissions from ventilation or work process equipment should be checked to ensure they comply with the requirements of environmental protection legislation. In some cases, fume scrubbers, filters or engineering modifications to the process equipment will be necessary to reduce emissions to acceptable levels. Appropriate engineering controls : No special ventilation requirements. Good general ventilation should be sufficient to control worker exposure to airborne contaminants. If this product contains ingredients with exposure limits, use process enclosures, local exhaust ventilation or other engineering controls to keep worker exposure below any recommended or statutory limits. Wash hands, forearms and face thoroughly after handling chemical products, before eating, smoking and using the lavatory and at the end of the working period. Appropriate techniques should be used to remove potentially contaminated clothing. Contaminated work clothing should not be allowed out of the workplace. Wash contaminated clothing before reusing. Ensure that eyewash stations and safety showers are close to the workstation location. 8.2 Exposure controls Hygiene measures : Individual protection measures Body protection : Other skin protection Appropriate footwear and any additional skin protection measures should be selected based on the task being performed and the risks involved and should be approved by a specialist before handling this product. Ethyl Vinyl Alcohol Laminate (EVAL), butyl rubber neoprene, Material of gloves for nitrile rubber short term/splash application (10min480min): Physical state Liquid. [Paste.] Odour Not available. Colour Not available. Odour threshold Not available. : : : : 9.1 Information on basic physical and chemical properties Appearance SECTION 9: Physical and chemical properties Date of issue / Date of revision : 3 August 2011 7/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 8/17 SECTION 9: Physical and chemical properties Not available. Melting point/freezing point Initial boiling point and boiling range Vapour pressure Relative density Vapour density Solubility(ies) Not available. Not available. Not available. Not available. pH Evaporation rate Not available. Auto-ignition temperature Flash point Not available. Closed cup: >100°C [DIN 51758 EN 22719 (Pensky-Martens Closed Cup)] Not available. Not available. Not available. Not available. Viscosity Not available. Partition coefficient: noctanol/ water Upper/lower flammability or explosive limits Explosive properties : : : : : : : : : : : : : Oxidising properties : Not available. 9.2 Other information Burning time Not applicable. Burning rate Not applicable. : : Decomposition temperature : Not available. Flammability (solid, gas) : Not available. Density : 1.4 g/cm3 [20°C (68°F)] Water solubility : 10.6 Hazardous decomposition products 10.4 Conditions to avoid No specific data. Under normal conditions of storage and use, hazardous decomposition products should not be produced. 10.2 Chemical stability The product is stable. No specific data. : : : 10.5 Incompatible materials : 10.3 Possibility of hazardous reactions : Under normal conditions of storage and use, hazardous reactions will not occur. SECTION 10: Stability and reactivity 10.1 Reactivity : No specific test data related to reactivity available for this product or its ingredients. Date of issue / Date of revision : 3 August 2011 8/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 9/17 Acute toxicity reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) LC0 Inhalation Vapour Rat - Male 0.00001 ppm 5 hours LD50 Dermal Rat - Male, Female >2000 mg/kg - LD50 Oral Rat - Female >2000 mg/kg - bisphenol F-epoxy resin LD50 Dermal Rat - Male, Female >2000 mg/kg - LD50 Oral Rat - Male, Female >5000 mg/kg - butanedioldiglycidyl ether LD50 Dermal Rat - Male, Female >2150 mg/kg - LD50 Oral Rat - Male, Female 1163 mg/kg - N(3-dimethylaminopropyl)- 1,3-propylenediamine LD50 Dermal Rabbit 1310 mg/kg - LD50 Oral Rat 1670 mg/kg - Product/ingredient name Endpoint Species Result Exposure Irritation/Corrosion reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD 404 Acute Dermal Irritation/Corrosion Rabbit Mild irritant OECD 405 Acute Eye Irritation/Corrosion Rabbit Mild irritant bisphenol F-epoxy resin OECD 405 Acute Eye Irritation/Corrosion Rabbit Non-irritant. OECD 404 Acute Dermal Irritation/Corrosion Rabbit Mild irritant butanedioldiglycidyl ether OECD 404 Acute Dermal Irritation/Corrosion Rabbit Non-irritant. OECD 405 Acute Eye Irritation/Corrosion Rabbit Severe irritant Product/ingredient name Test Result Conclusion/Summary : Skin : reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700): Slightly irritating to the skin. bisphenol F-epoxy resin: Slightly irritating to the skin. butanedioldiglycidyl ether: Non-irritating to the skin. Eyes : reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700): Slightly irritating to the eyes. bisphenol F-epoxy resin: Non-irritating to the eyes. butanedioldiglycidyl ether: Severely irritating to eyes. Not available. Sensitiser reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD 429 Skin Sensitisation: Local Lymph Node Assay skin Mouse Sensitising bisphenol F-epoxy resin OECD 429 Skin Sensitisation: Local Lymph Node Assay skin Mouse Sensitising butanedioldiglycidyl ether OECD 406 Skin Sensitization skin Guinea pig Sensitising Product/ingredient name Test Route of exposure Result Species SECTION 11: Toxicological information 11.1 Information on toxicological effects Species Date of issue / Date of revision : 3 August 2011 9/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 10/17 SECTION 11: Toxicological information Carcinogenicity reaction product: bisphenol A- (epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD 453 Combined Chronic Toxicity/Carcinogenicity Studies Rat 2 years; 7 days per week Negative Oral - OECD 453 Combined Chronic Toxicity/Carcinogenicity Studies Rat 2 years; 5 days per week Negative Dermal - OECD 453 Combined Chronic Toxicity/Carcinogenicity Studies Mouse 2 years; 3 days per week Negative Dermal - Product/ingredient name Test Species Exposure Result Mutagenicity reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD 471 Bacterial Reverse Mutation Test Positive OECD 476 In vitro Mammalian Cell Gene Mutation Test Positive OECD 478 Genetic Toxicology: Rodent Dominant Lethal Test Negative EPA OPPTS Negative bisphenol F-epoxy resin OECD 471 Bacterial Reverse Mutation Test Positive OECD 476 In vitro Mammalian Cell Gene Mutation Test Positive OECD 473 In vitro Mammalian Chromosomal Aberration Test Positive OECD 474 Mammalian Erythrocyte Micronucleus Test Negative OECD 486 Unscheduled DNA Synthesis (UDS) Test with Mammalian Liver Cells in vivo Negative butanedioldiglycidyl ether OECD 471 Bacterial Reverse Mutation Test Positive OECD 473 In vitro Mammalian Chromosomal Aberration Test Positive OECD 474 Mammalian Erythrocyte Micronucleus Test Negative Product/ingredient name Test Result Conclusion/Summary : Not available. Teratogenicity Reproductive toxicity Product/ingredient name Test Species Result/Result type Target organs reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD 416 Two-Generation Reproduction Toxicity Study Rat Oral: 540 mg/kg NOEL : - bisphenol F-epoxy resin OECD 416 Two-Generation Reproduction Toxicity Study Rat Oral: 540 mg/kg NOEL : - Conclusion/Summary : Not available. Route of exposure Target organs Date of issue / Date of revision : 3 August 2011 10/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 11/17 SECTION 11: Toxicological information Potential chronic health effects Potential acute health effects Inhalation : Exposure to decomposition products may cause a health hazard. Serious effects may be delayed following exposure. Irritating to Ingestion : mouth, throat and stomach. Skin contact : Irritating to skin. May cause sensitisation by skin contact. Eye contact : Severely irritating to eyes. Risk of serious damage to eyes. reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD 408 Repeated Dose 90-Day Oral Toxicity Study in Rodents NOAEL Subchronic NOAEL Oral 50 mg/kg - OECD 411 Subchronic Dermal Toxicity: 90-day Study NOEL : Subchronic NOEL : Dermal 10 mg/kg - OECD 411 Subchronic Dermal Toxicity: 90-day Study NOAEL Subchronic NOAEL Dermal 100 mg/kg - bisphenol F-epoxy resin OECD 408 Repeated Dose NOAEL Sub- 250 mg/kg - Product/ingredient name Test Result type Result Target organs reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD 414 Prenatal Developmental Toxicity Study Rat - Female >540 mg/kg NOEL : EPA CFR Rabbit - Female >300 mg/kg NOEL : OECD 414 Prenatal Developmental Toxicity Study Rabbit - Female 180 mg/kg NOAEL bisphenol F-epoxy resin EPA CFR Rabbit - Female >300 mg/kg NOEL : Product/ingredient name Test Species Result/Result type Symptoms related to the physical, chemical and toxicological characteristics Skin contact Ingestion Inhalation No specific data. No specific data. Adverse symptoms may include the following: irritation redness : : : Eye contact : Adverse symptoms may include the following: pain or irritation watering redness Information on the likely Not available. routes of exposure : Delayed and immediate effects and also chronic effects from short and long term exposure Short term exposure Long term exposure Potential immediate effects Potential delayed effects : : Potential immediate effects Potential delayed effects : : Not available. Not available. Not available. Not available. Date of issue / Date of revision : 3 August 2011 11/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 12/17 SECTION 11: Toxicological information Once sensitized, a severe allergic reaction may occur when subsequently exposed to very low levels. General : No known significant effects Carcinogenicity : or critical hazards. Mutagenicity : No known significant effects or critical hazards. Teratogenicity : No known significant effects or critical hazards. 90-Day Oral Toxicity Study in Rodents chronic NOAEL Oral butanedioldiglycidyl ether OECD 407 Repeated Dose 28-day Oral Toxicity Study in Rodents NOAEL Subchronic NOAEL Oral 200 mg/kg - Conclusion/Summary : Not available. Developmental effects : No known significant effects or critical hazards. Fertility effects : No known significant effects or critical hazards. Other information : Not available. 12.1 Toxicity reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) - Acute EC50 72 hours Static Algae 9.4 mg/L OECD 202 Daphnia sp. Acute Immobilisation Test Acute EC50 48 hours Static Daphnia 1.7 mg/L - Acute IC50 3 hours Static Bacteria >100 mg/L OECD 203 Fish, Acute Toxicity Test Acute LC50 96 hours Static Fish 1.5 mg/L OECD 211 Daphnia Magna Reproduction Test Chronic NOEC 21 days Semistatic Daphnia 0.3 mg/L bisphenol F-epoxy resin OECD 201 Alga, Growth Inhibition Test Acute EC50 72 hours Static Algae 1.8 mg/L OECD OECD 202: Part I (Daphnia sp., Acute Immobilisation test) Acute EC50 48 hours Static Daphnia 1.6 mg/L - Acute IC50 3 hours Static Bacteria >100 mg/L OECD 203 Fish, Acute Toxicity Test Acute LC50 96 hours Semistatic Fish 0.55 mg/L OECD 211 Daphnia Magna Reproduction Test Chronic NOEC 21 days Semistatic Daphnia 0.3 mg/L butanedioldiglycidyl ether OECD 202 Daphnia sp. Acute Immobilisation Test Acute EC50 24 hours Static Daphnia 75 mg/L OECD 201 Alga, Growth Inhibition Test Acute EL50 72 hours Static Algae >160 mg/L OECD 209 Activated Sludge, Respiration Inhibition Test Acute IC50 3 hours Static Bacteria >100 mg/L OECD 203 Fish, Acute Toxicity Test Acute LC50 96 hours Static Fish 24 mg/L Product/ingredient name Exposure Species Result 12.2 Persistence and degradability SECTION 12: Ecological information Test Endpoint Date of issue / Date of revision : 3 August 2011 12/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 13/17 SECTION 12: Ecological information Mobility : Not available. LogPow BCF Potential 12.3 Bioaccumulative potential 12.6 Other adverse effects No known significant effects or critical hazards. Product/ingredient name reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) 3.242 31 low bisphenol F-epoxy resin 2.7 to 3.6 - high butanedioldiglycidyl ether -0.269 - low Product/ingredient name Aquatic half-life Photolysis Biodegradability reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) Fresh water 4.83 days Fresh water 3.58 days Fresh water 7.1 days - Not readily bisphenol F-epoxy resin - - Not readily butanedioldiglycidyl ether - - Not readily reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700) OECD Derived from OECD 301F (Biodegradation Test) 28 days 5 % bisphenol F-epoxy resin EU 28 days 0 % butanedioldiglycidyl ether OECD 301F Ready Biodegradability - Manometric Respirometry Test 28 days 43 % Product/ingredient name Test Result Conclusion/Summary : reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700): Not readily biodegradable. 12.4 Mobility in soil Soil/water partition coefficient (KOC) : Not available. 12.5 Results of PBT and vPvB assessment : 12.7 Other ecological information Period Not applicable. The generation of waste should be avoided or minimised wherever possible. Significant quantities of waste product residues should not be disposed of via the foul sewer but processed in a suitable effluent treatment plant. Dispose of surplus and non-recyclable products via a licensed waste disposal contractor. Disposal of this product, solutions and any by-products should at all times comply with the requirements of environmental protection and waste disposal legislation and any regional local authority requirements. Waste packaging should be recycled. Incineration or landfill should only be considered when recycling is not feasible. This Methods of disposal : SECTION 13: Disposal considerations The information in this section contains generic advice and guidance. The list of Identified Uses in Section 1 should be consulted for any available use-specific information provided in the Exposure Scenario(s). 13.1 Waste treatment methods Product Date of issue / Date of revision : 3 August 2011 13/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 14/17 SECTION 13: Disposal considerations European waste catalogue (EWC) Hazardous waste : Yes. material and its container must be disposed of in a safe way. Care should be taken when handling emptied containers that have not been cleaned or rinsed out. Empty containers or liners may retain some product residues. Avoid dispersal of spilt material and runoff and contact with soil, waterways, drains and sewers. Packaging Waste code Waste designation Methods of disposal : Special precautions : 07 02 08* other still bottoms and reaction residues The generation of waste should be avoided or minimised wherever possible. Waste packaging should be recycled. Incineration or landfill should only be considered when recycling is not feasible. This material and its container must be disposed of in a safe way. Care should be taken when handling emptied containers that have not been cleaned or rinsed out. Empty containers or liners may retain some product residues. Avoid dispersal of spilt material and runoff and contact with soil, waterways, drains and sewers. Environmentally hazardous substance, liquid, n.o.s. BISPHENOL A/F EPOXY RESIN 9 III Environmentally hazardous substance, liquid, n.o.s. (BISPHENOL A/F EPOXY RESIN) Marine pollutant (reaction product: bisphenol A-(epichlorhydrin); epoxy resin (number average molecular weight < 700), bisphenol F-epoxy resin) 9 III Environmentally hazardous substance, liquid, n.o.s. (BISPHENOL A/F EPOXY RESIN) UN3082 9 not available not available III UN3082 UN3082 Hazard identification number 90 Special provisions 274 335 601 Tunnel code E Emergency schedules (EmS) F-A, S-F Passenger and Cargo Aircraft Quantity limitation: 450 L Packaging instructions: 964 Cargo Aircraft Only Quantity limitation: 450 L Packaging SECTION 14: Transport information ADR/RID IMDG IATA 14.1 UN number 14.2 UN proper shipping name 14.3 Transport hazard class(es) 14.4 Packing group ADN/ADNR Additional information 14.5 Environmental hazards 14.6 Special precautions for user Yes. Yes. Yes. Not available. Not available. Not available. ADN/ADNR IMDG IATA ADR/RID Date of issue / Date of revision : 3 August 2011 14/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 15/17 SECTION 14: Transport information instructions: 964 14.7 Transport in bulk according to Annex II of MARPOL 73/78 and the IBC Code : Not applicable. National regulations Other EU regulations Annex XVII - Restrictions Not applicable. on the manufacture, placing on the market and use of certain dangerous substances, mixtures and articles : Europe inventory : All components are listed or exempted. Black List Chemicals : Not listed Priority List Chemicals : Not listed Integrated pollution prevention and control list (IPPC) - Air : Not listed Integrated pollution prevention and control list (IPPC) - Water : Not listed Chemical Weapons Convention List Schedule I Chemicals : Not listed Chemical Weapons Convention List Schedule II Chemicals : Not listed Chemical Weapons Convention List Schedule III Chemicals : Not listed International regulations References : The provision of Safety Data Sheets comes under Regulation 6 of CHIP (CHIP is the recognised abbreviation for the Chemicals Hazard Information and Packaging Regulations). This is an addition to the Health and Safety at Work Act 1974. SECTION 15: Regulatory information 15.1 Safety, health and environmental regulations/legislation specific for the substance or mixture EU Regulation (EC) No. 1907/2006 (REACH) Annex XIV - List of substances subject to authorisation 15.2 Chemical Safety Assessment This product contains substances for which Chemical Safety Assessments are still required. Substances of very high concern : None of the components are listed. Date of issue / Date of revision : 3 August 2011 15/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 16/17 Date of printing : 3 August 2011 R20/21- Harmful by inhalation and in contact with skin. R21/22- Harmful in contact with skin and if swallowed. R34- Causes burns. R41- Risk of serious damage to eyes. R38- Irritating to skin. R36/38- Irritating to eyes and skin. R43- May cause sensitisation by skin contact. R51/53- Toxic to aquatic organisms, may cause long-term adverse effects in the aquatic environment. R52/53- Harmful to aquatic organisms, may cause long-term adverse effects in the aquatic environment. Full text of abbreviated R : phrases C - Corrosive Xn - Harmful Xi - Irritant N - Dangerous for the environment Full text of classifications : [DSD/DPD] Indicates information that has changed from previously issued version. SECTION 16: Other information Full text of abbreviated H statements : Abbreviations and acronyms : ATE = Acute Toxicity Estimate CLP = Classification, Labelling and Packaging Regulation [Regulation (EC) No. 1272/2008] DNEL = Derived No Effect Level EUH statement = CLP-specific Hazard statement PNEC = Predicted No Effect Concentration RRN = REACH Registration Number Classification according to Regulation (EC) No. 1272/2008 [CLP/GHS] Procedure used to derive the classification according to Regulation (EC) No. 1272/2008 [CLP/GHS] Classification Justification Skin Irrit. 2, H315 Expert judgment Eye Dam. 1, H318 Expert judgment Skin Sens. 1, H317 Expert judgment Aquatic Chronic 2, H411 Expert judgment Full text of classifications [CLP/GHS] : H302 Harmful if swallowed. H312 Harmful in contact with skin. H314 Causes severe skin burns and eye damage. H315 Causes skin irritation. H317 May cause an allergic skin reaction. H318 Causes serious eye damage. H319 Causes serious eye irritation. H332 Harmful if inhaled. H411 Toxic to aquatic life with long lasting effects. Acute Tox. 4, H302 ACUTE TOXICITY: ORAL - Category 4 Acute Tox. 4, H312 ACUTE TOXICITY: SKIN - Category 4 Acute Tox. 4, H332 ACUTE TOXICITY: INHALATION - Category 4 Aquatic Chronic 2, H411 AQUATIC TOXICITY (CHRONIC) - Category 2 Eye Dam. 1, H318 SERIOUS EYE DAMAGE/ EYE IRRITATION - Category 1 Eye Irrit. 2, H319 SERIOUS EYE DAMAGE/ EYE IRRITATION - Category 2 Skin Corr. 1B, H314 SKIN CORROSION/IRRITATION - Category 1B Skin Irrit. 2, H315 SKIN CORROSION/IRRITATION - Category 2 Skin Sens. 1, H317 SKIN SENSITIZATION - Category 1 Skin Irrit. 2, H315 Eye Dam. 1, H318 Skin Sens. 1, H317 Aquatic Chronic 2, H411 MSDS no. : 00057058 Date of issue / Date of revision : 3 August 2011 16/17 ARALDITE 2014-1 Conforms to Regulation (EC) No. 1907/2006 (REACH), Annex II - United Kingdom (UK) Date of printing : Date of issue : 3 August 2011 3 August 2011 MSDS no. Version : : 00057058 1 17/17 SECTION 16: Other information Date of issue/ Date of revision Version Notice to reader Date of previous issue : : : 3 August 2011 No previous validation. 1 While the information and recommendations in this publication are to the best of our knowledge, information and belief accurate at the date of publication, NOTHING HEREIN IS TO BE CONSTRUED AS A WARRANTY, EXPRESS OR OTHERWISE. IN ALL CASES, IT IS THE RESPONSIBILITY OF THE USER TO DETERMINE THE APPLICABILITY OF SUCH INFORMATION AND RECOMMENDATIONS AND THE SUITABILITY OF ANY PRODUCT FOR ITS OWN PARTICULAR PURPOSE. THE PRODUCT MAY PRESENT HAZARDS AND SHOULD BE USED WITH CAUTION. WHILE CERTAIN HAZARDS ARE DESCRIBED IN THIS PUBLICATION, NO GUARANTEE IS MADE THAT THESE ARE THE ONLY HAZARDS THAT EXIST. Hazards, toxicity and behaviour of the products may differ when used with other materials and are dependent upon the manufacturing circumstances or other processes. Such hazards, toxicity and behaviour should be determined by the user and made known to handlers, processors and end users. ARALDITE® is a registered trademark of Huntsman Corporation or an affiliate thereof in one or more countries, but not all countries. NO PERSON OR ORGANIZATION EXCEPT A DULY AUTHORIZED HUNTSMAN EMPLOYEE IS AUTHORIZED TO PROVIDE OR MAKE AVAILABLE DATA SHEETS FOR HUNTSMAN PRODUCTS. DATA SHEETS FROM UNAUTHORIZED SOURCES MAY CONTAIN INFORMATION THAT IS NO LONGER CURRENT OR ACCURATE. NO PART OF THIS DATA SHEET MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM, OR BY ANY MEANS, WITHOUT PERMISSION IN WRITING FROM HUNTSMAN. ALL REQUESTS FOR PERMISSION TO REPRODUCE MATERIAL FROM THIS DATA SHEET SHOULD BE DIRECTED TO HUNTSMAN, MANAGER, PRODUCT SAFETY AT THE ABOVE ADDRESS. Date of issue / Date of revision : 3 August 2011 17/17 1 ® CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002-2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 8-Digit, Microprocessor-Compatible, LED Display Decoder Driver The Intersil ICM7228 display driver interfaces microprocessors to an 8-digit, 7-segment, numeric LED display. Included on chip are two types of 7-segment decoder, multiplex scan circuitry, LED display segment drivers, LED display digit drivers and an 8-byte static memory as display RAM. Data can be written to the ICM7228A and ICM7228B’s display RAM in sequential 8-digit update or in single-digit update format. Data is written to the ICM7228C display RAM in parallel random access format. The ICM7228A and ICM7228C drive common anode displays. The ICM7228B drives common cathode displays. All versions can display the RAM data as either Hexadecimal or Code B format. The ICM7228A and ICM7228B incorporate a No Decode mode allowing each bit of each digit's RAM word to drive individual display segments resulting in independent control of all display segments. As a result, bargraph and other irregular display segments and formats can be driven directly by this chip. The Intersil ICM7228 is an alternative to both the Maxim ICM7218 and the Intersil ICM7218 display drivers. Notice that the ICM7228A/B has an additional single digit access mode. This could make the Intersil ICM7218A/B software incompatible with ICM7228A/B operation. Features • Pb-Free Plus Anneal Available (RoHS Compliant) • Improved 2nd Source to Maxim ICM7218 • Fast Write Access Time of 200ns • Multiple Microprocessor Compatible Versions • Hexadecimal, Code B and No Decode Modes • Individual Segment Control with “No Decode” Feature • Digit and Segment Drivers On-Chip • Non-Overlapping Digits Drive • Common Anode and Common Cathode LED Versions • Low Power CMOS Architecture • Single 5V Supply Applications • Instrumentation • Test Equipment • Hand Held Instruments • Bargraph Displays • Numeric and Non-Numeric Panel Displays • High and Low Temperature Environments where LCD Display Integrity is Compromised Ordering Information PART NUMBER PART MARKING DATA ENTRY PROTOCOL DISPLAY TYPE TEMP. RANGE (oC) PACKAGE PKG. DWG. # ICM7228AIBI ICM7228AIBI Sequential Common Anode -40 to 85 28 Ld SOIC M28.3 ICM7228AIBIZ (Note) 7228AIBIZ Sequential Common Anode -40 to 85 28 Ld SOIC (Pb-free) M28.3 ICM7228AIPI ICM7228AIPI Sequential Common Anode -40 to 85 28 Ld PDIP E28.6 ICM7228AIPIZ (Note) ICM7228AIPI Sequential Common Anode -40 to 85 28 Ld PDIP* (Pb-free) E28.6 ICM7228BIBI ICM7228BIBI Sequential Common Cathode -40 to 85 28 Ld SOlC M28.3 ICM7228BIBIZ (Note) ICM7228BIBIZ Sequential Common Cathode -40 to 85 28 Ld SOlC (Pb-free) M28.3 ICM7228BIPI ICM7228BIPI Sequential Common Cathode -40 to 85 28 Ld PDIP E28.6 ICM7228BIPIZ (Note) ICM7228BIPIZ Sequential Common Cathode -40 to 85 28 Ld PDIP (Pb-free) E28.6 ICM7228CIBI ICM7228CIBI Random Common Anode -40 to 85 28 Ld SOlC M28.3 ICM7228CIBIZ (Note) ICM7228CIBIZ Random Common Anode -40 to 85 28 Ld SOlC (Pb-free) M28.3 ICM7228CIPI ICM7228CIPI Random Common Anode -40 to 85 28 Ld PDIP E28.6 ICM7228CIPIZ (Note) ICM7228CIPI Random Common Anode -40 to 85 28 Ld PDIP (Pb-free) E28.6 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Data Sheet December 6, 2005 FN3160.8 ICM7228 2 ICM7228 Pinouts ICM7228A (PDIP, SOIC) COMMON ANODE TOP VIEW ICM7228B (PDIP, SOIC) COMMON CATHODE TOP VIEW ICM7228C (PDIP, SOIC) COMMON ANODE TOP VIEW SEG c SEG e SEG b DP ID6 (HEXA/CODE B) ID5 (DECODE) ID7 (DATA COMING) WRITE MODE ID4 (SHUTDOWN) ID1 ID0 ID2 ID3 VSS SEG g SEG d SEG f DIGIT 3 DIGIT 7 VDD DIGIT 8 DIGIT 5 DIGIT 2 DIGIT 1 SEG a DIGIT 6 DIGIT 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DIGIT 4 DIGIT 6 DIGIT 3 DIGIT 1 ID6 (HEXA/CODE B) ID5 (DECODE) ID7 (DATA COMING) WRITE MODE ID4 (SHUTDOWN) ID1 ID0 ID2 ID3 VSS DIGIT 5 DIGIT 2 DIGIT 8 SEG g SEG e VDD SEG d SEG b SEG a DP DIGIT 7 SEG f SEG c 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SEG c SEG e SEG b DP DA0 (DIGIT ADDRESS 0) DA1 (DIGIT ADDRESS 1) ID7 (INPUT DP) WRITE HEXA/CODE B/SHUTDOWN DA2 (DIGIT ADDRESS 2) ID1 ID0 ID2 ID3 VSS SEG g SEG d SEG f DIGIT 3 DIGIT 7 VDD DIGIT 8 DIGIT 5 DIGIT 2 DIGIT 1 SEG a DIGIT 6 DIGIT 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 3 ICM7228 Functional Block Diagram 8 SEGMENT DRIVERS 8 DIGIT DRIVERS DECODE NO-DECODE 8-BYTE STATIC RAM HEXADECIMAL/ CODE B DECODER MULTIPLEX OSCILLATOR WRITE ADDRESS COUNTER CONTROL LOGIC READ ADDRESS, DIGIT MULTIPLEXER ICM7228A, ICM7228B ID0 - ID7 INPUT DATA ID4 - ID7 CONTROL INPUTS MODE WRITE SHUTDOWN HEXA/CODE B DECODE INTERDIGIT BLANKING DECIMAL POINT 8 8 4 1 1 1 1 4 7 7 7 8 8 8 1 1 3 8 1 1 7 1 8 SEGMENT DRIVERS 8 DIGIT DRIVERS 8-BYTE STATIC RAM HEXADECIMAL/ CODE B DECODER MULTIPLEX OSCILLATOR WRITE ADDRESS COUNTER THREE LEVEL INPUT LOGIC READ ADDRESS MULTIPLEXER ICM7228C WRITE SHUTDOWN INTERDIGIT BLANKING DECIMAL POINT 1 5 1 1 4 7 8 8 8 5 8 1 1 1 DA0 - DA2 3 DIGIT ADDRESS ID0 - ID3 ID7 DATA INPUT HEXADECIMAL/ CODE B/ SHUTDOWN 4 ICM7228 Absolute Maximum Ratings Thermal Information Supply Voltage (VDD - VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6V Digit Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA Segment Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA Input Voltage (Note 1) (Any Terminal) . . (VSS-0.3V)>1, then it can be simplified as follows: From the above equation, it is shown that the system is a single order system, which has a single pole located at before the half switching frequency. Therefore, simple type II compensator can be easily used to stabilize the system. Figure 15 shows the voltage loop compensator, and its transfer function is expressed as follows: where Compensator design goal: • High DC gain • Loop bandwidth fc: • Gain margin: >10dB • Phase margin: 40° The compensator design procedure is as follows: 1. Put compensator zero at: 2. Put one compensator pole at zero frequency to achieve high DC gain, and put another compensator pole at either ESR zero frequency or half switching frequency, whichever is lower. The loop gain Tv(S) at cross over frequency of fc has unity gain. Therefore, the compensator resistance R1 is determined by: where gm is the trans-conductance of the voltage loop error amplifier. Compensator capacitor C1 is then given by: Example: Vin = 19V, Vo = 16.8V, Io = 2.6A, fs = 300kHz, Co = 10μF/10mΩ, L = 10μH, gm = 250μs, RT = 0.8Ω, VFB = 2.1V, fc = 20kHz, then compensator resistance R1 = 10kΩ. Choose R1 = 10kΩ. Put the compensator zero at 1.5kHz. The compensator capacitor is C1 = 6.5nF. Therefore, choose voltage loop compensator: R1 = 10k, C1 = 6.5nF. Ti(S) = 0.25 RTF2(S)M Tv(S) = KM F1(S)AV(S) o FB V V K = ( ) 1 T (S) T S L (S) i v v + = LV(S) 4VFB VO -------------- (RO + RL) RT ----------------------------- 1 S ωesr + ------------ 1 Sω P + ------- ------------------------AV(S) ωP 1 ROCO = , ≈ ----------------- ωp FIGURE 14. SMALL SIGNAL MODEL OF SYNCHRONOUS BUCK REGULATOR dˆ Vin dˆ vˆIL iˆin L + 1:D + iˆL Co Rc Ro -Av(S) dˆ vˆcomp RT 11/Vin + Ti(S) K vˆo Tv(S) - VCA2 0.25VCA2 VindILdin ( ) SC 1 S g vˆ vˆ A S 1 cz m FB comp v ω + = = R C 1 1 1 ωcz = - + R1 C1 VREF VFB Vo gm VCOMP FIGURE 15. VOLTAGE LOOP COMPENSATOR fs 20 1 5 1 ⎟⎠ ⎞ ⎜⎝ ⎛ − ( ) o o cz R C ω = 1 − 3 1 R1 8πfCVOCORT gmVFB = --------------------------------------- 1 cz 1 R C 1 ω = ISL6251, ISL6251A 18 FN9202.2 May 10, 2006 PCB Layout Considerations Power and Signal Layers Placement on the PCB As a general rule, power layers should be close together, either on the top or bottom of the board, with signal layers on the opposite side of the board. As an example, layer arrangement on a 4-layer board is shown below: 1. Top Layer: signal lines, or half board for signal lines and the other half board for power lines 2. Signal Ground 3. Power Layers: Power Ground 4. Bottom Layer: Power MOSFET, Inductors and other Power traces Separate the power voltage and current flowing path from the control and logic level signal path. The controller IC will stay on the signal layer, which is isolated by the signal ground to the power signal traces. Component Placement The power MOSFET should be close to the IC so that the gate drive signal, the LGATE, UGATE, PHASE, and BOOT, traces can be short. Place the components in such a way that the area under the IC has less noise traces with high dv/dt and di/dt, such as gate signals and phase node signals. Signal Ground and Power Ground Connection. At minimum, a reasonably large area of copper, which will shield other noise couplings through the IC, should be used as signal ground beneath the IC. The best tie-point between the signal ground and the power ground is at the negative side of the output capacitor on each side, where there is little noise; a noisy trace beneath the IC is not recommended. GND and VDD Pin At least one high quality ceramic decoupling cap should be used to cross these two pins. The decoupling cap can be put close to the IC. LGATE Pin This is the gate drive signal for the bottom MOSFET of the buck converter. The signal going through this trace has both high dv/dt and high di/dt, and the peak charging and discharging current is very high. These two traces should be short, wide, and away from other traces. There should be no other traces in parallel with these traces on any layer. PGND Pin PGND pin should be laid out to the negative side of the relevant output cap with separate traces. The negative side of the output capacitor must be close to the source node of the bottom MOSFET. This trace is the return path of LGATE. PHASE Pin This trace should be short, and positioned away from other weak signal traces. This node has a very high dv/dt with a voltage swing from the input voltage to ground. No trace should be in parallel with it. This trace is also the return path for UGATE. Connect this pin to the high-side MOSFET source. UGATE Pin This pin has a square shape waveform with high dv/dt. It provides the gate drive current to charge and discharge the top MOSFET with high di/dt. This trace should be wide, short, and away from other traces similar to the LGATE. BOOT Pin This pin’s di/dt is as high as the UGATE; therefore, this trace should be as short as possible. CSOP, CSON Pins The current sense resistor connects to the CSON and the CSOP pins through a low pass filter. The CSON pin is also used as the battery voltage feedback. The traces should be away from the high dv/dt and di/di pins like PHASE, BOOT pins. In general, the current sense resistor should be close to the IC. Other layout arrangements should be adjusted accordingly. EN Pin This pin stays high at enable mode and low at idle mode and is relatively robust. Enable signals should refer to the signal ground. DCIN Pin This pin connects to AC adapter output voltage, and should be less noise sensitive. Copper Size for the Phase Node The capacitance of PHASE should be kept very low to minimize ringing. It would be best to limit the size of the PHASE node copper in strict accordance with the current and thermal management of the application. Identify the Power and Signal Ground The input and output capacitors of the converters, the source terminal of the bottom switching MOSFET PGND should connect to the power ground. The other components should connect to signal ground. Signal and power ground are tied together at one point. Clamping Capacitor for Switching MOSFET It is recommended that ceramic caps be used closely connected to the drain of the high-side MOSFET, and the source of the low-side MOSFET. This capacitor reduces the noise and the power loss of the MOSFET. ISL6251, ISL6251A 19 FN9202.2 May 10, 2006 ISL6251, ISL6251A Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) INDEX D1/2 D1 D/2 D E1/2 E/2 E A 2X 0.15 B C 0.10 M C A B A N SEATING PLANE N 6 3 2 23 e 1 1 0.08 FOR ODD TERMINAL/SIDE FOR EVEN TERMINAL/SIDE C C SECTION "C-C" NX b A1 C 2X 0.15 C 0.15 2X B 0 REF. (Nd-1)Xe (NRe-E1F)X. e 5 A1 4X P A C C 4X P B 2X 0.15 C A A2 A3 D2 D2 E2 E2/2 TERMINAL TIP SIDE VIEW TOP VIEW 7 BOTTOM VIEW 7 5 CL CL e e E1 2 NX k NX b 8 NX L 8 8 9 AREA 9 4X / / 0.10 C 9 (DATUM B) (DATUM A) INDEX 6 AREA N 9 CORNER OPTION 4X L1 L 10 L1 L 10 L28.5x5 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VHHD-1 ISSUE I) SYMBOL MILLIMETERS MIN NOMINAL MAX NOTES A 0.80 0.90 1.00 - A1 - 0.02 0.05 - A2 - 0.65 1.00 9 A3 0.20 REF 9 b 0.18 0.25 0.30 5,8 D 5.00 BSC - D1 4.75 BSC 9 D2 2.95 3.10 3.25 7,8 E 5.00 BSC - E1 4.75 BSC 9 E2 2.95 3.10 3.25 7,8 e 0.50 BSC - k 0.20 - - - L 0.50 0.60 0.75 8 N 28 2 Nd 7 3 Ne 7 3 P - - 0.60 9 θ - - 12 9 Rev. 1 11/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation. 20 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN9202.2 May 10, 2006 ISL6251, ISL6251A Shrink Small Outline Plastic Packages (SSOP) Quarter Size Outline Plastic Packages (QSOP) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.10mm (0.004 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: INCHES. Converted millimeter dimensions are not necessarily exact. α INDEX AREA E D N 1 2 3 -B- 0.17(0.007) M C A B S e -AB M -CA1 A SEATING PLANE 0.10(0.004) h x 45° C H 0.25(0.010) M B M L 0.25 0.010 GAUGE PLANE A2 M24.15 24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE (0.150” WIDE BODY) SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A 0.053 0.069 1.35 1.75 - A1 0.004 0.010 0.10 0.25 - A2 - 0.061 - 1.54 - B 0.008 0.012 0.20 0.30 9 C 0.007 0.010 0.18 0.25 - D 0.337 0.344 8.55 8.74 3 E 0.150 0.157 3.81 3.98 4 e 0.025 BSC 0.635 BSC - H 0.228 0.244 5.80 6.19 - h 0.0099 0.0196 0.26 0.49 5 L 0.016 0.050 0.41 1.27 6 N 24 24 7 α 0° 8° 0° 8° - Rev. 2 6/04 1 ® FN3282.13 DG411, DG412, DG413 Monolithic Quad SPST, CMOS Analog Switches The DG411 series monolithic CMOS analog switches are drop-in replacements for the popular DG211 and DG212 series devices. They include four independent single pole throw (SPST) analog switches, and TTL and CMOS compatible digital inputs. These switches feature lower analog ON-resistance (<35Ω) and faster switch time (tON<175ns) compared to the DG211 or DG212. Charge injection has been reduced, simplifying sample and hold applications. The improvements in the DG411 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling 40VP-P signals. Power supplies may be single-ended from +5V to 44V, or split from ±5V to ±20V. The four switches are bilateral, equally matched for AC or bidirectional signals. The ON-resistance variation with analog signals is quite low over a ±15V analog input range. The switches in the DG411 and DG412 are identical, differing only in the polarity of the selection logic. Two of the switches in the DG413 (#2 and #3) use the logic of the DG211 and DG411 (i.e., a logic “0” turns the switch ON) and the other two switches use DG212 and DG412 positive logic. This permits independent control of turn-on and turn-off times for SPDT configurations, permitting “break-before-make” or “makebefore- break” operation with a minimum of external logic. Features • ON-Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . . 35Ω • Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . <35μW • Fast Switching Action - tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175ns - tOFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145ns • Low Charge Injection • Upgrade from DG211, DG212 • TTL, CMOS Compatible • Single or Split Supply Operation • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Audio Switching • Battery Operated Systems • Data Acquisition • Hi-Rel Systems • Sample and Hold Circuits • Communication Systems • Automatic Test Equipment Data Sheet June 20, 2007 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1993, 1994, 1997, 1999, 2002, 2004-2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 2 FN3282.13 June 20, 2007 Pinout DG411, DG412, DG413 (16 LD PDIP, SOIC, TSSOP) TOP VIEW Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # DG411DJ DG411DJ -40 to +85 16 Ld PDIP E16.3 DG411DJZ (Note) DG411DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3 DG411DY* DG411DY -40 to +85 16 Ld SOIC (150 mil) M16.15 DG411DYZ* (Note) DG411DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15 DG411DVZ* (Note) DG411 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173 DG412DJ DG412DJ -40 to +85 16 Ld PDIP E16.3 DG412DJZ (Note) DG412DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3 DG412DY* DG412DY -40 to +85 16 Ld SOIC (150 mil) M16.15 DG412DYZ* (Note) DG412DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15 DG412DVZ* (Note) DG412 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173 DG413DJ DG413DJ -40 to +85 16 Ld PDIP E16.3 DG413DJZ (Note) DG413DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3 DG413DY* DG413DY -40 to +85 16 Ld SOIC (150 mil) M16.15 DG413DYZ* (Note) DG413DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15 DG413DVZ* (Note) DG413 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173 *Add “-T” suffix for tape and reel. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. TRUTH TABLE LOGIC DG411 DG412 DG413 SWITCH SWITCH SWITCH 1, 4 SWITCH 2, 3 0 On Off Off On 1 Off On On Off NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 IN1 D1 S1 VGND S4 IN4 D4 IN2 S2 V+ VL S3 D3 IN3 D2 Pin Descriptions PIN SYMBOL DESCRIPTION 1 IN1 Logic Control for Switch 1. 2 D1 Drain (Output) Terminal for Switch 1. 3 S1 Source (Input) Terminal for Switch 1. 4 V- Negative Power Supply Terminal. 5 GND Ground Terminal (Logic Common). 6 S4 Source (Input) Terminal for Switch 4. 7 D4 Drain (Output) Terminal for Switch 4. 8 IN4 Logic Control for Switch 4. 9 IN3 Logic Control for Switch 3. 10 D3 Drain (Output) Terminal for Switch 3. 11 S3 Source (Input) Terminal for Switch 3. 12 VL Logic Reference Voltage. 13 V+ Positive Power Supply Terminal (Substrate). 14 S2 Source (Input) Terminal for Switch 2. 15 D2 Drain (Output) Terminal for Switch 2. 16 IN2 Logic Control for Switch 2. DG411, DG412, DG413 3 FN3282.13 June 20, 2007 Functional Diagrams Four SPST Switches per Package Switches Shown for Logic “1” Input Schematic Diagram (1 Channel) S1 D1 S2 D2 S3 D3 S4 D4 DG411 S1 D1 S2 D2 S3 D3 S4 D4 IN1 DG412 IN2 IN3 IN4 S1 D1 S2 D2 S3 D3 S4 D4 IN1 DG413 IN2 IN3 IN4 IN2 IN3 IN4 IN1 S V+ INX GND VVVL D V+ DG411, DG412, DG413 4 FN3282.13 June 20, 2007 Absolute Maximum Ratings Thermal Information V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V VL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) to (V+) +0.3V Digital Inputs, VS, VD (Note 1). . . . . (V-) -2V to (V+) + 2V or 30mA, Whichever Occurs First Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . 100mA Operating Conditions Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V (Max) Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V (Max) Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (Min) Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20ns Thermal Resistance (Typical, Note 2) θJA (°C/W) PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 Maximum Junction Temperature (Plastic Packages). . . . . . . +150°C Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp (SOIC and TSSOP - Lead Tips Only) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. 2. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS DYNAMIC CHARACTERISTICS Turn-ON Time, tON RL = 300Ω, CL = 35pF, VS = ±10V (Figure 1) 25 - 110 175 ns 85 - - 220 ns Turn-OFF Time, tOFF 25 - 100 145 ns 85 - - 160 ns Break-Before-Make Time Delay DG413 Only, RL = 300Ω, CL = 35pF (Figure 2) 25 - 25 - ns Charge Injection, Q (Figure 3) CL = 10nF, VG = 0V, RG = 0Ω 25 - 5 - pC OFF Isolation (Figure 5) RL = 50Ω, CL = 5pF, f = 1MHz 25 - 68 - dB Crosstalk (Channel-to-Channel), (Figure 4) 25 - -85 - dB Source OFF Capacitance, CS(OFF) f = 1MHz (Figure 6) 25 - 9 - pF Drain OFF Capacitance, CD(OFF) 25 - 9 - pF Channel ON Capacitance, CD(ON) + CS(ON) 25 - 35 - pF DIGITAL INPUT CHARACTERISTICS Input Current VIN Low, IIL VIN Under Test = 0.8V, All Others = 2.4V Full -0.5 0.005 0.5 μA Input Current VIN High, IIH VIN Under Test = 2.4V, All Others = 0.8V Full -0.5 0.005 0.5 μA ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG IS = 10mA Full -15 - 15 V Drain-Source ON Resistance, rDS(ON) IS = 10mA, VD = ±8.5V, V+ = 13.5V, V- = -13.5V 25 - 25 35 Ω Full - - 45 Ω ± ± DG411, DG412, DG413 5 FN3282.13 June 20, 2007 Source OFF Leakage Current, IS(OFF) V+ = 16.5V, V- = -16.5V, VD = ±15.5V, VS = 15.5V 25 -0.25 ±0.1 0.25 nA Full -5 - +5 nA Drain OFF Leakage Current, ID(OFF) 25 -0.25 ±0.1 0.25 nA Full -5 - +5 nA Channel ON Leakage Current, ID(ON) + IS(ON) V+ = 16.5V, V- = -16.5V, VS = VD = ±15.5V 25 -0.4 ±0.1 0.4 nA Full -10 - +10 nA POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V 25 - 0.0001 1 μA 85 - - 5 μA Negative Supply Current, I- 25 -1 -0.0001 - μA 85 -5 - - μA Logic Supply Current, IL 25 - 0.0001 1 μA 85 - - 5 μA Ground Current, IGND 25 -1 -0.0001 - μA 85 -5 - - μA Electrical Specifications (Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS DYNAMIC CHARACTERISTICS Turn-ON Time, tON RL = 300Ω, CL = 35pF, VS = 8V, (Figure 1) 25 - 175 250 ns 85 - - 315 ns Turn-OFF Time, tOFF 25 - 95 125 ns 85 - - 140 ns Break-Before-Make Time Delay DG413 Only, RL = 300Ω, CL = 35pF, VS = 8V 25 - 25 - ns Charge Injection, Q CL = 10nF, VG = 6.0V, RG = 0Ω 25 - 25 - pC ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Full 0 - 12 V Drain-Source ON-Resistance, rDS(ON) IS = -10mA, VD = 3V, 8V V+ = 10.8V 25 - 40 80 Ω Full - - 100 Ω Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS ± DG411, DG412, DG413 6 FN3282.13 June 20, 2007 POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 13.2V, V- = 0V VIN = 0V or 5V 25 - 0.0001 1 μA 85 - - 5 μA Negative Supply Current, I- 25 -1 -0.0001 - μA 85 -5 - - μA Logic Supply Current, IL 25 - 0.0001 1 μA 85 - - 5 μA Ground Current, IGND 25 -1 -0.0001 - μA 85 -5 - - μA NOTES: 3. VIN = input voltage to perform proper function. 4. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 5. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Test Circuits and Waveforms VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform. NOTE: Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENTS POINTS Repeat test for all IN and S. For load conditions, see Specifications. CL includes fixture and stray capacitance. FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES FIGURE 2A. MEASUREMENT POINTS FIGURE 2B. TEST CIRCUITS FIGURE 2. BREAK-BEFORE-MAKE TIME Electrical Specifications (Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified. (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP (Note 5) MAX (Note 4) UNITS 50% tr < 20ns tf < 20ns tOFF 90% 3V 0V VS 0V tON VO LOGIC INPUT SWITCH INPUT SWITCH OUTPUT 90% VO VS RL RL + rDS(ON) = ------------------------------------ SWITCH INPUT LOGIC INPUT S1 IN1 V+ D1 RL CL VO GND VVL +5V +15V SWITCH OUTPUT -15V tD 3V 0V VS1 0V tD LOGIC INPUT SWITCH OUTPUT SWITCH OUTPUT 90% 0V VS2 (V01) VO2 90% S1 IN1, IN2 V+ D1 RL1 CL1 VO1 GND VVL VS1 = 10V 300Ω +5V +15V S2 D2 35pF RL2 CL2 VO2 VS2 = 10V 300Ω 35pF -15V LOGIC INPUT CL includes fixture and stray capacitance. DG411, DG412, DG413 7 FN3282.13 June 20, 2007 FIGURE 3A. TEST CIRCUIT NOTE: INX dependent on switch configuration, input polarity determined by sense of switch. FIGURE 3B. MEASUREMENT POINTS FIGURE 3. CHARGE INJECTION FIGURE 4. CROSSTALK TEST CIRCUIT FIGURE 5. OFF ISOLATION TEST CIRCUIT FIGURE 6. SOURCE/DRAIN CAPACITANCES TEST CIRCUIT Test Circuits and Waveforms (Continued) V+ D1 CL VO GND VVIN = 3V RG VG SWITCH ΔVO INX OFF ON INX OFF OFF OFF ON Q = ΔVO x CL OUTPUT 0V, 2.4V ANALYZER +15V C V+ 0dBm VS SIGNAL GENERATOR RL GND IN1 VD IN2 50Ω 0V, 2.4V NC V- -15V C VD ANALYZER RL +15V 0dBm SIGNAL GENERATOR C V+ V- -15V C 0V, 2.4V VS VD INX GND +15V C V+ GND VS VD INX V- -15V C IMPEDANCE ANALYZER f = 1MHz 0V, 2.4V DG411, DG412, DG413 8 FN3282.13 June 20, 2007 Application Information Single Supply Operation The DG411, DG412, DG413 can be operated with unipolar supplies from 5V to 44V. These devices are characterized and tested for single supply operation at 12V to facilitate the majority of applications. To function properly, 12V is tied to Pins 13 and 0V is tied to Pin 4. Pin 12 still requires 5V for TTL compatible switching. Summing Amplifier When driving a high impedance, high capacitance load such as shown in Figure 7, where the inputs to the summing amplifier have some noise filtering, it is necessary to have shunt switches for rapid discharge of the filter capacitor, thus preventing offsets from occurring at the output. VIN1 R1 R2 VOUT + - C1 VIN2 R3 R4 C2 DG413 R5 R6 FIGURE 7. SUMMING AMPLIFIER DG411, DG412, DG413 9 FN3282.13 June 20, 2007 Typical Performance Curves FIGURE 8. ON RESISTANCE vs VD AND POWER SUPPLY VOLTAGE FIGURE 9. SWITCHING TIME vs TEMPERATURE FIGURE 10. LEAKAGE CURRENTS vs ANALOG VOLTAGE FIGURE 11. SUPPLY CURRENT vs INPUT SWITCHING FREQUENCY FIGURE 12. CHARGE INJECTION vs SOURCE VOLTAGE FIGURE 13. CHARGE INJECTION vs DRAIN VOLTAGE TA = +25°C 50 A: ±5V B: ±8V C: ±10V D: ±12V E: ±15V F: ±20V 45 40 35 30 25 20 15 10 5 0 -20 -15 -10 -5 0 5 10 15 20 A B C D E F DRAIN VOLTAGE (V) rDS(ON) (Ω) V+ = 15V, V- = -15V VL = 5V, VS = 10V tON tOFF -55 -15 5 25 45 65 85 105 125 TEMPERATURE (°C) -35 0 240 210 180 150 120 90 60 30 tON, tOFF (ns) V+ = 15V, V- = -15V VL = 5V, TA = +25°C -15 -5 0 5 10 15 VS, VD (V) -10 -60 20 10 0 -10 -20 -30 -40 -50 IS, ID (pA) IS(OFF) ID(OFF) 30 40 ID(ON) + IS(ON) ISUPPLY 100mA 1mA 100μA 10μA 1μA 100nA 10nA 10mA 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) IL I+, I- 1SW 1SW 4SW 4SW V+ = 15V, V- = -15V VL = 5V CL = 10nF CL = 1nF -15 -5 0 5 10 15 VS (V) -10 -60 60 40 20 0 -20 -40 Q (pC) 80 100 V+ = 15V, V- = -15V VL = 5V CL = 10nF CL = 1nF -15 -5 0 5 10 15 VD (V) -10 -60 60 40 20 0 -20 -40 Q (pC) 100 140 120 80 V+ = 15V, V- = -15V VL = 5V DG411, DG412, DG413 10 FN3282.13 June 20, 2007 Die Characteristics DIE DIMENSIONS: 2760mm x 1780mm x 485mm METALLIZATION: Type: SiAl Thickness: 12kÅ ±1kÅ PASSIVATION: Type: Nitride Thickness: 8kÅ ±1kÅ WORST CASE CURRENT DENSITY: 1.5 x 105 A/cm2 Metallization Mask Layout DG411, DG412, DG413 S1 (3) V- (4) GND (5) S4 (6) D1 IN1 IN2 (11) S3 (12) VL (13) V+ SUBSTRATE (14) S2 (15) D2 (2) (1) (16) D4 IN4 IN3 D3 (7) (8) (9) (10) DG411, DG412, DG413 11 FN3282.13 June 20, 2007 DG411, DG412, DG413 Thin Shrink Small Outline Plastic Packages (TSSOP) NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) α INDEX AREA E1 D N 1 2 3 -B- 0.10(0.004) M C A B S e -Ab M -CA1 A SEATING PLANE 0.10(0.004) c E 0.25(0.010) M B M L 0.25 0.010 GAUGE PLANE A2 0.05(0.002) M16.173 16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A - 0.043 - 1.10 - A1 0.002 0.006 0.05 0.15 - A2 0.033 0.037 0.85 0.95 - b 0.0075 0.012 0.19 0.30 9 c 0.0035 0.008 0.09 0.20 - D 0.193 0.201 4.90 5.10 3 E1 0.169 0.177 4.30 4.50 4 e 0.026 BSC 0.65 BSC - E 0.246 0.256 6.25 6.50 - L 0.020 0.028 0.50 0.70 6 N 16 16 7 a 0o 8o 0o 8o - Rev. 1 2/02 12 FN3282.13 June 20, 2007 DG411, DG412, DG413 Dual-In-Line Plastic Packages (PDIP) NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and are measured with the leads constrained to be perpendicular to datum . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). eA -CCL E eA C eB eC -BE1 INDEX 1 2 3 N/2 N AREA SEATING BASE PLANE PLANE -CD1 B1 B e D D1 A2 A L A1 -A- 0.010 (0.25) M C A B S E16.3 (JEDEC MS-001-BB ISSUE D) 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - D 0.735 0.775 18.66 19.68 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N 16 16 9 Rev. 0 12/93 13 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN3282.13 June 20, 2007 DG411, DG412, DG413 Small Outline Plastic Packages (SOIC) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. INDEX AREA E D N 1 2 3 -B- 0.25(0.010) M C A B S e -AL B M -CA1 A SEATING PLANE 0.10(0.004) h x 45° C H 0.25(0.010) M B M α M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE SYMBOL INCHES MILLIMETERS MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3859 0.3937 9.80 10.00 3 E 0.1497 0.1574 3.80 4.00 4 e 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N 16 16 7 α 0° 8° 0° 8° - Rev. 1 6/05 1 ® July 2004 HIP4081A 80V/2.5A Peak, High Frequency Full Bridge FET Driver The HIP4081A is a high frequency, medium voltage Full Bridge N-Channel FET driver IC, available in 20 lead plastic SOIC and DIP packages. The HIP4081A can drive every possible switch combination except those which would cause a shoot-through condition. The HIP4081A can switch at frequencies up to 1MHz and is well suited to driving Voice Coil Motors, high-frequency switching power amplifiers, and power supplies. For example, the HIP4081A can drive medium voltage brush motors, and two HIP4081As can be used to drive high performance stepper motors, since the short minimum “on-time” can provide fine micro-stepping capability. Short propagation delays of approximately 55ns maximizes control loop crossover frequencies and dead-times which can be adjusted to near zero to minimize distortion, resulting in rapid, precise control of the driven load. A similar part, the HIP4080A, includes an on-chip input comparator to create a PWM signal from an external triangle wave and to facilitate “hysteresis mode” switching. The Application Note for the HIP4081A is the AN9405. Features • Independently Drives 4 N-Channel FET in Half Bridge or Full Bridge Configurations • Bootstrap Supply Max Voltage to 95VDC • Drives 1000pF Load at 1MHz in Free Air at 50°C with Rise and Fall Times of Typically 10ns • User-Programmable Dead Time • On-Chip Charge-Pump and Bootstrap Upper Bias Supplies • DIS (Disable) Overrides Input Control • Input Logic Thresholds Compatible with 5V to 15V Logic Levels • Very Low Power Consumption • Undervoltage Protection • Pb-free Available Applications • Medium/Large Voice Coil Motors • Full Bridge Power Supplies • Switching Power Amplifiers • High Performance Motor Controls • Noise Cancellation Systems • Battery Powered Vehicles • Peripherals • U.P.S. Pinout HIP4081A (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP RANGE (°C) PACKAGE PKG. DWG. # HIP4081AIP -40 to 85 20 Ld PDIP E20.3 HIP4081AIPZ (Note) -40 to 85 20 Ld PDIP (Pb-free) E20.3 HIP4081AIB -40 to 85 20 Ld SOIC (W) M20.3 HIP4081AIBZ (Note) -40 to 85 20 Ld SOIC (W) (Pb-free) M20.3 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 BHB 1 BHI DIS VSS BLI ALI HDEL AHI LDEL AHB BHO BLO BLS VDD BHS VCC ALS ALO AHS AHO Data Sheet FN3659.7 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Harris Corporation. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 2 HIP4081A Application Block Diagram Functional Block Diagram (1/2 HIP4081A) 80V GND LOAD HIP4081A GND 12V AHI ALI BLI BHI BLO BHS BHO ALO AHS AHO CHARGE PUMP VDD AHI DIS ALI HDEL LDEL VSS TURN-ON DELAY TURN-ON DELAY DRIVER DRIVER AHB AHO AHS VCC ALO ALS CBF TO VDD (PIN 16) CBS DBS HIGH VOLTAGE BUS ≤ 80VDC +12VDC LEVEL SHIFT AND LATCH 14 10 11 12 15 13 16 7 3 6 8 9 4 BIAS SUPPLY UNDERVOLTAGE 3 Typical Application (PWM Mode Switching) 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 BHB BHI DIS VSS BLI ALI HDEL AHI LDEL AHB BHO BLO BLS VDD BHS VCC ALS ALO AHS AHO 80V 12V + - 12V DIS GND 6V GND TO OPTIONAL CURRENT CONTROLLER PWM LOAD INPUT HIP4081/HIP4081A HIP4081A 4 HIP4081A Absolute Maximum Ratings Thermal Information Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . . . -0.3V to 16V Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V Voltage on AHS, BHS . . . -6.0V (Transient) to 80V (25°C to 125°C) Voltage on AHS, BHS . . . -6.0V (Transient) to 70V (-55°C to 125°C) Voltage on ALS, BLS . . . . . . . -2.0V (Transient) to +2.0V (Transient) Voltage on AHB, BHB . . . . . . . . VAHS, BHS -0.3V to VAHS, BHS +VDD Voltage on ALO, BLO . . . . . . . . . . . . .VALS, BLS -0.3V to VCC +0.3V Voltage on AHO, BHO . . . . . . . VAHS, BHS -0.3V to VAHB, BHB +0.3V Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . . -5mA to 0mA Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns NOTE: All Voltages relative to VSS, unless otherwise specified. Thermal Resistance (Typical, Note 1) θJA (°C/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Storage Temperature Range. . . . . . . . . . . . . . . . . . . -65°C to 150°C Operating Max. Junction Temperature . . . . . . . . . . . . . . . . . . 125°C Lead Temperature (Soldering 10s)). . . . . . . . . . . . . . . . . . . . . 300°C (For SOIC - Lead Tips Only Operating Conditions Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . +9.5V to +15V Voltage on ALS, BLS . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +1.0V Voltage on AHB, BHB . . . . . . . . . VAHS, BHS +5V to VAHS, BHS +15V Input Current, HDEL and LDEL . . . . . . . . . . . . . . . .-500μA to -50μA Operating Ambient Temperature Range . . . . . . . . . . .-40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS TJ = 25°C TJS = -40°C TO 125°C MIN TYP MAX MIN MAX UNITS SUPPLY CURRENTS AND CHARGE PUMPS VDD Quiescent Current IDD All inputs = 0V 8.5 10.5 14.5 7.5 14.5 mA VDD Operating Current IDDO Outputs switching f = 500kHz 9.5 12.5 15.5 8.5 15.5 mA VCC Quiescent Current ICC All Inputs = 0V, IALO = IBLO = 0 - 0.1 10 - 20 μA VCC Operating Current ICCO f = 500kHz, No Load 1 1.25 2.0 0.8 3 mA AHB, BHB Quiescent Current - Qpump Output Current IAHB, IBHB All Inputs = 0V, IAHO = IBHO = 0 VDD = VCC = VAHB = VBHB = 10V -50 -30 -11 -60 -10 μA AHB, BHB Operating Current IAHBO, IBHBO f = 500kHz, No Load 0.6 1.2 1.5 0.5 1.9 mA AHS, BHS, AHB, BHB Leakage Current IHLK VBHS = VAHS = 80V, VAHB = VBHB = 93V - 0.02 1.0 - 10 μA AHB-AHS, BHB-BHS Qpump Output Voltage VAHB-VAHS VBHB-VBHS IAHB = IAHB = 0, No Load 11.5 12.6 14.0 10.5 14.5 V INPUT PINS: ALI, BLI, AHI, BHI, AND DIS Low Level Input Voltage VIL Full Operating Conditions - - 1.0 - 0.8 V High Level Input Voltage VIH Full Operating Conditions 2.5 - - 2.7 - V Input Voltage Hysteresis - 35 - - - mV Low Level Input Current IIL VIN = 0V, Full Operating Conditions -130 -100 -75 -135 -65 μA High Level Input Current IIH VIN = 5V, Full Operating Conditions -1 - +1 -10 +10 μA TURN-ON DELAY PINS: LDEL AND HDEL LDEL, HDEL Voltage VHDEL, VLDEL IHDEL = ILDEL = -100μA 4.9 5.1 5.3 4.8 5.4 V GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO Low Level Output Voltage VOL IOUT = 100mA 0.7 0.85 1.0 0.5 1.1 V High Level Output Voltage VCC-VOH IOUT = -100mA 0.8 0.95 1.1 0.5 1.2 V Peak Pullup Current IO+ VOUT = 0V 1.7 2.6 3.8 1.4 4.1 A 5 HIP4081A Peak Pulldown Current IO- VO UT = 12V 1.7 2.4 3.3 1.3 3.6 A Undervoltage, Rising Threshold UV+ 8.1 8.8 9.4 8.0 9.5 V Undervoltage, Falling Threshold UV- 7.6 8.3 8.9 7.5 9.0 V Undervoltage, Hysteresis HYS 0.25 0.4 0.65 0.2 0.7 V Switching Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K, CL = 1000pF. PARAMETER SYMBOL TEST CONDITIONS TJ = 25°C TJS = -40°C TO 125°C MIN TYP MAX MIN MAX UNITS Lower Turn-off Propagation Delay (ALI-ALO, BLI-BLO) TLPHL - 30 60 - 80 ns Upper Turn-off Propagation Delay (AHI-AHO, BHI-BHO) THPHL - 35 70 - 90 ns Lower Turn-on Propagation Delay (ALI-ALO, BLI-BLO) TLPLH RHDEL = RLDEL = 10K - 45 70 - 90 ns Upper Turn-on Propagation Delay (AHI-AHO, BHI-BHO) THPLH RHDEL = RLDEL = 10K - 60 90 - 110 ns Rise Time TR - 10 25 - 35 ns Fall Time TF - 10 25 - 35 ns Turn-on Input Pulse Width TPWIN-ON RHDEL = RLDEL = 10K 50 - - 50 - ns Turn-off Input Pulse Width TPWIN-OFF RHDEL = RLDEL = 10K 40 - - 40 - ns Turn-on Output Pulse Width TPWOUT-ON RHDEL = RLDEL = 10K 40 - - 40 - ns Turn-off Output Pulse Width TPWOUT-OFF RHDEL = RLDEL = 10K 30 - - 30 - ns Disable Turn-off Propagation Delay (DIS - Lower Outputs) TDISLOW - 45 75 - 95 ns Disable Turn-off Propagation Delay (DIS - Upper Outputs) TDISHIGH - 55 85 - 105 ns Disable to Lower Turn-on Propagation Delay (DIS - ALO and BLO) TDLPLH - 40 70 - 90 ns Refresh Pulse Width (ALO and BLO) TREF-PW 240 410 550 200 600 ns Disable to Upper Enable (DIS - AHO and BHO) TUEN - 450 620 - 690 ns TRUTH TABLE INPUT OUTPUT ALI, BLI AHI, BHI U/V DIS ALO, BLO AHO, BHO X X X 1 0 0 1 X 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 X X 1 X 0 0 NOTE: X signifies that input can be either a “1” or “0”. Electrical Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS TJ = 25°C TJS = -40°C TO 125°C MIN TYP MAX MIN MAX UNITS 6 HIP4081A Pin Descriptions PIN NUMBER SYMBOL DESCRIPTION 1 BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30μA out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. 2 BHI B High-side Input. Logic level input that controls BHO driver (Pin 20). BLI (Pin 5) high level input overrides BHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides BHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 3 DIS DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 4 VSS Chip negative supply, generally will be ground. 5 BLI B Low-side Input. Logic level input that controls BLO driver (Pin 18). If BHI (Pin 2) is driven high or not connected externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 6 ALI A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 7 AHI A High-side Input. Logic level input that controls AHO driver (Pin 11). ALI (Pin 6) high level input overrides AHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides AHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). 8 HDEL High-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V. 9 LDEL Low-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V. 10 AHB A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30μA out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. 11 AHO A High-side Output. Connect to gate of A High-side power MOSFET. 12 AHS A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 13 ALO A Low-side Output. Connect to gate of A Low-side power MOSFET. 14 ALS A Low-side Source connection. Connect to source of A Low-side power MOSFET. 15 VCC Positive supply to gate drivers. Must be same potential as VDD (Pin 16). Connect to anodes of two bootstrap diodes. 16 VDD Positive supply to lower gate drivers. Must be same potential as VCC (Pin 15). De-couple this pin to VSS (Pin 4). 17 BLS B Low-side Source connection. Connect to source of B Low-side power MOSFET. 18 BLO B Low-side Output. Connect to gate of B Low-side power MOSFET. 19 BHS B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 20 BHO B High-side Output. Connect to gate of B High-side power MOSFET. 7 HIP4081A Timing Diagrams FIGURE 1. INDEPENDENT MODE FIGURE 2. BISTATE MODE FIGURE 3. DISABLE FUNCTION U/V = DIS = 0 XLI XHI XLO XHO TLPHL THPHL THPLH TLPLH TR (10% - 90%) TF (10% - 90%) X = A OR B, A AND B HALVES OF BRIDGE CONTROLLER ARE INDEPENDENT U/V = DIS = 0 XLI XHI = HI OR NOT CONNECTED XLO XHO (10% - 90%) (10% - 90%) U/V OR DIS XLI XHI XLO XHO TDLPLH TDIS TUEN TREF-PW 8 HIP4081A Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25°C, Unless Otherwise Specified FIGURE 4. QUIESCENT IDD SUPPLY CURRENT vs VDD SUPPLY VOLTAGE FIGURE 5. IDDO, NO-LOAD IDD SUPPLY CURRENT vs FREQUENCY (kHz) FIGURE 6. SIDE A, B FLOATING SUPPLY BIAS CURRENT vs FREQUENCY (LOAD = 1000pF) FIGURE 7. ICCO, NO-LOAD ICC SUPPLY CURRENT vs FREQUENCY (kHz) TEMPERATURE FIGURE 8. IAHB, IBHB, NO-LOAD FLOATING SUPPLY BIAS CURRENT vs FREQUENCY FIGURE 9. ALI, BLI, AHI, BHI LOW LEVEL INPUT CURRENT IIL vs TEMPERATURE 6 8 10 12 14 2.0 4.0 6.0 8.0 10.0 12.0 14.0 IDD SUPPLY CURRENT (mA) VDD SUPPLY VOLTAGE (V) 0 100 200 300 400 500 600 700 800 900 1000 8.0 8.5 9.0 9.5 10.0 10.5 11.0 IDD SUPPLY CURRENT (mA) SWITCHING FREQUENCY (kHz) 0 100 200 300 400 500 600 700 800 900 1000 0.0 5.0 10.0 15.0 20.0 25.0 30.0 FLOATING SUPPLY BIAS CURRENT (mA) SWITCHING FREQUENCY (kHz) 0 100 200 300 400 500 600 700 800 900 1000 0.0 1.0 2.0 3.0 4.0 5.0 ICC SUPPLY CURRENT (mA) SWITCHING FREQUENCY (kHz) 75°C 25°C 125°C -40°C 0°C 0.5 1 1.5 2 2.5 0 200 400 600 800 1000 FLOATING SUPPLY BIAS CURRENT (mA) SWITCHING FREQUENCY (kHz) -50 -25 0 25 50 75 100 125 -120 -110 -100 -90 LOW LEVEL INPUT CURRENT (μA) JUNCTION TEMPERATURE (°C) 9 HIP4081A Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K and TA = 25°C, Unless Otherwise Specified FIGURE 10. AHB - AHS, BHB - BHS NO-LOAD CHARGE PUMP VOLTAGE vs TEMPERATURE FIGURE 11. UPPER DISABLE TURN-OFF PROPAGATION DELAY TDISHIGH vs TEMPERATURE FIGURE 12. DI