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Farnell PDF

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Thermomètre infrarouge 572-2 - Farnell - Farnell Element 14

Thermomètre infrarouge 572-2 - Farnell - Farnell Element 14 - Revenir à l'accueil

 

 

Branding Farnell element14 (France)

 

Farnell Element 14 :

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Everything You Need To Know About Arduino

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Tutorial 01 for Arduino: Getting Acquainted with Arduino

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The Cube® 3D Printer

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What's easier- DIY Dentistry or our new our website features?

 

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Ben Heck's Getting Started with the BeagleBone Black Trailer

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Ben Heck's Home-Brew Solder Reflow Oven 2.0 Trailer

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Get Started with Pi Episode 3 - Online with Raspberry Pi

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Discover Simulink Promo -- Exclusive element14 Webinar

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Ben Heck's TV Proximity Sensor Trailer

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Ben Heck's PlayStation 4 Teardown Trailer

See the trailer for the next exciting episode of The Ben Heck show. Check back on Friday to be among the first to see the exclusive full show on element…

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Get Started with Pi Episode 4 - Your First Raspberry Pi Project

Connect your Raspberry Pi to a breadboard, download some code and create a push-button audio play project.

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Ben Heck Anti-Pickpocket Wallet Trailer

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Molex Earphones - The 14 Holiday Products of Newark element14 Promotion

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Tripp Lite Surge Protector - The 14 Holiday Products of Newark element14 Promotion

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Microchip ChipKIT Pi - The 14 Holiday Products of Newark element14 Promotion

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Beagle Bone Black - The 14 Holiday Products of Newark element14 Promotion

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3M E26, LED Lamps - The 14 Holiday Products of Newark element14 Promotion

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3M Colored Duct Tape - The 14 Holiday Products of Newark element14 Promotion

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Tenma Soldering Station - The 14 Holiday Products of Newark element14 Promotion

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Duratool Screwdriver Kit - The 14 Holiday Products of Newark element14 Promotion

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Cubify 3D Cube - The 14 Holiday Products of Newark element14 Promotion

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Bud Boardganizer - The 14 Holiday Products of Newark element14 Promotion

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Raspberry Pi Starter Kit - The 14 Holiday Products of Newark element14 Promotion

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Fluke 323 True-rms Clamp Meter - The 14 Holiday Products of Newark element14 Promotion

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Dymo RHINO 6000 Label Printer - The 14 Holiday Products of Newark element14 Promotion

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3M LED Advanced Lights A-19 - The 14 Holiday Products of Newark element14 Promotion

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Innovative LPS Resistor Features Very High Power Dissipation

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Charge Injection Evaluation Board for DG508B Multiplexer Demo

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Ben Heck The Great Glue Gun Trailer Part 2

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Introducing element14 TV

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Ben Heck Time to Meet Your Maker Trailer

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Détecteur de composants

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Recherche intégrée

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Ben Builds an Accessibility Guitar Trailer Part 1

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Ben Builds an Accessibility Guitar - Part 2 Trailer

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PiFace Control and Display Introduction

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Flashmob Farnell

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Express Yourself in 3D with Cube 3D Printers from Newark element14

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Farnell YouTube Channel Move

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Farnell: Design with the best

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French Farnell Quest

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Altera - 3 Ways to Quickly Adapt to Changing Ethernet Protocols

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Cy-Net3 Network Module

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MC AT - Professional and Precision Series Thin Film Chip Resistors

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Solderless LED Connector

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PSA-T Series Spectrum Analyser: PSA1301T/ PSA2701T

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3-axis Universal Motion Controller For Stepper Motor Drivers: TMC429

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Voltage Level Translation

Puce électronique / Microchip :

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Microchip - 8-bit Wireless Development Kit

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 2 of 3

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 3 of 3

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 1 of 3

Sans fil - Wireless :

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Microchip - 8-bit Wireless Development Kit

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Wireless Power Solutions - Wurth Electronics, Texas Instruments, CadSoft and element14

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Analog Devices - Remote Water Quality Monitoring via a Low Power, Wireless Network

Texas instrument :

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Texas Instruments - Automotive LED Headlights

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Texas Instruments - Digital Power Solutions

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Texas Instruments - Industrial Sensor Solutions

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Texas Instruments - Wireless Pen Input Demo (Mobile World Congress)

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Texas Instruments - Industrial Automation System Components

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Texas Instruments - TMS320C66x - Industry's first 10-GHz fixed/floating point DSP

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Texas Instruments - TMS320C66x KeyStone Multicore Architecture

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Texas Instruments - Industrial Interfaces

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Texas Instruments - Concerto™ MCUs - Connectivity without compromise

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Texas Instruments - Stellaris Robot Chronos

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Texas Instruments - DRV8412-C2-KIT, Brushed DC and Stepper Motor Control Kit

Ordinateurs :

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Ask Ben Heck - Connect Raspberry Pi to Car Computer

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Ben's Portable Raspberry Pi Computer Trailer

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Ben's Raspberry Pi Portable Computer Trailer 2

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Ben Heck's Pocket Computer Trailer

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Ask Ben Heck - Atari Computer

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Ask Ben Heck - Using Computer Monitors for External Displays

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Raspberry Pi Partnership with BBC Computer Literacy Project - Answers from co-founder Eben Upton

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Installing RaspBMC on your Raspberry Pi with the Farnell element14 Accessory kit

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Raspberry Pi Served - Joey Hudy

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Happy Birthday Raspberry Pi

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Raspberry Pi board B product overview

Logiciels :

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Ask Ben Heck - Best Opensource or Free CAD Software

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Tektronix FPGAView™ software makes debugging of FPGAs faster than ever!

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Ask Ben Heck - Best Open-Source Schematic Capture and PCB Layout Software

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Introduction to Cadsoft EAGLE PCB Design Software in Chinese

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Altera - Developing Software for Embedded Systems on FPGAs

Tutoriels :

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Ben Heck The Great Glue Gun Trailer Part 1

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the knode tutorial - element14

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Ben's Autodesk 123D Tutorial Trailer

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Ben's CadSoft EAGLE Tutorial Trailer

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Ben Heck's Soldering Tutorial Trailer

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Ben Heck's AVR Dev Board tutorial

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Ben Heck's Pinball Tutorial Trailer

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Ben Heck's Interface Tutorial Trailer

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First Stage with Python and PiFace Digital

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Cypress - Getting Started with PSoC® 3 - Part 2

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Energy Harvesting Challenge

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New Features of CadSoft EAGLE v6

Autres documentations :

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Thermomètre infrarouge 572-2 L'outil qu'il vous faut pour les environnements les plus chauds 2 Fluke Corporation Thermomètre infrarouge 572-2 Caractéristiques techniques du thermomètre infrarouge 572-2 Mesures infrarouges Gamme de température infrarouge -30 °C à 900 °C Précision IR (Géométrie d'étalonnage à une température ambiante de 23 °C ± 2 °C) ≥0 °C ± 1 °C ou ± 1 % du relevé, selon la valeur la plus élevée ≥-10 °C à <0 °C ± 2 °C <-10 °C ± 3 °C Répétabilité IR ± 0,5 % de la mesure ou ± 0,5 °C, selon la valeur la plus élevée Résolution d'affichage 0,1 °C / 0,1 °F Distance : Mesure 60:1 (calculée à 90 % de l'énergie) Dimensions minimales du point 19 mm Système de visée laser Décalage du laser double, puissance de sortie <1 mW Réponse spectrale 8 μm à 14 μm Temps de réponse (95 %) <500 ms Emissivité Réglable numériquement de 0,10 à 1,00 par pas de 0,01 ou à partir du tableau intégré des matériaux courants Options de mesure Alarmes Basse et/ou Haute Sonores ou visuelles en couleur Min/Max/Moy/Dif Oui Commutable entre degrés Celsius et Fahrenheit Oui Rétro-éclairage Deux niveaux, normal et ultra-lumineux pour les environnements sombres Entrée sonde Thermocouple de type K Affichage simultanée de la température IR et de la sonde sur le thermocouple de type-K Verrouillage du déclenchement Oui Stockage de données 99 points Ecran Matriciel de 98 x 96 pixels avec menus de fonctions Communication USB 2.0 Caractéristiques techniques du thermocouple de type K Gamme de températures en entrée du thermocouple de type K -270 °C à 1 372 °C Précision d'entrée du thermocouple de type-K (avec température ambiante de 23 °C ± 2 °C) <-40 °C ± (1 °C + 0,2 °/1 °C) ≥-40 °C ± 1 % ou 1 °C, selon le plus élevé des deux Résolution du thermocouple de type K 0,1 °C Répétabilité de thermocouple type K ± 0,5 % de la mesure ou ± 0,5 °C, selon la valeur la plus élevée Gamme de mesure (sonde à perles du thermocouple de type K) -40 °C à 260 °C Précision ± 1,1 °C de 0 °C à 260 °C. Typiquement à moins de 1,1 °C de -40 °C à 0 °C Longueur du câble Câble de thermocouple de type K de 1 m avec connecteur de thermocouple miniature standard et terminaison par perle Caractéristiques générales Température de fonctionnement 0 °C à 50 °C Température de stockage -20 °C à 60 °C Humidité relative 10 % à 90 % HR sans condensation jusqu'à 30 °C Altitude de fonctionnement 2 000 mètres au-dessus du niveau moyen de la mer Poids 0,322 kg Puissance 2 piles AA Autonomie 8 heures avec laser et rétro-éclairage allumés ; 100 heures avec laser et rétro-éclairage éteints, rapport cyclique de 100 % (thermomètre actif en continu) Sécurité et conformité IEC 60825-1 Laser FDA Classe II EMC 61326-1 Conformité CE CMC 沪制01120009 3 Fluke Corporation Thermomètre infrarouge 572-2 Pour commander Thermomètre infrarouge 572-2 Comprend Thermomètre infrarouge avec fonctions de thermomètre de contact, sonde à perle pour thermocouple de type K, cordon d’interface USB 2.0, logiciel de documentation FlukeView® Forms, mallette de transport rigide, manuel d'introduction (papier) et manuel de l'utilisateur (CD). Sondes de température recommandées Sonde Utilisation 80PK-1 Cette sonde à perle polyvalente permet de mesurer rapidement et avec précision les températures de surface et les températures de l'air dans les gaines et les bouches d'aération. 80PK-8 Les sondes de température à collier de serrage (2) sont essentielles pour le suivi des différentiels de température en constante évolution sur les boucles de tuyauterie et les tubulures d'eau chaude, et excellentes pour obtenir des températures de réfrigération rapides et précises. 80PK-9 La sonde de perforation d'isolant dispose d'un embout pointu pour perforer l'isolation des tuyaux, et d'un embout à bout plat pour obtenir des mesures de contact thermique en surface, des températures dans les gaines et les bouches d'aération. 80PK-11 La sonde pour thermocouple à gaine souple permet de fixer facilement un thermocouple au tuyau pour une utilisation en mains libres. 80PK-25 La sonde perforante est l’option la plus polyvalente. Excellente pour vérifier la température de l'air des conduits, la température de surface sous les moquettes/rembourrages, des liquides, des puits de thermomètre, des températures d'évacuation et pour pénétrer l'isolation des tuyaux. 80PK-26 La sonde conique est une excellente sonde polyvalente de mesure de surface et de gaz, disposant d'une bonne longueur et d'un revêtement d'embout à faible masse pour une réaction accélérée aux températures de l'air et des surfaces. Fluke Deutschland GmbH Parc des Nations - Allee du Ponant Bat T3 95956 ROISSY CDG CEDEX Téléphone: (01) 48 17 37 37 Télécopie: (01) 48 17 37 30 E-mail: info@fr.fluke.nl Web: www.fluke.fr N.V. Fluke Belgium S.A. Langveld Park – Unit 5 P. Basteleusstraat 2-4-6 1600 St. Pieters-Leeuw Tel: 02/40 22 100 Fax: 02/40 22 101 E-mail: info@fluke.be Web: www.fluke.be Fluke (Switzerland) GmbH Industrial Division Hardstrasse 20 CH-8303 Bassersdorf Tel: 044 580 75 00 Fax: 044 580 75 01 E-mail: info@ch.fluke.nl Web: www.fluke.ch ©2013 Fluke Corporation. Tous droits réservés. Informations modifiables sans préavis. 6/2013 Pub_ID: 12090-fre La modiflcation de ce document est interdite sans l’autorisation écrite de Fluke Corporation. User’s Guide October 2012 LMP91051EVM User’s Guide October 2012 LMP91051EVM User’s Guide CONTENTS 1 INTRODUCTION ................................................................................................... 1 2 SETUP .................................................................................................................. 2 3 OPERATION ......................................................................................................... 5 4 INSTALLING THE SENSOR AFE SOFTWARE ................................................... 10 5 BOARD LAYOUT ................................................................................................ 11 6 SCHEMATIC ....................................................................................................... 12 7 BOM .................................................................................................................... 13 LIST OF FIGURES 1 Connection Diagram ............................................................................................... 2 2 Jumper Setting (Default) for voltage reading ........................................................... 3 3 LMP91051EVM to SPIO-4 Board Connection ......................................................... 4 4 Sensor AFE Items of Interest .................................................................................. 5 5 Recommended LMP91051 Configuration for a voltage Reading ............................. 7 6 Sensor Database Window ..................................................................................... 8 7 Reults of DC Reading ............................................................................................. 9 8 LMP91051EVM’s J3 for SPI Signals ..................................................................... 10 9 LMP91051EVM Layout ......................................................................................... 11 8 LMP91051EVM Schematic ................................................................................... 12 LIST OF TABLES 1 Jumpers for Voltage Measurement ......................................................................... 3 2 LMP91051EVM Bill of Materials............................................................................ 13 1. Introduction The LMP91051 Design Kit (consisting of the LMP91051 Evaluation Module, the SPIO-4 Digital Controller Board, the Sensor AFE software, and this user’s guide) is designed to ease evaluation and design-in of Texas Instrument’s LMP91051 Configurable AFE for Nondispersive Infrared (NDIR). Data capturing and evaluations are simplified by connecting the SPIO-4 Digital Controller Board (SPIO-4 board) to a PC via USB and running the Sensor AFE software. The data capture board will generate the SPI signals to communicate to and capture data from the LMP91051. The user will also have the option to evaluate the LMP91051 without using the SPIO-4 board or the Sensor AFE software. The on board data converter will digitize the LMP91051’s analog output, and the software will display these results in time domain and histogram. The software also allows customers to write to and read from registers, to configure the device’s gain, output offset, and common mode voltage, and most importantly, to configure and learn about the LMP91051. 2 LMP91051EVM User’s Guide snou034 This document describes the connection between the boards and PC, and provides a quick start for voltage measurements. This document also describes how to evaluate the LMP91051 with and without the SPIO-4 board and provides the schematic, board layout, and BOM. 2. Setup This section describes the jumpers and connectors on the EVM as well and how to properly connect, set up and use the LMP91051EVM. 2.1. Connection Diagram Figure 1 shows the connection between the LMP91051 Evaluation Module (LMP91051EVM), SPIO-4 board, and a personal computer with the Sensor AFE software. LMP91051 can be powered using external power supplies or from the SPIO-4 board. Figure 1: Connection Diagram 2.2. Jumper Connections 1. The jumpers for this example application can be seen in Figure 2 and Table 1. 2. The SPIO-4 board is properly setup out of the box (no assembly required). 3. The schematic for the LMP91051EVM can be seen in Figure 10. 3 LMP91051EVM User’s Guide October 2012 Figure 2: Jumper Setting (Default) for voltage reading Table 1: Jumpers for Voltage Measurement Jumpers Pin Purpose JP1: VDD_DUT P1-P2 Connect LMP91051 VDD to +3.3V from SPIO4 JP2: VREF_ADC P1-P2 Connect ADC VREF to 4.1V from U5 (LM4140) JP3: VA_ADC P1-P2 Connect ADC VA to +5V from SPIO4 JP4: OUT_DUT to ADC P1-P2 Connect LMP91051 OUT to ADC input RC filter JP5: VDD to VIO Open Connect LMP91051 VDD to VIO JP6: VIO P2-P3 Connect LMP91051 VIO to +3.3V from SPIO4 J1: IN1 to CMOUT Open Connect LMP91051 IN1 to CMOUT. Note: Board is provided with this jumper open. Use provided jumper to short IN to CMOUT for easy evaluation. J2: IN2 to CMOUT Open Connect LMP91051 IN2 to CMOUT. Note: Board is provided with this jumper open. Use provided jumper to short IN to CMOUT for easy evaluation. 4 LMP91051EVM User’s Guide snou034 2.3. Installing/Opening the Software Follow Section 4 to install and open the Sensor AFE software. 2.4. Connecting and Powering the Boards These Steps have to be done in this order. 1. Connect the LMP91051EVM’s J3 to SPIO-4 Board’s J6. See Figure 3. . Figure 3: LMP91051EVM to SPIO-4 Board Connection 2. Connect SPIO-4 board to a PC via USB. 3. Use a multimeter to measure LMP91051EVM’s +5V test point; it should be approximately 5V. If it is not, check your power supplies and jumpers. Measure test point VREF_ADC; it should be approximately 4.1V. If it’s not, check your jumpers and U5. J3 5 LMP91051EVM User’s Guide October 2012 3. Operation 3.1. Sensor AFE Software Overview Once connection between the boards and PC is established, you can use the software to communicate to and capture data from the LMP91051. Drag cursor over window icons to get an icon description. Some items of interest are shown in Figure 4. Figure 4: Sensor AFE Items of Interest . 1. Menu Bar Icons (from left to right) a. Save Configuration to File: Saves the current configuration settings (register settings) to an .xml file. b. Load Configuration File: Loads the selected configuration settings (register settings) .xml file. c. Register Map: Opens Register Map window. An alternative to the Virtual Device, for writing and reading the device registers. See datasheet for details on device Register Map. d. Save All Registers to File: Saves register contents to a .cvs file. e. Read All Register from Board: After configuring the register map, use this button to read all registers. Functional only in SDIO Mode (see Item 3). f. Write All Registers To Board: After configuring the register map use this button to write all registers. Registers will not be updated until this step is done. g. Zoom In/Out Diagram Image: Zoom in and out of the virtual device image. h. Show Tutorial: Takes you to the interactive Software Overview videos. 1 2 3 4 5 6 LMP91051EVM User’s Guide snou034 i. Documentation: Accesses the LMP91051 Datasheet, SPIO4 User’s Guide, or Evaluation Board User’s Guide. 2. Device Selection and User Inputs a. LMP91050/1 : Toggle between LMP91050 and LMP91051 device. b. fc: Center frequency of external bandpass filter. c. bandwidth: Pass band bandwidth of external bandpass filter. d. R1_EXT, R2_EXT, C1_EXT, C2_EXT: External bandpass filter component values calculated based on user input for center frequency (fc) and pass band (bandwidth) described above. e. Supply: LMP91051 supply voltage (VDD). f. IC Temp: LMP91051 operating temperature g. Offset Adjust Voltage: The tool will calculate the DAC code (decimal) required to achieve this output offset adjust voltage. User must then Write to the register to update the value in the NDAC register. h. ADC Vref: ADC reference voltage. User should input value measured at VREF_ADC test point. Value used to calculate displayed Output Voltage. i. Vout Dark: This value corresponds to the user measured value at the LMP91051 output (OUT) when input is shorted (IN = CMOUT). Tool will use this value to estimate LMP91051 input voltage (IN - CMOUT) on subsequent measurements. 3. Change Mode: Change between device Read Mode OFF (default) and ON. See datasheet for details on SPI Read Mode. 4. Eval Board Setting: Document to show user how to configure jumpers and connect thermopile based on sensor selected. 5. Virtual Device: Drag cursor across color coded blocks and click to configure each block. To update registers “Write All Registers” when done. 3.2. Configuring the LMP91051 Using the Sensor AFE Software Follow the step-by-step instructions under the “HelpBar” mini-tab (left hand side of the GUI) to configure the LMP91051 for this example. These step-by-step instructions are discussed in details below, and the recommended configuration should look similar to Figure 5. 7 LMP91051EVM User’s Guide October 2012 Figure 5: Recommended LMP91051 Configuration for a voltage Reading 1. Step 1: Select a Sensor – Sensor Database window opens. See Figure 6. Step 1: Click sensor type (Thermopile) and the sensors will show in the bottom table. Step 2: Click sensor and then click “Select” button on the left to use this sensor. 8 LMP91051EVM User’s Guide snou034 Figure 6: Sensor Database Window 2. Step 2: Input Mux – click on the mux block to set “1: IN1” (default). 3. Step 3: PGA1 Enable – click on the “PGA1” block to set “1: PGA1 ON” . Remember after configuring the register map to use the Write All Registers button to update the registers. 4. Step 4: PGA2 Enable – click on the “PGA2” block to set “1: PGA2 ON” . Note: By default PGA1 and PGA2 are OFF on power up. However the software was designed to automatically power ON PGA1 and PGA2 for ease of use. 5. Step 5: External Filter – click on the switch block to choose “0: PGA1 to PGA2 direct” (default). 6. Step 6: Common Mode – click on the “CM GEN” block to set “0: 1.15V” (default). 7. Step 7: GAIN 2 – click on the “PGA2” block to set “00: 4” (default). 8. Step 8: GAIN 1 – click on the “PGA1” block to set “0: 250” (default). 9. Step 8: DAC (Output Offset) – click on the “DAC” block to set “128” (default) for 0 mV offset. Alternatively, user can also use the Offset Adjust Voltage user input field to input 0 mV. 10. Step 10: Performance - click on the “Performance” mini-tab. This tab displays the Estimated Device Performance based on device configuration and user input device Supply and IC Temp .This tab also displays the Measured System Performance if you’ve connected a board and ran the LMP91051. Step 1 Step 2 9 LMP91051EVM User’s Guide October 2012 3.3. Capturing Data 1. Click on the “Measurement” tab. 2. Under the “Output Format” field, select Display as “Output Voltage (V)” 3. Under the “Stop Condition” field, select Run as “1” Seconds. Alternatively, select “Run Continuously” radio button to run continuously up to 1 hour. 4. Click on the “Run” button to view the output voltage results. A reading should be plotted as seen in Figure . Output voltage will vary depending on input voltage across input (IN1/IN2) and CMOUT. If J1/J2 are shorted, IN1/IN2 = CMOUT, output voltage should be about 1V. Note: Board is provided with jumper J1/J2 open. Use provided jumper to short IN1/IN2 to CMOUT for easy evaluation. Figure 7: Results of DC Reading 3.4. Powering the LMP91051EVM There are two ways in which VDD can be sourced: external supply or SPIO-4 power. If using an external power supply to source VDD, do the following: 1. Connect an external power supply to banana jacks VDD-EXT and GND. 2. Jumper pins 2 and 3 of JP1 to connect the external power to VDD_DUT. If using the SPIO-4 power to source VDD, then do the following: 1. Jumper pins 1 and 2 of JP1 to connect +3.3V SPIO-4 power to VDD_DUT. The schematic for the LMP91051EVM can be seen in Figure 10. 10 LMP91051EVM User’s Guide snou034 3.5. Evaluating the LMP91051 without the SPIO-4 Board The SPIO-4 digital controller board is used to generate the SPI signals to communicate to the LMP91051. Without the SPIO-4 board, the Sensor AFE software for the LMP91051 cannot be used to capture and analyze data from the LMP91051EVM. If the SPIO-4 board is not available but LMP91051 evaluation is desirable, then connect your own SPI signals to J1 of the LMP91051EVM as seen below. Reference the LMP91051 datasheet for appropriate SPI timing diagrams. Source LMP91051 VDD with an external power supply per previous section. Figure 8: LMP91051EVM’s J3 for SPI Signals Refer to the LMP91051 datasheet for more information on the LMP91051’s SPI protocol. 4. Installing the Sensor AFE Software Each Sensor AFE product will have its own software. To access the Sensor AFE software for LMP91051, follow the steps below. 1. Getting the Zip Files a. You can find the latest downloadable Sensor AFE software at ti.com/sensorafe b. Download the zip file onto your local hard drive. Unzip this folder. 2. Installing the Driver - skip this step if you don’t have the LMP91051EVM and SPIO4 digital controller board. a. See the provided Installation Guide For SensorAFE Drivers.pdf. 11 LMP91051EVM User’s Guide October 2012 3. Installing the Software a. See the provided Installation Guide for LMP91050 SensorAFE Software.pdf i. Note: If you run the software without the boards, you’ll get an error message. Ignore that error message and click “Ok” to continue. 5. Board Layout Figure 9: LMP91051EVM Layout 6. Schematic Figure 10: LMP91051EVM Schematic 7. BOM LMP91051EVM Bill of Materials Item Designator Description Manufacturer PartNumber Quantity 1 +3P3V, +5V, A0_DUT, A1_DUT, CMOUT_DUT, CSB_ADC, CSB_DUT, DOUT_ADC, IN1_DUT, IN2_DUT, MISO, MOSI, MOSI_EN, OUT_DUT, REF_ADC, SCLK_ADC, SCLK_DUT, SDIO_DUT, TEMP, VA_ADC, VDD_DUT, VDD_EXT, VIO, VIO_ADC, VIO_EXT, VREF_ADC Test Point, TH, Compact, Red Keystone Electronics 5005 26 2 AA1 Printed Circuit Board TBD by TI 551xxxxxx-001 REV A 1 3 BNC1, BNC2, OUT DNS Amphenol Connex 112404 3 4 C1 CAP, CERM, 10uF, 6.3V, +/- 20%, X5R, 1206 TDK C3216X5R0J106M 1 5 C2 CAP CER 4700PF 250V X7R 10% 0805 TDK C2012X7R2E472K 1 6 C3, C9, C10, C12, C17, C22 CAP, TANT, 10uF, 10V, +/- 20%, 3.4 ohm, 3216-18 SMD Vishay-Sprague 293D106X0010A2TE3 6 7 C4, C7, C13, C15, C18, C19, C23 CAP, CERM, 0.1uF, 16V, +/- 5%, X7R, 0603 AVX 0603YC104JAT2A 7 8 C5, C6, C21 CAP, CERM, 10nF, 50V, +/-5%, C0G/NP0, 0805 MuRata GRM2195C1H103JA01D 3 9 C8, C14 CAP, CERM, 0.1uF, 25V, +/- 10%, X7R, 0805 AVX 08053C104KAT2A 2 10 C11 CAP, CERM, 0.1uF, 100V, +/- 5%, X7R, 1206 AVX 12061C104JAT2A 1 11 C16, C20 CAP, CERM, 1uF, 10V, +/-10%, X7R, 0805 AVX 0805ZC105KAT2A 2 12 FID1, FID2, FID3 Fiducial mark. There is nothing to buy or mount. N/A N/A 3 13 GND1, GND2, GND3, GND4, GND5, GND6, GND7, GND8, GND9, GND10, GND11 Test Point, TH, Compact, Black Keystone Electronics 5006 11 14 H1, H2, H3, H4 Bump Hemisphere B&F Fastener Supply NY PMS 440 0025 PH 4 15 J1, J2, JP3, JP4, JP5 Header, TH, 100mil, 2x1, Gold plated, 230 mil above insulator Samtec Inc. TSW-102-07-G-S 5 16 J3 SPIO-GPSI16 Header, 16-Pin, Dual row, Right Angle Sullins Connector Solutions PBC36DGAN 1 17 JP1, JP2, JP6 Header, TH, 100mil, 1x3, Gold plated, 230 mil above insulator Samtec Inc. TSW-103-07-G-S 3 18 L1, L2 Ferrite, Chip, 200mA, .080 ohm, SMD Wurth Elektronik eiSos BLM21BD272SN1L 2 19 R1, R2 RES, 160k ohm, 5%, 0.125W, 0805 Vishay-Dale CRCW0805160KJNEA 2 20 R3 DNS Vishay-Dale DNS 1 21 R4 RES, 100k ohm, 5%, 0.125W, 0805 Vishay-Dale CRCW0805100KJNEA 1 22 R5, R10 RES, 0 ohm, 5%, 0.125W, 0805 Vishay-Dale CRCW08050000Z0EA 2 23 R6 RES, 100k ohm, 1%, 0.125W, 0805 Vishay-Dale CRCW0805100KFKEA 1 24 R7 RES, 1.00k ohm, 1%, 0.125W, 0805 Vishay-Dale CRCW08051K00FKEA 1 25 R8 RES, 27.4 ohm, 1%, 0.1W, 0603 Vishay-Dale CRCW060327R4FKEA 1 26 R9 RES, 51.1 ohm, 1%, 0.1W, 0603 Vishay-Dale CRCW060351R1FKEA 1 27 R11, R12, R13, R14 DNS Vishay-Dale CRCW06031R00JNEA 4 28 U1 LMP91051 Texas Instruments LMP91051 1 29 U2 16-Bit, 50 to 250 kSPS, Differential Input, MicroPower ADC, 10-pin Mini SOIC, Pb- Free Texas Instruments ADC141S628QIMMX/NOP B 1 30 U3 Non-Inverting 3-State Buffer Texas Instruments SN74AHC1G125DCKR 1 31 U4 DNS Heimann HMS J21 1 32 U5 Precision Micropower Low Dropout Voltage Reference, 8- pin Narrow SOIC Texas Instruments LM4140ACM-4.1 1 33 U6 2K 5.0V I2C Serial EEPROM On Semiconductor CAT24C02WI-GT3 1 34 Y1 Osc 4.000Mhz 5.0V Full Size ECS Inc ECS-100AX-100 1 35 Y1A Oscllator Socket Aires Electronics A462-ND 1 EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. 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All rights reserved. FEN LOGIC LTD. Gertboard User Manual Gert van Loo and Myra VanInwegen Revision 1.0 The Gertboard is an add-on GPIO expansion board for the Raspberry Pi computer. It comes with a large variety of components, including buttons, LEDs, A/D and D/A converters, a motor controller, and an Atmel AVR microcontroller. There is a suite of test/example programs for the Gertboard, written in C, which is freely available at www.element14.com/raspberrypi This manual explains both how to set up the Gertboard for various control experiments and also explains at a high level how the test code works. 3 Contents Gertboard Overview ................................................................................................................................ 4 Labels on the circuit board .................................................................................................................. 5 Location of the building blocks on the Gertboard .............................................................................. 7 Jumpers and straps .............................................................................................................................. 8 GPIO pins ........................................................................................................................................... 8 Schematics .......................................................................................................................................... 9 Test programs overview ...................................................................................................................... 9 Macros........................................................................................................................................... 10 Buffered I/O, LEDs, and pushbuttons ................................................................................................... 11 Push buttons ...................................................................................................................................... 12 Locating the relevant sections of the Gertboard ............................................................................... 12 Testing the pushbuttons .................................................................................................................... 14 Testing the LEDs .............................................................................................................................. 16 Testing I/O ........................................................................................................................................ 18 Open Collector Driver ........................................................................................................................... 19 Testing the open collector drivers ..................................................................................................... 20 Motor Controller ................................................................................................................................... 22 Testing the motor controller .............................................................................................................. 23 Digital to Analogue and Analogue to Digital Converters ..................................................................... 25 Digital to analogue converter ............................................................................................................ 25 Analogue to Digital converter ........................................................................................................... 26 Testing the D/A and A/D .................................................................................................................. 26 ATmega device ..................................................................................................................................... 29 Programming the ATmega ................................................................................................................ 30 Arduino pins on the Gertboard ...................................................................................................... 30 A few sketches to get you going ................................................................................................... 31 Minicom ........................................................................................................................................ 36 Combined Tests .................................................................................................................................... 38 A/D and motor controller .................................................................................................................. 38 Decoder ............................................................................................................................................. 39 For More Information ........................................................................................................................... 40 Appendix A: Schematics ....................................................................................................................... 40 4 Gertboard Overview Raspi open collector (6x) Micro controller strapping area Motor controller D A A D SPI PWM I/O UART I/O 12x 3x SPI/dbg out in 1k 1k ULN2803a ATmega 74xx244 L6203 MCP3002 MCP4802 Fig. 1: The principle, high level diagram of the Gertboard. In this view it is possible to see how flexible Gertboard is, by being able to connect various parts of the board together. Above is a principle diagram1 of the Gertboard. Each circle in the diagram represents a header pin. These headers give you access to a wide range of control combinations. As you begin experimenting with the board, you will probably use the strapping area to connect various components on the Gertboard to the Raspberry Pi. This flexibility even allows you, for example, to connect the motor controller input pins to the Atmel ATmega device (an AVR microcontroller). The ATmega device has a separate 6-pin header, which allows it to be programmed by the Raspberry Pi using the (Serial Peripheral Interface) SPI bus. The major building blocks are: • 12x buffered I/O • 3x push buttons • 6x open collector drivers (50V, 0.5A) • 48V, 4A motor controller • 28-pin dual in line ATmega microcontroller • 2-channel 8/10/12 bit Digital to Analogue converter • 2-channel 10 bit Analogue to Digital converter Each of these building blocks has a section below. 1 A ‘principle diagram’ is a coarse overview of the most important parts of the system. It is not correct in all details. For that you must look at the board schematics. 5 Labels on the circuit board Fig. 2: A photograph of the unpopulated Gertboard viewed from above, showing the silver coloured holes and pads that eventually will be home to the components, as well as the legends printed in white epoxy ink, and green solder resist coating. Fig. 3: This image is a diagrammatic representation of the same photograph shown in Fig. 2 above. It was generated from the same files that were used to create the physical printed circuit board. The blue elements in the diagram correspond to the white text and lines on the photo and the red elements correspond to the silver pads and holes on the photo. 6 From now onwards in this guide, because it is much clearer to see, the diagram shown in Fig. x will be used in preference to show you how to wire up the Gertboard, and to run the test and example programs. It is useful to be able to look at the bare board in order to see the labels (the white text in the photo and the blue text in the diagram) on the board without the components getting in the way. These labels provide essential information that is required in order to use Gertboard to its full potential. Almost all of the components have labels, and more importantly, the pins in the headers have labels. It isn’t necessary to be too concerned about the majority of the components; such as resistors and capacitors (labelled with Cn and Rn, where n is some number). These are fairly simple devices that don’t have a ‘right way round’ when they are assembled to the board. Diodes on the other hand, do need assembling the right way round (covered later) - all the diodes are labelled Dn; of these, the ones that you will be interested in are D1 through D12, the light emitting diodes (LEDs; they are located near the top of the board on the left). Pushbutton switches are labelled S1, S2, and S3 (they are located just beneath the LEDs). Fig. 4: Two examples of ICs – an 8-pin and a 20-pin dual-inline (DIL) package. In this package style, pin 1 is always identified as the first pin anticlockwise from the package notch marking. Integrated circuits, or ICs, are marked Un, so for example the I/O buffer chips are U3, U4, and U5 (these are near the middle of the board), while the Atmel microcontroller is U8 (this is below and to the left of U3 to U5). For the ICs, it is very important to know which is pin 1. If the IC is orientated so that the end with the semi-circle notch is to the left, then pin 1 is the leftmost pin in the bottom row. On the Gertboard, the location of pin 1 is always marked with a square pad. Pin numbers increase in an anti-clockwise direction from there, as shown in the diagram. Knowing this means that the schematics in Appendix A can always be related to the pinning on the ICs on the Gertboard. Headers (the rows of pins sticking up from the board) will be a frequently used component on the Gertboard. They are labelled Jn, so for example the header to the ribbon cable from the Raspberry Pi is attached, is J1. Pin 1 on the headers is again marked with a square pad. Power pins are marked with their voltage; for example there are a few positions marked 3V3. This is a commonly used notation in electronics, and in this case it means 3.3 volts. A 5V power supply comes onto the board via the GPIO connector, but the standard Gertboard assembly instructions do not require that a header is installed to access this. If 5V is really required, and spare header pins are available, a header can be soldered in location J24 in the lower right-hand corner of the board, and then a 5V supply can be picked up from the lower pin (next to the text ‘5V’). Ground is marked with GND or a ⊥ symbol. 1 2 3 4 8 7 6 5 1 2 3 4 5 6 7 8 20 19 18 9 10 17 16 15 14 13 12 11 7 Location of the building blocks on the Gertboard Fig. 5: Photograph of an assembled Gertboard, with key functional blocks identified by coloured boundary marking. This image serves as a good reference point for a board that has been successfully assembled from bare board and components. Please note that the appearance of some components can vary. This annotated photo of a populated Gertboard shows where the building blocks (the major capabilities of the board) are located. Some of the building blocks have two areas marked. For example, the turquoise lines showing the Atmel ATmega chip not only surround the chip itself (on the lower left) but also surround two header pins near the bottom of the board, in the middle. These pins are connected to the Atmel chip and provide an easy way to interface the GPIO signals from the Raspberry Pi (which are in the black box) with the Atmel chip. The supply voltage (the voltage that acts as high or logical 1 on the board) is 3.3V. This is generated from the 5V power pin in the J1 header (the one where the ribbon cable to the Raspberry Pi is attached) by the components in the lower right corner of the board. The open collector and motor controllers can handle higher voltages and have points to attach external power supplies. 8 Jumpers and straps Fig. 6: Image showing straps on the left hand side, and jumpers on the right. Straps connect two parts of Gertboard together, whilst jumpers conveniently connect two adjacent pins on the same header, together. The Gertboard Kit contains materials to produce single straps, although the double strap also shown can also be useful. To work properly, and get the maximum flexibility from the Gertboard a number of straps and jumpers are essential. On the left of the photo are straps: they consist of wires that connect the small metal connector and plastic housing, that slip over the header pins. They are meant for connecting header pins that are further apart. It is sometimes useful to have straps that connect two or three adjacent pins to the same number of adjacent pins elsewhere on the board. This is useful for example when you want to use several LEDs. On the right of the above photo are jumpers: they are used to connect two header pins that are right next to each other. There is one jumper that should be in place at all times on the board: the one connecting pins 1 and 2 in header J7. This is the jumper that connects power from the power input pins to the rest of the board. It is near the lower right corner of the board and is the jumper connecting the two pins below the text 3V3 in the photo below. Fig. 7: Image showing header J7 with translucent jumper in place. J7 is located just above J8 (J7 legend is obscured in this image) GPIO pins The header J2, to the right of the text ‘Raspberry Pi’ on the board, provides access to all the I/O pins on the GPIO header. There are 26 pins in J1 (the GPIO header which is connected to the Raspberry Pi through the ribbon cable) but only 17 pins in J2: 3 of the pins in J1 are power and ground, and 6 are DNC (do not connect). The labels on these pins, GP0, GP1, GP4, GP7, etc, may initially seem a little arbitrary, as there are some obvious gaps, and the numbers do not correspond with the pin numbers on the GPIO header J1. These labels are important however: they correspond with the signal names used 9 by the BCM2835, the processor on the Raspberry Pi. Signal GPIOn on the BCM2835 datasheet corresponds to the pin labelled GPn on header J2 (so for example, GPIO17 on the data sheet can be found at the pin labelled GP17 on the board). The numbers in the labels allow us to specify which pins are required in the control programs to be run later. Some of the GPIO pins have an alternate function that are made use of in some of the test programs. These are shown in the table below. The rest are only used as general purpose input/output in the code. On page 27 there is a description of how to gain access to the alternate functions of GPIO pins. GPIO0 SDA0 (alt 0) I2C bus GPIO1 SLC0 (alt 0) GPIO7 SPI_CE1_N (alt 0) SPI bus GPIO8 SPI_CE0_N (alt 0) GPIO9 SPI_MISO (alt 0) GPIO10 SPI_MOSI (alt 0) GPIO11 SPI_SCLK (alt 0) GPIO14 TXD0 (alt 0) UART GPIO15 RXD0 (alt 0) GPIO18 PWM0 (alt 5) pulse width modulation Table 1: Table showing the GPIO pins on the Gertboard, and what their alternative function is. We mention the I2C bus use of GPIO0 and 1 above not because the I2C bus is used in the test programs, but because each of them has a 1800 pull-up resistor on the Raspberry Pi, and this prevents them from being used with the pushbuttons (see page 134). Schematics Whilst there are some circuit diagrams, or schematics, in the main body of the manual for some of the building blocks of the board, they are simplifications of the actual circuits on the board. To truly understand the board and the connections you need to make on it, you need to be a little familiar with the schematics. Thus we have attached the full schematics at the end of this manual as Appendix A. These pages are in landscape format. The page numbers A-1, A-2, etc, are in the lower left corner of the pages (if you hold them so that the writing is the right way up). Test programs overview When you download the Gertboard test/example code (available at www.element14.com/raspberrypi), you will have a file with a name something like gertboard_sw_10_07_12.tar.gz. This is a compressed (hence the .gz suffix, which means it was compressed using the gzip algorithm) archive (hence the .tar), where an archive is a collection of different files, all stored in a single file. To retrieve the original software, put the file where you want your Gertboard software to end up on your Raspberry Pi computer, then uncompress it by typing the following in one of the terminal windows on your Pi (substituting the name of the actual file you have downloaded for the file name we are using in this example): gunzip gertboard_sw_10_07_12.tar.gz 10 Typing a directory command, ls, should then show the newly uncompressed archive file gertboard_sw_10_07_12.tar . So now, to extract the files from the archive, type tar –xvf gertboard_sw_10_07_12.tar A new directory, gertboard_sw, will be created. In it is a set of C files and a makefile. C files are software files, but they need to be compiled to run on the processor on your system. In the case of Raspberry Pi, this is an ARM11. To compile all the code to run on Raspberry Pi, first change directory to gertboard_sw by typing: cd gertboard_sw And then in that directory, type: make all Each building block has at least one test program that goes with it. Currently the test programs are written in C; but they’ll be translated into Python in the near future. Each test program is compiled from two or more C files. The file gb_common.c (which has an associated header file gb_common.h) contains code used by all of the building blocks on the board. Each test has a C file that contains code specific to that test (thus you will find main here). Some of the tests use a special interface (for example the SPI bus), and these tests have an additional C file that provides code specific to that interface (these files are gb_spi.c for the SPI bus and gb_pwm for the pulse width modulator). In each of the sections about the individual building blocks, the code specific to the tests for that block is explained. Since all of the tests share the code in gb_common.c, an overview of that code will be given here. In order to use the Gertboard via the GPIO, the test code first needs to call setup_io. This function allocates various arrays and then calls mmap to associate the arrays with the devices that it wants to control, such as the GPIO, SPI bus, PWM (pulse width modulator) etc. The result of this is that it writes to these arrays control the devices or sends data to them, and reads from these arrays get status bits or data from the devices. At the end of a test program, restore_io should be called, which undoes the memory map and frees the allocated memory. Macros In gb_common.h, gb_spi.h, and gb_pwm.h there are a number of macros that give a more intuitive name to various parts of the arrays that have been mapped. These macros are used to do everything from setting whether a GPIO is used as input or output to controlling the clock speed of the pulse width modulator. In the chart below is a summary of the purpose of the more commonly used macros and give the page number on which its use is explained in more detail. The T column below gives the ‘type’ of the macro. This shows how the macro is used. ‘E’ means that the command is executed, as in: INP_GPIO(17); ‘W’ means that that the command is written to (assigned), as in: GPIO_PULL = 2; 11 ‘R’ means that that the command is read from, as in: data = GPIO_IN0; Macro name T Explanation Page no. INP_GPIO(n) E activates GPIO pin number n (for input) 11 OUT_GPIO(n) E used after above, sets pin n for output 11 SET_GPIO_ALT(n, a) E used after INP_GPIO, select alternate function for pin 24 GPIO_PULL W set pull code 16 GPIO_PULLCCLK0 W select which pins pull code is applied to 16 GPIO_IN0 R get input values 16 GPIO_SET0 W select which pins are set high 17 GPIO_CLR0 W select which pins are set low 17 Table 2: Commonly used macros, their purpose, type and location within this manual. The macro INP_GPIO(n) must be called for a pin number n to allow this pin to be used. By default its mode is set up as an input. If it is required that the pin is used for an output, OUT_GPIO(n)must be called after INP_GPIO(n). Buffered I/O, LEDs, and pushbuttons There are 12 pins which can be used as input or output ports. Each can be set to behave either as an input or an output, using a jumper. Note that the terms ‘input’ and ‘output’ here are always with respect to the Raspberry Pi: in input mode, the pin inputs data to the Pi; in output mode it acts as output from the Pi. It is important to keep this in mind as the Gertboard is set up: an output from the Gertboard is an input to the Raspberry Pi, and so the ‘input’ jumper must be installed to implement this. I/O 1k 1k-10k input 74xx244 output Raspi Fig. 8: The circuit diagram for I/O ports 4-12 The triangles symbols in the diagram above represent buffers. In order to make the port function as an input to the Raspberry Pi you install the ‘input’ jumper: then the data flows from the ‘I/O’ point to the ‘Raspi’ point. To make the port function as an output, the ‘output’ jumper must be installed: then the data flows from the ‘Raspi’ point to the ‘I/O’ point. If both jumpers are installed, it won’t harm the board, but the port won’t do anything sensible. 12 In both the input and output mode the LED will indicate what the logic level is on the ‘I/O’ pin. The LED will be on when the level is high and it will be off when the level is low. There is a third option for using this port: if neither the input nor output jumper is placed the I/O pin can be used as a simple ‘logic’ detector. The I/O pin can be connected to some other logic point (i.e. one that is either at 0V or 3.3V) and use the LED to check if the connect point is seen as high or low. Depending on the type of 74xx244 buffer chosen, the LED could behave randomly if the port is not driven properly. In that case it may easily switch state, switching on or off with the smallest of electronic changes, for example, when the board is simply touched. There is a series resistor between the input buffer and the GPIO port. This is to protect the BCM2835 (the processor on the Raspberry Pi) in case the user programs the GPIO as output and also leaves the ‘input’ jumper in place. The BCM2835 input is a high impedance input and thus even a 10K series resistor will not produce a noticeable change in behaviour when it is used as input. Push buttons The Gertboard has three push buttons; these are connected to ports 1, 2, and 3. Thus the first three I/O ports look like this: I/O 1k 1k-10k input 74xx244 output Raspi 1k Fig. 9: Circuit diagram showing one of the three push buttons I/Os. There is a circuit like this for ports 1 to 3. In order to use a push button, the ‘input’ jumper must not be installed, even if the intention is to use this as an input to the Raspberry Pi. If it is installed, the output of the lower buffer prevents the pushbutton from working properly. To make clear what state each button is in, the output jumper can be installed, and then the LED will now show the button state (LED on means button up, LED off means button down). To use the push buttons, a pull-up must be set on the Raspberry Pi GPIO pins used (described below, page 16) so that they are read as high (logical 1) when the buttons are not pressed. Locating the relevant sections of the Gertboard In the building blocks location diagram on page 7, the components implementing the buffered I/O are outlined in red. The ICs containing the buffers are U3, U4, and U5 near the centre of the board. The LEDs (the round translucent red plastic devices) are labelled D1 to D12; D1 is driven by port 1, D2 by port 2, etc. The pushbutton switches (the silver rectangular devices with circular depressions in the middle) are labelled S1 to S3; S1 is connected to port 1 and so on. The long thin yellow components with multiple pins, are resistor arrays. 13 The pins corresponding to ‘Raspi’ in the circuit diagrams above are B1 to B12 on the J3 header above the words ‘Raspberry Pi’ on the board (B1 to B3 correspond to the ‘Raspi’ points on the second circuit diagram with the pushbutton, and B4 to B12 correspond to the ‘Raspi’ points on the first circuit diagram). They are called ‘Raspi’ because these are the ones that should be connected to the pins in header J2, which are directly connected to the pins in J1, and which are then finally connected via the ribbon cable to the Raspberry Pi. The pins corresponding to the ‘I/O’ point on the right of the circuit diagrams above are BUF1 to BUF12 in the (unlabeled) single row header at the top of the Gertboard. On the Gertboard schematic, I/O buffers are on page A-2. The buffer chips U3, U4, and U5 are clearly labelled. It should be apparent that ports 1 to 4 are handled by chip U3, ports 5 to 8 by chip U4, and ports 9 to 12 by chip U5. The ‘Raspi’ points in the circuit diagrams above are shown as the signals BUF_1 to BUF_12 on the left side of the page, and the ‘I/O’ points are BUF1 to BUF12 to the right of the buffer chips. The input jumper locations are the blue rectangles labelled P1, P3, P5, P7, etc to the left of the buffer chips, and the output jumper locations are the blue rectangles labelled P2, P4, P6, P8, etc, to the right of the buffer chips. The pushbutton switches S1, S2, and S3 are shown separately, on the right side of the page near the bottom. The buffered I/O ports can be used with (almost) any of the GPIO pins; they just have to be connected up using the straps. So for example, if you want to use port 1 with GPIO17 a strap is placed between the B1 pin in J3 and the GP17 pin in J2. Beware that the push buttons cannot be used with GPIO0 or GPIO1 (GP0 and GP1 in header J2 on the board) as those two pins have a 1800 pull-up resistor on the Raspberry Pi. When the button is pressed the voltage on the input will be 3.3 × 1000Ω 1000Ω + 1800Ω = 1.2 This is not an I/O voltage which can be reliably seen as low. The output and input jumper locations are above and below the U3, U4, and U5 buffer chips. The ‘input’ jumpers need to be placed on the headers below the chips (shown on the board with the ‘in’ text; they are separated from the chip they go with by a yellow resistor array), and the ‘output’ jumpers need to be placed on the headers above the chips (with the ‘out’ text). If viewed closely (it is clearer on the bare board), it is possible to see that each row of 8 header pins above and below the buffer chips is divided up into 4 pairs of pins. The pairs on U3 are labelled B1 to B4, the ones on U4 are B5 to B8, and the ones on U5 are B9 to B12. The B1 pins are for port 1, B2 for port 2, etc. To use port n as an input (but not when using the pushbutton, if n is 1, 2, or 3), a jumper is installed over the pair of pins in Bn in the row marked ‘in’ (below the appropriate buffer chip). To use port n as an output, a jumper is installed over the pair of pins in Bn in the row marked ‘out’ (above the appropriate buffer chip). 14 Fig. 10: Example of port configuration where ports 1 to 3 are set to be outputs and ports 10 and 11 are set to be inputs. As a concrete example, in the picture above, ports 1, 2, and 3 are configured for output (because of the jumpers across B1, B2, and B3 on the ‘out’ side of chip U3). Ports 10 and 11 are configured for input (because of the jumpers across B10 and B11 on the ‘in’ side of U5). In the test programs, the required connections are printed out before starting the tests. The input and output jumpers are referred to in the following way: U3-out-B1 means that there is a jumper across the B1 pins on the ‘out’ side of the U3 buffer chip. So the 5 jumpers in the picture above would be referred to as U3-out-B1, U3-out-B2, U3-out-B3, U5-in-B10, and U5-in-B11. Testing the pushbuttons The test program for the pushbutton switches is called buttons. To run this test, the Gertboard must be set up as in the image below. There are straps connecting pins B1, B2, and B3 in header J3 to pins GP25, GP24, and GP23 in header J2 (respectively). Thus GPIO25 will read the leftmost pushbutton, GPIO24 will read the middle one, and GPIO23 will read the rightmost pushbutton. The jumpers on the ‘out’ area of U3 (U3-out-B1, U3-out-B2, U3-out-B3) are optional: if they are installed, the leftmost 3 LEDs will light up to indicate the state of the switches. 15 Fig. 11: Whilst the image above is clear, it isn’t very good at showing exactly how the straps are connected, and between which pins on the board. Fig. 12: This type of diagram is much more effective at showing how straps connect pins together on the board, so from now onwards, we will use these type of diagrams to show wiring arrangements. 16 In the diagram, black circles show which pins are being connected, and black lines between two pins indicate that jumpers (if they are adjacent) or straps (if they are further apart) are used to connect them. The code specific to the buttons test is buttons.c. In the main routine, the connections required for this test are firstly printed to the terminal (a text description of the wiring diagram above). When the user verifies that the connections are correct, setup_io is called (described on page 10) to get everything ready. setup_gpio is then called, which gets GPIO pins 1 to 3 ready to be used as pushbutton inputs. It does this by first using the macro INP_GPIO(n) (where n is the GPIO pin number) to select these 3 pins for input. Then pins are required to be pulled high: the buttons work by dropping the voltage down to 0V when the button is pressed, so it needs to be high when the button is not pressed. This is done by setting GPIO_PULL to 2, the code for pull-up. Should it ever be required, the code for pull-down is 1. The code for no pull is 0; this will allows this pin to be used for output after it has been used as a pushbutton input. To apply this code to the desired pins, set GPIO_PULLCCLK0 = 0X03800000. This hexadecimal number has bits 23, 24, and 25 set to 1 and all the rest set to 0. This means that the pull code is applied to GPIO pins 23, 24, and 25. A short_wait allows time for this to take effect, and then GPIO_PULL and GPIO_PULLCLK0 are set back to 0. Back in the main routine, a loop is entered in which the button states are read (using macro GPIO_IN0), grabbing bits 23, 24, and 25 using a shift and mask logical operations, and, if the button state is different from before, it is printed out in binary: up (high) is printed as ‘1’ and down (low) is printed as ‘0’. This loop executes until a sufficient number of button state changes have occurred. After the loop, unpull_pins is called, which undoes the pull-up on the pins, then call restore_io in gb_common.c to clean up. Testing the LEDs The test program for the LEDs is called leds. To set up the Gertboard to run this test, see the wiring diagram below. Every I/O port is connected up as an output, so all the ‘out’ jumpers (those above the buffer chips) are installed. Straps are used to connect the following (where all the ‘GP’ pins are in header J2 and all the ‘B’ pins are in header J3): GP25 to B1, GP24 to B2, GP23 to B3, GP22 to B4, GP21 to B5, GP18 to B6, GP17 to B7, GP11 to B8, GP10 to B9, GP9 to B10, GP8 to B11, and GP7 to B12. In other words, the leftmost 12 ‘GP’ pins are connected to the ‘B’ pins, except that GP14 and GP15 are missed out: they are already set to UART mode by Linux, so it’s best if they are not touched. If there aren’t enough jumpers or straps to wire these connections all up at once, don’t worry. Just wire up as many as possible, and run the test. Once it’s finished the straps/jumpers can be moved and the test can be run again. Nothing bad will happen if a pin is written to that has nothing connected to it. 17 Fig. 13: The wiring diagram necessary to run the Gertboard LED test program, leds The test code in leds.c first calls setup_io to get everything ready. Then setup_gpio is called, which prepares 12 GPIO pins to be used as outputs (as all 12 I/O ports will require controlling). All of the GPIO signals except GPIO 0, 1, 4, 14, and 15 are used. To set them up for output, first call INP_GPIO(n) (where n is the GPIO pin number) for each of the 12 pins to activate them. This also sets them up for input, so then call OUT_GPIO(n) afterwards for each of the 12 pins to put them in output mode. LEDs are switched on using the macro GPIO_SET0: the value assigned to GPIO_SET0 will set GPIO pin n to high if bit n is set in that value. When a GPIO pin is set high, the I/O port connected to that pin goes high, and the LED for that port turns on. Thus, the line of code “GPIO_SET0 = 0x180;” will set GPIO pins 7 and 8 high (since bits 7 and 8 are set in the hexadecimal number 0x180). Given the wiring setup above, ports 11 and 12 will go high (because these are the ports connected to GP7 and GP8), and thus the rightmost two LEDs will turn on. To turn LEDs off, use macro GPIO_CLR0. This works in a similar way to GPIO_SET0, but here the bits that are high in the value assigned to GPIO_CLR0 specify which GPIO ports will be set low (and hence which ports will be set low, and which LEDs will turn off). So for example, given the wiring above, the command “GPIO_CLR0 = 0x100;” will set GPIO8 pin low, and thus turn off the LED for port 11, which is the port connected to GP8. (In leds.c the LEDs are always all turned off together, but they don’t have to be used this way.) The test program flashes the LEDs in three patterns. The patterns are specified by a collection of global arrays given values using an initializer. The number in each of the arrays says which LEDs will 18 be turned on at that point in the pattern – so, pattern value is submitted sequentially to produce the changing pattern, switching all the LEDs off between successive pattern values. Each pattern is run through twice. The first pattern lights the LEDs one at a time in sequence, left to right. The second pattern does the same but when it reaches the rightmost LED, it then reverses direction and lights them in sequence right to left. The third pattern starts at the left end and at each step switches on one more LED until they are all lit up, then starting at the left it switches them off one by one until they are all off. Finally, the test program switches off all the LEDs and then finally calls restore_io to clean up all the LEDs to a predictable final state. Testing I/O Our two examples so far have only used the ports to access the pushbuttons and LEDs. The next example, called butled (for BUTton LED) will show one of the ports serving just as an input port. The idea is that one port (along with its button) is used to generate a signal, and software then sends that signal to another port which it is used as just an input. We read both ports in and print them on the screen. Fig. 14: The wiring diagram for test program butled which detects a button press, and then display that button state on the screen. This is to test all the I/O on the Gertboard. The wiring for this test is shown above. Pin GPIO23 controls I/O port 3, and GPIO22 controls I/O port 6, so GP23 in header J2 is connected to pin B3 in header J3, and GP22 is connected to B6. Now, for the interesting part. The pushbutton on port 3 is going to be used here, but the LED for port 3 should not be used, so therefore the output jumper for port 3 is not installed (which would be placed at U3-out-B3). 19 Looking at the schematic on page A-2, it is clear that the output buffer for port 3 goes to pin 14 of buffer chip U3. This is connected to the U3-out-B3 header pin just above pin 14 on the chip (it is pin 1 of U3-out-B3; this is clear from the schematic and from the fact that this pin has a square pad on the bare circuit board), so that pin is connected to the BUF6 pin at the top of the board. This allows the switch to generate a signal which is then sent to port 6. A jumper is installed across U4-in-B6 to allow that signal to be input from the board. The value of the switch from port 3 is also read in, and these two should be the same (most of the time). In butled.c we use INP_GPIO to set GPIO22 and GPIO23 to input and GPIO_PULL and GPIO_PULLCLK0 to set the pull-up on GPIO23. This is described in more detail on page 16, in the buttons test. Then the GPIO values are repeatedly read in, and the binary values of GPIO22 and GPIO23 are printed out, if they have changed since the last cycle. So if ‘01’ is displayed on the monitor, it can be deduced that GPIO23 is low and GPIO22 is high. (Note that the LED for port 6, labelled D6, should be off when switch 3 is pressed and on when switch 3 is up.) Now, if the values for GPIO22 and GPIO23 are always the same, ‘00’ and ‘11’ will only ever be printed out. But if the test is started with button 3 up (so ‘11’ is displayed), and then the button is pushed down, occasionally ‘01’ might be seen, followed very quickly by ‘00’. The reason for this differs between the Python and C implementations. In the C version, both values are read at the same time, and the signal from the push button (which is connected to GPIO23) takes a small amount of time to propagate through the buffers to get to GPIO22. It may even be possible to get one reading in after GPIO23 has changed, but insufficient time has passed for GPIO22 to change state and follow it! In the Python code, the read of GPIO22 occurs before the read of GPIO23 (the button). Thus if the button is pressed or released between these two reads, the new value will be read in for the button (GPIO23), but the new value of the other input (GPIO22) won’t change until the next time through the while loop. Open Collector Driver The Gertboard uses six ports of a ULN2803a to provide open collector drivers. These are used to turn off and on devices, especially those that need a different voltage or higher current than that available on the Gertboard and are powered by an external power supply. The ULN2803a can withstand up to 50V and drive 500mA on each of its ports. Each driver has an integrated protection diode (the uppermost diode in the circuit diagram below). Raspi OUT common Fig. 15: Circuit diagram of each open collector driver. 20 The ‘common’ pin is, as the name states, common for all open collector drivers. It is not connected to any other point on the Gertboard. As with all devices the control for the open collector drivers (the ‘Raspi’ point) can also be connected to the ATmega controller to, for example, drive relays or motors. The open collector drivers are in the schematics on page A-3. On the Gertboard building block diagram on page 7, the area containing the components for the open collector drivers are outlined in yellow. The pins corresponding to ‘Raspi’ in the diagram above are RLY1 to RLY6 pins in the J4 header; the pins corresponding to ‘common’ are the ones marked RPWR in the headers on the right edge of the board; and the pins corresponding to ‘OUT’ are the RLY1 to RLY6 pins in the headers J12 to J17. How these are then used is demonstrated by the test wiring and code examples. Testing the open collector drivers The program ocol (for open collector) allows the functional testing of the open collector drivers. A simple mechanism was required to switch the driver on and off, so we created a little circuit (see diagram below) consisting of two large LEDs and a resistor in series. Once connected, the forward voltage across each of these LEDs is a little above 3V, so we used a 9V battery as a power supply, and calculated a series resistance of around about 90 to set a suitable current flow through the LEDs. Since this small test circuit will not be used again, it can simply be hand soldered together off-board. Remember that LEDs are diodes, and have to be connected the right way round. The small ‘flat’ in the LED moulding denotes the ‘cathode’ or negative pin. If you think of the LED symbol in the circuit diagram below as an arrow, it is pointing in the direction of the current flow, from + to -, or from anode to cathode. To turn the circuit off and on using the open collector driver (say you want to use driver 1), first check that it works with the power supply described above. Then, leave the positive side of your circuit attached to the positive terminal of the power supply, but in addition connect it to one of the RPWR pins in the headers on the right edge of the board (they are all connected together). Disconnect the ground side of the circuit from the power supply and connect it instead to RLY1 in header J12 on the right of the board. Attach the ground terminal of the power supply to any GND or ⊥ pin on the board. Now, we need a signal to control the driver. For the ocol test we are using GPIO4 to control the open collector (you could of course use any logic signal), so connect GP4 in header J2 to RLY1 in J4. (To test a different driver, say n, with the ocol test, connect the ground side of the circuit up to RLYn in the headers on the right of the board and connect GP4 in header J2 to RLYn in J4.) Now, when RLY1 in J4 is set low, the circuit doesn’t receive any power and thus is off. When RLY1 in J4 goes high, the open collector driver uses transistors to connect the ‘ground’ side of the circuit to the ground on the board, and since this is connected to the ground terminal on the power supply, the power supply ends up powering the circuit: it is just turned off and on by the open collector driver. 21 Fig.16: Wiring diagram showing how to connect Gertboard to test the open collector drivers. It also shows the small test power supply made up of two LEDs in series, a 90  resistor and a 9V battery. You may wonder why you need to connect the positive terminal of the power supply to the open collector driver (via the RPWR pin). The reason for this is that if the circuit happens to contain an component that has electrical inductance, for example a motor or a relay, when the power is turned off this inductance causes the voltage on RLYn pin to quickly rise to a higher voltage than the positive terminal of the power supply, dropping quickly afterwards. The chip itself has an internal diode connecting the RLYn pin to the RPWR. This allows current to flow to the top (positive side) of your circuit, allowing the energy to dissipate, and preventing damage. The ocol test is very simple. First, it prints out the connections required on the board (and with your external circuit and power supply), and then it calls setup_io to get the GPIO interface ready to use and setup_gpio to set pin GPIO4 to be used as an output (using the commands INP_GPIO(4); OUT_GPIO(4); as described on page 11). Then in it uses GPIO_SET0 and GPIO_CLR0 (described on page 17) to set GPIO4 high then low 10 times. Note: the test asks which driver should be tested, but it only uses this information to print out the connections that need to be made. Otherwise it ignores your response. 22 Motor Controller The Gertboard has a position for a L6203 (Miniwatt package) motor controller. The motor controller is for brushed DC motors. The controller has two input pins, A and B (labelled MOTA and MOTB on the board). The pins can be driven high or low, and the motor responds according to the table below. The speed of the motor can be controlled by applying a pulse-width-modulated (PWM) signal to either the A or B pin. A B Motor action 0 0 no movement 0 1 rotate one way 1 0 rotate opposite way from above 1 1 no movement Table 3: Truth table showing the behaviour of the motor controller under different logic combinations. The motor controller IC has internal temperature protection. Current protection is provided by a fuse on the Gertboard. The motor controller is in the schematics on page A-4. On the Gertboard building block diagram on page 7, the area containing the components for the motor controller are outlined in purple. The motor controller and screw terminals are near the top of the board, and there are two pins for the control signals in a small header just above GP4 and GP1 in header J2. The MOTA and MOTB pins just above header J2 are the inputs to the motor controller – these are digital signals (low and high). The screw terminals at the top of the board labelled MOTA and MOTB are the outputs of the motor controller: they actually provide the power to the motor. The motor will probably need more power (a higher voltage or current) than that provided by the Gertboard. The screw terminals at the top labelled MOT+ and ⊥ allow the connection of an external power supply to provide this: the motor controller directs this power to the MOTA and MOTB screw terminals, modulating it according to the MOTA and MOTB inputs near J2. If you just want to turn the motor off and on, in either direction, this is achieved by simply choosing two of the GPIO pins and installing straps between them to the MOTA and MOTB motor controller inputs. Then, to control the motor, the pins are set high or low per the table 3 above. To control the speed of the motor however, pulse width modulation (PWM) is required. This is a device that outputs a square wave that flips back and forth from on to off very rapidly, as in the diagram below: Fig. 17: An example of a PWM output. In this example the output is neither on nor off all the time. In fact, here it is on for 50% of the time, and is therefore said to have a duty cycle of 50%. 0 1 23 With a PWM, you can control the amount of time the output is high vs. when it is low. This is called the duty cycle and is expressed as a percentage. The diagram above shows a 50% duty cycle; the one below is 25%. Fig. 18: In this PWM example, the duty cycle is 25%. There is a PWM in the BCM2835 (the Raspberry Pi processor), and it’s output can be accessed via GPIO18 (it is alternate function 5). If this is connected to one of the motor controller inputs (MOTA has been used in our motor test), and set the other motor controller input (MOTB in our test) to a steady high or low, the speed and direction of the motor can be controlled. Fig. 19: The motor direction is set by MOTB. Whilst MOTA has a duty cycle of 25%, the motor only receives power when MOTA and MOTB are different, thus it receives power for 75% of the time. For example, in the diagram above we are alternating between A low/B high and A high/B high (the second and fourth lines of the table above). When A is low, the motor will receive power making it turn one way; when A is high it will not receive power. The end result for the 25% duty cycle shown here is that the motor will turn one way at roughly ¾ speed. Fig. 20: In this example, the truth table predicts that the motor will run in the opposite direction at around 25% speed. If on the other hand you set MOTB low, as in the diagram above, then when A is high the motor will receive power making it turn in the other direction, and when A is low the motor will not receive power. The result for the 25% duty cycle is that it will turn in the other direction at about ¼ speed. Testing the motor controller The PWM is controlled by a memory map, like the GPIO and SPI bus. This memory map is part of the setup_io function in gb_common.c, so that is whether the PWM is used or not. Further setup code is found in, gb_pwm.c, with an associated header file gb_pwm.h. The function setup_pwm in gb_pwm.c sets the speed of the PWM clock, and sets the maximum value of the PWM to 1024: this is the value at which the duty cycle of the PWM will be 100%. It also makes sure that the PWM is off. The two routines set_pwm0 and force_pwm0 set the value that controls the duty cycle for the PWM. set_pwm0 sets the value (first checking that it is between 0 and 1024), but as there are only certain points in the PWM cycle where a new value is picked up, if a second value is written again quickly the first will have no effect. The force_pwm0 routine takes two arguments, a new value and a new mode. It disables the PWM, then sets the value, then re-enables it with the given mode setting, 0 1 0 1 0 1 MOTA MOTB 0 1 0 1 MOTA MOTB 24 with delays in strategic places to allow the new values to be picked up. The pwm_off routine simply disables the PWM. The test program for the motor controller is called motor. To set up Gertboard for this, connect GP17 in J2 to the MOTB pin (the MOTB pin in the 2-pin header above GP1 and GP4, not the one at the top of the board), and GP18 to MOTA in that little header. The motor leads need to be connected to the MOTA and MOTB screw terminals at the top of the board, and the power supply for the motor needs to be connected to the MOT+ and ⊥ screw terminals. This is shown below. Fig. 20: The wiring diagram for the test program motor. The code for the motor program is in motor.c. In the main routine, first the connections that must be made on the board to run this program are printed out, then call setup_io to get the GPIO interface ready for use. setup_gpio is then called to set GPIO18 up for use as the PWM output and GPIO17 up for normal output. For the latter, both INP_GPIO and OUT_GPIO are used, see page 11 for more info. To set up GPIO18, first use INP_GPIO(18) to activate the pin. One of the alternate functions for GPIO18 is to act as the output for the PWM; this is alternative 5. Thus use the macro SET_GPIO_ALT(18, 5) to select this alternate use of the pin. (See table Table 6-31 from the BCM2835 datasheet, or the online version at http://elinux.org/RPi_BCM2835_GPIOs, for more details about alternative functions for the GPIO pins. A summary of the alternate function of GPIO pins used on the Gertboard, see the table on page 9.) 25 We set the output of GPIO17 low (to make sure that the motor doesn’t turn) and then initialize the PWM by calling setup_pwm. We enable the PWM by setting the mode to PWM0_ENABLE using force_pwm0. Since GPIO17 (motor controller B input) is set low, when the duty cycle on the PWM (motor controller A input) is high enough, the motor will turn the ‘opposite way’ as described in the motor table on page 22. A loop now starts where the PWM is started, first with a very low duty cycle (because the value passed to set_pwm0 is low), then gradually increasing this to the maximum (which is set to 0x400 – 1024 – in setup_pwm). Then the value sent to the PWM is decreased to slow the motor down. Then GPIO17 is set high, so that the motor will get power on the low phase of the PWM signal. The PWM is re-enabled with the mode PWM0_ENABLE|PWM0_REVPOLAR. The reverse polarization flag flips the PWM signal, so that a low value sent to the PWM results in a signal that is high most of the time (rather than low most of the time). That way the same code can be used to slowly ramp up the speed of the motor (but in the ‘one way’ direction as in the table on page 22), then slow it down again. Finally the PWM is switched off, and the GPIO interface is closed down. Digital to Analogue and Analogue to Digital Converters In the Gertboard building blocks diagram on page 7, the components implementing the converters are outlined in orange. Both the analogue converter (D/A) and analogue to digital converter (A/D) are 8- pin chips from Microchip. The D/A is U6 (above) and the A/D is U10 (below). Each supports 2 channels. Both use the SPI bus to communicate with the Raspberry Pi. The SPI pins on the two chips are connected to the pins labelled SCLK, MOSI, MISO, CSnA, and CSnB in the header just above J2 on the board (thus in the building blocks diagram, these pins are also outlined in orange). SCLK is the clock, MOSI is the output from the RPi, and MISO is the input to the RPi. CSnA is the chip select for the A/D, and CSnB is the chip select signal for the D/A (the ‘n’ in the signal name means that the signal is ‘negative’, thus the chip is only selected when the pin is low). Both A/D and D/A chips have a 10K pull-up resistor on their chip-select pins, so the devices will not be accessed if the chips select pins are not connected. The SPI pins are conveniently located just above GP7 to GP11 in header J2, because one of the alternate functions of these pins is to drive the SPI signals. For example, the “ALT0” (alternative 0) function of GPIO9 is SPI0_MISO, which is why the pin labelled MISO is just about the pin labelled GP9. Thus to use the A/D and D/A, simply put jumpers connecting pins GP7 to GP11 to the SPI pins directly about them (although technically you only need CSnA for the A/D and CSnB for the D/A). In the schematics, the D/A and A/D converts are on page A-6. Digital to analogue converter The Gertboard uses a MCP48xx digital to analogue converter (D/A) from Microchip. The device comes in three different types: 8, 10 or 12 bits. It is likely that MCP4802, the 8 bit version, will be used, but if higher resolutions are needed, it can be replaced with the MCP4812 (10 bits) or MCP4822 (12 bits). These chips are all pin-compatible and are written to in the same way. In particular, the routine that writes to the D/A assumes that writes are in 12 bits, so it is important that the value is selected appropriately (details are below in the “Testing the D/A and A/D” section). The maximum output voltage of the D/A – the output voltage when you send an input of all 1s – is 2.04V. 26 The analogue outputs of the two channels go to pins labelled DA0 (for channel 0) and DA1 (for channel 1) in the J29 header. Just next to these pins are ground pins (GND) to provide a reference. Analogue to Digital converter The Gertboard uses a MCP3002 10-bit analogue to digital converter from Microchip. It supports 2 channels with a sampling rate of ~72k samples per second (sps). The maximum value (1023) is returned when the input voltage is 3.3V. The analogue inputs for these two channels are AD0 (for channel 0) and AD1 (for channel 1) in the J28 header. Just next to these pins are ground pins (GND) to provide a reference. Testing the D/A and A/D Since the D/A and A/D converters both use the SPI bus, the common SPI bus code has been placed into a separate file, gb_spi.c. There is also an associated header file, gb_spi.h, which contains many macros and constants needed for interacting with the SPI bus, as well as the declarations for the functions in gb_spi.c. These functions are setup_spi, read_adc, and write_dac. setup_spi sets the clock speed for the bus and clears status bits. read_adc takes an argument specifying the channel (should be 0 or 1) and returns an integer with the value read from the A/D converter. The value returned will be between 0 and 1023 (i.e. only the least significant 10 bits are set), with 0 returned when the input pin for that channel is 0V and 1023 returned for 3.3V. The write_dac routine takes two arguments, a channel number (0 or 1) and a value to write. The value written requires some explanation. The MCP48xx family of digital to analogue converters all accept a 12 bit value. The MCP4822 uses all the bits; the MCP4812 ignores the last two; and the MCP4802 (which is probably the one you are using) ignores the last four. Since you could use any of those chips on the Gertboard, write_dac is written in so that it will work with all three, so it simply sends to the D/A the value it was given. If Gertboard is fitted with the MCP4802, it can only handle values between 0 and 255, but these must be in bits 4 through 11 (assuming the least significant bit is bit 0) of the bit string it is sent. Thus if the desired number to be sent to the D/A is between 0 and 255, it must be multiplied by 16 (which effectively shifts the information 4 bits to the left) before sending this value to write_dac. The value on the output pin, Vout, is given by the following formula (assuming the 8-bit MCP4802):  =  256 × 2.048 To test the D/A, a multimeter is required. The test program for this is dtoa. To set up Gertboard for this test, jumpers are placed on the pins GP11, GP10, GP9, and GP7 connecting them to the SPI bus pins above them. Attach the multimeter as follows: the black lead needs to be connected to ground. You can use any of the pins marked with ⊥ or GND for this. The red lead needs to be connected to DA0 (to test the D/A channel 0 which is shown below) or DA1 (for channel 1). Switch the multimeter on, and set it to measure voltages from 0 to around 5V. 27 Fig. 21: The wiring diagram required to measure the output from the D to A converter fitted to the Gertboard whilst running the test program dtoa. The dtoa program first asks which channel to use and prints out the connections needed to make on Gertboard to run the program. Then it calls setup_io to get the GPIO ready to use, then calls setup_gpio to choose which pins to use and how to use them. In setup_gpio, as usual INP_GPIO(n) (where n is the pin number) is used to activate the pins. This also sets them up to be used as inputs. They should however, be used as an SPI bus, which is one of the alternative functions for these pins (it is alternate 0). Thus we use SET_GPIO_ALT(n, a) (where n is the pin number and a is the alternate number, in this case 0) to select this alternate use of the pins. Then the program sends different values to the D/A and asks for real verification, using the multimeter, that the D/A converter is generating the correct output voltage. The test program for the A/D is called atod. To run this test a voltage source on the analogue input is required. This is most easily provided by a potentiometer (a variable resistor). The two ends of the potentiometer are connected, one side to high (3.3V, which you can access from any pin labelled 3V3) and the other to low (GND or ⊥), and the middle (wiper) part to AD0 (for channel 0 as shown below) or AD1 (for channel 1). To use the SPI bus jumpers should be installed on the pins GP11, GP10, GP9, and GP8 connecting them to the SPI bus pins above them. 28 Fig. 22: Wiring diagram showing how the Gertboard is connected to verify that the A/D converter is working properly, using the test program atod. The atod program first asks which channel should be used and prints out the connections required on Gertboard to run the program. Then it calls setup_io to get the GPIO ready, then calls setup_gpio to choose which pins will be used, and how they will be used. The setup_gpio used in atod works the same way as the one in dtoa (except for activating GPIO8 instead of GPIO7). Then atod repeatedly reads the 10 bit value from the A/D converter and prints out the value on the terminal, both as an absolute number and as a bar graph (the value read is divided by 16, and the quotient is represented as a string of ‘#’ characters). One thing to be aware of is that even if the potentiometer is not moved, exactly the same result may not appear on successive reads. With 10 bits of accuracy, it is very sensitive, and even the smallest changes, such as house current running in nearby wires, can affect the value read. Even without a multimeter or a potentiometer, it is still possible to test the A/D and D/A by sending the output of the D/A to the input of the A/D. The test that does this is called dad, for digitalanalogue- digital. To set the Gertboard up for this test, hook up all the SPI bus pins (connecting GP11 though GP7 with jumpers to the pins above them) and put a jumper between pins DA1 and AD0, as in the diagram below. 29 Fig. 23: The wiring diagram for an alternative method of testing the A/D and D/A converters together, without the aid of a multimeter and potentiometer. The dad test sends 17 different digital values to the D/A (0 to 255 in even jumps, then back down to 0). The resulting values are then read in from the A/D. Both the original digital values sent and the values read back are printed out, as is a bar graph representing the value read back (divided by 16 as in atod). The bar graph printed out should be a triangle shape: the lines will start out very short, then get longer and longer as larger digital values are read back, then will get shorter again. ATmega device The Gertboard can hold an Atmel AVR microcontroller, a 28-pin ATmega device, at location U8 on the lower left of the board. This can be any of the following: ATmega48A/PA, 88A/PA, 168A/PA or 328/P in a 28-pin DIP package. The device has a 12MHz ceramic resonator attached to pins 9 and 10. All input/output pins are brought out to header J25 on the left edge of the board. There is a separate 6- pin header (J23 on the left side of the board) that can be used to program the device. The PD0/PD1 pins (ATmega UART TX and RX) are brought out to pins placed adjacent to the Raspberry Pi UART pins so you only need to place two jumpers to connect the two devices. Note that the ATmega device on the Gertboard operates at 3.3Volts. That is in contrast to the ‘Arduino’ system which runs at 5V. It is also the reason why the device does not have a 16MHz clock. In fact at 3V3 the maximum operating frequency according to the specification is just under 12MHz. Warning: many of the Arduino example sketches (programs) mention +5V as part of the circuit. Because we are running at 3.3V, you must use 3.3V instead of 5V wherever the latter is mentioned. If you use 5V you risk damaging the chip. The ATmega device is in the schematics on page A-6. 30 Programming the ATmega Programming the ATmega microcontroller is straightforward once you have all the infrastructure set up, but it requires a fair bit of software to be installed on your Raspberry Pi. We are immensely grateful to Gordon Henderson, of Drogon Systems, for working out what needed to be done and providing the customized software. Using his system, you can use the Arduino IDE (Integrated Development Environment) on the Raspberry Pi to develop and upload code for the ATmega chip on the Gertboard. The Atmel chips most commonly used on the Gertboard are the ATmega168 and ATmega328, so Gordon assumes you have one of these. To use Gordon’s system, first you need to install the Arduino IDE. Then you download a custom version of avrdude, which allows you to program the AVR microcontroller using the SPI bus. (GPIO pins GPIO7 through GPIO11 can be used as a SPI bus.) Then you have to edit various configuration files to fully integrate the Gertboard into the Arduino IDE. Finally, you have to program the ‘fuses’ on the ATmega chip. Happily, Gordon has written some scripts to do all this for you. Full instructions, scripts, and the modified avrdude are available at: https://projects.drogon.net/raspberry-pi/gertboard/ We assume now that you have downloaded and successfully installed and configured the Arduino IDE, as described above, and we proceed from there. To get going with the ATmega chip, start up the Arduino IDE. This should be easy: if the installation of the Arduino package was successful, you will have a new item “Arduino IDE” in your start menu, under “Electronics”. The exact version of the IDE you get with depends on the operating system you are using. The version number is given in the title bar. The Debian squeeze package is version 0018, while the wheezy package is 1.0.1. First you will need to configure the IDE to work with the Gertboard. Go to the Tools > Board menu and choose the Gertboard option with the chip you are using (ATmega168 or ATmega328). For IDE version 1.0.1, you will also have go to the Tools > Programmer menu and choose “Raspberry Pi GPIO”. Arduino pins on the Gertboard All the input and output pins of the ATmega chip are brought out to header J25 on the left edge of the board. They are labelled PCn, PDn, and PBn, where n is a number. These labels correspond to the pinout diagrams of the ATmega168/328 chips. However, in the Arduino world, the pins of the chips are not referred to directly. Instead there is an abstract notion of digital and analogue pin numbers, which is independent of the physical devices. This allows code written for one Arduino board to be easily used with another Arduino board, which may have a chip with a different pinout. Thus, in order to use your Gertboard with the Arduino IDE, you need to know how the Arduino pin number relates to the labels on your Gertboard. The table below shows this correspondence (“GB” means Gertboard). 31 Arduino Pin GB pin Arduino Pin GB pin Arduino Pin GB pin digital 0 PD0 digital 7 PD7 analogue 0, A0 PC0 digital 1 PD1 digital 8 PB0 analogue 1, A1 PC1 digital 2 PD2 digital 9 PB1 analogue 2, A2 PC2 digital 3 PD3 digital 10 PB2 analogue 3, A3 PC3 digital 4 PD4 digital 11 PB3 analogue 4, A4 PC4 digital 5 PD5 digital 12 PB4 analogue 5, A5 PC5 digital 6 PD6 digital 13 PB5 Table 4: The relationship between pins on Arduino and pins on the Gertboard. In both versions of the Arduino IDE, digital pins are referred to in the code with just a number. For example digitalWrite(13, HIGH); will set pin 13 (PB5 on the Gertboard) to logical 1. (In the Arduino world, LOW refers to logical 0, and HIGH refers to logical 1.) The analogue pins are handled slightly differently. In version 0018, analogue pins are referred to simply by number, so whether 0 refers to PD0 (a digital pin) or PC0 (an analogue pin) depends on the context. The command value = digitalRead(0); will cause a read from digital 0 (PD0), and value will be assigned LOW or HIGH, while the command value = analogRead(0); will cause a read from analogue 0 (PC0), and value will be assigned a number between 0 and 1023, as the A/D converters in the ATmega chip return 10 bit values. In version 1.0.1, however, although numbers 0 through 5 still work to specify analogue pins, they are referred to in the examples as A0 to A5, and this seems to be the preferred style now. So to read from analogue pin 0 you would use the command value = analogRead(A0); A few sketches to get you going A good first sketch to try is Blink, which makes an LED turn on and off. With version 0018 of the IDE it’s in the File > Examples > Digital menu; in 1.0.1 it’s in the File > Examples > Basics menu. When you select this, a new window pops up with the Blink code. There are only two functions in the code, setup and loop. These are required for all Arduino programs: setup is executed once at the very beginning, and loop is called repeatedly, as long as the chip has power. Note that you do not need to provide any code to call these functions. 32 The modified avrdude that you downloaded uses the SPI bus to upload the code to the ATmega chip, so you need to connect the GPIO pins used for the SPI bus to the 6-pin header J23, as in the diagram below. Here you are simply connecting the SPI pins in the GPIO to the corresponding SPI pins in the header. The arrangement of the pins in J23 is shown in the schematics, on page A-6. Fig. 23: The wiring diagram for downloading sketches to the ATmega microprocessor. To upload your sketch to the chip in Arduino IDE version 0018, either choose File > Upload to I/O Board option, or click the icon with the right-pointing arrow and the array of dots. With version 1.0.1 choose File > Upload Using Programmer. It will take a bit of time to compile and upload, and then your sketch is running. But nothing is happening! On most Arduino boards, pin 13 (the digital pin used by this sketch) has an LED attached to it, but not the Gertboard. You have to wire up the LED yourself. Looking at the table above, we see that digital pin 13 is labelled PB5 on the Gertboard, so you need to connect PB5 to one of the I/O ports. Looking back to the port diagram on page Error! Bookmark not defined., we need to connect it to the point labelled ‘I/O’ on that diagram. Recall that the pins corresponding to these points are BUF1 to BUF12 in the (unlabeled) single row header at the top of the Gertboard. So if you connect PB5 to BUF1, as below, the first LED will start to blink. 33 Fig. 24: Wiring diagram for the sketch Blink. Note that in this diagram we have not shown the connections to the SPI pins. Once you have uploaded the code, you no longer need them and can remove the straps. On the other hand, if you want you can leave them in place, and this is a good idea if you are planning on uploading some other sketches later. Let’s look at another fairly simple sketch called Button, located under File > Examples > Digital menu in both 0018 and 1.0.1. The comments at the beginning of the sketch read The circuit: * LED attached from pin 13 to ground * pushbutton attached to pin 2 from +5V * 10K resistor attached to pin 2 from ground Assuming that you have Blink working, your LED is already wired up, but what about the button? As mentioned above, since the ATmega chip on the Gertboard runs at 3.3V, we must replace the 5V with 3.3V. So they suggest using a circuit like the one below, where the value read at pin 2 is logical 0 if the button is not pressed (due to the 10K pull-down resistor) and logical 1 if the button is pressed. Fig. 25: Suggested switch circuit for use with Button sketch. However, the buttons on the Gertboard are used like this: 34 Fig. 26: Circuit actually in use on the Gertboard, showing an additional 1k resistor to protect the input to BCM2835. The 1K resistor between the pushbutton and the ‘Raspi’ point is to protect the BCM2835 (the processor on the Raspberry Pi) if you accidentally set the GPIO pin connected to ‘Raspi’ to output instead of input. The circuit to the right of the ‘Raspi’ point happens on the Raspberry Pi: to use the push button we set a pull-up (shown as a resistor in the circuit above) on the pin so that the value read is logical 1 when the button is not pressed (see page 16). The Gertboard buttons are connected directly to ground so they cannot be made to read logic 1 when pressed. If you are want to use a Gertboard button with an Arduino sketch that assumes that the button reads 1 when pressed, the best approach is to modify the sketch, if needed, so that it will invert the value it reads from the button. For the pull-up, we can take advantage of the pull-ups in the ATmega chip. To do this, find the lines below in the sketch // initialize the pushbutton pin as an input: pinMode(buttonPin, INPUT); and insert the following two lines after them: // set pullup on pushbutton pin digitalWrite(buttonPin, HIGH); To invert the value read from the button, find the line below: buttonSate = digitalRead(buttonPin); and insert a ! (the negation operator in C) as follows: buttonSate = !digitalRead(buttonPin); Now upload this modified sketch, as described for Blink. We still need to attach Arduino digial pin 2 (PD2 on the Gertboard, as you can see from the table) to a button, say button 3.The ‘Raspi’ pin in the circuit diagram above, which is where we want to read the value, is in the J3 header. 35 Fig. 27: Wiring diagram showing the additional strap necessary for button operation for the sketch Button. When you have done this, the first LED will be on when the third button is pressed, and off when the third button is up. Now let’s try using an analogue pin. Find the AnalogInput sketch under File > Examples > Analog (in both versions 0018 and 1.0.1). This reads in a value from analogue input 0 (which has already been converted by the internal A/D to a value between 0 and 1023), then uses that number as a delay between turning an LED on and off. Thus, the lower the voltage on the analogue pin, the faster the LED flashes. To run this example, you’ll need a potentiometer. The one used to test the A/D will work fine here. The comments for AnalogInput say to connect the potentiometer so that the wiper is on analogue pin 0 (PC0 on the Gertboard) and the outer pins are connected to +5V and ground. As above, you must use 3.3V instead of 5V as we’re running the chip at 3.3V here. The diagram below shows how to connect up the Gertboard to make this sketch work after it is uploaded. 36 Fig. 28: Wiring diagram for the AnalogInput sketch. Minicom Some of the Arduino sketches involve reading or writing data via the serial port, or UART. An example is AnalogInSerial under File > Examples > Analog for version 0018. In version 1.0.1, this same example has been renamed AnalogReadSerial and is under File > Examples > Basics. This sketch sets the baud rate to 9600, then repeatedly reads in a value from analogue pin 0 and prints this value to the serial port (also called UART). The value read in is between 0 and 1023; 0 means that the input pin is at 0V and 1023 means that it is at the supply voltage (3.3V for the Gertboard). To set up your Gertboard for this sketch, you need the potentiometer attached to analogue input 0 as described above. In addition you need to connect the ATmega chip’s UART pins to the Raspberry Pi. Digital pin 0 (PD0 on the Gertboard) is RX (receive), and digital pin 1 (PD1 on the Gertboard) is TX (transmit). These signals are also brought out to the pins labelled MCTX and MCRX just above the GP15 and GP14 pins in header J2 on the Gertboard. Thus you can use two jumpers to attach the ATmega’s TX to GP15 and RX to GP14, as shown below. 37 Fig. 29: Wiring diagram for the sketch AnalogInSerial/AnalogReadSerial. GPIO14 and GPIO15 are the pins that the Raspberry Pi uses for the UART serial port. If you refer back to the table of alternate functions on page 9, you will see that GPIO14 is listed as TX and GPIO15 as RX. This is not a mistake! This swapping is necessary: the data that is transmitted by the ATmega is received by the Raspberry Pi, and vice versa. Now, how to we get the Raspberry Pi to read and show us the data that the ATmega is sending out on the serial port? There is a button labelled Serial Monitor on the toolbar of the Arduino IDE, but it doesn’t work on the Raspberry Pi. It assumes that you are talking to an Arduino board over USB, not talking to a Gertboard over GPIO. The easiest way to retrieve this data is to use the minicom program. You can install this easily by typing into a terminal this command: sudo apt-get install minicom You can use menus to configure minicom (by typing minicom –s). Alternatively, included with the Gertboard software is a file minirc.ama0 with the settings you need to read from the GPIO UART pins at 9600 baud. Copy this file (which was provided by Gordon Henderson) to /etc/minicom/ (you’ll probably need to sudo this) and invoke minicom by typing sudo minicom ama0 Now if you upload the sketch to the ATmega chip, you should see the value from the potentiometer displayed in your minicom monitor. These examples have only just scratched the surface of the wonderful world of Arduino. Check out http://arduino.cc/en/Tutorial/HomePage for much, much more. 38 Combined Tests This section shows some examples of using more than one building block at a time. A/D and motor controller In the potmot (for potentiometer-motor) test we use a potentiometer (“pot”) connected to the analogue to digital converter (A/D) to get an input value, and this value is used to control the speed and direction of the motor. It is set up so that at one extreme, the motor is going at top speed, and as you move the wiper towards the middle it slows, at the middle the motor stops, and as you continue to move the wiper along, the motor speeds up again but in the other direction. The main routine for this is in potmot.c. Functions from gb_spi.c and gb_pwm.c are used to control the SPI bus (for reading the A/D) and the pulse width modulator (for controlling the speed of the motor). To wire up the Gertboard for this example, you combine the wiring for the A/D and motor tests. Jumpers connect GP8 to GP11 to the pins directly above them to allow us to control the SPI bus using GPIO8 to GPIO11. You must attach your potentiometer to the AD0 input. GPIO17 controls the motor B input and GPIO18 controls the motor A input using the pulse width modulator (PWM). Thus GP17 must be connected via a strap to MOTB, and GP18 must be connected to MOTA. The motor and its power source must be connected to the screw terminals in J19 at the top of the board. See the wiring diagram below. Fig. 30: Wiring diagram for the combined potmot test. + - your power source goes here M 1 2 3 39 In the main routine for potmot, first we print to the terminal the connections that need to be made on the Gertboard to run this example, then we call setup_io to set up the GPIO ready for use. Then we call setup_gpio to set the GPIO pins the way we want them. In this, we set up GPIO8 to GPIO11 to use the SPI bus using INP_GPIO and SET_GPIO_ALT as described in the section on A/D and D/A converters (page 27). GPIO17 is set up as an output (using INP_GPIO and OUT_GPIO), and GPIO18 is set up as a PWM using as INP_GPIO and SET_GPIO_ALT as described in the section on the motor controller (page 24). Back in main, we call setup_spi and setup_pwm to get the SPI bus and PWM ready for use and get the motor ready to go. Then we repeatedly read the A/D and set the direction and speed of the motor depending on the value we read. Lower A/D values (up to 511 – recall that the A/D chip used returns a 10 bit value so the maximum will be 1023) result in the motor B input being set high, and thus the motor goes in the “rotate one way” as in the motor controller table on page 22. Confusingly, this motor direction is called “backwards” in the comments of the program! Higher A/D values (512 to 1023) result in the motor B input being set low, and the motor goes in the “rotate opposite way” direction. This is called “forwards” in the comments of the program. Simple arithmetic is used to translate A/D values near 511 to slow motor speeds and A/D values near the endpoints of the range (0 and 1023) to fast motor speeds by varying the value sent to the PWM. Decoder The decoder implemented by the decoder program takes the three pushbuttons as input and turns on one of 8 LEDs to indicate the number with the binary encoding given by the state of the buttons. Switch S1 gives the most significant bit of the number, S2 the middle bit, and S3 the least significant bit. For output, the LED D5 represents the number 0, D6 represents 1, and so on, so D12 represents 7. Recall that the pushbuttons are high (1) when up and low (0) when pushed, so LED D12 is lit up when no buttons are pressed (giving binary 111 or 7), D6 is lit up when S1 and S2 are pressed (giving binary 001), etc. There is quite a bit of wiring for this one, as we are using all but one of the I/O ports.GPIO25 to GPIO23 are reading the pushbuttons, so you need to connect GP25 to B1, GP24 to B2, and GP23 to B3. The 8 lowest-numbered GPIO pins are used with I/O ports 5 to 12, so you need to connect GP11 to B5, GP10 to B6, GP9 to B7, GP8 to B8, GP7 to B9, GP4 to B10, GP1to B11, and GP0 to B12. In addition, since we are using I/O ports 5 to 12 for output, you need to install all the out jumpers for buffer chips U4 and U5 (recall that the out jumpers are those above the chips). 40 Fig. 31: Wiring diagram for the decoder test. In the main routine for decoder, as always we start out by printing out to the terminal the connections that need to be made on the Gertboard. Then we call setup_io to set up the GPIO ready for use. Then we call setup_gpio to set GPIO25 to 23 for use with the pushbuttons (by selecting them for input and enabling a pull-up, as described on page 16) and to set GPIO11 to GP7, GPIO4, GPIO1, and GPIO0 up as outputs (as described on page 11). Then we enter a loop where we read the state of the pushbuttons and light up the LED corresponding to this number (after turning off the LED previously set). We turn the LEDs on and off using GPIO_SET0 and GPIO_CLR0 as described on page 17. For More Information For further information, the datasheet for the processor can be found here: http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Appendix A: Schematics We have included the schematics for the Gertboard in the pages that follow. They are numbered A-1, A-2, etc. The page number is located in the lower left hand of each page. 5 5 4 4 3 3 2 2 1 1 D D C C B B A A in gnd out Front 1 2 3 TO220 Not used. Do not install! Do not use LDxxx series. They have a different pin-out! GPIO9 GPIO22 GPIO21 GPIO1 GPIO11 GPIO17 GPIO4 GPIO10 GPIO14 GPIO15 GPIO18 GPIO23 GPIO24 GPIO25 GPIO8 GPIO7 GPIO0 GPIO0 GPIO1 GPIO4 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO14 GPIO15 GPIO17 GPIO18 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 3V3_RASP 5V_RASP 3V3_RASP 3V3 5V_RASP 3V3 3V3 MOTOR_A MOTOR_B BUF_1 BUF_2 BUF_4 BUF_3 BUF_6 BUF_7 BUF_8 BUF_5 RELAY_1 RELAY_2 RELAY_3 RELAY_4 BUF_9 BUF_12 BUF_10 BUF_11 RELAY_5 RELAY_6 SCLK MOSI MISO CSnA CSnB MC_TX MC_RX Title Size Document Number Rev Date: Sheet of - 3 Gertboard A4 1 6 R1 10K-0805 J4 CON6 1 2 3 4 5 6 J2 CON17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 D20 ~1.5A MH1 HOLE_M3 J5 CON2 1 2 C6 100nF-0805 MH2 HOLE_M3 C3 100nF-0805 R2 10K-0805 U2 REG78xx In 1 Gnd 2 Out 3 J64 CON2 1 2 J11 HEADER 5 1 2 3 4 5 J3 CON12 1 2 3 4 5 6 7 8 9 10 11 12 U1 REG3v3 In 1 Gnd 2 Out 3 C2 100nF-0805 + C5 10uF-1206 J7 CON3 1 2 3 MH4 HOLE_M3 J9 CON3 1 2 3 J1 CON26A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 + C1 10uF-1206 + C4 100uF-CX02-C MH3 HOLE_M3 C7 100nF-0805 J8 CON3 1 2 3 J24 CON2 1 2 A-1 5 5 4 4 3 3 2 2 1 1 D D C C B B A A BUF1 BUF2 BUF6 BUF5 BUF10 BUF9 BUF3 BUF4 BUF8 BUF11 BUF12 BUF2 BUF12 BUF1 BUF6 BUF5 BUF11 BUF7 BUF4 BUF9 BUF3 BUF8 BUF10 BUF7 3V3 3V3 3V3 3V3 BUF_1 BUF_3 BUF_4 BUF_8 BUF_5 BUF_6 BUF_7 BUF_12 BUF_9 BUF_10 BUF_11 BUF_2 BUF_3 BUF_2 BUF_1 Title Size Document Number Rev Date: Sheet of - 3 Gertboard A4 2 6 P4 CON2 1 2 P11 CON2 1 2 U4 74xx244 20 1 19 2 4 6 8 18 14 16 12 9 7 5 3 10 11 13 15 17 RN7B 1k 4 3 P23 CON2 1 2 RN5B 1k-10k 4 3 P1 CON2 1 2 D10 LED P12 CON2 1 2 P3 CON2 1 2 D12 LED D6 LED D8 LED S3 Switch 1 2 3 4 S1 Switch 1 2 3 4 P8 CON2 1 2 RN2 1K_RESN4X1 1 2 3 4 5 D1 LED RN4C 1k-10k 6 5 P13 CON2 1 2 D9 LED RN7A 1k 2 1 C9 100n-0805 RN5A 1k-10k 2 1 D5 LED P17 CON2 1 2 P18 CON2 1 2 P15 CON2 1 2 P6 CON2 1 2 P14 CON2 1 2 P24 CON2 1 2 RN5C 1k-10k 6 5 S2 Switch 1 2 3 4 D11 LED RN7D 1k 8 7 D7 LED P2 CON2 1 2 P5 CON2 1 2 RN3 1K_RESN4x1 1 2 3 4 5 RN6D 1k-10k 8 7 RN6B 1k-10k 4 3 P20 CON2 1 2 C10 100n-0805 P9 CON2 1 2 P19 CON2 1 2 RN4A 1k-10k 2 1 D3 LED RN4D 1k-10k 8 7 J10 CON24 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 P10 24 CON2 1 2 RN6A 1k-10k 2 1 U3 74xx244 20 1 19 2 4 6 8 18 14 16 12 9 7 5 3 10 11 13 15 17 D4 LED RN1 1K_RESN4X1 1 2 3 4 5 C8 100n-0805 RN5D 1k-10k 8 7 RN4B 1k-10k 4 3 P7 CON2 1 2 RN6C 1k-10k 6 5 U5 74xx244 20 1 19 2 4 6 8 18 14 16 12 9 7 5 3 10 11 13 15 17 D2 LED P21 CON2 1 2 P22 CON2 1 2 P16 CON2 1 2 RN7C 1k 6 5 A-2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A RELAY_PWR RELAY_6 RELAY_4 RELAY_2 RELAY_1 RELAY_5 RELAY_3 Title Size Document Number Rev Date: Sheet of - 3 Gertboard A4 3 6 J16 CON2 1 2 J13 CON2 1 2 8x U12 ULN2803A I1 1 I2 2 I3 3 I4 4 I5 5 I6 6 I7 7 I8 8 GND 9 Q1 18 Q2 17 Q3 16 Q4 15 Q5 14 Q6 13 Q7 12 Q8 11 COM 10 J12 CON2 1 2 J15 CON2 1 2 J17 CON2 1 2 J14 CON2 1 2 J6 CON2 1 2 A-3 5 5 4 4 3 3 2 2 1 1 D D C C B B A A motor power nets named to make high current MB MP MPC MA MGND 3V3 MOTOR_A MOTOR_B Title Size Document Number Rev Date: Sheet of - 3 Gertboard A4 4 6 C13 22n-0805 J20 CON2 1 2 F1 4A C11 100n-0805 R23 0.1-2512 C12 22n-0805 J19 CON4 1 2 3 4 U7 L6203-MW VREF 9 ENB 11 IN1 5 IN2 7 BOOT1 4 BOOT2 8 OUT1 3 OUT2 1 VSS 2 GND 6 Sense 10 A-4 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Patch area 3V3 3V3 3V3 of - 3 Gertboard A4 5 6 Title Size Document Number Rev Date: Sheet J37 CON2-DNF 1 2 J68 CON3-DNF 1 2 3 J42 CON2-DNF 1 2 J51 CON2-DNF 1 2 J70 CON2-DNF 1 2 J30 CON2-DNF 1 2 J36 CON2-DNF 1 2 J48 CON2-DNF 1 2 J50 CON2-DNF 1 2 J35 CON2-DNF 1 2 J55 CON3-DNF 1 2 3 J43 CON2-DNF 1 2 J32 CON2-DNF 1 2 J60 CON2-DNF 1 2 J62 CON3-DNF 1 2 3 J53 CON2-DNF 1 2 J69 CON3-DNF 1 2 3 J40 CON2-DNF 1 2 J56 CON3-DNF 1 2 3 J57 CON3-DNF 1 2 3 J38 CON2-DNF 1 2 J54 CON2-DNF 1 2 J26 CON2-DNF 1 2 J34 CON2-DNF 1 2 J47 CON2-DNF 1 2 J66 CON3-DNF 1 2 3 J67 CON3-DNF 1 2 3 J45 CON2-DNF 1 2 J41 CON2-DNF 1 2 J59 CON3-DNF 1 2 3 J39 CON2-DNF 1 2 J44 CON2-DNF 1 2 J49 CON2-DNF 1 2 J63 CON3-DNF 1 2 3 J52 CON2-DNF 1 2 J33 CON2-DNF 1 2 J46 CON2-DNF 1 2 J58 CON3-DNF 1 2 3 J27 CON2-DNF 1 2 J65 CON3-DNF 1 2 3 J31 CON2-DNF 1 2 J61 CON2-DNF 1 2 A-5 5 5 4 4 3 3 2 2 1 1 D D C C B B A A AD0 XTAL_IN DA0 DA1 AD1 XTAL_IN PD0 PD1 PD2 PD3 PD4 PC4 PC5 PB1 PB0 PC0 PC1 PC2 RC3 PD6 PD5 PD7 PC6/DBG/RESETn PC1 PC4 PC5 PC0 PC2 RC3 PD0 PD5 PD3 PD6 PD2 PD7 PD4 PD1 PB1 PB0 PC6/DBG/RESETn PD0 PD1 MC_SCK MC_MISO MC_MOSI MC_MOSI PB2 PB2 MC_MOSI MC_MISO MC_SCK MC_SCK MC_MISO 3V3 3V3 3V3 3V3 MISO MOSI MOSI SCLK SCLK MC_RX MC_TX CSnA CSnB Title Size Document Number Rev Date: Sheet of - 3 Gertboard A4 6 6 R4 0_0805 U8 ATmega328P PC6/Reset_n 1 PD0/RXD 2 PD1/TXD 3 PD2/INT0 4 PD4/XCK/T0 6 VCC 7 PB6/XTAL1 9 GND 8 PB7/XTAL2 10 PD5/OC0B/T1 11 PD6/OC0A/AIN0 12 PD7/AIN1 13 PB0/CLK0/ICP1 14 GND 22 AVCC 20 AREF 21 OC1A/PB1 SS_n/OC1B/PB2 15 MOSI/OC2A/PB3 16 MISO/OC2A/PB4 17 SCK/PB5 18 19 ADC0/PC0 ADC1/PC1 23 ADC2/PC2 24 ADC3/PC3 25 ADC4/SDA/PC4 26 ADC5/SCL/PC5 27 28 PD3/INT1/OC2B 5 J25 CONN PCB 20x2 2 4 6 8 10 12 14 16 18 20 24 22 26 28 30 32 34 36 38 40 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 D19 1N4001 J29 CON4A 1 3 2 4 U10 MCP4802 VDD 1 CSn 2 SCK 3 SDI 4 LDACn 5 VOUTB 6 VOUTA 8 VSS 7 J71 HEADER 1 1 J28 CON4A 1 3 2 4 C15 100nF-0805 U6 MCP3002 VDD 8 VSS 4 CH0 2 CH1 3 CSn/SHDN 1 CLK 7 DOUT 6 DIN 5 R24 0_0805 C17 100nF-0805 X1 Cer resonator 1 2 3 C19 100nF-0805 C20 100nF-0805 R34 10K-0805 J23 HEADER 3X2 2 4 6 1 3 5 C16 xxF-1206 A-6 User's Guide SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial This user's guide describes the characteristics, operation, and use of the TMP006EVM evaluation board. It discusses how to set up and configure the software and hardware, and reviews various aspects of the program operation. Throughout this document, the terms evaluation board, evaluation module, and EVM are synonymous with the TMP006EVM. This document also includes an electrical schematic, printed circuit board (PCB) layout drawings, and a parts list for the EVM. Contents 1 Overview ..................................................................................................................... 2 2 TMP006EVM Hardware Setup ............................................................................................ 3 3 TMP006EVM Hardware Overview ........................................................................................ 7 4 TMP006EVM Software Overview ......................................................................................... 8 5 TMP006EVM Software Use .............................................................................................. 11 List of Figures 1 Hardware Included with TMP006EVM Kit ............................................................................... 2 2 TMP006EVM Hardware Setup ............................................................................................ 3 3 TMP006EVM Board Block Diagram ...................................................................................... 4 4 TMP006 Test Board Schematic........................................................................................... 5 5 Typical Hardware Connection ............................................................................................. 7 6 Typical PC Behavior After Connecting TMP006EVM .................................................................. 8 7 TMP006EVM Software Installation Files................................................................................. 8 8 TMP006EVM Software Installation Launch.............................................................................. 9 9 TMP006EVM GUI Software Installation Prompts....................................................................... 9 10 TMP006EVM GUI Software Default Configuration.................................................................... 10 11 Hardware Error Message................................................................................................. 11 12 Read All Registers to Update Temperature............................................................................ 12 13 Make Changes to TMP006 Registers .................................................................................. 13 14 Write Changes to TMP006 Registers................................................................................... 14 15 TMP006EVM GUI Software Registers Tab ............................................................................ 15 16 Read Registers Continuously to Update Graphs...................................................................... 16 17 Enable Transient Correction Algorithm ................................................................................. 17 18 Start Data Logging ........................................................................................................ 18 19 Example .CSV Output File (Formatted and Displayed in Microsoft Excel®) ....................................... 19 List of Tables 1 TMP006EVM Kit Contents................................................................................................. 2 2 TMP006 Test Board Parts List ........................................................................................... 6 3 Signal Definitions for H1 (10-Pin Female Socket) on TMP006EVM Board ......................................... 6 4 Signal Definition for H2 (10-Pin FFC Connector) on TMP006EVM Board .......................................... 7 Excel, Microsoft, Windows are registered trademarks of Microsoft Corporation. SPI is a trademark of Motorola Inc. I2C is a trademark of NXP Semiconductors. All other trademarks are the property of their respective owners. SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 1 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Overview www.ti.com 1 Overview The TMP006 is an infrared thermopile sensor with digital output integrated circuit. This device measures the temperature of an object without making contact, making it ideal for many types of applications. The TMP006EVM is a platform for evaluating the performance of the TMP006 under various conditions. The TMP006EVM consists of two PCBs. One board, the SM-USB-DIG, communicates with the user’s computer, provides power, and sends and receives appropriate digital signals to communicate with the TMP006. The second PCB, the TMP006_Test_Board, contains the TMP006 as well as support and configuration circuitry. This document gives a general overview of the TMP006EVM, and provides a general description of the features and functions to be considered while using this evaluation module. 1.1 TMP006EVM Kit Contents Table 1 summarizes the contents of the TMP006EVM kit. Figure 1 shows all of the included hardware. Contact the Texas Instruments Product Information Center nearest you if any component is missing. It is highly recommended that you also check the TMP006 product folder on the TI web site at www.ti.com to verify that you have the latest versions of the related software. Table 1. TMP006EVM Kit Contents Item Quantity TMP006_Test_Board 1 SM-USB-DIG Board 1 USB Cable 1 CR-ROM with TMP006EVM GUI Software (not shown) 1 Figure 1. Hardware Included with TMP006EVM Kit 2 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Hardware Setup 1.2 Related Documentation from Texas Instruments The following documents provide information regarding Texas Instruments' integrated circuits used in the assembly of the TMP006EVM. This user's guide is available from the TI web site under literature number SBOU109A. Any letter appended to the literature number corresponds to the document revision that is current at the time of the writing of this document. Newer revisions may be available from the TI web site, or call the Texas Instruments' Literature Response Center at (800) 477-8924 or the Product Information Center at (972) 644-5580. When ordering, identify the document by both title and literature number. Related Documentation Document Literature Number TMP006 Product Data Sheet SBOS518 SM-USB-DIG_Platform User Guide SBOU0958 TMP006 Layout and Assembly SBOU108 Guidelines 2 TMP006EVM Hardware Setup Figure 2 shows the system setup for the TMP006EVM. The PC runs graphical user interface (GUI) software that communicates with the SM-USB-DIG over a USB connection. The SM-USB-DIG translates the USB commands from the PC into power, I2C™, SPI™, and general-purpose input/output (GPIO) commands for the TMP006_Test_Board. The TMP006EVM does not require any additional components to operate. Figure 2. TMP006EVM Hardware Setup SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 3 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006 V Supply (Switched +3.3-V Power) DUT I C Interface 2 Serial Interface (SPI) 10-Pin Female SM-USB-DIG Connector DRDY LED Circuitry 10-Pin FFC Cable Connector TMP006EVM Hardware Setup www.ti.com 2.1 Theory of Operation for the TMP006 Test Board A block diagram of the TMP006 test board hardware setup is shown in Figure 3. The TMP006 Test Board contains connections for the power, I2C, SPI, and GPIO signals from the SM-USB-DIG. It also has a connector that allows other boards to be connected to the TMP006 Test Board to assist with calibrating the TMP006. Figure 3. TMP006EVM Board Block Diagram 4 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Hardware Setup Figure 4 shows the complete schematic of the TMP006 Test Board. The ferrite bead and input capacitor, FB1 and C1 respectively, filter the power coming into the TMP006 test board from the SM-USB-DIG. The I2C pull-up resistors, R3 and R4, and the DRDY pull-up, R5, are required for the open-drain outputs to operate correctly. The Q1 and R6 components drive the LED (D1) so current is not provided from the TMP006 that would cause the device to self-heat. Power, I2C, and SPI signals are provided to the calibration header, H2, for use with the TMP006 calibration tools. Figure 4. TMP006 Test Board Schematic SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 5 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006EVM Hardware Setup www.ti.com 2.2 Bill of Materials for the TMP006 Test Board Table 2 lists the bill of materials for the TMP006EVM board. Table 2. TMP006 Test Board Parts List Qty RefDes Value Description Part Number MFR 1 C1 1μF Capacitor, Ceramic 1.0μF 16V X7R 10% 0603 C1608X7R1C105K TDK 1 C2 0.01μF Capacitor, Ceramic 10000pF 25V X7R 10% 0402 C1005X7R1E103K TDK 1 D1 LED Alingap Grn Wht Diff 0603SMD SML-LX0603SUGW- Lumex TR 1 FB1 Ferrite Bead 300Ω .2A 0402 74279272 Wurth 1 H1 Connector, Socket 50-Pl .050 R/A Sngl 851-43-050-20- Mill-Max 001000 1 H2 Connector, FPC/FFC 10-Pos .5mm Horz SMD FH12-10S-0.5SH(55) Hirose 1 Q1 MOSFET P-CH 50V 130mA SC70-3 BSS84W-7-F Diodes Inc 2 R1, R2 0Ω Resistor, 0.0Ω 1/16W 0402 SMD MCR01MZPJ000 Rohm 3 R3, R4, R5 47k Resistor, 47.0kΩ 1/16W 1% 0402 SMD MCR01MZPF4702 Rohm 1 R6 160Ω Resistor, 160Ω 1/16W 1% 0402 SMD MCR01MZPF1600 Rohm 1 U1 Infrared Sensor with Digital Interface TMP006 Texas Instruments 2.3 Signal Definition of H1 (10-Pin Female Socket) Table 3 identifies the signals connected to the H1 connector on the TMP006 Test Board. This summary also identifies the signals that are used with the TMP006EVM along with the respective signal names. Table 3. Signal Definitions for H1 (10-Pin Female Socket) on TMP006EVM Board Used on the TMP006 Test Board Pin No. Signal TMP006EVM? Signal 1 I2C_SCL Yes SCL 2 CTRL/MEAS4 Yes DRDY 3 I2C_SDA1 Yes SDA 4 CTRL/MEAS5 No — 5 SPI_DOUT1 Yes SDO 6 VDUT Yes VCC 7 SPI_CLK Yes SCLK 8 GND Yes GND 9 SPI_CS1 Yes CS 10 SPI_DIN1 Yes SDI 6 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Hardware Overview 2.4 Signal Definition of H2 (10-Pin FFC Connector) Table 4 shows the signals connected to the H2 connector on the TMP006 Test Board. Table 4. Signal Definition for H2 (10-Pin FFC Connector) on TMP006EVM Board Pin No. Signal 1 SCL 2 VCC 3 SDA 4 VCC 5 SDO 6 GND 7 SCLK 8 GND 9 CS 10 SDI 3 TMP006EVM Hardware Overview If not already assembled, the basic hardware setup for the TMP006EVM involves connecting the TMP006 Test Board to the SM-USB-DIG and then connecting the USB cable. This section presents the details of this procedure. 3.1 Electrostatic Discharge Warning CAUTION Many of the components on the TMP006EVM are susceptible to damage by electrostatic discharge (ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation. 3.2 Typical TMP006EVM Hardware Setup Connect the right-angle female socket (H1) on the TMP006 Test Board to the right-angle male header (H2) on the SM-USB-DIG. Take special care to ensure that the two 10-pin sockets directly align with each other. Plug the female USB-A cable to the SM-USB-DIG and then plug the male USB-A cable into the computer. Always connect the two boards together before connecting the USB cable to avoid any issues if the connectors are misaligned. Figure 5. Typical Hardware Connection SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 7 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006EVM Software Overview www.ti.com Figure 6 shows the typical behavior when the SM-USB-DIG is plugged into the USB port of a PC for the first time. Typically, the computer will respond with a Found New Hardware, USB Device pop-up dialog. The pop-up window then typically changes to Found New Hardware, USB Human Interface Device. This pop-up indicates that the device is ready to be used. The SM-USB-DIG uses the human interface device drivers that are part of the Microsoft® Windows® operating system. Figure 6. Typical PC Behavior After Connecting TMP006EVM In some cases, the Windows Add Hardware wizard appears. If this installation prompt occurs, allow the Device Manager to install the human interface drivers by clicking Yes at each request to install the drivers. 4 TMP006EVM Software Overview This section describes the installation and use of the TMP006EVM software. 4.1 Hardware Requirements The TMP006EVM software has been tested on the Microsoft Windows XP operating system (OS) with United States and European regional settings. The software should function correctly on other Windows-based OSs. 4.2 GUI Software Installation The TMP006EVM software is included on the CD that is shipped with the EVM kit. It is also available through the TMP006EVM product folder on the TI web site. To install the software to a computer, insert the disc into an available CD-ROM drive. Navigate to the drive contents and open the TMP006EVM software folder. Locate and launch the TMP006EVM installation file, setup.exe, as shown in Figure 7. It is in the Installer directory. Figure 7. TMP006EVM Software Installation Files 8 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Software Overview The TMP006EVM software installer file then begins the installation process as shown in Figure 8. Figure 8. TMP006EVM Software Installation Launch Follow the prompts as shown in Figure 9 to install the TMP006EVM GUI software. Figure 9. TMP006EVM GUI Software Installation Prompts The TMP006EVM GUI software is now installed. SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 9 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006EVM Software Overview www.ti.com 4.3 Launching the TMP006EVM GUI Software With the TMP006EVM properly connected (see Figure 5), launch the EVM GUI software from the Start menu. It is located in a folder titled, TMP006EVM GUI Installer. The software should launch with a screen similar to that shown in Figure 10. Figure 10. TMP006EVM GUI Software Default Configuration 10 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Software Use If the message shown in Figure 11 appears when the TMP006EVM GUI software is launched, disconnect all components of the TMP006EVM kit, and repeat the hardware assembly instructions in Section 3.2. Figure 11. Hardware Error Message 5 TMP006EVM Software Use This section discusses how to use the TMP006EVM software. The TMP006EVM GUI software has a primary window that is used to configure and read from the TMP006, along with two other windows that are used to access different features of the TMP006. Basic GUI functionality and a description of the tabs are also presented in this section. SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 11 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006EVM Software Use www.ti.com 5.1 Reading from the TMP006 On the primary GUI window (see Figure 10), press the Read All Reg button to read the TMP006 registers and begin collecting temperature measurement data. Figure 12 illustrates this action. Raw temperature and configuration register values can be found in the Registers tab (refer to Section 5.3). Figure 12. Read All Registers to Update Temperature 12 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Software Use 5.2 Writing to the TMP006 To modify the TMP006 configuration register, make any desired changes on the Block Diagram tab and then press the Write All Reg button, as shown in Figure 13. Figure 13. Make Changes to TMP006 Registers SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 13 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006EVM Software Use www.ti.com The Pending changes need to be written LED illuminates when there are changes that have not been written to the TMP006, as shown in Figure 14. Figure 14. Write Changes to TMP006 Registers 14 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Software Use 5.3 Registers Tab In this tab, you can select any row in the Register table by clicking on it with your mouse. When a row is selected, it becomes highlighted in blue in the table. The individual 16 bits in the selected register are displayed below the Register table. Note that each bit has descriptive text above the bit that identifies the function of the bit. You can edit the bit value using the up (↑) or down (↓) arrow to the left of the bit. Any changes on the bit are displayed in the table and in the block diagram. Additionally, any changes in the block diagram are reflected in the table. The Help w Reg button can be pressed to see detailed help about the register that is currently selected. This feature gives detailed information regarding the meaning of each bit. The Registers tab on the TMP006EVM GUI software is illustrated in Figure 15. Figure 15. TMP006EVM GUI Software Registers Tab SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 15 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006EVM Software Use www.ti.com 5.4 Graphing Tab The Graphing tab allows you to graph the temperature sensor results. To start the graphing process, you must press the Read Continuous button. After pressing this button, it turns green and the graph starts to update. Press the Read Continuous button again to turn off this function. Figure 16 shows this process. Figure 16. Read Registers Continuously to Update Graphs 16 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Software Use 5.5 Transient Correction Algorithm The accurate performance of the TMP006EVM is highly dependent on a stable local temperature. Degraded performance can be observed when local temperature transients are introduced into the system, because the infrared (IR) thermopile in the TMP006 is sensitive to conducted and radiated IR energy from below the sensor as well as radiated IR energy that comes from above the sensor. When the TMP006EVM experiences a local temperature transient event, the PCB temperature and the TMP006 die temperature drift apart from each other as a result of the thermal time constant of the TMP006 thermopile. This difference in temperatures causes a heat transfer between the IR sensor and the PCB to occur. Because of the small distance between the PCB and the bottom of the sensor, this heat energy is conducted (as opposed to radiated) through the thin layer of air between the IR sensor and the PCB below it. This conducted heat energy causes an offset in the IR sensor voltage reading, and ultimately leads to unwanted temperature calculation error. The additional error that results from local temperature transient events can be suppressed in the software by using a transient correction algorithm. This algorithm monitors the TMP006 die temperature over a four-second interval and uses the die temperature data to calculate a local temperature slope, as shown in Equation 1. TSLOPE = – (0.3 × TDIE1) – (0.1 × TDIE2) + (0.1 × TDIE3) + (0.3 × TDIE4) (1) The local temperature slope and the known thermal resistance and capacitance of the TMP006 thermopile are then applied to Equation 2 to correct the sensor voltage reading. VOBJ_CORRECTED = VOBJ + TSLOPE × 2.96 × 10–4 (2) The corrected sensor voltage value is then substituted for the raw sensor voltage, and the object temperature is calculated using the normal methods. To enable the transient correction algorithm, simply click the Transient Correction button in the TMP006EVM GUI as shown in Figure 17. When transient correction is first enabled, a delay of four conversions will be observed while the local temperature slope is being calculated. Figure 17. Enable Transient Correction Algorithm SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 17 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated TMP006EVM Software Use www.ti.com 5.6 Logging Data from the TMP006EVM The TMP006EVM software has the ability to save data collected by the TMP006 into a comma-separated value (.CSV) format file. To save data in this format, select Save Temperature Data from the USB Controls drop-down menu. Figure 18 shows the steps required to begin logging temperature data with the TMP006EVM. Figure 18. Start Data Logging 18 TMP006EVM User Guide and Software Tutorial SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com TMP006EVM Software Use Figure 19 displays an example of how the output file can appear after minimal formatting by the user. Figure 19. Example .CSV Output File (Formatted and Displayed in Microsoft Excel®) SBOU109A–May 2011–Revised October 2011 TMP006EVM User Guide and Software Tutorial 19 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Revision History www.ti.com Revision History Changes from Original (May, 2011) to A Revision .......................................................................................................... Page • Updated document to reflect new software functionality ............................................................................ 1 • Revised Figure 2 for improved clarity .................................................................................................. 3 • Updated Figure 4 to reflect unpopulated connector H2 ............................................................................. 5 • Changed Figure 5 to reflect new SM-USB-DIG casing .............................................................................. 7 • Corrected typos and updated Figure 10 through Figure 16 to reflect new software functionality ............................. 8 • Added Transient Correction Algorithm section ...................................................................................... 17 • Updated Figure 18 to reflect new software functionality ........................................................................... 18 • Revised Figure 19 for improved clarity ............................................................................................... 19 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 20 Revision History SBOU109A–May 2011–Revised October 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. 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DS51589A Explorer 16 Development Board User’s Guide DS51589A-page ii © 2005 Microchip Technology Inc. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page iii Table of Contents Preface ........................................................................................................................... 1 Chapter 1. Introducing the Explorer 16 Development Board 1.1 Introduction ..................................................................................................... 7 1.2 Highlights ........................................................................................................ 7 1.3 What’s in the Kit ............................................................................................. 7 1.4 Explorer 16 Development Board Functionality and Features ......................... 8 1.5 Using the Explorer 16 Out of the Box ............................................................. 9 1.6 Explorer 16 Development Board Demonstration Programs ......................... 10 1.7 Reference Documents .................................................................................. 10 Chapter 2. Explorer 16 Programming Tutorial 2.1 Introduction ................................................................................................... 11 2.2 Highlights ...................................................................................................... 11 2.3 Tutorial Overview ......................................................................................... 11 2.4 Creating the Project ...................................................................................... 12 2.5 Building The Code ........................................................................................ 16 2.6 Programming the Device .............................................................................. 19 Chapter 3. Explorer 16 Tutorial Programs 3.1 Introduction ................................................................................................... 23 3.2 PIC24 Tutorial Program Operation ............................................................... 23 3.3 dsPIC33F Tutorial Program Operation ......................................................... 25 Chapter 4. Explorer 16 Development Hardware 4.1 Introduction .................................................................................................. 27 4.2 Hardware Features ....................................................................................... 27 Appendix A. Explorer 16 Development Board Schematics A.1 Introduction .................................................................................................. 33 A.2 Development Board Block Diagram ............................................................. 33 A.3 Development Board Schematics .................................................................. 34 Appendix B. Updating the USB Connectivity Firmware B.1 Introduction .................................................................................................. 43 B.2 Updating the PICkit 2 Microcontroller Programmer ..................................... 43 B.3 Other USB Firmware Updates ..................................................................... 44 Index ............................................................................................................................. 45 Worldwide Sales and Service .................................................................................... 46 Explorer 16 Development Board User’s Guide DS51589A-page iv © 2005 Microchip Technology Inc. NOTES: EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 1 Preface INTRODUCTION This chapter contains general information that will be useful to know before using the Explorer 16 Development Board. Items discussed in this chapter include: • Document Layout • Conventions Used in this Guide • Warranty Registration • Recommended Reading • The Microchip Web Site • Development Systems Customer Change Notification Service • Customer Support • Document Revision History DOCUMENT LAYOUT This document describes how to use the Explorer 16 Development Board as a development tool to emulate and debug firmware on a target board. The manual layout is as follows: • Chapter 1. “Introducing the Explorer 16 Development Board” provides a brief overview of the Explorer 16 Development Board, its features and its uses. • Chapter 2. “Explorer 16 Programming Tutorial” provides step-by-step instructions for using MBLAB® IDE to create a project and program the Explorer 16 board. • Chapter 3. “Explorer 16 Tutorial Programs” describes the demonstration program created in Chapter 2. “Explorer 16 Programming Tutorial”. • Chapter 4. “Explorer 16 Development Hardware” provides a more detailed description of the Explorer 16 board’s hardware features. • Appendix A. “Explorer 16 Development Board Schematics” provides a block diagram and detailed schematics of the Explorer 16 board. • Appendix B. “Updating the USB Connectivity Firmware” describes how to upgrade the Explorer 16 board’s USB connectivity subsystem. NOTICE TO CUSTOMERS All documentation becomes dated, and this manual is no exception. Microchip tools and documentation are constantly evolving to meet customer needs, so some actual dialogs and/or tool descriptions may differ from those in this document. Please refer to our web site (www.microchip.com) to obtain the latest documentation available. Documents are identified with a “DS” number. This number is located on the bottom of each page, in front of the page number. The numbering convention for the DS number is “DSXXXXXA”, where “XXXXX” is the document number and “A” is the revision level of the document. For the most up-to-date information on development tools, see the MPLAB® IDE on-line help. Select the Help menu, and then Topics to open a list of available on-line help files. Preface © 2005 Microchip Technology Inc. DS51589A-page 2 CONVENTIONS USED IN THIS GUIDE This manual uses the following documentation conventions: WARRANTY REGISTRATION Please complete the enclosed Warranty Registration Card and mail it promptly. Sending in the Warranty Registration Card entitles users to receive new product updates. Interim software releases are available at the Microchip web site. DOCUMENTATION CONVENTIONS Description Represents Examples Arial font: Italic characters Referenced books MPLAB® IDE User’s Guide Emphasized text ...is the only compiler... Initial caps A window the Output window A dialog the Settings dialog A menu selection select Enable Programmer Quotes A field name in a window or dialog “Save project before build” Underlined, italic text with right angle bracket A menu path File>Save Bold characters A dialog button Click OK A tab Click the Power tab Text in angle brackets < > A key on the keyboard Press , Courier New font: Plain Courier New Sample source code #define START Filenames autoexec.bat File paths c:\mcc18\h Keywords _asm, _endasm, static Command-line options -Opa+, -Opa- Bit values 0, 1 Constants (in source code) 0xFF, ‘A’ Italic Courier New A variable argument file.o, where file can be any valid filename Square brackets [ ] Optional arguments mcc18 [options] file [options] Curly brackets and pipe character: { | } Choice of mutually exclusive arguments; an OR selection errorlevel {0|1} Ellipses... Replaces repeated text var_name [, var_name...] Represents code supplied by user void main (void) { ... } Explorer 16 Development Board User’s Guide DS51589A-page 3 © 2005 Microchip Technology Inc. RECOMMENDED READING This user’s guide describes how to use the Explorer 16 Development Board. Other useful documents are listed below. The following Microchip documents are available and recommended as supplemental reference resources. Readme for the Explorer 16 Development Board For the latest information on using the Explorer 16 Development Board, read the Readme for Explorer 16 Development Board.txt file (an ASCII text file) at the root level of the Explorer 16 CD-ROM. The Readme file contains update information and known issues that may not be included in this user’s guide. Readme Files For the latest information on using other tools, read the tool-specific Readme files in the Readmes subdirectory of the MPLAB IDE installation directory. The Readme files contain update information and known issues that may not be included in this user’s guide. PIC24FJ128GA010 PS Data Sheet (DS39756) and PIC24FJ128GA Family Data Sheet (DS39747) Consult this document for detailed information on the PIC24F general purpose, 16-bit devices. Reference information found in this data sheet includes: • Device memory map • Device pinout and packaging details • Device electrical specifications • List of peripherals included on the device Note that document, DS39756, is for use only with the initial prototype samples of the PIC24F family. These devices are all marked with a “PS” suffix at the end of the device number. For all other PIC24FJ128GA family devices, including those with an “ES” suffix, use DS39747. dsPIC33F Family Data Sheet (DS70165) Consult this document for detailed information on the dsPIC33F Digital Signal Controllers. Reference information found in this data sheet includes: • Device memory map • Device pinout and packaging details • Device electrical specifications • List of peripherals included on the device dsPIC30F Programmer’s Reference Manual (DS70030) This manual is a software developer’s reference for all of Microchip’s 16-bit digital signal controllers. It describes the instruction set in detail and also provides general information to assist in developing software for PIC24 MCUs, dsPIC30F and dsPIC33F DSCs. PIC24H Family Overview (DS70166) This document provides an overview of the functionality of the new PIC24H product family. It helps determine how the PIC24H high-performance, 16-bit microcontrollers fit a specific product application. Preface © 2005 Microchip Technology Inc. DS51589A-page 4 MPLAB® C30 C Compiler User’s Guide (DS51284) This document details the use of Microchip’s MPLAB C30 C Compiler for dsPIC® devices to develop an application. MPLAB C30 is a GNU-based language tool, based on source code from the Free Software Foundation (FSF). For more information about the FSF, see www.fsf.org. Other GNU language tools available from Microchip are: • MPLAB ASM30 Assembler • MPLAB LINK30 Linker • MPLAB LIB30 Librarian/Archiver MPLAB® IDE Simulator, Editor User’s Guide (DS51025) Consult this document for more information pertaining to the installation and implementation of the MPLAB Integrated Development Environment (IDE) software. THE MICROCHIP WEB SITE Microchip provides online support via our web site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQs), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives Explorer 16 Development Board User’s Guide DS51589A-page 5 © 2005 Microchip Technology Inc. DEVELOPMENT SYSTEMS CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. The Development Systems product group categories are: • Compilers – The latest information on Microchip C compilers and other language tools. These include the MPLAB C18 and MPLAB C30 C compilers; MPASM™ and MPLAB ASM30 assemblers; MPLINK™ and MPLAB LINK30 object linkers; and MPLIB™ and MPLAB LIB30 object librarians. • Emulators – The latest information on Microchip in-circuit emulators.This includes the MPLAB ICE 2000 and MPLAB ICE 4000. • In-Circuit Debuggers – The latest information on the Microchip in-circuit debugger, MPLAB ICD 2. • MPLAB® IDE – The latest information on Microchip MPLAB IDE, the Windows® Integrated Development Environment for development systems tools. This list is focused on the MPLAB IDE, MPLAB SIM simulator, MPLAB IDE Project Manager and general editing and debugging features. • Programmers – The latest information on Microchip programmers. These include the MPLAB PM3 and PRO MATE® II device programmers and the PICSTART® Plus and PICkit™ 1 development programmers. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • Local Sales Office • Field Application Engineer (FAE) • Technical Support • Development Systems Information Line Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com DOCUMENT REVISION HISTORY Revision A (November 2005) This is the initial release of this Document. Preface © 2005 Microchip Technology Inc. DS51589A-page 6 NOTES: EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 7 Chapter 1. Introducing the Explorer 16 Development Board 1.1 INTRODUCTION Thank you for purchasing Microchip Technology’s Explorer 16 Development Board Kit. The development board provides a low-cost, modular development system for Microchip’s new line of 16-bit microcontroller families, including the PIC24, PIC24H and the 16-bit digital signal controller family, dsPIC33F. As provided, the development board works as a demo board right from the box, and also has the ability to extend its functionality through modular expansion interfaces. The Explorer 16 board supports MPLAB ICD 2 for full emulation and debug capabilities, and also allows 3V controllers to interface with 5V peripheral devices. 1.2 HIGHLIGHTS This chapter covers the following topics: • What’s in the Kit • Explorer 16 Development Board Functionality and Features • Using the Explorer 16 Out of the Box • Explorer 16 Development Board Demonstration Programs • Reference Documents 1.3 WHAT’S IN THE KIT The Explorer 16 Development Board Kit contains the following: • The Explorer 16 Development Board. • A preprogrammed PIC24FJ128GA010 Processor Installation Module (PIM), already installed to the board • A preprogrammed dsPIC33FJ256GP710 PIM • An RS-232 cable • The Explorer 16 Development CD ROM, containing: - This User’s Guide - Data Sheets for the PIC24FJ128GA family and dsPIC33FJ256GP family - Schematics and PCB drawing files for the PIM modules - Example programs for use with the PIC24 and dsPIC33F devices - Files detailing general purpose expansion boards that can be used with the Explorer 16 board (provided in Gerber format) If you are missing any part of the kit, please contact your nearest Microchip sales office, listed on the last page of this manual, for further assistance. Note: The Explorer 16 Development Board has been designed to function primarily from a permanently mounted PIC24FJ128GA010 device at position U1. Initial units will be shipped with U1 unpopulated and a PIC24FJ PIM of equal functionality mounted on the U1A headers instead. When using the PIC24FJ PIM or any other PIM, it is critical to verify that switch S2 always remains in the “PIM” position. See Section 4.2.1 “Processor Support” for more information. Introducing the Explorer 16 Development Board © 2005 Microchip Technology Inc. DS51589A-page 8 1.4 EXPLORER 16 DEVELOPMENT BOARD FUNCTIONALITY AND FEATURES A layout of the Explorer 16 Development Board is shown in Figure 1-1. The board includes these key features, as indicated in the diagram: 1. 100-pin PIM riser, compatible with the PIM versions of all Microchip PIC24F/24H/dsPIC33F devices 2. Direct 9 VDC power input that provides +3.3V and +5V (regulated) to the entire board 3. Power indicator LED 4. RS-232 serial port and associated hardware 5. On-board analog thermal sensor 6. USB connectivity for communications and device programming/debugging 7. Standard 6-wire In-Circuit Debugger (ICD) connector for connections to an MPLAB ICD 2 programmer/debugger module 8. Hardware selection of PIM or soldered on-board microcontroller (in future versions) 9. 2-line by 16-character LCD 10. Provisioning on PCB for add on graphic LCD 11. Push button switches for device Reset and user-defined inputs 12. Potentiometer for analog input 13. Eight indicator LEDs 14. 74HCT4053 multiplexers for selectable crossover configuration on serial communication lines 15. Serial EEPROM 16. Independent crystals for precision microcontroller clocking (8 MHz) and RTCC operation (32.768 kHz) 17. Prototype area for developing custom applications 18. Socket and edge connector for PICtail™ Plus card compatibility 19. Six-pin interface for PICkit 2 Programmer 20. JTAG connector pad for optional boundary scan functionality For additional details on these features, refer to Chapter 4. “Explorer 16 Development Hardware”. 1.4.1 Sample Devices Included with the Development Kit Each Explorer 16 Development Board Kit contains two preprogrammed 16-bit devices: a PIC24FJ128GA010 and a dsPIC33FJ256GP710. These are provided as 100-pin PIMs on riser sockets, which can be quickly installed on pin header U1A and exchanged as needed. Note: As Microchip’s 16-bit portfolio develops, alternate devices may be included with the Explorer 16 Development Board Kit. It is anticipated that one device each of the PIC24 and dsPIC33F families will always be included. Also in the future, the included PIC24 device will be soldered onto the board and only the dsPIC33F device will be provided as a PIM. Explorer 16 Development Board User’s Guide DS51589A-page 9 © 2005 Microchip Technology Inc. FIGURE 1-1: EXPLORER 16 DEVELOPMENT BOARD LAYOUT 1.5 USING THE EXPLORER 16 OUT OF THE BOX Although intended as a development platform, the Explorer 16 board may also be used directly from the box as a demonstration board for PIC24 and dsPIC33F devices. The programs discussed in Chapter 3. “Explorer 16 Tutorial Programs” are preprogrammed into the sample device PIMs (i.e., PIC24ExplDemo.hex for the PIC24 device and dsPIC33ExplDemo.hex for the dsPIC33F device) and are ready for immediate use. To get started with the board: 1. For Explorer 16 boards without a permanently mounted PIC24FJ device: verify that the PIC24FJ128GA010 PIM is correctly installed onto the board. If you want to use the dsPIC® device PIM, carefully remove the PIC24 PIM and install the dsPIC33F PIM in its place. For all PIMs, be certain to align the PIM so the notched corner marking is oriented in the upper left corner. 2. For Explorer 16 boards without a permanently mounted PIC24FJ device: verify that switch S2 is set in the “PIM” position. For Explorer 16 boards with a permanently mounted PIC24FJ device: verify that switch S2 is set in the “PIC” position. 3. Verify that the jumper on JP2 is installed (to enable the LEDs). 4. Apply power to the board (9 VDC) at power input J2. For information on acceptable power sources, see Appendix A. “Explorer 16 Development Board Schematics”. Refer to Chapter 3. “Explorer 16 Tutorial Programs” for details on the demonstration code operation. 1 10 7 4 5 6 3 2 8 9 11 12 13 14 15 16 17 18 19 20 Introducing the Explorer 16 Development Board © 2005 Microchip Technology Inc. DS51589A-page 10 FIGURE 1-2: EXPLORER 16 PIM MODULE, SHOWING NOTCHED CORNER MARKING 1.6 EXPLORER 16 DEVELOPMENT BOARD DEMONSTRATION PROGRAMS The preprogrammed example code on the PIMs has been included on the Explorer 16 CD-ROM for future reference. All project files have been included, so that the code may be used directly to restore a PIM to its original state (i.e., if the sample device has been reprogrammed with another program), or so the user may use the tutorial code as a platform for further experimentation. In addition, the CD-ROM contains sample demonstration programs for both PIC24 and dsPIC33F family devices. Separate demo source code (as files in C) and compiled code files (in Hex) are provided for each family. These may be used with the included PIC24 and dsPIC33F PIMs by reprogramming the devices using MPLAB ICD 2. 1.7 REFERENCE DOCUMENTS In addition to the documents listed in the “Recommended Reading” section, these documents are also available from Microchip to support the use of the Explorer 16 Development Board: • PIC18F2455/2550/4455/4550 Data Sheet (DS39632) • TC1047/TC1047A Data Sheet (DS21498) • 25AA256/25LC256 Data Sheet (DS21822) • PICkit™ 2 Microcontroller Programmer User’s Guide (DS51553) • MPLAB® ICD 2 In-Circuit Debugger Quick Start Guide (DS51268) • PRO MATE® II User’s Guide (DS30082) You can obtain these reference documents from your nearest Microchip sales office (listed in the back of this document) or by downloading them from the Microchip web site (www.microchip.com). PIC24FJ128GA010 EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 11 Chapter 2. Explorer 16 Programming Tutorial 2.1 INTRODUCTION This chapter is a self-paced tutorial to get you started using the Explorer 16 Development Board. 2.2 HIGHLIGHTS Items discussed in this chapter include: • Tutorial Overview • Creating the Project • Building the Code • Programming the Device 2.3 TUTORIAL OVERVIEW The tutorial in this chapter demonstrates the main features of the MPLAB IDE and MPLAB ICD 2 as they are used with the Explorer 16 Development Board. As presented, it is designed for use with the PIC24FJ128GA010 specifically. However, the same procedures and toolsuites can also be used with PIC24H or dsPIC33F devices. The PIC24 tutorial project demonstrated here, PIC24ExplDemo.mcp, is written in C for MPLAB C30. The program displays PIC24 features on the alphanumeric LCD, and also displays voltage, temperature and date/time as the various buttons are pressed. Described with the PIC24 project is the dsPIC device tutorial, Example1_RTC_LED_ADC.mcp. It is also written in C for MPLAB C30. The program displays voltage and current time, updating the display on command. Both programs are described in more detail in Chapter 3. “Explorer 16 Tutorial Programs”. For either project, the source file (PIC24ExplDemo.c or main_rtc.c for PIC24 or dsPIC33F, respectively) is used with a linker script file (p24fj128ga010.gld or p33fj256gp710ps.gld) and header file (p24fj128ga010.h or p33fj256gp710ps.h) to form a complete project. While these simple projects use a single source code file, more complex projects might use multiple assembler and compiler source files, as well as library files and precompiled object files. Upon completing this tutorial, you should be able to: • Create a project using the Project Wizard • Assemble and link the code and set the Configuration bits • Set up MPLAB IDE to use the MPLAB ICD 2 • Program the chip with the MPLAB ICD 2 There are three steps to this tutorial: 1. Creating a project in MPLAB IDE. 2. Assembling and linking the code. 3. Programming the chip with the MPLAB ICD 2. Explorer 16 Programming Tutorial © 2005 Microchip Technology Inc. DS51589A-page 12 2.4 CREATING THE PROJECT The first step is to create a project and a workspace in MPLAB IDE. Typically, there is one project in one workspace. A project contains the files needed to build an application (source code, linker script files, etc.) along with their associations to various build tools and build options. A workspace contains one or more projects and information on the selected device, debug tool and/or programmer, open windows and their location and other MPLAB IDE configuration settings. MPLAB IDE contains a Project Wizard to help create new projects. Before starting, create a folder named Tutorial for the project files for this tutorial (C:\Tutorial is assumed in the instructions that follow). From the Example Code\Tutorial Code directory on the Explorer 16 Development Kit Software CD-ROM, copy all of the source files into this folder. 2.4.1 Select a Device 1. Start MPLAB IDE. 2. Close any workspace that might be open (File > Close Workspace). 3. From the Project menu, select Project Wizard. 4. From the Welcome screen, click Next > to display the Project Wizard Step One dialog (Figure 2-1). FIGURE 2-1: SELECTING THE DEVICE 5. From the Device drop-down list, select “PIC24FJ128GA010” or “dsPIC33FJ256GP710PS”, depending on the PIM being used. Click Next >. The Project Wizard Step Two dialog will be displayed (see Figure 2-2). Note: These instructions presume the use of MPLAB IDE 7.22 or newer. Note: The screen shots in the following sections show the PIC24 tutorial. Except for displayed file names, the screens for the dsPIC33F tutorial will be identical. Explorer 16 Development Board User’s Guide DS51589A-page 13 © 2005 Microchip Technology Inc. FIGURE 2-2: SELECTING THE TOOLSUITE 2.4.2 Select Language Toolsuite 1. From the Active Toolsuite drop-down list, select Microchip C30 Toolsuite. This toolsuite includes the assembler and linker that will be used. 2. In the Toolsuite Contents combo box, select MPLAB C30 Compiler (pic30-gcc.exe). 3. In the Location box, click Browse... and navigate to C:\Program Files\Microchip\MPLAB C30\bin\pic30-as.exe. 4. With MPLAB LINK 30 Object Linker (pic30-ld.exe) selected in Toolsuite Contents, click Browse... and navigate to C:\Program Files\Microchip\MPLAB C30\bin\pic30-Id.exe. 5. Click Next > to continue. The Project Wizard Step Three dialog displays (Figure 2-3). Explorer 16 Programming Tutorial © 2005 Microchip Technology Inc. DS51589A-page 14 FIGURE 2-3: NAMING YOUR PROJECT 2.4.3 Name Your Project 1. In the Project Name text box, type “MyProject”. 2. In the Project Directory box, click Browse... and navigate to C:\Tutorial to place your project in the Tutorial folder. 3. Click Next > to continue. The Project Wizard Step Four dialog displays (Figure 2-4). FIGURE 2-4: ADDING FILES TO THE PROJECT Explorer 16 Development Board User’s Guide DS51589A-page 15 © 2005 Microchip Technology Inc. 2.4.4 Add Files to Project 1. From the list of folders on the PC, locate the C:\Tutorial folder. 2. Select the source (.c) and header (.h) files. Click Add >> to include the file in the project. 3. Expand the C:\Program Files\Microchip\MPLAB 30\support\gld folder and select the p24fj128ga010.gld or p33fj256gp710ps.gld file, as appropriate. 4. Click Add >> to include this file in the project. There should now be two files in the project. 5. Click Next > to continue. 6. When the summary screen displays, click Finish. After the Project Wizard completes, the MPLAB Project window shows the source files in the Source Files folder and the appropriate linker script in the Linker Scripts folder (Figure 2-5). FIGURE 2-5: PROJECT WINDOW A project and workspace has now been created in MPLAB IDE. MyProject.mcw is the workspace file and MyProject.mcp is the project file. Double-click the PIC24ExplDemo.c file (for PIC24) or main_rtc.c file (for dsPIC33F) in the Project window to open the file. MPLAB IDE should now look similar to Figure 2-6. Explorer 16 Programming Tutorial © 2005 Microchip Technology Inc. DS51589A-page 16 FIGURE 2-6: MPLAB® IDE WORKSPACE 2.5 BUILDING THE CODE In this project, building the code consists of compiling the source files to create an object file, MyProject.o, then linking the object file to create the MyProject.hex and MyProject.cof output files. (For dsPIC33F projects, the files would be Example1_RTC_LED_ADC.o, Example1_RTC_LED_ADC.hex and Example1_RTC_LED_ADC.cof.)The Hex file contains the data necessary to program the device, and the .cof file contains additional information that lets you debug the code at the source code level. Before building, there are settings required to tell MPLAB IDE where to find the include files and to reserve space for the extra debug code when the MPLAB ICD 2 is used. For PIC24 projects, the following line in the system.h file is: #include “p24fj128ga010.h” For dsPIC33 projects, the line is: #include “p33fj256gp710ps.h” This line causes a standard include file to be used. Microchip provides these files with all the Special Function Register (SFR) labels already defined for convenience. To build the code, select Build Options > Project from the Project menu. The Build Options dialog displays (Figure 2-7). Project Window Output Window Source Window Code Explorer 16 Development Board User’s Guide DS51589A-page 17 © 2005 Microchip Technology Inc. FIGURE 2-7: BUILD OPTIONS 2.5.1 Identify Assembler Include Path 1. Select the General tab. 2. Click Suite Default. This tells the environment where to find the library files. 3. Select the MPLAB LINK30 tab to view the linker settings (Figure 2-8). 4. Check Link for ICD2. 5. Click OK. The text box closes while the linker reserves space for the debug code used by the MPLAB ICD 2. 6. Click OK again to save these changes. The project is now ready to build. Explorer 16 Programming Tutorial © 2005 Microchip Technology Inc. DS51589A-page 18 FIGURE 2-8: MPLAB® LINK30 BUILD OPTIONS 2.5.2 Build the Project From the menu bar of the main MPLAB IDE window, select Project > Make. The Build Output window displays (Figure 2-9). Observe the progress of the build. When the “BUILD SUCCEEDED” message displays, you are ready to program the device. FIGURE 2-9: BUILD OUTPUT Explorer 16 Development Board User’s Guide DS51589A-page 19 © 2005 Microchip Technology Inc. 2.6 PROGRAMMING THE DEVICE The MPLAB ICD 2 In-Circuit Debugger is used to program and debug the microcontroller in-circuit on the Explorer 16 Development Board. 2.6.1 Set Up the Device Configuration The device configuration for the target microcontroller can be set by two methods: using configuration macros in the source code, or using the Configuration Bits window in MPLAB IDE. The PIC24 Explorer 16 tutorial code already includes configuration macros in the source code itself. It is only necessary to confirm that the following macros are in place near the top of the PIC24ExplDemo.c file: _CONFIG1(JTAGEN_OFF & GSS0_OFF & GWRP_OFF & BKBUG_OFF & COE_OFF & FWDTEN_OFF & FNOSC_PRI) _CONFIG2(FCKSM_CSDCMD & OSCIOFNC_ON & POSCMOD_HS) For the dsPIC33F tutorial code, confirm that the following macros are in place near the top of the main_rtc.c file: _FGS(CODE_WRITE_PROT_OFF); _FOSCSEL(FRC_PLL); _FOSC(CSW_FSCM_OFF & OSC2_IO & XT); _FWDT(WDT_OFF); If configuration macros are not used in the source code, it is also possible to set device configuration with the Configuration Bits window. For the PIC24 code, the process is as follows: 1. From the main window’s menu bar, select Configure > Configuration Bits to display the configuration settings (Figure 2-10). 2. Set the Configuration bits by clicking on a particular line item and selecting an option from the drop-down menu that appears. The Configuration bits should be set as shown in Figure 2-10. The settings that will most likely need to change are: a) Primary Oscillator Select: HS Oscillator Enabled b) Oscillator Select: Primary Oscillator (XT, HS, ES) c) Clock Switching and Monitor: SW Disabled, Mon Disabled d) Watchdog Timer Enable: Disable Note: Before proceeding, make sure that the USB driver for the MPLAB ICD 2 has been installed on the PC (see the MPLAB® ICD 2 In-Circuit Debugger User’s Guide (DS51331) for more details regarding the installation of the MPLAB ICD 2). Explorer 16 Programming Tutorial © 2005 Microchip Technology Inc. DS51589A-page 20 FIGURE 2-10: CONFIGURATION SETTINGS (PIC24) 2.6.2 Connect and Enable MPLAB ICD 2 1. Connect the MPLAB ICD 2 module to the PC with the USB cable. 2. Connect the MPLAB ICD 2 to the Explorer 16 Development Board with the short RJ-11 cable. 3. Apply power to the Explorer 16 board. 4. From the Debugger menu, click Select Tool > MPLAB ICD 2 to set the MPLAB ICD 2 as the debug tool in MPLAB IDE. 5. From the Debugger menu, select Connect to connect the debugger to the device. MPLAB IDE should report that it found the PIC24FJ128GA010 device, as shown in Figure 2-11. FIGURE 2-11: ENABLING MPLAB® ICD 2 Note: Do not use the Configuration Bits window to set device configuration if configuration macros are already used in the source code. In cases where both methods are used, configuration macros may override settings from the Configuration Bits window. Refer to the MPLAB IDE Simulator, Editor User’s Guide (DS51025) for additional information. Note: MPLAB IDE may need to download new firmware if this is the first time the MPLAB ICD 2 is being used with a PIC24FJ device. Allow it to do so. If any errors are shown, double-click the error message to get more information. Status indicates device is found Explorer 16 Development Board User’s Guide DS51589A-page 21 © 2005 Microchip Technology Inc. 2.6.3 Program the Device 1. From the Debugger menu, select Program to program the part. The Output window (Figure 2-12) displays the program steps as they occur. 2. Observe the results of the programming. When “MPLAB ICD 2 Ready” displays, the device is programmed and ready to run. FIGURE 2-12: PROGRAMMING THE DEVICE Explorer 16 Programming Tutorial © 2005 Microchip Technology Inc. DS51589A-page 22 NOTES: EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 23 Chapter 3. Explorer 16 Tutorial Programs 3.1 INTRODUCTION This chapter provides a high-level overview of the PIC24 and dsPIC33F firmware programmed during the tutorial exercise in the previous chapter. 3.2 PIC24 TUTORIAL PROGRAM OPERATION The PIC24 tutorial program is made up of three components which are individually displayed on the LCD. The program is used to demonstrate the new Parallel Master Port (PMP) module which is used to drive the LCD, as well as the new Real-Time Clock/Calendar module (RTCC). The program flow is shown in Figure 3-1. 3.2.1 PIC24 Features Features mode displays a continuous description of the PIC24FJ128GA010 device feature set. To exit the display and continue to the next mode, press S4. 3.2.2 Voltmeter/Temperature Voltmeter/Temperature mode uses the code modules, vbanner.c and ADC.c, and the A/D module to measure analog signals from the board and convert them for display on the LCD. The voltage is taken from the potentiometer (R6) and displays a voltage between 0.00V and 3.29V on line 1 of the LCD. Temperature is from a TC1074A analog thermal sensor (U5). The temperature is displayed on line 2 of the LCD and automatically alternates between Celsius and Fahrenheit values. The voltage and temperature are updated continuously. This mode also lets users store the current temperature in the on-board serial EEPROM by pressing S5. Pressing S6 switches the display between current and stored temperature values. An ‘M’ on the right side of the LCD indicates that a stored temperature value is being displayed. To exit and continue to the next mode, press S4. 3.2.3 Clock/Calendar Clock/Calendar mode uses code in the modules, rtcc.c and tbanner.c. Once this mode is entered from the main menu, a Real-Time Clock will start counting from 10:00:00, and display the date and day for Oct. 10, 2005. The new RTCC module and a 32 kHz clock crystal are used to provide the Real-Time Clock with day/date calendar. In Clock/Calendar mode, the user-defined push buttons do the following: • S3 toggles the Clock Set mode, which allows the user to set the date and time. Setup mode starts with the tens digit of the hour in the time display. • S4 accepts the value of the current item and moves cursor to the next item. • S5 decrements the currently selected item. • S6 increments the currently selected item. Pressing S3 once superimposes a flashing cursor over the tens digit of the hour in the time display. Each press of S4 moves the cursor sequentially through the digits of the time display, then the month, day and year. Pressing S3 at any time in the process returns to the regular clock/calendar display. Explorer 16 Tutorial Programs © 2005 Microchip Technology Inc. DS51589A-page 24 Pressing S4 at this point exits Clock/Calendar mode and returns the device to the PIC24 Features mode. The data that is sent to the LCD is also sent to the RS-232 serial port using the UART. A terminal emulator, such as HyperTerminal (installed by default on most Microsoft® Windows systems), will be able to display the same information. To do this, set the terminal emulator for 19200 baud, 8-bit data, 1 Stop bit and no parity check. FIGURE 3-1: PIC24 TUTORIAL PROGRAM FLOWCHART “Explorer 16 Development Board” Power-up PIC24 Features Scrolling Banner Is S4 pressed? “Mon 10:00:00” “Oct 10, 2005” No Yes Is S4 pressed? Is S5 pressed? Toggle Displayed Temperature between Current and Stored Is S4 pressed? No Is S3 pressed? Clock Setup mode: S3 – Exit Setup mode S4 – Accept Selection, Adjust Next Value S5 – Decrement Selection S6 – Increment Selection Yes Yes No Yes No Yes No Display Voltage Display Display Display Store Temperature in EEROM Is S6 pressed? No Yes and Temperature Explorer 16 Development Board User’s Guide DS51589A-page 25 © 2005 Microchip Technology Inc. 3.3 dsPIC33F TUTORIAL PROGRAM OPERATION The dsPIC33F tutorial program is made up of five simple processes which continuously execute on the dsPIC33FJ256GP710 device: • Real-Time Clock (RTC) using Timer1 • A/D conversion of Potentiometer (R6) • A/D volts to Hex conversion • Hex to Decimal conversion (for LCD display) • LCD Update The time of day and A/D conversion values are continually updated and displayed on the LCD. The program demonstrates the basic code to initialize Timer1, enable the Timer1 oscillator for RTC operation, and initialize the A/D for single channel conversion of potentiometer, RP5. The LCD is driven via the port pins. The program flow is shown in Figure 3-2. In addition to the tutorial, the Explorer 16 CD also provides code examples to demonstrate higher level processing requirements, such as DMA, digital filters and Fast Fourier Transforms (FFT). See Code Example 2 on the CD for more information. 3.3.1 Voltmeter The simple tutorial program initializes the A/D module for 12-bit mode with auto-sampling and conversion of the potentiometer connected to pin AN5 and initializes the respective interrupt. The A/D module continually samples and converts the potentiometer signal (0 to 3.3 VDC) on analog channel, AN5. When a conversion is complete, an interrupt is generated and the result in the ADCBUF0 register is copied into a temporary variable, temp1. The adc_lcd_update flag is then asserted and the A/D Interrupt Flag, AD1IF (IFS0<13>), is cleared. The program exits the Interrupt Service Routine and re-enters the main program loop. The variable, adc_lcd_update, is evaluated in the main loop to determine if there is a new A/D conversion value which can be converted and displayed on the LCD. The primary code modules associated with the operation of the ADC module and display are: • init_ADC.c • isr_ADC.c • advolts.c • hexdec.c 3.3.2 Real-Time Clock The tutorial program also supports a Real-Time Clock demo. Timer1 is initialized with interrupts enabled and the external 32.768 kHz oscillator is enabled. Within the Timer1 Interrupt Service Routine (once every second), the variables, hours, minutes and seconds, are updated, the flag variable, rtc_lcd_update, is asserted and the Timer1 Interrupt Flag, T1IF (IFS0<3>), is cleared. The program exits the Interrupt Service Routine and re-enters the main program loop. The variable, rtc_lcd_update, is evaluated in the main loop to determine if there is a new time of day value which can be converted and displayed on the LCD. The primary code modules associated with the operation of the Timer1 module and display are: • init_timer1.c • isr_timer1.c • hexdec.c Explorer 16 Tutorial Programs © 2005 Microchip Technology Inc. DS51589A-page 26 FIGURE 3-2: dsPIC33F TUTORIAL PROGRAM FLOWCHART “dsPIC33 Demo” “Press S3 to cont” Power-up Initialize Timer1 Is S3 pressed? Initialize A/D Converter to Decimal and Call Update_LCD No Update time? Update volts? Yes Yes No Yes No Convert Time of Day Display “Time 00:00:00” “R6 = 0.00 VDC” Display to Decimal and Call Update_LCD Convert A/D Result EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 27 Chapter 4. Explorer 16 Development Hardware 4.1 INTRODUCTION This chapter provides a more detailed description of the hardware features of the Explorer 16 Development Board. 4.2 HARDWARE FEATURES The key features of the Explorer 16 board are listed below. They are presented in the order given in Section 1.4 “Explorer 16 Development Board Functionality and Features”, Figure 1-1. 4.2.1 Processor Support The Explorer 16 board has been designed to accommodate both permanently mounted (i.e., soldered on) and detachable PIM processors. Slider switch, S2, allows the user to choose which processor to use. This makes it possible for the Explorer 16 board to support most 3V, 16-bit, pin compatible microcontrollers with appropriate PIMs. PIMs are visually indexed for proper installation. The PIM is always installed with the notched corner mark on the corner of the PIM board oriented to the upper left corner. Current revisions of the board do not have a permanently mounted microcontroller in U1. In order for the board to work, therefore, S2 must always be left in the “PIM” position. In future versions with a permanently mounted PIC24 device at U1, setting S2 in the “PIC” position will enable the on-board device and disable the PIM socket. 4.2.2 Power Supply There are two ways to supply power to the Explorer 16 board: • An unregulated DC supply of 9V to 15V (preferably 9V) supplied to J12. For default functionality, a power supply with a current capability of 250 mA is sufficient. Since the board can serve as a modular development platform that can connect to multiple expansion boards, voltage regulators (Q1 and Q2) with a maximum current capability of 800 mA are used. This may require a larger power supply of up to 1.6A. Because the regulators do not have heat sinks, long-term operation at such loads is not recommended. • An external, regulated DC power supply that provides both +5V and +3.3V can be connected to the terminals provided (at the bottom left side of the board, near S3). One green LED (D1) is provided to show when the Explorer 16 board is powered up. The power-on LED indicates the presence of +3.3V. Note: The Explorer 16 kit does not include a power supply. If an external supply is needed, use Microchip part number AC162039. Note: Do not attempt to power the Explorer 16 board using the MPLAB ICD 2 module. It is not designed to be a USB bus power source. Explorer 16 Development Hardware © 2005 Microchip Technology Inc. DS51589A-page 28 4.2.3 RS-232 Serial Port An RS-232 level shifter (U3) has been provided with all necessary hardware to support RS-232 connection with hardware flow control through the DB9 connector. The port is configured as a DCE device, and can be connected to a PC using a straight-through cable. The PIC24/dsPIC33F RX and TX pins are tied to the RX and TX lines of U3. The PIC24/dsPIC33F RTS and CTS pins are tied to the RX2 (DIN2) and TX2 (DOUT2) lines of the MAX3232 for hardware flow control. 4.2.4 Temperature Sensor An analog output thermal sensor (Microchip TC1074A, U4) is connected to one of the controller’s A/D channels. 4.2.5 USB Connectivity The Explorer 16 board includes a PIC18LF4550 USB microcontroller, which provides both USB connectivity and support for protocol translation. The PIC18LF4550 is hard-wired to the PIC24/dsPIC33F devices to provide three types of connectivity: • SPI™ of PIC18LF4550 to SPI1 of PIC24/dsPIC33F • I/O pins of PIC18LF4550 to ICSP™ pins of PIC24/dsPIC33F • I/O pins of PIC18LF4550 to JTAG pins of PIC24/dsPIC33F The type of connectivity depends on the firmware installed on the PIC18LF4550. At the time of initial release, the PIC18LF4550 is loaded with USB bootloader firmware, which permits easy upgrades of connectivity firmware over the USB. Installing this firmware is described in Appendix B. “Updating the USB Connectivity Firmware”. PIC24 and dsPIC33F devices both have some 5V tolerant input pins. If a 5V tolerant input is connected to the PIC18LF4550, protection diodes on the PIC18LF4550 device’s port pins will limit inputs to VDD. For more information on which pins of the 16-bit devices are 5V tolerant, refer to the appropriate device data sheet. 4.2.6 ICD Connector An MPLAB ICD 2 module can be connected by way of the modular connector (JP1) for low-cost debugging. The ICD connector utilizes port pins, RB6 and RB7 of the microcontroller, for in-circuit debugging. Jumper J7 decides the terminus of the ICD 2 connector. If the jumper is set to the “PIC24” side, JP1 communicates directly with RB6/RB7 of the PIM or on-board device (determined by S2). If the jumper is set to the “F4450” side, JP1 communicates with the on-board PIC18LF4550 USB device. 4.2.7 LCD The Explorer 16 board includes an alphanumeric LCD display with two lines of 16 characters each. The display is driven with three control lines (RD4, RD5 and RD15) and eight data lines (RE7:RE0). On PIC24 devices, the LCD is driven by the PMP module, not the I/O port. The Explorer 16 board has multiple LCD footprints and support options, although only one footprint is ever populated at one time. The Lumex LCM-SO1062 (populated at LCD4) is a 5V LCD with TTL input, and is used in the initial version of the Explorer 16 board. The Tianma TM162JCAWG1 (populated at LCD1) is a 3V LCD; it is anticipated to be used in future versions of the board. An alternate configuration option allows the use of RD3:RD0 as four of the data lines, instead of RE7:RE4. To do this, the user must cut the trace jumpers at R60/62/64/66 and create solder bridges from the pads for R61/63/65/67 (see Figure 4-1). Explorer 16 Development Board User’s Guide DS51589A-page 29 © 2005 Microchip Technology Inc. FIGURE 4-1: MODIFICATIONS TO R60-R67 FOR LCD CONFIGURATION (SCALE ENHANCED FOR VISIBILITY) 4.2.8 Graphic LCD The Explorer 16 also has a footprint and layout support for the Optrex 128 x 64 dot-matrix graphic LCD (part number F-51320GNB-LW-AB) and associated circuitry. This is the same display used in Microchip’s MPLAB PM3 programmer. 4.2.9 Switches Five push button switches provide the following functions: • S1: Active-low MCLR switch to hard reset the processor • S3: Active-low switch connected to RD6 (user-defined) • S4: Active-low switch connected to RD13 (user-defined) • S5: Active-low switch connected to RA7 (user-defined) • S6: Active-low switch connected to RD7 (user-defined) Switch S1 has a debounce capacitor, whereas S3 through S6 do not; this allows the user to investigate debounce techniques. When Idle, the switches are pulled high (+3.3V). When pressed, they are grounded. 4.2.10 Analog Input (Potentiometer) A 10 kΩ potentiometer is connected through a series resistor to AN5. It can be adjusted from VDD to GND to provide an analog input to one of the controller’s A/D channels. 4.2.11 LEDs Eight red LEDs (D2 through D9) are connected to PORTA of the PIM socket. The PORTA pins are set high to light the LEDs. These LEDs may be disabled by removing jumper JP2. 4.2.12 Oscillator Options The installed microcontroller has two separate oscillator circuits connected.The main oscillator uses an 8 MHz crystal (Y3) and functions as the controller’s primary oscillator. A second circuit, using a 32.768 kHz (watch type) crystal (Y2), functions as the Timer1 oscillator and serves as the source for the RTCC and secondary oscillator. The PIC18LF4550, at the heart of the USB subsystem, is independently clocked and has its own 20 MHz crystal (Y1). 4.2.13 Serial EEPROM A 25LC256 256K (32K x 8) serial EEPROM (U5) is included for nonvolatile firmware storage. It is also used to demonstrate SPI bus operation. R60 R61 R62 R63 R64 R65 R66 R67 Cut Traces Here Add Solder Bridges Here Explorer 16 Development Hardware © 2005 Microchip Technology Inc. DS51589A-page 30 4.2.14 PICkit 2 Connector Connector J14 provides the footprint for a 6-pin PICkit 2 programmer interface. This will provide a third low-cost programming option, besides MPLAB ICD 2 and the JTAG interface, when PICkit 2 support for larger devices become available in the future. 4.2.15 JTAG Connector Connector J13 provides a standard JTAG interface, allowing users to connect to and program the controller via JTAG. 4.2.16 PICtail™ Plus Card Edge Modular Expansion Connectors The Explorer 16 board has been designed with the PICtail™ Plus modular expansion interface, allowing the board to provide basic generic functionality and still be easily extendable to new technologies as they become available. PICtail Plus is based on a 120-pin connection divided into three sections of 30 pins, 30 pins and 56 pins. The two 30-pin connections have parallel functionality; for example, pins 1, 3, 5 and 7 have SPI1 functionality on the top 30-pin segment, with similar SPI2 functionality on the corresponding pins in the middle 30-pin segment. Each 30-pin section provides connections to all of the serial communications peripherals, as well as many I/O ports, external interrupts and A/D channels. This provides enough signals to develop many different expansion interfaces, such as Ethernet, Zigbee™, IrDA® and so on. The 30-pin PICtail Plus expansion boards can be used in either the top or middle 30-pin sections. The Explorer 16 board provides footprints for two edge connectors for daughter cards, one populated (J5, Samtec # MEC1-160-02-S-D-A) and one unpopulated (J6). The board also has a matching male edge connection (J9), allowing it to be used as an expansion card itself. 4.2.16.1 CROSSOVER CONNECTIONS FOR SPI AND UART The PICtail Plus interface allows two Explorer 16 boards to be connected directly to each other without any external connector. This provides 1-to-1 connection between the microcontrollers on the two boards, an interface that works well for many types of peripherals (I2C, PMP, etc.). However, certain serial peripheral modules, such as SPIs and UARTs, require cross-wire connections; that is, the TX (or SDO) pin of one controller must be connected to the RX (or SDI) of the other and vice versa. The Explorer 16 board uses two 74HCT4053 analog multiplexers to simplify the connections between itself and any daughter boards. U6 and U7 provide active control of the cross-wire capability on SPI1 and UART1, with a hardware flow control signal provided by three I/O pins. The multiplexers are controlled by the state of pins RB12, RB13 and RB14. When a control pin is high (the default state), the corresponding SPI1 or UART1 pin pairs are connected to their default pins on the PICtail Plus interface. When a control pin is asserted low, the corresponding pin pair functions are swapped. Table 4-1 details the relationship between the control pins and SPI1/UART1 functions on the interface. Explorer 16 Development Board User’s Guide DS51589A-page 31 © 2005 Microchip Technology Inc. TABLE 4-1: LOCATION OF SPI1 AND UART1 PINS ON PICtail™ PLUS INTERFACE Control Pin State UART1 Control Pins SPI1 Control Pin RB14 Control Pin RB13 Control Pin RB12 U1RX U1TX U1CTS U1RTS SDI1 SDO1 1 2 4 19 20 5 7 0 4 2 20 19 7 5 Note: When connecting SPI and UART peripherals on two Explorer 16 boards, use crossover connection on only one of the boards. Explorer 16 Development Hardware © 2005 Microchip Technology Inc. DS51589A-page 32 NOTES: EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 33 Appendix A. Explorer 16 Development Board Schematics A.1 INTRODUCTION This section provides detailed technical information on the Explorer 16 board. A.2 DEVELOPMENT BOARD BLOCK DIAGRAM FIGURE A-1: HIGH-LEVEL BLOCK DIAGRAM OF THE EXPLORER 16 DEVELOPMENT BOARD PIC24FJ128GA010 dsPIC33FJ256GP710 16x2 LCD Display PIC18LF4550 SPI* ICSP* JTAG* ICD/ICSP JTAG RS-232 Transceiver SPI EEPROM +3.3V and +5V Supply 9-15 VDC Switches Temperature Sensor LEDs POT Modular Expansion Connector USB PICtail™ Plus PICtail™ Plus * Hardware support only; firmware support for SPI™, JTAG and ICSP™ via USB are not available at this time. Explorer 16 Development Board Schematics © 2005 Microchip Technology Inc. DS51589A-page 34 A.3 DEVELOPMENT BOARD SCHEMATICS FIGURE A-2: EXPLORER 16 BOARD SCHEMATIC, SHEET 1 OF 8 (PIM SOCKET) VCAP/VDDCORE VDDCORE VSS VSS VDD 100-Pin PIM VSS VDD VSS VDD CVREF/AN10/RB10 AVDD AVSS VSS VDD VDD Explorer 16 Development Board User’s Guide DS51589A-page 35 © 2005 Microchip Technology Inc. FIGURE A-3: EXPLORER 16 BOARD SCHEMATIC, SHEET 2 OF 8 (BOARD MOUNTED PIC24FJ128GA010 MCU, WHEN INSTALLED) 10 μF .1 μF VCAP/VDDCORE VDD VSS PIC24FJ128GA010 VDD AVDD VDD VSS AVSS CVREF/AN10/RB10 VSS VDD VDD VSS VSS Explorer 16 Development Board Schematics © 2005 Microchip Technology Inc. DS51589A-page 36 FIGURE A-4: EXPLORER 16 BOARD SCHEMATIC, SHEET 3 OF 8 (MPLAB® ICD 2, JTAG, PICkit™ 2 AND PICtail™ Plus CONNECTORS) MPLAB® ICD 2 Connector .1 μF PICkit™ 2 Programmer Explorer 16 Development Board User’s Guide DS51589A-page 37 © 2005 Microchip Technology Inc. FIGURE A-5: EXPLORER 16 BOARD SCHEMATIC, SHEET 4 OF 8 (PICtail™ PLUS EDGE AND SOCKET CONNECTORS) Explorer 16 Development Board Schematics © 2005 Microchip Technology Inc. DS51589A-page 38 FIGURE A-6: EXPLORER 16 BOARD SCHEMATIC, SHEET 5 OF 8 (SWITCHES, MULTIPLEXERS AND POTENTIOMETER) VEE VCC .1 μF .1 μF VCC VEE .1 μF Explorer 16 Development Board User’s Guide DS51589A-page 39 © 2005 Microchip Technology Inc. FIGURE A-7: EXPLORER 16 BOARD SCHEMATIC, SHEET 6 OF 8 (EEPROM, TEMPERATURE SENSOR, LEDs, OSCILLATOR CIRCUITS AND POWER SUPPLY) .1 μF 25LC256 .1 μF TC1047A 22 pF 22 pF 32 kHz .1 μF 47 μF .1 μF 47 μF 47 μF .1 μF .1 μF .1 μF .1 μF .1 μF .1 μF .1 μF VCC VSS VDD VOUT VSS 8 MHz 22 pF 22 pF Explorer 16 Development Board Schematics © 2005 Microchip Technology Inc. DS51589A-page 40 FIGURE A-8: EXPLORER 16 BOARD SCHEMATIC, SHEET 7 OF 8 (USB AND UART SUBSYSTEMS) VUSB VSS VDD VDD VSS VSS VDD PIC18F4550_QFN44 VDD .1 μF .1 μF .1 μF .1 μF .1 μF .1 μF .1 μF .1 μF .1 μF .1 μF 22 pF 22 pF 20 MHz VBUS VCC Explorer 16 Development Board User’s Guide DS51589A-page 41 © 2005 Microchip Technology Inc. FIGURE A-9: EXPLORER 16 BOARD SCHEMATIC, SHEET 8 OF 8 (LCDs AND OPTIONAL LCD CONNECTIONS) Alternative LCD Configurations: 4.7 μF 4.7 μF 4.7 μF 4.7 μF 1 μF 1 μF 1 μF 1 μF 1 μF .1 μF VEE VO VCC VEE VCC VEE VEE VSS VDD VO Explorer 16 Development Board Schematics © 2005 Microchip Technology Inc. DS51589A-page 42 NOTES: EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 43 Appendix B. Updating the USB Connectivity Firmware B.1 INTRODUCTION The USB subsystem of the Explorer 16 Development Board is preprogrammed with USB bootloader firmware. This provides an easy method for upgrading the PIC18LF4550 firmware to support ICSP, JTAG and SPI connectivity to PIC24 and dsPIC33F devices. This chapter describes how to upgrade the PIC18LF4550 device’s firmware with the PICkit 2 software. The same process can be used to upgrade the PIC18LF4550 device’s firmware when updates and new firmware packages become available. B.2 UPDATING THE PICkit 2 MICROCONTROLLER PROGRAMMER Before beginning, it will be necessary to obtain and install the PICkit 2 programmer software. Complete instructions for installing and using the programmer software application is provided in the PICkit™ 2 Microcontroller Programmer User’s Guide (DS51553). The programmer and user’s guide, as well as the latest version of the PICkit 2 operating system firmware, are available from the Microchip corporate web site, www.microchip.com. To update the USB firmware: 1. If not done already, download the latest PICkit 2 operating system software from the Microchip web site. 2. On the Explorer 16 board, install a jumper between pins 9 and 10 of the JTAG connector (J13). 3. Press and release MCLR (S1). This places the USB subsystem in Bootloader mode and makes it ready to accept new code. 4. Connect the Explorer 16 board to the PC via a standard USB cable. 5. Launch the PICkit 2 programmer software. From the menu bar, select Tools > Download PICKit 2 Operating System (Figure B-1). FIGURE B-1: DOWNLOAD PICkit™ 2 OPERATING SYSTEM Updating the USB Connectivity Firmware © 2005 Microchip Technology Inc. DS51589A-page 44 6. Browse to the directory where the latest operating system firmware was saved (Figure B-2). FIGURE B-2: SELECT PICkit™ 2 OPERATING SYSTEM 7. Select the PK2_Explorer16_*.hex file and click the Open button. The progress of the update is displayed in the status bar of the programming software. When the update completes successfully, the status bar displays “Operating System Verified”. The update is now complete. B.3 OTHER USB FIRMWARE UPDATES It is anticipated that various USB connectivity firmwares will be made available in the future. Users are encouraged to periodically check the Microchip web site (www.microchip.com) for new and revised code. EXPLORER 16 DEVELOPMENT BOARD USER’S GUIDE © 2005 Microchip Technology Inc. DS51589A-page 45 Index B Build Options............................................................ 16 C Configuration Bits..................................................... 19 Crossover Connections (Serial Communications) ...................................8, 30 Customer Change Notification Service ...................... 5 Customer Support ...................................................... 5 D Documentation Conventions........................................................ 2 Layout ................................................................. 1 dsPIC33 Tutorial Program........................................ 25 dsPIC33F Tutorial Program Flowchart .......................................................... 26 E Explorer 16 Development Board Block Diagram .................................................. 33 Layout ................................................................. 9 Schematics ..................................................34–41 Explorer 16 Programming Tutorial ........................... 11 Building the Code ............................................. 16 Creating the Project .......................................... 12 Programming the Device .................................. 19 F Free Software Foundation ......................................... 4 G GNU Language Tools ................................................ 4 H Hardware Features Analog Potentiometer ....................................8, 29 ICD Connector ...............................................8, 28 JTAG Connector ............................................8, 30 LCD, Alphanumeric........................................8, 28 LCD, Graphic .................................................8, 29 LEDs ..............................................................8, 29 Multiplexers....................................................8, 30 Oscillator Options ..........................................8, 29 PICkit 2 Connector.........................................8, 30 PICtail Plus Card Edge Connectors...............8, 30 Power Indicator LED........................................... 8 Power Supply.................................................8, 27 Processor Support ........................................ 8, 27 Prototype Area .................................................... 8 RS-232 Serial Port ........................................ 8, 28 Serial EEPROM............................................ 8, 29 Switches........................................................ 8, 29 Temperature Sensor ..................................... 8, 28 USB Connectivity .......................................... 8, 28 I Internet Address......................................................... 4 L Language Toolsuite.................................................. 13 M Microchip Internet Web Site ....................................... 4 MPLAB ICD 2........................................................... 10 MPLAB IDE Simulator, Editor User’s Guide............... 4 P PIC24 Tutorial Program ........................................... 23 Flowchart .......................................................... 24 PICtail Plus Edge Connectors Use with Crossover Serial Connections........................................ 30 Project ...................................................................... 12 Project Wizard.......................................................... 12 R Reading, Recommended ........................................... 3 Readme...................................................................... 3 Reference Documents ............................................. 10 S Schematics......................................................... 34–41 U USB Connectivity ...................................................... 28 Updating the USB Connectivity Firmware............................................. 43 W Warranty Registration ................................................ 2 Workspace ............................................................... 12 WWW Address........................................................... 4 DS51589A-page 46 © 2005 Microchip Technology Inc. AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Alpharetta, GA Tel: 770-640-0034 Fax: 770-640-0307 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 San Jose Mountain View, CA Tel: 650-215-1444 Fax: 650-961-0286 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8676-6200 Fax: 86-28-8676-6599 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong 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Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 WORLDWIDE SALES AND SERVICE 10/31/05 MSP-EXP430F5529 Experimenter Board User's Guide Literature Number: SLAU330A May 2011–Revised June 2011 2 SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Contents Preface ....................................................................................................................................... 5 1 Getting Started ................................................................................................................... 7 1.1 MSP-EXP430F5529 Experimenter Board Introduction ............................................................. 7 1.2 Kit Contents .............................................................................................................. 8 2 User Experience Software .................................................................................................... 9 2.1 Introduction ............................................................................................................... 9 2.2 Main Menu ............................................................................................................... 9 2.3 Clock ..................................................................................................................... 10 2.4 Games ................................................................................................................... 10 2.5 Power Tests ............................................................................................................ 10 2.6 Demo Apps ............................................................................................................. 11 2.7 SD Card Access ....................................................................................................... 12 2.8 Settings Menu .......................................................................................................... 12 3 Software Installation and Debugging ................................................................................... 13 3.1 Software ................................................................................................................. 13 3.2 Download the Required Software .................................................................................... 13 3.3 Working With the Example Software ................................................................................ 13 4 MSP-EXP430F5529 Hardware .............................................................................................. 17 4.1 Hardware Overview .................................................................................................... 17 4.2 Jumper Settings and Power .......................................................................................... 18 4.3 eZ-FET Emulator ....................................................................................................... 21 4.4 MSP-EXP430F5529 Hardware Components ...................................................................... 21 5 Frequently Asked Questions, References, and Schematics .................................................... 24 5.1 Frequently Asked Questions ......................................................................................... 24 5.2 References .............................................................................................................. 24 5.3 Schematics and BOM ................................................................................................. 25 SLAU330A–May 2011–Revised June 2011 Table of Contents 3 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com List of Figures 1 MSP-EXP430F5529 Experimenter Board ............................................................................... 7 2 User Experience Navigation ............................................................................................... 9 3 Selecting a CCS Workspace............................................................................................. 14 4 Opening Existing Project ................................................................................................. 14 5 Simple Hardware Overview .............................................................................................. 17 6 Hardware Block Details ................................................................................................... 18 7 Common Power Jumper Settings ....................................................................................... 18 8 Visual Power Schematic.................................................................................................. 20 9 MSP430 Current Measurement Connection ........................................................................... 21 10 Schematics (1 of 7)........................................................................................................ 25 11 Schematics (2 of 7)........................................................................................................ 26 12 Schematics (3 of 7)........................................................................................................ 27 13 Schematics (4 of 7)........................................................................................................ 28 14 Schematics (5 of 7)........................................................................................................ 29 15 Schematics (6 of 7)........................................................................................................ 30 16 Schematics (7 of 7)........................................................................................................ 31 List of Tables 1 MSP-EXP430F5529 Jumper Settings and Functionality ............................................................. 19 2 Push Buttons, Potentiometer, and LED Connections................................................................. 22 3 Pinning Mapping for Header J4.......................................................................................... 23 4 Pin Mapping for Header J5............................................................................................... 23 5 Pin Mapping for Header J12 ............................................................................................. 23 6 Bill of Materials............................................................................................................. 32 4 List of Figures SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Preface SLAU330A–May 2011–Revised June 2011 Read This First If You Need Assistance The primary sources of information for MSP430 devices are the data sheets and the family user's guides. The most up-to-date versions of these documents can be found at www.ti.com/msp430. Information specific to the MSP-EXP430F5529 Experimenter Board can be found at www.ti.com/usbexp. Customer support for MSP430 devices and the MSP-EXP430F5529 Experimenter Board is provided by the Texas Instruments Product Information Center (PIC), as well as on the TI E2E (Engineer-2-Engineer) Forum at the link below. Contact information for the PIC can be found on the TI web site at: support.ti.com. The MSP430 Specific E2E forum is located at: community.ti.com/forums/12.aspx. Related Documentation from Texas Instruments MSP-EXP430F5529 Experimenter Board User's Guide (SLAU330) MSP-EXP430F5529 Experimenter Board User Experience Software MSP-EXP430F5529 Experimenter Board Quick Start Guide (SLAU339) MSP-EXP430F5529 Experimenter Board PCB Design Files (SLAR055) MSP430F552x Code Examples (SLAC300) FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user, at his own expense, will be required to take whatever measures may be required to correct this interference. SLAU330A–May 2011–Revised June 2011 Preface 5 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated 6 Read This First SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated User's Guide SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 1 Getting Started 1.1 MSP-EXP430F5529 Experimenter Board Introduction The MSP-EXP430F5529 Experimenter Board is a development platform based on the MSP430F5529 with integrated USB. The Experimenter Board showcases the abilities of the latest family of MSP430s and is perfect for learning and developing USB-based applications using the MSP430. The features include a 102x64 dot-matrix LCD, microSD memory card interface, 3-axis accelerometer, five capacitive-touch pads, RF EVM expansion headers, nine LEDs, an analog thumb-wheel, easy access to spare F5529 pins, integrated Spy-Bi-Wire flash emulation module, and standard full JTAG pin access. The kit is pre-programmed with an out-of-box demo to immediately demonstrate the capabilities of the MSP430 and Experimenter Board. This document details the hardware, its use, and the example software. Figure 1. MSP-EXP430F5529 Experimenter Board The MSP-EXP430F5529 Experimenter Board is available for purchase from the TI eStore: https://estore.ti.com/MSP-EXP430F5529-MSP430F5529-Experimenter-Board-P2413C43.aspx SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 7 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Getting Started www.ti.com 1.2 Kit Contents • MSP-EXP430F5529 Experimenter Board • Two mini-USB cables • Battery holder • 1GB microSD card • Quick start guide 8 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com User Experience Software 2 User Experience Software 2.1 Introduction The MSP-EXP430F5529 Experimenter Board arrives with a User Experience application installed to demonstrate a few of the capabilities of the MSP430F5529. Set the power switch to "LDO", and connect your PC to the "5529 USB" connection as shown in Figure 2. A splash screen displaying the TI logo should appear on the LCD. Wait approximately three seconds, or press either the S1 or S2 button, to display the Main Menu. Use the thumb wheel to navigate up and down the menu items on the LCD screen. Press the S1 pushbutton to enter a selection, or press the S2 pushbutton to cancel. Figure 2. User Experience Navigation 2.2 Main Menu The main menu displays a list of applications and settings that demonstrate key features of the MSP430F5529. Use the thumb wheel on the bottom right of the PCB to scroll up and down through the menu options. Use the push-buttons to enter and exit menu items. Press S1 to enter a menu item. Press S2 to return to a previous menu or to cancel an operation. Each application in the main menu is described in the following sections. SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 9 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated User Experience Software www.ti.com 2.3 Clock Select this option from the main menu to bring up the Clock sub-menu. Press S2 to return to the previous menu. NOTE: The User Experience software initializes the real-time clock to 04:30:00 - 01/01/2011 when powered is applied to the MSP430. Digital Clock: Displays an image of a digital watch with the current time and date. Analog Clock: Displays an image of an analog clock with the current time. Set Time: Allows the user to set the current time. Use the scroll wheel to change the value of the current selection. Press push-button S1 is used to advance to the next field. The clock changes take affect after the last field is updated. 2.4 Games Select this option from the main menu to bring up the Games sub-menu. Press S2 to return to the previous menu. Defender: The player controls a small spaceship. The object of the game is to fly through a tunnel without hitting the walls and to successfully navigate around mines scattered throughout the tunnel. Press S1 or S2 to begin the game. Use the wheel to move the ship up and down and press S1 or S2 to shoot a missile. As the game progresses, the tunnel gets narrower and the game speeds up. After the player's ship crashes, the score is displayed. Simon: A version of the famous memory game. The objective of the game is to match a randomly generated sequence of LEDs displayed on the touch pads. After the sequence is displayed, the user must touch the correct pads in the same sequence. The game begins with a single-symbol sequence and adds an additional symbol to the sequence after each successful response by the user. The game ends when the user incorrectly enters a sequence. The number of turns obtained in the sequence is then displayed. Tilt Puzzle: A version of the famous "8-puzzle" game. The game consists of a 3 by 3 grid with eight numbers and one empty space. The game utilizes the on-board accelerometer to shift numbers up-down and left-right. The objective of the game is to have the sum of the numbers in each row and column equal to twelve. Press S1 to begin a new game if the current game is unsolvable. The nature of the game is that there is a 50% probability the game is not solvable. 2.5 Power Tests Select this option from the main menu to bring up the Power Test sub-menu. Press S2 to return to the previous menu. The Power Test menu contains two demonstrations that allow the user to externally measure the current consumption of the MSP430 in both active mode and low-power mode. Current consumption can be measured using a multi-meter with current measuring capabilities (ammeter). Remove the jumper on "430 PWR" (JP6) and connect a multi-meter in series with the MSP430 VCC supply. This connection can be made using the two large vias near the "430 PWR" text on the PCB. See Section 4 for more details on this connection. Active Mode: Demo for measuring active mode current of the MSP430. Instructions are presented on screen. Press S1 to continue to the application. Press S2 to return to the Power Tests sub-menu. The Active Mode menu consists of two columns. The left column controls the core voltage (VCORE) of the MSP430F5529, and the right column controls MCLK. The right column displays only those MCLK frequencies that are valid for the current VCORE setting. The capacitive touch pads at the bottom of the board control which column is currently active. The wheel scrolls through the options in the active column. 10 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com User Experience Software Press S1 to enter Measurement Mode. While in measurement mode, measure the current by attaching a multi-meter across the 430 PWR holes and removing the 430 PWR jumper J6. Replace the 430 PWR jumper after making the measurement, then press S1 or S2 to return to the Active Mode menu. Press S2 to return to the Power Tests sub-menu Low Power Mode: Selecting Low Power Mode takes the user to an information screen with directions on how to navigate the Low Power Mode menu. Press S1 to continue on to the application. Press S2 to return to the Power Tests sub-menu. In the Low Power Mode menu, use the wheel to select a low-power mode option, then press S1 to enter low-power mode. While in low-power mode, measure the current by attaching a multi-meter across the 430 PWR holes and removing the 430 PWR jumper. Press S1 or S2 to return to the Low Power Mode menu. 2.6 Demo Apps Select this option from the main menu to bring up the Demo Apps sub-menu, which allows access to various demo applications. Many of them require a USB connection. Use the wheel to select one of the options and then press S1 to enter the application. Press S2 to return to the main menu. Terminal Echo uses the CDC stack to communicate with a hyperterminal on the PC. USB Mouse uses the HID stack to interface with the PC. Terminal Echo: Select Terminal Echo to display an informational screen and connects to the PC. Make sure to connect a USB cable from the USB port labeled "5529 USB" to the host PC. Open a hyperterminal window and connect to the MSP430. Text that is typed in the hyperterminal window is echoed back to the terminal and is displayed on the LCD screen of the Experimenter Board. Press S2 to exit and return Demo Apps sub-menu. USB Mouse: Select USB Mouse to display an informational screen and connects to the PC. Make sure to connect a USB cable from the USB port labeled "5529 USB" to the host PC. The MSP430 now acts as the mouse for the PC. Tilt the board to move the mouse around the screen, and press S1 to click. Press S2 to exit and return Demo Apps sub-menu. USB microSD: Select USB microSD to connect to the PC as a mass storage device. Make sure to connect a USB cable from the USB port labeled "5529 USB" to the host PC. The MSP430 shows as an external drive (or removable drive) for the PC. Press S2 to return to the Demo Apps sub-menu. Touch Graph: Select Touch Graph to display an instruction screen for a very short time and then launch the application. Touch the capacitor key pads with varying pressures to see the varying capacitance being displayed as bars with varying heights. Slide a finger over multiple capacitor key pads to observe the change in heights of bars with respect to the current position of the finger and also the effect of capacitance from neighboring pads. Press S2 to exit and return Demo Apps sub-menu. Touch Slide: Select Touch Slide to display an instruction screen for a very short time and then launch the application. Touch the capacitor key pads with varying pressures to see the varying capacitance being displayed as bars with varying heights. Slide a finger over multiple capacitor key pads to observe the change in heights of bars with respect to the current position of the finger and also the effect of capacitance from neighboring pads. Press S2 to exit and return Demo Apps sub-menu. Demo Cube: Select Demo Cube to launch the demo cube application. Read the instructions and press S1 to start the application. There are two modes. Use S1 to toggle between them. In the first mode, the cube randomly rotates by itself. In the second mode, the cube can be rotated by tilting the board. This mode uses the accelerometer. Press S2 to exit and return Demo Apps sub-menu. SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 11 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated User Experience Software www.ti.com 2.7 SD Card Access Select SD Card Access to access a microSD card placed in the SD card reader at the top of the board. If no SD card is present, a warning screen is displayed. When an SD card is present, the screen displays a list of the contents of the card. Directories are denoted by "". Use the wheel to scroll through the list and select files or directories to open by pressing S1. When a file is open, use the wheel to scroll further through the file. Press S2 to close the current file or directory. Press S2 while in the root directory to return to the main menu. 2.8 Settings Menu Select Settings to modify the display settings for the Experimenter Board. Use the wheel to select the setting to modify and press S1 to enter. Press S2 to return to the main menu. Contrast: Modify the contrast of the LCD by turning the wheel. When first entering the menu, the contrast remains unchanged for a few seconds to allow the user to read the instructions and then changes to the setting for the current position of the wheel. After the contrast is set at the desired level, press S2 to return to the Settings sub-menu. Backlight: Modify the brightness of the backlight by turning the wheel. There are 12 brightness settings, from having the backlight turned off up to full brightness. After the backlight is set at the desired level, press S2 to return to the Settings sub-menu. Calibrate Accel: Sets the "default" position for the accelerometer. An instruction screen is shown first. For best results, set the board on a flat surface. Press S1 to start calibrations. The accelerometer readings at that point in time are stored to flash and are subtracted from the subsequent accelerometer readings of other applications like USB Mouse and USB Tilt Puzzle. SW Version: Displays the current version of the firmware loaded on the Experimenter Board. LEDs & Logo: Lights all the LEDs on the board. There are one red, one yellow, one green, and five blue LEDs on the capacitive touch pads. This provides a method to determine whether or not all the LEDs are in working condition. The screen also displays the TI Bug and a USB Flash Drive logo on the screen. 12 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Software Installation and Debugging 3 Software Installation and Debugging 3.1 Software Texas Instruments' Code Composer Studio (CCS) is an MSP430 integrated development environment (IDE) designed specifically to develop applications and program MSP430 devices. CCS, CCS Core Edition, and IAR Embedded Workbench can all be used to evaluate the example software for the Experimenter Board. The compiler limitation of 8KB prevents IAR KickStart from being used for the evaluation of the example software. The example software, titled "User Experience," is available online as MSP-EXP430F5529 Experimenter Board User Experience Software. 3.2 Download the Required Software Different development software tools are available for the MSP-EXP430F5529 Experimenter Board development board. IAR Embedded Workbench KickStart and Code Composer Studio (CCS) are both available in a free limited version. IAR Embedded Workbench KickStart allows 8KB of C-code compilation. CCS is limited to a code size of 16KB. The software is available at www.ti.com/msp430. The firmware is larger than IAR KickStart's 8KB limit, so a full license of IAR Workbench is required to compile the application using IAR. A 30-day evaluation version of IAR is also available from http://supp.iar.com/Download/SW/?item=EW430-EVAL. This document describes working with Code Composer Studio (CCS). There are many other compilers and integrated development environments (IDEs) for MSP430 that can be used with the MSP-EXP430F5529 Experimenter Board, including Rowley Crossworks and MSPGCC. However, the example project has been created using Code Composer Studio (CCS) and IAR. For more information on the supported software and the latest code examples visit the online product folder (http://focus.ti.com/docs/toolsw/folders/print/msp-exp430f5529.html). 3.3 Working With the Example Software The MSP-EXP430F5529 example software is written in C and offers APIs to control the MSP430F5529 chip and external components on the MSP-EXP430F5529 Experimenter Board. New application development can use this library for guidance. The example software can be downloaded from the MSP-EXP430F5529 tools page, MSP-EXP430F5529 Experimenter Board User Experience Software. The zip package includes the MSP-EXP430F5529 example software. The code is ready for compilation and execution. To modify, compile, and debug the example code the following steps should be followed: 1. If you have not already done so, download the sample code from the MSP-EXP430F5529 tools page. 2. Install 5529UE-x.xx-Setup.exe installation package to the PC. 3. Connect the MSP-FET430UIF programmer to the PC. If you have not already done so, install the drivers for the programmer. 4. Connect one end of the 14-pin cable to JTAG programmer and another end to the JTAG header on the board. 5. Open CCS and select a workspace directory (see Figure 3). SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 13 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Software Installation and Debugging www.ti.com Figure 3. Selecting a CCS Workspace • Select Project > Import Existing CCS/CCE Eclipse Project. • Browse to the extracted project directory. The project should now show up in the Projects list (see Figure 4). • Make sure the project is selected, and click Finish. Figure 4. Opening Existing Project The project is now open. To build, download, and debug the code on the device on the MSP-EXP430F5529 Experimenter Board, select Target > Debug Active Project or click the green 'bug' button. 14 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Software Installation and Debugging You may be prompted to update the firmware on the MSP-FET430UIF programmer. Do not be concerned; click the button that says Update, and the program download should continue as expected. NOTE: To begin developing your own application, follow these steps: 1. Download and install a supported IDE: Code Composer Studio – Free 16KB IDE: www.ti.com/ccs IAR Embedded Workbench KickStart – Free 8KB IDE: www.ti.com/iar-kickstart 2. Connect the MSP-EXP430F5529 Experimenter Board "eZ-FET" USB to the PC. 3. Download and debug your application. SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 15 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Software Installation and Debugging www.ti.com 3.3.1 Basic Code Structure CTS "Capacitive Touch Sensing" library with functions related to the capacitive touch pads. CCS CCS-specific project files CCS_Code_Size_Limited CCS-specific project files for 16kb code size limited version F5xx_F6xx_Core_Lib Core Libraries FatFs Stack for the FAT file system used by SD Card IAR IAR-specific project files MSP-EXP430F5529_HAL Provides an abstraction layer for events like button presses, etc. HAL_AppUart Functions for controlling application UART HAL_Board Experimenter Board port initialization and control HAL_Buttons Driver for the buttons on the Experimenter Board HAL_Cma3000 Functions required to use on-board accelerometer HAL_Dogs102x6 Driver for the DOGS 102x64 display HAL_Menu Used to create the menus for the example software and applications HAL_SDCard Driver for the SD Card module HAL_Wheel Driver for the scroll (thumb) wheel USB USB stack for the Experimenter Board UserExperienceDemo Files related to the example software provided with the board 5xx_ACTIVE_test Runs a RAM test Clock Displays analog and digital clocks. Also provides a function to set time and date. Demo_Cube Displays a auto/manual rotating cube (uses accelerometer) DemoApps Contains the demos for capacitive touch EchoUsb HyperTerminal application LPM Provides options for various low-power modes MassStorage Use microSD as external storage on computer menuGames Play LaunchPad Defender or Simon Puzzle Play Tilt-puzzle Mouse Use the Experimenter Board as a mouse PMM Active low-power modes. Choose VCORE and MCLK settings. PowerTest Test the current consumption of various low-power modes Random Random number generator SDCard Access microSD card contents on the Experimenter's Board Settings Options to set various parameters like contrast, brightness, etc. UserExperience.c Main MSP-EXP430F5529 Experimenter Board file MSP-EXP430F5529 User Experience Manifest.pdf readme.txt 16 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com MSP-EXP430F5529 Hardware 4 MSP-EXP430F5529 Hardware 4.1 Hardware Overview Figure 5 and Figure 6 show the functional blocks and connections of the MSP-EXP430F5529 Experimenter Board. The area of the PCB labeled as "eZ430-FET Emulator" and bordered by a thick broken line on the PCB silk screen is an integrated TI Flash Emulation Tool (FET) which is connected to the Experimenter Board by the jumpers on JP16. This module is similar to any eZ430 emulator, and provides real-time in-system Spy-Bi-Wire programming and debugging via a USB connection to a PC. Using the eZ430-FET Emulator module eliminates the need for using an external MSP430 Flash Emulation Tool (MSP-FET430UIF). However, full speed 4-wire JTAG communication is only possible with a MSP-FET430UIF connected to the "5529 JTAG" header. For additional details on the installation and usage of the Flash Emulation Tool, Spy-Bi-Wire and JTAG, see the MSP430 Hardware Tools User's Guide (SLAU278). Figure 5. Simple Hardware Overview SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 17 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated MSP-EXP430F5529 Hardware www.ti.com Figure 6. Hardware Block Details 4.2 Jumper Settings and Power Figure 7 shows the common jumper settings, depending on the power source for the MSP-EXP430F5529 Experimenter Board. Figure 7. Common Power Jumper Settings 18 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com MSP-EXP430F5529 Hardware There are also other jumpers available for current measurement, disconnection of certain peripherals, and other advanced options (see Table 1). The black line on the board below the jumpers JP8 (LDO) and JP11 (JTAG) indicates the default jumper position. Table 1. MSP-EXP430F5529 Jumper Settings and Functionality Header Functionality When Jumper Present Functionality When Jumper Absent JP2 – POT Connects pin P8.0 to potentiometer Disconnects pin P8.0 to potentiometer JP3 – LED1 Connects pin P1.0 to LED1 Disconnects pin P1.0 to LED1 JP6 – 430 PWR Provides power to MSP430F5529. Also used to measure current MSP430F5529 is not powered. consumption of the MSP430F5529. NOTE: The two large vias near the "430 PWR" label on the PCB are connected to JP6 as well. These vias can be used to easily connect a test lead onto the PCB for current consumption measurement. JP7 – SYS PWR Provides power to the entire MSP-EXP430F5529 board. Also MSP-EXP430F5529 Experimenter used to measure current consumption of the entire board. Board system devices are not powered. JP8 – LDO Only applicable when powering via "5529 USB" connection. No connection to MSP430 VCC when powered via "5529 USB". ALT (Default): Connects the alternate LDO (TPS73533) to the MSP430 VCC. INT: Connects the internal 'F5529 LDO to the MSP430 VCC. JP11 – JTAG Only applicable when powering via JTAG connection. JTAG tool does NOT provide power to system. EXT (Default): JTAG tool does NOT provide power to system. INT: JTAG tool will provide power to system. JP14 – RF PWR Connects system VCC to the RF headers: J12, J13, and RF2. RF headers: J12, J13, and RF2 do not have power. JP15 – USB PWR Connects USB 5-V power to MSP430F5529 and Alternate LDO USB 5-V power not connected to (TPS73533). system. JP16 – eZ-FET DVCC: Connects MSP430 V No connection between CC to eZ-FET Connection MSP430F5529 and the eZ-FET. TXD / RXD: Connects UART between F5529 and eZ-FET. RST / TEST: Connects Spy-Bi-Wire JTAG between F5529 and eZ-FET. SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 19 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated MSP-EXP430F5529 Hardware www.ti.com Figure 8 shows a visual diagram of the power connections for the MSP-EXP430F5529 Experimenter Board. Care should be observed when using multiple power sources such as USB and a battery at the same time. This could lead to the battery being charged if the power settings are not correct. Figure 8. Visual Power Schematic 20 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com MSP-EXP430F5529 Hardware Figure 9 shows a method of connecting a multi-meter to the MSP-EXP430F5529 to measure the current of the MSP430F5529. Figure 9. MSP430 Current Measurement Connection 4.3 eZ-FET Emulator The connection between the eZ-FET emulator and the MSP-EXP430F5529 can be opened by removing the jumpers on JP16. This is necessary only to ensure there is no interaction between the two sub-systems. The eZ-FET Emulator can program other eZ430 tools such as the eZ430-F2013 target board as well. A six-pin header on J17 would need be installed on the PCB for this feature. The USB interface on the eZ-FET emulator also allows for UART communication with a PC host, in addition to providing power to Experimenter Board when the power switch is set to 'eZ'. The USCI module in the MSP430F5529 supports the UART protocol that is used to communicate with the TI TUSB3410 device on the eZ-FET emulator for data transfer to the PC. 4.4 MSP-EXP430F5529 Hardware Components 4.4.1 Dot-Matrix LCD The EA DOGS102W-6 is a dot-matrix LCD with a resolution of 102x64 pixels. The LCD has a built-in back-light driver that can be controlled by a PWM signal from the MSP430F5529, pin P7.6. The MSP430F5529 communicates with the EA DOGS102W-6 via an SPI-like communication protocol. To supplement the limited set of instructions and functionalities provided by the on-chip LCD driver, an LCD driver has been developed for the MSP430F5529 to support additional functionalities such as font set and graphical utilities. More information on the LCD can be obtained from the manufacturer's data sheet. SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 21 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated MSP-EXP430F5529 Hardware www.ti.com 4.4.2 Push Buttons, Potentiometer, and LEDs Table 2 describes the pin connections for the potentiometer, push-button switches, and the on-board LEDs. Table 2. Push Buttons, Potentiometer, and LED Connections Peripheral Pin Connection Potentiometer Wheel P8.0 Switch 1 (S1) P1.7 Switch 2 (S2) P2.2 RESET Switch (S3) RST / NMI LED1 P1.0 LED2 P8.1 LED3 P8.3 Capacitive Touch Pad 1 (Cross) P1.1 Capacitive Touch Pad 2 (Square) P1.2 Capacitive Touch Pad 3 (Octagon) P1.3 Capacitive Touch Pad 4 (Triangle) P1.4 Capacitive Touch Pad 5 (Circle) P1.5 4.4.3 Wireless Evaluation Module Interface Included in the communication peripherals are the headers that support the CC-EM boards from TI. The transceiver modules connect to the USCI of the MSP430F5529 configured in SPI mode using the UCB0 peripheral. Libraries that interface the MSP430 to these transceivers are available at www.ti.com/msp430 under the Code Examples tab. The RF PWR jumper must be populated to provide power to the EM daughterboard. The following radio daughter cards are compatible with the MSP-EXP430F5529 Experimenter Board: • CC1100EMK/CC1101EMK – Sub-1-GHz radio • CC2500EMK – 2.4-GHz radio • CC2420EMK/CC2430EMK – 2.4-GHz 802.15.4 [SoC] radio • CC2520EMK/CC2530EMK – 2.4-GHz 802.15.4 [SoC] radio • CC2520 + CC2591 EM (if R4 and R8 0-Ω resistors are connected) NOTE: Future evaluation boards may also be compatible with the header connections. 4.4.4 eZ430-RF2500T Interface The eZ430-RF2500T module can be attached to the MSP-EXP430F5529 Experimenter Board in one of two ways – through an 18-pin connector (J12 – eZ RF) or a 6-pin connector (J13 – eZ RF Target). The pins on the eZ430-RF2500T headers are multiplexed with the pins on the CC-EM headers, which allows the EZ430-RF2500T module to behave identically to a CC-EM daughterboard. Power must be provided to the EZ430-RF2500T module by setting the jumper RF PWR (JP14). The eZ430-RF2500T connection should always be made with the antenna facing off of the board. For more information on the connections to the required eZ430-RF2500T, see the eZ430-RF2500 Development Tool User's Guide (SLAU227), available through www.ti.com/ez430. 22 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com MSP-EXP430F5529 Hardware 4.4.5 Three-Axis Accelerometer The MSP-EXP430F5529 Experimenter Board includes a VTI digital three-axis accelerometer (part number CMA3000-D01). The accelerometer supports SPI communication and outputs data for each X, Y and Z axis. The accelerometer is powered through pin P3.6. This interface, especially in conjunction with other on-board interfaces such as the LCD, enables several potential applications such as USB mouse movement emulation and tilt sensing. The example software used the accelerometer for the Tilt Puzzle, Demo Cube, and USB Mouse. For more information on the accelerometer chip, see the manufacturer's data sheet (http://www.vti.fi). 4.4.6 Pin Access Headers The MSP-EXP430F5529 Experimenter Boards includes three headers (J4, J5, and J12) that can be used as additional connections to external hardware or for signal analysis during firmware development. All pins except the GND pin are internally selectable as either general purpose input/output pins or as described in the device datasheet. Table 3. Pinning Mapping for Header J4 Pin Description Port Pin Port Pin Pin Description Vcc VCC P6.6 CB6 / A6 UCA1RXD / UCA1SOMI P4.5 P8.1 GPIO – LED2 UCA1TXD / UCA1SIMO P4.4 P8.2 GPIO – LED3 GPIO P4.6 P8.0 GPIO – POT GPIO P4.7 P4.5 UCA1RXD / UCA1SOMI A9 / VREF- / VeREF- P5.1 P4.4 UCA1TXD / UCA1SIMO GND GND P6.7 CB7 / A7 Table 4. Pin Mapping for Header J5 Pin Description Port Pin Port Pin Pin Description VCC VCC P7.0 CB8 / A12 UCB1SOMI / UCB1SCL - SD P4.2 P7.1 CB9 / A13 UCB1SIMO / UCB1SDA - LCD/SD P4.1 P7.2 CB10 / A14 UCB1CLK / UCA1STE - LCD/SD P4.3 P7.3 CB11 / A15 UCB1STE / UCA1CLK - RF P4.0 P4.1 UCB1SIMO / UCB1SDA - LCD/SD TB0OUTH / SVMOUT - SD P3.7 P4.2 UCB1SOMI / UCB1SCL - SD GND GND P7.7 TB0CLK / MCLK Table 5. Pin Mapping for Header J12 Pin Description Port Pin Port Pin Pin Description (RF_STE) P2.6 P3.0 (RF_SIMO) (RF_SOMI) P3.1 P3.2 (RF_SPI_CLK) TA2.0 P2.3 P2.1 TA1.2 TB0.3 P7.5 GND GND GPIO P4.7 P2.4 TA2.1 (RXD) P4.5 P4.6 GPIO (TXD) P4.4 P4.0 UCx1xx (LED1) P1.0 P2.0 TA1.1 GND GND RF_PWR RF_PWR SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 23 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Frequently Asked Questions, References, and Schematics www.ti.com 5 Frequently Asked Questions, References, and Schematics 5.1 Frequently Asked Questions 1. Which devices can be programmed with the Experimenter Board? The MSP-EXP430F5529 board is designed specifically to demonstrate the MSP430F5529. 2. The MSP430F5529 is no longer accessible via JTAG. Is something wrong with the device? Verify that the jumpers are configured correctly. See Section 4 for jumper configuration. Verify that the target device is powered properly. If the target is powered locally, verify that the supplied VCC is sufficient to power the board. Check the device data sheet for the specification. 3. I did every step in the previous question but still could not use or communicate with the device. Improper programming of the device could lead to a JTAG total lockup condition. The cause of this problem might be an incorrect device selection when creating a new project in CCS (select MSP430F5529) or programming the device without a stable power source (low battery, switching the Power Selector while programming, or absence of the MSP430 power jumper JP6 during programming). To solve this, completely reset the device. First unplug all power sources and connections (JTAG and USB cables). Set the Power Selector Switch to FET mode. Use a jumper cable to briefly short one of the GND test points with the 430 PWR test point. The device should now be released from the lockup state. 4. Does the Experimenter board protect against blowing the JTAG fuse of the target device? No. Fuse blow capability is inherent to all flash-based MSP430 devices to protect user's intellectual property. Care must be taken to avoid the enabling of the fuse blow option during programming, because blowing the fuse would prevent further access to the MSP430 device via JTAG. 5. I am measuring system current in the range of 30 mA, is this normal? The LCD and the LCD backlight require a large amount of current (approximately 20 mA to 25 mA) to operate. This results in a total system current consumption in the range of 30 mA. If the LCD backlight is on, 30 mA is considered normal. To ensure the board is OK, disable the LCD and the LCD backlight and measure the current again. The entire board current consumption should not exceed 10 mA at this state. Note that the current consumption of the board could vary greatly depending on the optimization of the board configurations and the applications. The expected current consumption for the MSP430F5529 in standby mode (LPM3), for example, is ~2 μA. Operating at 1 MHz, the total current consumption should not exceed ~280 μA. 6. I have trouble reading the LCD clearly. Why is the LCD contrast setting so low? The LCD contrast is highly dependent on the voltage of the system. Changing power source from USB (3.3 V) to batteries (~3 V) could drastically reduce the contrast. Fortunately, the LCD driver supports adjustable contrast. The specific instruction can be found in the LCD user's guide. The MSP-EXP430F5529 software also provides the function to adjust the contrast using the wheel (see Section 2.8). 7. When I run the example code, nothing happens on the LCD. Verify that all jumpers are installed correctly and the 14-pin JTAG cable are properly connected. 5.2 References • MSP430x5xx/MSP430x6xx Family User's Guide (SLAU208) • Code Composer Studio (CCStudio) Integrated Development Environment (IDE) (http://focus.ti.com/docs/toolsw/folders/print/msp-ccstudio.html) • MSP430 Interface to CC1100/2500 Code Library (PDF: SLAA325) (Associated Files: SLAA325.ZIP) 24 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Frequently Asked Questions, References, and Schematics 5.3 Schematics and BOM The following pages show the schematics and BOM. In addition, the original Eagle CAD schematics and Gerber files are available for download (SLAR055). Figure 10. Schematics (1 of 7) SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 25 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Frequently Asked Questions, References, and Schematics www.ti.com Figure 11. Schematics (2 of 7) 26 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Frequently Asked Questions, References, and Schematics Figure 12. Schematics (3 of 7) SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 27 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Frequently Asked Questions, References, and Schematics www.ti.com Figure 13. Schematics (4 of 7) 28 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Frequently Asked Questions, References, and Schematics Figure 14. Schematics (5 of 7) SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 29 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Frequently Asked Questions, References, and Schematics www.ti.com Figure 15. Schematics (6 of 7) 30 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Frequently Asked Questions, References, and Schematics Figure 16. Schematics (7 of 7) SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 31 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Frequently Asked Questions, References, and Schematics www.ti.com Table 6. Bill of Materials Part Value Package Type Device C1 47pF 0805 C2 12pF 0805 C3 DNP 0603 C4 12pF 0805 C5 10μF 0805 C6 47pF 0805 C7 100nF 0805 C8 220n 0603 C9 220n 0603 C10 10uF/6,3V 1210 C11 100n 0603 C12 100n 0805 C13 100n 0805 C14 DNP 0603 C15 10uF/6,3V 1210 C16 100n 0805 C17 470n 0805 C18 10μF 0805 C19 100nF 0805 C20 .1u 0603 C21 .1u 0603 C22 1μF 0805 C23 1μF 0805 C24 1μF 0805 C25 1μF 0805 C26 1μF 0805 C27 1μF 0805 C28 4.7uF 0805 C29 10nF 0805 C30 1μF 0805 C31 .1u 0603 C32 4.7u 0805 C33 0.1u 0603 C34 4u7 0603 C35 10p 0603 C36 10p 0603 C37 10n 0402 C38 33p 0402 C39 33p 0402 C40 1u/6.3V 0603 C41 100n 0402 C42 1u/6.3V 0603 C43 100n 0402 C44 1u/6.3V 0603 C45 22p 0402 C46 22p 0402 C47 100n 0402 C48 100n 0402 C49 100n 0402 C50 10uF/6,3V 1210 CON1 8PIN_SM_MA_HEADER HEADER 2x4 MALE .1" SMD CON2 8PIN_SM_MA_HEADER HEADER 2x4 MALE .1" SMD 32 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Frequently Asked Questions, References, and Schematics Table 6. Bill of Materials (continued) Part Value Package Type Device CON3 8PIN_SM_MA_HEADER HEADER 2x4 MALE .1" SMD D1 LLSD103A-7 Mini MELF D2 1N4148 Micro MELF SOD110-R J1 103308-2 14-Pin Male JTAG Connector JP2 POT_JMP HEADER 1x2 MALE .1" TH JP1E\SMALL_PIN JP3 LED_JMP HEADER 1x2 MALE .1" TH JP1E\SMALL_PIN J4 HEADER - F5529 PIN ACCESS HEADER 2x7 MALE .1" TH J5 HEADER - F5529 PIN ACCESS HEADER 2x7 MALE .1" TH JP6 430_PWR HEADER 1x2 MALE .1" TH JP1E JP7 SYS_PWR HEADER 1x2 MALE .1" TH JP1E JP8 LDO_PWR_SEL HEADER 1x3 MALE .1" TH PINHD-1X3/SMALL_PIN J9 22-03-5035 MOLEX 3-PIN MALE HEADER 22-03-5035 J10 HEADER - PWR HEADER 1x3 MALE .1" TH PINHD-1X3 JP11 JTAG_PWR_SEN HEADER 1x3 MALE .1" TH PINHD-1X3/SMALL_PIN J12 eZ-RF1 HEADER - RF2500 HEADER 2x9 MALE .1" TH J13 6-Pin Male eZ430 Connector 6-Pin Male eZ430 Connector SL127L6TH JP14 RF_PWR HEADER 1x2 MALE .1" TH JP1E JP15 USB_PWR HEADER 1x2 MALE .1" TH JP1E JP16 eZ430-FET_JMP HEADER 2x5 MALE .1" TH JP5Q J17 6-Pin Male eZ430 Connector 6-Pin Male eZ430 Connector SL127L6TH LED1 LEDCHIPLED_0603 0603 LEDCHIPLED_0603 LED2 LEDCHIPLED_0603 0603 LEDCHIPLED_0603 LED3 LEDCHIPLED_0603 0603 LEDCHIPLED_0603 LED4 OSRAM TOPLED Santana Blue LED 0805 (Surface Mount Bottom) OSRAM TOPLED Santana Blue LED LED5 OSRAM TOPLED Santana Blue LED 0805 (Surface Mount Bottom) OSRAM TOPLED Santana Blue LED LED6 OSRAM TOPLED Santana Blue LED 0805 (Surface Mount Bottom) OSRAM TOPLED Santana Blue LED LED7 OSRAM TOPLED Santana Blue LED 0805 (Surface Mount Bottom) OSRAM TOPLED Santana Blue LED LED8 OSRAM TOPLED Santana Blue LED 0805 (Surface Mount Bottom) OSRAM TOPLED Santana Blue LED LED9 LEDCHIPLED_0603 0603 LED_0603D0603 PAD1 CAP_TOUCH_PAD CAP_TOUCH_PAD PROJECT7264_CC430_PAD PAD2 CAP_TOUCH_PAD CAP_TOUCH_PAD PROJECT7264_CC430_PAD PAD3 CAP_TOUCH_PAD CAP_TOUCH_PAD PROJECT7264_CC430_PAD PAD4 CAP_TOUCH_PAD CAP_TOUCH_PAD PROJECT7264_CC430_PAD PAD5 CAP_TOUCH_PAD CAP_TOUCH_PAD PROJECT7264_CC430_PAD POT1 EVL-HFKA05B54 POT EVL-HFKA05B54 Q1 MS3V-T1R 32.768kHz CL Clock Crystal 32kHz F20XX_PIR_DEMO_&_EVAL_CM200T Q2 SMD Oscillator 4MHz SMD Oscillator 4MHz QUARZ_HC49_4P-1 Q3 SMD Oscillator 12MHz SMD Oscillator 12MHz XTL_FT7AFT10A R1 47k 0603 R-US_R0603 R2 0R 0603 R-US_R0603 R3 470R 0603 R-US_R0603 R4 470R 0603 R-US_R0603 R5 470R 0603 R-US_R0603 R6 47k 0603 R-US_R0603 R7 680 0805 RES0805 R8 680 0805 RES0805 R9 680 0805 RES0805 R10 680 0805 RES0805 R11 680 0805 RES0805 R12 100K 0603 R-US_R0603 R13 100k 0603 R-US_R0603 SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 33 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Frequently Asked Questions, References, and Schematics www.ti.com Table 6. Bill of Materials (continued) Part Value Package Type Device R14 100k 0603 R-US_R0603 R15 100K 0603 R-US_R0603 R16 100k 0603 R-US_R0603 R17 47k 0603 R-US_R0603 R18 47k 0603 R-US_R0603 R19 0 0603 R-US_R0603 R20 100k 0603 R-US_R0603 R21 36k 1% 0603 R-US_R0603 R22 27R 0603 R-US_R0603 R23 27R 0603 R-US_R0603 R24 1M 0603 R-US_R0603 R25 1k4 0603 R-US_R0603 R26 100R 0603 R-US_R0603 R27 33k 0603 R-US_R0603 R28 47k 0402 R_SMDR0402 R29 47k 0402 R_SMDR0402 R30 47k 0402 R_SMDR0402 R31 100R 0402 R_SMDR0402 R32 100R 0402 R_SMDR0402 R33 270 0402 R_SMDR0402 R34 DNP 0402 R_SMDR0402 R35 100R 0402 R_SMDR0402 R36 100R 0402 R_SMDR0402 R37 6k8 0402 R_SMDR0402 R38 3k3 0402 R_SMDR0402 R39 10k 0402 R_SMDR0402 R40 15k 0402 R_SMDR0402 R41 33k 0402 R_SMDR0402 R42 1k5 0402 R_SMDR0402 R43 33R 0402 R_SMDR0402 R44 DNP (47k) 0402 R_SMDR0402 R45 DNP (47k) 0402 R_SMDR0402 R46 33R 0402 R_SMDR0402 R47 100k/1% 0402 R_SMDR0402 R48 33k 0402 R_SMDR0402 R49 3k3 0402 R_SMDR0402 R50 100k/1% 0402 R_SMDR0402 R51 3k3 0402 R_SMDR0402 R52 100R 0402 R_SMDR0402 R53 1k5 0402 R_SMDR0402 R54 1k5 0402 R_SMDR0402 RF1 CCxxxx RF EVM HEADER CCXXXX_20PIN TFM-110-02-SM-D-A-K RF2 CCxxxx RF EVM HEADER CCXXXX_20PIN TFM-110-02-SM-D-A-K S1 USER1 PUSHBUTTON BUTTON EVQ-11L05R S2 USER2 PUSHBUTTON BUTTON EVQ-11L05R S3 F5529 RESET PUSHBUTTON BUTTON EVQ-11L05R S4 F5529 USB BSL PUSHBUTTON BUTTON EVQ-11L05R SW1 POWER SELECT SWITCH DP3T_SWITCH JS203011CQN TP1 F5529 VREF+ TEST POINT TEST_POINT - TP2 F5529 VCORE TEST POINT TEST_POINT - TP3 CC430 EM TEST POINT TEST_POINT - 34 MSP-EXP430F5529 Experimenter Board SLAU330A–May 2011–Revised June 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated www.ti.com Frequently Asked Questions, References, and Schematics Table 6. Bill of Materials (continued) Part Value Package Type Device TP4 CC430 EM TEST POINT TEST_POINT - TP5 CC430 EM TEST POINT TEST_POINT - TP6 CC430 EM TEST POINT TEST_POINT - TP7 CC430 EM TEST POINT TEST_POINT - TP8 CC430 EM TEST POINT TEST_POINT - TP9 eZ430 F16x TEST POINT (EZ_VBUS) TEST_POINT - TP10 eZ430 F16x TEST POINT (RESET) TEST_POINT - TP11 eZ430 F16x TEST POINT (GND) TEST_POINT - TP12 eZ430 F16x TEST POINT (HTCK) TEST_POINT - TP13 eZ430 F16x TEST POINT (HTMS) TEST_POINT - TP14 eZ430 F16x TEST POINT (HTDI) TEST_POINT - TP15 eZ430 F16x TEST POINT (HTDO) TEST_POINT - U1 F5529 - MSP430F5529 80-LQFP MSP430F5529IPNR U2 3-AXIS SPI/I2C ACCELEROMETER SMD CMA3000 CMA3000-D01 U3 102x64 LCD DISPLAY EA DOGS102-6 EA DOGS102-6 U3 LED BACKLIGHT EA DOGS102-6 EA LED39x41-W U4 Alternate LDO - TPS73533 SC70-5 TPS73533DRBT U5 LED Backlight Current Source - TPS75105 SON-10 TPS75105DSKR U6 F5529 USB ESD Protection - TPD2E001 SOT-5 TPD2E001DRLR U7 eZ430 - MSP430F16x 64-LQFP MSP430F1612IPMR U8 eZ430 Level Translator - TXS0104E 14-TSSOP TXS0104EPWR U9 eZ430 LDO - TPS77301 8-MSOP TPS77301DGK U10 eZ430 - TUSB3410 32-LQFP TUSB3410VF U11 eZ430 USB ESD Protection - TPD2E001 SOT-5 TPD2E001DRLR U12 eZ430 EEPROM - CAT24C128YI 8-TSSOP CAT24C128YI USB1 F5529 USB Mini-USB Through Hole 54819-0519 USB2 eZ430 USB Mini-USB Through Hole 54819-0519 X1 microSD Card Holder microSD Card Holder 502702-0891 SLAU330A–May 2011–Revised June 2011 MSP-EXP430F5529 Experimenter Board 35 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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Hardware User Guide STK525 Hardware User Guide User Guide 1 7608A–AVR–04/06 Section 1 Introduction ........................................................................................... 1-3 1.1 Overview ...................................................................................................1-3 1.2 STK525 Starter Kit Features .....................................................................1-4 Section 2 Using the STK525................................................................................. 2-6 2.1 Overview ...................................................................................................2-6 2.2 Power Supply ............................................................................................2-7 2.3 RESET ....................................................................................................2-10 2.4 AT90USBxxx AVR Microcontroller..........................................................2-11 2.5 Serial Links .............................................................................................2-11 2.6 On-board Resources...............................................................................2-14 2.7 STK500 Resources .................................................................................2-19 2.8 In-System Programming .........................................................................2-20 2.10 Test Points ..............................................................................................2-23 2.11 Configuration Pads .................................................................................2-24 2.12 Solder Pads ............................................................................................2-25 Section 3 Troubleshooting Guide ....................................................................... 3-26 Section 4 Technical Specifications ..................................................................... 4-27 Section 5 Technical Support............................................................................... 5-28 Section 6 Complete Schematics......................................................................... 6-29 STK525 Hardware User Guide 1-3 7608A–AVR–04/06 Section 1 Introduction Congratulation for acquiring the AVR® STK525 Starter Kit. This kit is designed to give designers a quick start to develop code on the AT90USBxxx and for prototyping and testing of new designs. 1.1 Overview This document describes the STK525 dedicated to the AT90USBxxx AVR microcontroller. This board is designed to allow an easy evaluation of the product using demonstration software. To complement the evaluation and enable additional development capability, the STK525 can be plugged into the Atmel STK500 Starter Kit Board in order to use the AT90USBxxx with advanced features such as variable VCC, variable VRef, variable XTAL, etc. and supports all AVR development tools. To increase its demonstrative capabilities, this stand alone board has numerous onboard resources (USB, RS232, joystick, data-flash, microphone and temperature sensor). This user guide acts as a general getting started guide as well as a complete technical reference for advanced users. Introduction 1-4 STK525 Hardware User Guide 7608A–AVR–04/06 Figure 1-1 . STK525 Board 1.2 STK525 Starter Kit Features The STK525 provides the following features: 􀀀 AT90USBxxx TQFP device (2.7V 1.0 STK500 Expand connectors A4 Tuesday , January 17, 2006 2 4 STKNC Important: Def ault conf iguration: open reserv ed f or f uture mass storage extension 3.3V SP3 STK525 MEZZANINE FOR STK500 NRST STKNC VTG XTAL1 PA0 R8 2k PB7 PB3 PB5 PD5 PD7 PB1 PB6 PD1 PD3 PB2 PB4 PD6 PB0 PD2 PD4 C12 1nF PD0 1 2 AREF JP3 STK AREF VTG REF XT1 XT2 PE[2..0] VTG VTG PE[2..0] VTG PC[7..0] PC[7..0] PB[7..0] PD[7..0] PA[7..0] PA[7..0] PA5 PA7 PA6 PA1 PA3 PA4 1 2 JP1 STK X1 PA2 1 2 JP2 STK X2 PB[7..0] Complete Schematics STK525 Hardware User Guide 6-33 7608A–AVR–04/06 Figure 6-3 . Schematics, 3 of 5 Data Flash 3.3V LEDs 3.3V PF[7..0] DECOUPLING CAPACITOR CLOSE TO THE CONNECTOR R19 POT 100k Select 5 Lef t 7 Up 3 Right 6 Down 4 Com1 1 Com2 2 SW3 TPA511G PF[7..0] Temp Sensor PB[7..0] R18 NCP18WF104J03RB 5 9 4 8 3 7 2 6 1 10 11 P1 SUB-D9 FEMALE RS232 1234 J7 PF Spare (Not mounted) RS232 Interface JTAG Interface RS-CTS 3.3V Serial ISP Interface PE[7..0] CP1 VCC R16 100k STK525 MEZZANINE FOR STK500 3.3V VCC BUSY 1 RESET 2 WP 3 VCC 6 GND 7 CS 11 SCK 12 SI 13 SO 14 U2 AT45DB321C TSOP28 Microphone Preamplifier Interface PF0 VCC PB[7..0] CTS Title Size Document Number Rev Date: Sheet of 1.0 Interf aces A4 Tuesday , January 17, 2006 3 4 C20 100nF RTS CP2 R23 100k . 11 . 12 . 10 . 9 . 8 . 7 . 13 . 14 . 15 . 16 C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V- 6 TTL RS 232 GND VCC U3 MAX3232 RS232 BUFFER C17 100nF C16 100nF C18 100nF PF1 C19 100nF PD2 RxD DECOUPLING CAPACITOR CLOSE TO THE DEVICE RS-TxD RS-RxD PD[7..0] VCC PF0 1 TP4 Mic VCC DECOUPLING CAPACITOR CLOSE TO THE DEVICE C15 100nF PF1 SP4 PF2 SP5 VCC Caution DataFlash Fix 3V Power supply Only PF3 PB[7..0] C26 100nF RESET R11 100k CP3 DECOUPLING CAPACITOR CLOSE TO THE CONNECTOR PB5 PDO 1 VCC 2 SCK 3 PDI 4 RESET 5 GND 6 CON 2x3 J5 ISP CON TCK 1 GND 2 TDO 3 VCC 4 TMS 5 RESET 6 VCC 7 n.c. 8 TDI 9 GND 10 CON 2x5 J4 JTAG CON C21 100nF C23 100nF PD1 PF4 PF6 PF7 PF5 RESET PB1 R17 0 PB2 PB3 3.3V PB6 PD0 VCC PD3 TXD SP7 PB7 5 6 7 8 4 + - U4B LMV358 3 2 1 8 4 + - U4A LMV358 R27 0 R26 22k R25 10k R24 100k PB4 + C25 1uF R21 100k R28 100k C22 220pF + C24 4.7uF 3.3V R20 2.2k MIC1 MICROPHONE R22 100k DECOUPLING CAPACITOR CLOSE TO THE DEVICE PE4 PB1 R10 100k PF2 In-line Grouped LEDs RESET TOPLED LP M676 D2 LED 0 (green) TOPLED LP M676 D3 LED 1 (green) TOPLED LP M676 D4 LED 2 (green) TOPLED LP M676 D5 LED 3 (green) PB2 1k R12 1k R13 PE5 1k R14 1k R15 PD4 PB3 PD5 PD7 PD[7..0] PD6 SP8 RS-RTS Joystick Interface Complete Schematics 6-34 STK525 Hardware User Guide 7608A–AVR–04/06 Figure 6-4 . Schematics, 4 of 5 - C30 4.7uF VTG IN GND OUT U8 LM340 VBUS generator f or OTG/HOST mode 1F 1.0 POWER A4 Tuesday , January 17, 2006 4 4 5V C32 220nF 1 2 3 4 5 6 7 8 JP6 VCC Source VCC - C34 4.7uF 2 1 3 JP7 VBUS gen D6 LL4148 R32 10k R35 100k 1% 3 1 4 2 - + U7 DF005S 321 J6 CONNECTOR JACK PWR Ext Power Supply C33 100nF C29 33nF UVCON VBUS OUT 1 IN 2 GND 3 OUT 4 FAULT SHDN 8 7 CC 6 SET 5 U6 LP3982 Complete Schematics STK525 Hardware User Guide 6-35 7608A–AVR–04/06 Figure 6-5 . Assembly Drawing, 1 of 2 (component side) Figure 6-6 . Assembly Drawing, 2 of 2 (solder side) Complete Schematics 6-36 STK525 Hardware User Guide 7608A–AVR–04/06 Table 6-1 . Bill of material Item Q.ty Reference Part Tech. Characteristics Package 1 2 CR1,CR2 PGB0010603 ESD protection CASE 0805 2 19 C1,C2,C3,C4,C5,C6,C13,C14,C15,C16,C 17,C18,C19,C20,C21,C23,C26,C27,C33 100nF 50V-10% Ceramic CASE 0805 3 2 C7,C25 1uF 10Vmin ±10% EIA/IECQ 3216 4 3 C8,C9,C32 220nF 50V-10% Ceramic CASE 0805 5 2 C10,C11 15pF 50V-5% Ceramic CASE 0805 6 1 C12 1nF 50V-5% Ceramic CASE 0805 7 1 C22 220pF 50V-5% Ceramic CASE 0805 8 5 C24,C28,C30,C31,C34 4.7uF 10Vmin ±10% EIA/IECQ 3216 9 1 C29 33nF 50V-5% Ceramic CASE 0805 10 3 CP1, CP2, CP3 Configuration Pad 11 1 D1 BAT54/SOT Vf=0.3V SOT23 12 5 D2,D3,D4,D5,D8 TOPLED LP M676 Green I=10 mA_ PLCC-2 13 2 D6,D7 LL4148 i=200mA max LL-34 14 5 JP1,JP2,JP3,JP4,JP5 JUMPER 1x2 Need 1 shunt 0,1" pitch 15 1 J1 USB_MiniABF USB mini AB receptacle Surface mount 16 2 J2,J3 CON 2x20 17 1 J4 CON 2x5 18 1 J5 CON 2x3 19 1 J7 CON 2x2 Not Mounted 20 1 JP6 JUMPER 2x4 Need 1 shunt 0,1" pitch 21 1 J6 CONNECTOR JACK PWR Int.Diam=2.1mm PCB Embase 22 1 JP7 JUMPER 3x1 23 1 L1 BLM-21A102S FERRITE BEAD 1 KOhms at 100 MHz CASE 0805 24 1 MIC1 MICROPHONE Electret Cap Mic 25 1 M1 FDV304P/FAI MOSFET P SOT23 26 1 P1 SUB-D9 FEMALE 90° with harpoons 27 2 Q1,Q2 BC847B NPN IC peak=200mA SOT23 28 2 R1,R2 22 1/16W-5% SMD CASE 0602 29 2 R3,R5 47k 1/16W-5% SMD CASE 0603 30 5 R4,R6,R7,R17,R27 0 CASE 0603 31 1 R8 2k CASE 0604 32 4 R9,R25,R29,R32 10k 1/16W-5% SMD CASE 0603 Complete Schematics STK525 Hardware User Guide 6-37 7608A–AVR–04/06 6.0.1 Default Configuration - Summary Table 6-2 . Default Configuration summary 33 9 R10,R11,R16,R21,R22,R23,R24,R28,R33 100k 1/16W-5% SMD CASE 0603 34 5 R12,R13,R14,R15,R34 1k 1/16W-5% SMD CASE 0603 35 1 R18 NCP18WF104J03RB 100K - ß=4250 CASE 0603 36 1 R19 POT 100k PT10MH104ME 37 1 R19 Button Pot Button 38 1 R20 2.2k 1/16W-5% SMD CASE 0603 39 1 R26 22k 1/16W-5% SMD CASE 0603 40 1 R30, R35 100k 1% 1/16W-1% SMD CASE 0603 41 1 R31 120k 1% 1/16W-1% SMD CASE 0603 42 6 SP1,SP2,SP3,SP4,SP5,SP6 SolderPad (NA) (NA) 43 2 SW1,SW2 PUSH-BUTTON 6x3.5mm - 1.6N 44 1 SW3 TPA511G 4+1 ways joystick CMS 45 8 TP1,TP2,TP3,TP4,TP5,TP6, TP7, TP8 TEST POINT Diam.=1.32mm 46 1 U1 AT90USBxxx TQFP64 47 1 U1 Socket TQFP64 ZIF 48 1 U2 AT45DB321C TSOP28 49 1 U3 MAX3232ECAE+ SSOP16 50 1 U4 LMV358 SO8 51 1 U5 TPS2041A SOIC8 52 1 U6 LP3982 Low Drop Out Vin Max 6V, 300mA MSOP8 53 1 U7 DF005S Bridge rectifier See DS 54 1 U8 LM340 Reg 5V CMS SOT223 55 1 Y1 8MHz CRYSTAL H=4mm HC49/4H Item Q.ty Reference Part Tech. Characteristics Package Name Ref. Function State Jumpers STKX1 JP1 XTAL Configuration OFF STKX2 JP2 XTAL Configuration OFF Aref JP3 STK500 Analog Ref OFF VTG33 JP4 Short 3.3V to VTG (Mass storage extension board) OFF UCAP JP5 Short UCAP with Uvcc OFF Vcc Src JP6 Vcc Selection 3.4 shorted Vbus Gen JP7 VBUS generation selection (host mode) 2.3 shorted Solder PADS Complete Schematics 6-38 STK525 Hardware User Guide 7608A–AVR–04/06 SP1 Bypass L1 OPEN SP2 OPEN SP3 3.3V on Expand 0 NC pin OPEN SP4 CTS OPEN SP5 RTS OPEN SP6 Bypass limiter OPEN SP7 RS232 hardware control enable OPEN SP8 RS232 hardware control enable OPEN Configuration PADS CP1 Bypass CTN in on PF0 CLOSE CP2 Bypass Potentiometer ADC in on PF1 CLOSE CP3 Bypass Mic In on PF2 CLOSE Name Ref. Function State Printed on recycled paper. 7608A–AVR–04/06 /xM © Atmel Corporation 2006. All rights reserved. Atmel®, logo and combinations thereof, are registered trademarks, and Everywhere You Are® are the trademarks of Atmel Corporation or its subsidiaries. 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Atmel Corporation Atmel Operations 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80 Literature Requests www.atmel.com/literature MSP430 Hardware Tools User's Guide Literature Number: SLAU278R May 2009–Revised May 2014 Contents Preface ........................................................................................................................................ 8 1 Get Started Now!................................................................................................................ 11 1.1 Flash Emulation Tool (FET) Overview................................................................................... 12 1.2 Kit Contents, MSP-FET430PIF........................................................................................... 13 1.3 Kit Contents, eZ430-F2013 ............................................................................................... 13 1.4 Kit Contents, eZ430-T2012 ............................................................................................... 13 1.5 Kit Contents, eZ430-RF2500 ............................................................................................. 13 1.6 Kit Contents, eZ430-RF2500T............................................................................................ 13 1.7 Kit Contents, eZ430-RF2500-SEH....................................................................................... 13 1.8 Kit Contents, eZ430-Chronos-xxx........................................................................................ 14 1.9 Kit Contents, MSP-FET430UIF........................................................................................... 14 1.10 Kit Contents, MSP-FET.................................................................................................... 14 1.11 Kit Contents, MSP-FET430xx ............................................................................................ 14 1.12 Kit Contents, FET430F6137RF900 ...................................................................................... 15 1.13 Kit Contents, MSP-TS430xx .............................................................................................. 15 1.14 Kit Contents, EM430Fx1x7RF900 ....................................................................................... 17 1.15 Hardware Installation, MSP-FET430PIF ................................................................................ 17 1.16 Hardware Installation, MSP-FET430UIF ................................................................................ 18 1.17 Hardware Installation, MSP-FET ......................................................................................... 18 1.18 Hardware Installation, eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSP-EXP430F5529.......... 18 1.19 Hardware Installation, MSP-FET430Uxx, MSP-TS430xxx, FET430F6137RF900, EM430Fx137RF900 ....... 19 1.20 Important MSP430 Documents on the Web ............................................................................ 20 2 Design Considerations for In-Circuit Programming ................................................................ 21 2.1 Signal Connections for In-System Programming and Debugging ................................................... 22 2.2 External Power ............................................................................................................. 26 2.3 Bootstrap Loader (BSL) ................................................................................................... 26 A Frequently Asked Questions and Known Issues .................................................................... 27 A.1 Hardware FAQs ............................................................................................................ 28 A.2 Known Issues ............................................................................................................... 30 B Hardware........................................................................................................................... 31 B.1 MSP-TS430D8.............................................................................................................. 33 B.2 MSP-TS430PW14.......................................................................................................... 36 B.3 MSP-TS430L092 ........................................................................................................... 39 B.4 MSP-TS430L092 Active Cable ........................................................................................... 42 B.5 MSP-TS430PW24.......................................................................................................... 45 B.6 MSP-TS430DW28.......................................................................................................... 48 B.7 MSP-TS430PW28.......................................................................................................... 51 B.8 MSP-TS430PW28A........................................................................................................ 54 B.9 MSP-TS430RHB32A....................................................................................................... 57 B.10 MSP-TS430DA38 .......................................................................................................... 60 B.11 MSP-TS430QFN23x0...................................................................................................... 63 B.12 MSP-TS430RSB40......................................................................................................... 66 B.13 MSP-TS430RHA40A....................................................................................................... 69 B.14 MSP-TS430DL48........................................................................................................... 72 2 Contents SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com B.15 MSP-TS430RGZ48B....................................................................................................... 75 B.16 MSP-TS430RGZ48C ...................................................................................................... 78 B.17 MSP-TS430PM64 .......................................................................................................... 81 B.18 MSP-TS430PM64A ........................................................................................................ 84 B.19 MSP-TS430RGC64B ...................................................................................................... 87 B.20 MSP-TS430RGC64C ...................................................................................................... 90 B.21 MSP-TS430RGC64USB................................................................................................... 94 B.22 MSP-TS430PN80 .......................................................................................................... 98 B.23 MSP-TS430PN80A ....................................................................................................... 101 B.24 MSP-TS430PN80USB ................................................................................................... 104 B.25 MSP-TS430PZ100........................................................................................................ 108 B.26 MSP-TS430PZ100A...................................................................................................... 111 B.27 MSP-TS430PZ100B...................................................................................................... 114 B.28 MSP-TS430PZ100C...................................................................................................... 117 B.29 MSP-TS430PZ100D...................................................................................................... 121 B.30 MSP-TS430PZ5x100..................................................................................................... 124 B.31 MSP-TS430PZ100USB .................................................................................................. 127 B.32 MSP-TS430PEU128...................................................................................................... 131 B.33 EM430F5137RF900 ...................................................................................................... 134 B.34 EM430F6137RF900 ...................................................................................................... 138 B.35 EM430F6147RF900 ...................................................................................................... 142 B.36 MSP-FET .................................................................................................................. 146 B.36.1 Features ......................................................................................................... 146 B.36.2 Release Notes .................................................................................................. 146 B.36.3 Schematics ...................................................................................................... 148 B.36.4 Layout............................................................................................................ 153 B.36.5 LED Signals ..................................................................................................... 153 B.36.6 JTAG Target Connector ....................................................................................... 154 B.36.7 Specifications ................................................................................................... 156 B.36.8 MSP-FET Revision History.................................................................................... 156 B.37 MSP-FET430PIF.......................................................................................................... 157 B.38 MSP-FET430UIF.......................................................................................................... 159 B.38.1 MSP-FET430UIF Revision History ........................................................................... 164 C Hardware Installation Guide ............................................................................................... 165 C.1 Hardware Installation ..................................................................................................... 166 Revision History ........................................................................................................................ 171 SLAU278R–May 2009–Revised May 2014 Contents 3 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com List of Figures 2-1. Signal Connections for 4-Wire JTAG Communication................................................................. 23 2-2. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F2xx, MSP430G2xx, and MSP430F4xx Devices.............................................................................. 24 2-3. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F5xx and MSP430F6xx Devices ..................................................................................................... 25 B-1. MSP-TS430D8 Target Socket Module, Schematic .................................................................... 33 B-2. MSP-TS430D8 Target Socket Module, PCB ........................................................................... 34 B-3. MSP-TS430PW14 Target Socket Module, Schematic ................................................................ 36 B-4. MSP-TS430PW14 Target Socket Module, PCB ....................................................................... 37 B-5. MSP-TS430L092 Target Socket Module, Schematic.................................................................. 39 B-6. MSP-TS430L092 Target Socket Module, PCB......................................................................... 40 B-7. MSP-TS430L092 Active Cable Target Socket Module, Schematic.................................................. 42 B-8. MSP-TS430L092 Active Cable Target Socket Module, PCB......................................................... 43 B-9. MSP-TS430PW24 Target Socket Module, Schematic ................................................................ 45 B-10. MSP-TS430PW24 Target Socket Module, PCB ....................................................................... 46 B-11. MSP-TS430DW28 Target Socket Module, Schematic ................................................................ 48 B-12. MSP-TS430DW28 Target Socket Module, PCB ....................................................................... 49 B-13. MSP-TS430PW28 Target Socket Module, Schematic ................................................................ 51 B-14. MSP-TS430PW28 Target Socket Module, PCB ....................................................................... 52 B-15. MSP-TS430PW28A Target Socket Module, Schematic .............................................................. 54 B-16. MSP-TS430PW28A Target Socket Module, PCB (Red) .............................................................. 55 B-17. MSP-TS430RHB32A Target Socket Module, Schematic ............................................................. 57 B-18. MSP-TS430RHB32A Target Socket Module, PCB .................................................................... 58 B-19. MSP-TS430DA38 Target Socket Module, Schematic................................................................. 60 B-20. MSP-TS430DA38 Target Socket Module, PCB........................................................................ 61 B-21. MSP-TS430QFN23x0 Target Socket Module, Schematic ............................................................ 63 B-22. MSP-TS430QFN23x0 Target Socket Module, PCB ................................................................... 64 B-23. MSP-TS430RSB40 Target Socket Module, Schematic ............................................................... 66 B-24. MSP-TS430RSB40 Target Socket Module, PCB ...................................................................... 67 B-25. MSP-TS430RHA40A Target Socket Module, Schematic ............................................................. 69 B-26. MSP-TS430RHA40A Target Socket Module, PCB .................................................................... 70 B-27. MSP-TS430DL48 Target Socket Module, Schematic ................................................................. 72 B-28. MSP-TS430DL48 Target Socket Module, PCB ........................................................................ 73 B-29. MSP-TS430RGZ48B Target Socket Module, Schematic ............................................................. 75 B-30. MSP-TS430RGZ48B Target Socket Module, PCB .................................................................... 76 B-31. MSP-TS430RGZ48C Target Socket Module, Schematic ............................................................. 78 B-32. MSP-TS430RGZ48C Target Socket Module, PCB .................................................................... 79 B-33. MSP-TS430PM64 Target Socket Module, Schematic................................................................. 81 B-34. MSP-TS430PM64 Target Socket Module, PCB........................................................................ 82 B-35. MSP-TS430PM64A Target Socket Module, Schematic............................................................... 84 B-36. MSP-TS430PM64A Target Socket Module, PCB...................................................................... 85 B-37. MSP-TS430RGC64B Target Socket Module, Schematic............................................................. 87 B-38. MSP-TS430RGC64B Target Socket Module, PCB.................................................................... 88 B-39. MSP-TS430RGC64C Target Socket Module, Schematic............................................................. 91 B-40. MSP-TS430RGC64C Target Socket Module, PCB.................................................................... 92 B-41. MSP-TS430RGC64USB Target Socket Module, Schematic ......................................................... 94 B-42. MSP-TS430RGC64USB Target Socket Module, PCB ................................................................ 95 B-43. MSP-TS430PN80 Target Socket Module, Schematic................................................................. 98 4 List of Figures SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com B-44. MSP-TS430PN80 Target Socket Module, PCB........................................................................ 99 B-45. MSP-TS430PN80A Target Socket Module, Schematic.............................................................. 101 B-46. MSP-TS430PN80A Target Socket Module, PCB..................................................................... 102 B-47. MSP-TS430PN80USB Target Socket Module, Schematic.......................................................... 104 B-48. MSP-TS430PN80USB Target Socket Module, PCB................................................................. 105 B-49. MSP-TS430PZ100 Target Socket Module, Schematic .............................................................. 108 B-50. MSP-TS430PZ100 Target Socket Module, PCB ..................................................................... 109 B-51. MSP-TS430PZ100A Target Socket Module, Schematic ............................................................ 111 B-52. MSP-TS430PZ100A Target Socket Module, PCB ................................................................... 112 B-53. MSP-TS430PZ100B Target Socket Module, Schematic ............................................................ 114 B-54. MSP-TS430PZ100B Target Socket Module, PCB ................................................................... 115 B-55. MSP-TS430PZ100C Target Socket Module, Schematic ............................................................ 117 B-56. MSP-TS430PZ100C Target Socket Module, PCB ................................................................... 118 B-57. MSP-TS430PZ100D Target Socket Module, Schematic ............................................................ 121 B-58. MSP-TS430PZ100D Target Socket Module, PCB ................................................................... 122 B-59. MSP-TS430PZ5x100 Target Socket Module, Schematic ........................................................... 124 B-60. MSP-TS430PZ5x100 Target Socket Module, PCB .................................................................. 125 B-61. MSP-TS430PZ100USB Target Socket Module, Schematic......................................................... 127 B-62. MSP-TS430PZ100USB Target Socket Module, PCB................................................................ 128 B-63. MSP-TS430PEU128 Target Socket Module, Schematic ............................................................ 131 B-64. MSP-TS430PEU128 Target Socket Module, PCB ................................................................... 132 B-65. EM430F5137RF900 Target board, Schematic........................................................................ 134 B-66. EM430F5137RF900 Target board, PCB............................................................................... 135 B-67. EM430F6137RF900 Target board, Schematic........................................................................ 138 B-68. EM430F6137RF900 Target Board, PCB .............................................................................. 139 B-69. EM430F6147RF900 Target Board, Schematic ....................................................................... 142 B-70. EM430F6147RF900 Target Board, PCB .............................................................................. 143 B-71. MSP-FET Top View ...................................................................................................... 147 B-72. MSP-FET Bottom View .................................................................................................. 147 B-73. MSP-FET USB Debugger, Schematic (1 of 5)........................................................................ 148 B-74. MSP-FET USB Debugger, Schematic (2 of 5)........................................................................ 149 B-75. MSP-FET USB Debugger, Schematic (3 of 5)........................................................................ 150 B-76. MSP-FET USB Debugger, Schematic (4 of 5)........................................................................ 151 B-77. MSP-FET USB Debugger, Schematic (5 of 5)........................................................................ 152 B-78. MSP-FET USB Debugger, PCB (Top) ................................................................................. 153 B-79. MSP-FET USB Debugger, PCB (Bottom) ............................................................................. 153 B-80. JTAG Connector Pinout.................................................................................................. 154 B-81. Pin States After Power-Up............................................................................................... 155 B-82. MSP-FET430PIF FET Interface Module, Schematic................................................................. 157 B-83. MSP-FET430PIF FET Interface Module, PCB........................................................................ 158 B-84. MSP-FET430UIF USB Interface, Schematic (1 of 4) ................................................................ 159 B-85. MSP-FET430UIF USB Interface, Schematic (2 of 4) ................................................................ 160 B-86. MSP-FET430UIF USB Interface, Schematic (3 of 4) ................................................................ 161 B-87. MSP-FET430UIF USB Interface, Schematic (4 of 4) ................................................................ 162 B-88. MSP-FET430UIF USB Interface, PCB................................................................................. 163 C-1. Windows XP Hardware Wizard ......................................................................................... 166 C-2. Windows XP Driver Location Selection Folder........................................................................ 167 C-3. Device Manager Using USB Debug Interface using VID/PID 0x2047/0x0010 ................................... 168 C-4. Device Manager Using USB Debug Interface with VID/PID 0x0451/0xF430 ..................................... 169 SLAU278R–May 2009–Revised May 2014 List of Figures 5 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com C-5. Device Manager Using USB Debug Interface With VID/PID 0x0451/0xF432 .................................... 170 6 List of Figures SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com List of Tables 1-1. Flash Emulation Tool (FET) Features and Device Compatibility..................................................... 12 1-2. Individual Kit Contents, MSP-TS430xx.................................................................................. 15 B-1. MSP-TS430D8 Bill of Materials .......................................................................................... 35 B-2. MSP-TS430PW14 Bill of Materials....................................................................................... 38 B-3. MSP-TS430L092 Bill of Materials ........................................................................................ 41 B-4. MSP-TS430L092 JP1 Settings ........................................................................................... 43 B-5. MSP-TS430L092 Active Cable Bill of Materials ........................................................................ 44 B-6. MSP-TS430PW24 Bill of Materials....................................................................................... 47 B-7. MSP-TS430DW28 Bill of Materials ...................................................................................... 50 B-8. MSP-TS430PW28 Bill of Materials ...................................................................................... 53 B-9. MSP-TS430PW28A Bill of Materials..................................................................................... 56 B-10. MSP-TS430RHB32A Bill of Materials ................................................................................... 59 B-11. MSP-TS430DA38 Bill of Materials ....................................................................................... 62 B-12. MSP-TS430QFN23x0 Bill of Materials .................................................................................. 65 B-13. MSP-TS430RSB40 Bill of Materials ..................................................................................... 68 B-14. MSP-TS430RHA40A Bill of Materials ................................................................................... 71 B-15. MSP-TS430DL48 Bill of Materials ....................................................................................... 74 B-16. MSP-TS430RGZ48B Bill of Materials ................................................................................... 77 B-17. MSP-TS430RGZ48C Revision History .................................................................................. 79 B-18. MSP-TS430RGZ48C Bill of Materials ................................................................................... 80 B-19. MSP-TS430PM64 Bill of Materials....................................................................................... 83 B-20. MSP-TS430PM64A Bill of Materials ..................................................................................... 86 B-21. MSP-TS430RGC64B Bill of Materials ................................................................................... 89 B-22. MSP-TS430RGC64C Bill of Materials ................................................................................... 93 B-23. MSP-TS430RGC64USB Bill of Materials ............................................................................... 96 B-24. MSP-TS430PN80 Bill of Materials...................................................................................... 100 B-25. MSP-TS430PN80A Bill of Materials.................................................................................... 103 B-26. MSP-TS430PN80USB Bill of Materials ................................................................................ 106 B-27. MSP-TS430PZ100 Bill of Materials .................................................................................... 110 B-28. MSP-TS430PZ100A Bill of Materials................................................................................... 113 B-29. MSP-TS430PZ100B Bill of Materials................................................................................... 116 B-30. MSP-TS430PZ100C Bill of Materials .................................................................................. 119 B-31. MSP-TS430PZ100D Bill of Materials .................................................................................. 123 B-32. MSP-TS430PZ5x100 Bill of Materials.................................................................................. 126 B-33. MSP-TS430PZ100USB Bill of Materials ............................................................................... 129 B-34. MSP-TS430PEU128 Bill of Materials .................................................................................. 133 B-35. EM430F5137RF900 Bill of Materials................................................................................... 136 B-36. EM430F6137RF900 Bill of Materials................................................................................... 140 B-37. EM430F6147RF900 Bill of Materials................................................................................... 144 B-38. UART Backchannel Implementation ................................................................................... 146 B-39. MSP-FET LED Signals................................................................................................... 153 B-40. JTAG Connector Pin State by Operating Mode ...................................................................... 154 B-41. Specifications.............................................................................................................. 156 B-42. MSP-FET Revision History .............................................................................................. 156 C-1. USB VIDs and PIDs Used in MSP430 Tools.......................................................................... 166 SLAU278R–May 2009–Revised May 2014 List of Tables 7 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Preface SLAU278R–May 2009–Revised May 2014 Read This First About This Manual This manual describes the hardware of the Texas Instruments MSP-FET430 Flash Emulation Tool (FET). The FET is the program development tool for the MSP430™ ultra-low-power microcontroller. Both available interface types, the parallel port interface and the USB interface, are described. How to Use This Manual Read and follow the instructions in Chapter 1. This chapter lists the contents of the FET, provides instructions on installing the hardware and according software drivers. After you see how quick and easy it is to use the development tools, TI recommends that you read all of this manual. This manual describes the setup and operation of the FET but does not fully describe the MSP430™ microcontrollers or the development software systems. For details of these items, see the appropriate TI documents listed in Section 1.20. This manual applies to the following tools (and devices): • MSP-FET430PIF (debug interface with parallel port connection, for all MSP430 flash-based devices) • MSP-FET430UIF (debug interface with USB connection, for all MSP430 flash-based devices) • MSP-FET (successor to MSP-FET430UIF, debug interface with USB connection, for all MSP430 devices) • eZ430-F2013 (USB stick form factor interface with attached MSP430F2013 target, for all MSP430F20xx, MSP430G2x01, MSP430G2x11, MSP430G2x21, and MSP430G2x31 devices) • eZ430-T2012 (three MSP430F2012 based target boards) • eZ430-RF2500 (USB stick form factor interface with attached MSP430F2274 and CC2500 target, for all MSP430F20xx, MSP430F21x2, MSP430F22xx, MSP430G2x01, MSP430G2x11, MSP430G2x21, and MSP430G2x31 devices) • eZ430-RF2500T (one MSP430F2274 and CC2500 target board including battery pack) • eZ430-RF2500-SEH (USB stick form factor interface with attached MSP430F2274 and CC2500 target and solar energy harvesting module) • eZ430-Chronos-xxx (USB stick form factor interface with CC430F6137 based development system contained in a watch. Includes <1 GHz RF USB access point) Stand-alone target-socket modules (without debug interface) named as MSP-TS430TSxx. Tools named as MSP-FET430Uxx contain the USB debug interface (MSP-FET430UIF) and the respective target socket module MSP-TS430TSxx, where 'xx' is the same for both names. The following tools contain also the USB debug interface (MSP-FET430UIF): • FET430F5137RF900 (for CC430F513x devices in 48-pin RGZ packages) (green PCB) • FET430F6137RF900 (for CC430F612x and CC430F613x devices in 64-pin RGC packages) (green PCB) These tools contain the most up-to-date materials available at the time of packaging. For the latest materials (data sheets, user's guides, software, application information, and so on), visit the TI MSP430 web site at www.ti.com/msp430 or contact your local TI sales office. 8 Read This First SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Information About Cautions and Warnings Information About Cautions and Warnings This document may contain cautions and warnings. CAUTION This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software or equipment. WARNING This is an example of a warning statement. A warning statement describes a situation that could potentially cause harm to you. The information in a caution or a warning is provided for your protection. Read each caution and warning carefully. Related Documentation From Texas Instruments MSP430 development tools documentation: Code Composer Studio for MSP430 User's Guide (literature number SLAU157) Code Composer Studio v5.x Core Edition (CCS Mediawiki) IAR Embedded Workbench for MSP430(tm) User's Guide (literature number SLAU138) IAR Embedded Workbench KickStart installer (literature number SLAC050) eZ430-F2013 Development Tool User's Guide (literature number SLAU176) eZ430-RF2480 Demonstration Kit User's Guide (literature number SWRU151) eZ430-RF2500 Development Tool User's Guide (literature number SLAU227) eZ430-RF2500-SEH Development Tool User's Guide (literature number SLAU273) eZ430-Chronos Development Tool User's Guide (literature number SLAU292) Spectrum Analyzer (MSP-SA430-SUB1GHZ) User's Guide (literature number SLAU371) MSP-EXP430F5529 Experimenter Board User's Guide (literature number SLAU330) MSP-EXP430F5438 Experimenter Board User's Guide (literature number SLAU263) MSP-EXP430G2 LaunchPad Experimenter Board User's Guide (literature number SLAU318) MSP Gang Programmer (MSP-GANG) User's Guide (literature number SLAU358) MSP430 Gang Programmer (MSP-GANG430) User's Guide (literature number SLAU101) MSP430 device user's guides: MSP430x1xx Family User's Guide (literature number SLAU049) MSP430x2xx Family User's Guide (literature number SLAU144) MSP430x3xx Family User's Guide (literature number SLAU012) MSP430x4xx Family User's Guide (literature number SLAU056) MSP430x5xx and MSP430x6xx Family User's Guide (literature number SLAU208) CC430 Family User's Guide (literature number SLAU259) SLAU278R–May 2009–Revised May 2014 Read This First 9 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated If You Need Assistance www.ti.com MSP430FR57xx Family User's Guide (literature number SLAU272) MSP430FR58xx and MSP430FR59xx Family User's Guide (literature number SLAU367) If You Need Assistance Support for the MSP430 devices and the FET development tools is provided by the Texas Instruments Product Information Center (PIC). Contact information for the PIC can be found on the TI web site at www.ti.com/support. The Texas Instruments E2E Community support forums for the MSP430 provide open interaction with peer engineers, TI engineers, and other experts. Additional device-specific information can be found on the MSP430 web site. 10 Read This First SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Chapter 1 SLAU278R–May 2009–Revised May 2014 Get Started Now! This chapter lists the contents of the FET and provides instruction on installing the hardware. Topic ........................................................................................................................... Page 1.1 Flash Emulation Tool (FET) Overview ................................................................... 12 1.2 Kit Contents, MSP-FET430PIF.............................................................................. 13 1.3 Kit Contents, eZ430-F2013................................................................................... 13 1.4 Kit Contents, eZ430-T2012................................................................................... 13 1.5 Kit Contents, eZ430-RF2500 ................................................................................ 13 1.6 Kit Contents, eZ430-RF2500T............................................................................... 13 1.7 Kit Contents, eZ430-RF2500-SEH ......................................................................... 13 1.8 Kit Contents, eZ430-Chronos-xxx......................................................................... 14 1.9 Kit Contents, MSP-FET430UIF.............................................................................. 14 1.10 Kit Contents, MSP-FET ....................................................................................... 14 1.11 Kit Contents, MSP-FET430xx .............................................................................. 14 1.12 Kit Contents, FET430F6137RF900 ........................................................................ 15 1.13 Kit Contents, MSP-TS430xx ................................................................................. 15 1.14 Kit Contents, EM430Fx1x7RF900.......................................................................... 17 1.15 Hardware Installation, MSP-FET430PIF ................................................................. 17 1.16 Hardware Installation, MSP-FET430UIF ................................................................. 18 1.17 Hardware Installation, MSP-FET........................................................................... 18 1.18 Hardware Installation, eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSPEXP430F5529..................................................................................................... 18 1.19 Hardware Installation, MSP-FET430Uxx, MSP-TS430xxx, FET430F6137RF900, EM430Fx137RF900 ............................................................................................. 19 1.20 Important MSP430 Documents on the Web............................................................ 20 SLAU278R–May 2009–Revised May 2014 Get Started Now! 11 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Flash Emulation Tool (FET) Overview www.ti.com 1.1 Flash Emulation Tool (FET) Overview TI offers several flash emulation tools according to different requirements. Table 1-1. Flash Emulation Tool (FET) Features and Device Compatibility(1) eZ430-F2013 eZ430-RF2500 eZ430-RF2480 eZ430-RF2560 MSP-WDSxx Metawatch eZ430-Chronos MSP-FET430PIF MSP-FET430UIF LaunchPad (MSP-EXP430G2) MSP-EXP430FR5739 MSP-EXP430F5529 Supports all programmable MSP430 and CC430 devices (F1xx, F2xx, F4xx, F5xx, F6xx, G2xx, L092, FR57xx, FR59xx, x x MSP430TCH5E) Supports only F20xx, G2x01, G2x11, x G2x21, G2x31 Supports MSP430F20xx, F21x2, F22xx, x G2x01, G2x11, G2x21, G2x31, G2x53 Supports MSP430F20xx, F21x2, F22xx, x x G2x01, G2x11, G2x21, G2x31 Supports F5438, F5438A x Supports BT5190, F5438A x x Supports only F552x x Supports FR57xx, F5638, F6638 x Supports only CC430F613x x Allows fuse blow x Adjustable target supply voltage x Fixed 2.8-V target supply voltage x Fixed 3.6-V target supply voltage x x x x x x x x x 4-wire JTAG x x 2-wire JTAG(2) x x x x x x x x x x Application UART x x x x x x x x Supported by CCS for Windows x x x x x x x x x x x Supported by CCS for Linux x Supported by IAR x x x x x x x x x x x (1) The MSP-FET430PIF is for legacy device support only. This emulation tool will not support any new devices released after 2011. (2) The 2-wire JTAG debug interface is also referred to as Spy-Bi-Wire (SBW) interface. 12 Get Started Now! SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Kit Contents, MSP-FET430PIF 1.2 Kit Contents, MSP-FET430PIF • One READ ME FIRST document • One MSP-FET430PIF interface module • One 25-conductor cable • One 14-conductor cable NOTE: This part is obsolete and is not recommended to use in new design. 1.3 Kit Contents, eZ430-F2013 • One QUICK START GUIDE document • One eZ430-F2013 development tool including one MSP430F2013 target board 1.4 Kit Contents, eZ430-T2012 • Three MSP430F2012-based target boards 1.5 Kit Contents, eZ430-RF2500 • One QUICK START GUIDE document • One eZ430-RF2500 CD-ROM • One eZ430-RF2500 development tool including one MSP430F2274 and CC2500 target board • One eZ430-RF2500T target board • One AAA battery pack with expansion board (batteries included) 1.6 Kit Contents, eZ430-RF2500T • One eZ430-RF2500T target board • One AAA battery pack with expansion board (batteries included) 1.7 Kit Contents, eZ430-RF2500-SEH • One MSP430 development tool CD containing documentation and development software • One eZ430-RF USB debugging interface • Two eZ430-RF2500T wireless target boards • One SEH-01 solar energy harvester board • One AAA battery pack with expansion board (batteries included) SLAU278R–May 2009–Revised May 2014 Get Started Now! 13 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Kit Contents, eZ430-Chronos-xxx www.ti.com 1.8 Kit Contents, eZ430-Chronos-xxx '433, '868, '915 • One QUICK START GUIDE document • One ez430-Chronos emulator • One screwdriver • Two spare screws eZ430-Chronos-433: – One 433-MHz eZ430-Chronos watch (battery included) – One 433-MHz eZ430-Chronos access point eZ430-Chronos-868: – One 868-MHz eZ430-Chronos watch (battery included) – One 868-MHz eZ430-Chronos access point eZ430-Chronos-915: – One 915-MHz eZ430-Chronos watch (battery included) – One 915-MHz eZ430-Chronos access point 1.9 Kit Contents, MSP-FET430UIF • One READ ME FIRST document • One MSP-FET430UIF interface module • One USB cable • One 14-conductor cable 1.10 Kit Contents, MSP-FET • One READ ME FIRST document • One MSP-FET interface module • One USB cable • One 14-conductor cable 1.11 Kit Contents, MSP-FET430xx • One READ ME FIRST document • One MSP-FET430UIF USB interface module. This is the unit that has a USB B-connector on one end of the case, and a 2×7-pin male connector on the other end of the case. • One USB cable • One 32.768-kHz crystal from Micro Crystal, if the board has an option to use the quartz. • A 2×7-pin male JTAG connector is also present on the PCB (see different setup for L092) • One 14-Pin JTAG conductor cable • One small box containing two MSP430 device samples (See table for Sample Type) • One target socket module. To determine the devices used for each board and a summary of the board, see Table 1-2. The name of MSP-TS430xx board can be derived from the name of the MSP-FET430xx kit; for example, the MSP-FET430U28A kit contains the MSP-TS430PW28A board. Refer to the device data sheets for device specifications. Device errata can be found in the respective device product folder on the web provided as a PDF document. Depending on the device, errata may also be found in the device bug database at www.ti.com/sc/cgi-bin/buglist.cgi. 14 Get Started Now! SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Kit Contents, FET430F6137RF900 1.12 Kit Contents, FET430F6137RF900 • One READ ME FIRST document • One legal notice • One MSP-FET430UIF interface module • Two EM430F6137RF900 target socket modules. This is the PCB on which is soldered a CC430F6137 device in a 64-pin RGC package. A 2×7-pin male connector is also present on the PCB. • Two CC430EM battery packs • Four AAA batteries • Two 868-MHz or 915-MHz antennas • Two 32.768-kHz crystals • 18 PCB 2x4-pin headers • One USB cable • One 14-pin JTAG conductor cable 1.13 Kit Contents, MSP-TS430xx • One READ ME FIRST document • One 32.768-kHz crystal from Micro Crystal (except MSP-TS430PW24) • One target socket module • A 2×7-pin male JTAG connector is also present on the PCB (see different setup for L092) • MSP430 device samples (see Table 1-2 for sample type) Table 1-2. Individual Kit Contents, MSP-TS430xx Part Number Socket Type Supported Devices Included Devices Headers and Comment MSP-TS430D8 8-pin D MSP430G2210, 1 x MSP430G2210ID and Two PCB 1×4-pin headers (two male and (green PCB) (TSSOP ZIF) MSP430G2230 1 x MSP430G2230ID two female) MSP430F20xx, MSP-TS430PW14 14-pin PW MSP430G2x01, Four PCB 1×7-pin headers (two male and (green PCB) (TSSOP ZIF) MSP430G2x11, 2 x MSP430F2013IPW two female) MSP430G2x21, MSP430G2x31 Four PCB 1×7-pin headers (two male and two female). A "Micro-MaTch" 10-pin MSP-TS430L092 14-pin PW female connector is also present on the (green PCB) (TSSOP ZIF) MSP-TS430L092 2 x MSP430L092IPW PCB which connects the kit with an 'Active Cable' PCB; this 'Active Cable' PCB is connected by 14-pin JTAG cable with the FET430UIF MSP-TS430PW24 24-pin PW MSP430AFE2xx 2 x MSP430AFE253IPW Four PCB 1×12-pin headers (two male (green PCB) (TSSOP ZIF) and two female) MSP430F11x1, MSP430F11x2, MSP-TS430DW28 28-pin DW MSP430F12x, Four PCB 1×12-pin headers (two male (green PCB) (SSOP ZIF) MSP430F12x2, 2 x MSP430F123IDW and two female) MSP430F21xx Supports devices in 20- and 28-pin DA packages MSP430F11x1, MSP-TS430PW28 28-pin PW MSP430F11x2, Four PCB 1×12-pin headers (two male (green PCB) (TSSOP ZIF) MSP430F12x, 2 x MSP430F2132IPW and two female) MSP430F12x2, MSP430F21xx MSP430F20xx, MSP-TS430PW28A 28-pin PW MSP430G2xxx in 14-, 20-, Four PCB 1×12-pin headers (two male (red PCB) (TSSOP ZIF) and 28-pin PW packages, 2 x MSP430G2452IPW20 and two female) MSP430TCH5E in PW package MSP-TS430RHB32A 32-pin RHB MSP430i204x 2 x MSP430i2041TRHB Eight PCB 1×8-pin headers (four male (red PCB) (QFN ZIF) and four female) MSP-TS430DA38 38-pin DA MSP430F22xx, 2 x MSP430F2274IDA Four PCB 1×19-pin headers (two male (green PCB) (TSSOP ZIF) MSP430G2x44, 2 x MSP430G2744IDA and two female) MSP430G2x55 2 x MSP430G2955IDA SLAU278R–May 2009–Revised May 2014 Get Started Now! 15 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Kit Contents, MSP-TS430xx www.ti.com Table 1-2. Individual Kit Contents, MSP-TS430xx (continued) Part Number Socket Type Supported Devices Included Devices Headers and Comment MSP-TS430QFN23x0 40-pin RHA MSP430F23x0 2 x MSP430F2370IRHA Eight PCB 1×10-pin headers (four male (green PCB) (QFN ZIF) and four female) MSP-TS430RSB40 40-pin RSB MSP430F51x1, 2 x MSP430F5172IRSB Eight PCB 1×10-pin headers (four male (green PCB) (QFN ZIF) MSP430F51x2 and four female) MSP-TS430RHA40A 40-pin RHA MSP430FR572x, 2 x MSP430FR5739IRHA Eight PCB 1×10-pin headers (four male (red PCB) (QFN ZIF) MSP430FR573x and four female) MSP-TS430DL48 48-pin DL MSP430F42x0 2 x MSP430F4270IDL Four PCB 2×12-pin headers (two male (green PCB) (TSSOP ZIF) and two female) MSP-TS430RGZ48B 48-pin RGZ MSP430F534x 2 x MSP430F5342IRGZ Eight PCB 1×12-pin headers (four male (blue PCB) (QFN ZIF) and four female) MSP-TS430RGZ48C 48-pin RGZ MSP430FR58xx and 2 x MSP430FR5969IRGZ Eight PCB 1×12-pin headers (four male (black PCB) (QFN ZIF) MSP430FR59xx and four female) MSP430F13x, MSP430F14x, MSP430F14x1, MSP430F15x, MSP430F16x, MSP430F16x1, MSP430F23x, TS Kit: MSP-TS430PM64 64-pin PM MSP430F24x, 2 x MSP430F2618IPM; Eight PCB 1×16-pin headers (four male (green PCB) (QFP ZIF) MSP430F24xx, FET Kit: and four female) MSP430F261x, 2 x MSP430F417IPM and MSP430F41x, 2 x MSP430F169IPM MSP430F42x, MSP430F42xA, MSP430FE42x, MSP430FE42xA, MSP430FE42x2, MSP430FW42x MSP-TS430PM64A 64-pin PM MSP430F41x2 2 x MSP430F4152IPM Eight PCB 1×16-pin headers (four male (red PCB) (QFP ZIF) and four female) MSP-TS430RGC64B 64-pin RGC MSP430F530x 2 x MSP430F5310IRGC Eight PCB 1×16-pin headers (four male (blue PCB) (QFN ZIF) and four female) MSP430F522x, MSP-TS430RGC64C 64-pin RGC MSP430F521x , Eight PCB 1×16-pin headers (four male (black PCB) (QFN ZIF) MSP430F523x, 2 x MSP430F5229IRGC and four female) MSP430F524x, MSP430F525x MSP-TS430RGC64USB 64-pin RGC MSP430F550x, 2 x MSP430F5510IRGC or Eight PCB 1×16-pin headers (four male (green PCB) (QFN ZIF) MSP430F551x, 2 x MSP430F5528IRGC and four female) MSP430F552x MSP430F241x, MSP430F261x, MSP-TS430PN80 80-pin PN MSP430F43x, Eight PCB 1×20-pin headers (four male (green PCB) (QFP ZIF) MSP430F43x1, 2 x MSP430FG439IPN and four female) MSP430FG43x, MSP430F47x, MSP430FG47x MSP-TS430PN80A 80-pin PN MSP430F532x 2 x MSP430F5329IPN Eight PCB 1×20-pin headers (four male (red PCB) (QFP ZIF) and four female) MSP-TS430PN80USB 80-pin PN MSP430F552x, 2 x MSP430F5529IPN Eight PCB 1×20-pin headers (four male (green PCB) (QFP ZIF) MSP430F551x and four female) MSP430F43x, MSP-TS430PZ100 100-pin PZ MSP430F43x1, Eight PCB 1×25-pin headers (four male (green PCB) (QFP ZIF) MSP430F44x, 2 x MSP430FG4619IPZ and four female) MSP430FG461x, MSP430F47xx MSP-TS430PZ100A 100-pin PZ MSP430F471xx 2 x MSP430F47197IPZ Eight PCB 1×25-pin headers (four male (red PCB) (QFP ZIF) and four female) MSP-TS430PZ100B 100-pin PZ MSP430F67xx 2 x MSP430F6733IPZ Eight PCB 1×25-pin headers (four male (blue PCB) (QFP ZIF) and four female) MSP430F645x, MSP-TS430PZ100C 100-pin PZ MSP430F643x, 2 x MSP430F6438IPZ Eight PCB 1×25-pin headers (four male (black PCB) (QFP ZIF) MSP430F535x, and four female) MSP430F533x MSP-TS430PZ100D 100-pin PZ MSP430FR698x(1), 2 x MSP430FR6989IPZ Eight PCB 1×25-pin headers (four male (white PCB) (QFP ZIF) MSP430FR688x(1) and four female) 16 Get Started Now! SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Kit Contents, EM430Fx1x7RF900 Table 1-2. Individual Kit Contents, MSP-TS430xx (continued) Part Number Socket Type Supported Devices Included Devices Headers and Comment MSP-TS430PZ5x100 100-pin PZ MSP430F543x, Eight PCB 1×25-pin headers (four male (green PCB) (QFP ZIF) MSP430BT5190, 2 x MSP430F5438IPZ and four female) MSP430SL5438A MSP-TS430PZ100USB 100-pin PZ MSP430F665x, Eight PCB 1×25-pin headers (four male (green PCB) (QFP ZIF) MSP430F663x, 2 x MSP430F6638IPZ and four female) MSP430F563x MSP430F677x, MSP430F676x, Four PCB 1x26-pin headers (two male MSP-TS430PEU128 128-pin PEU MSP430F674x, 2 x MSP430F67791IPEU and two female) and four PCB 1x38-pin (green PCB) (QFP ZIF) MSP430F677x1, headers (two male and two female) MSP430F676x1, MSP430F674x1 See the device data sheets for device specifications. Device errata can be found in the respective device product folder on the web provided as a PDF document. Depending on the device, errata may also be found in the device bug database at www.ti.com/sc/cgi-bin/buglist.cgi. 1.14 Kit Contents, EM430Fx1x7RF900 • One READ ME FIRST document • One legal notice • Two target socket module MSP-EM430F5137RF900: Two EM430F5137RF900 target socket modules. This is the PCB on which is soldered a CC430F5137 device in a 48-pin RGZ package. A 2×7-pin male connector is also present on the PCB MSP-EM430F6137RF900: Two EM430F6137RF900 target socket modules. This is the PCB on which is soldered a CC430F6137 device in a 64-pin RGC package. A 2×7-pin male connector is also present on the PCB MSP-EM430F6147RF900: Two EM430F6147RF900 target socket modules. This is the PCB on which is soldered a CC430F6147 device in a 64-pin RGC package. A 2×7-pin male connector is also present on the PCB • Two CC430EM battery packs • Four AAA batteries • Two 868- or 915-MHz antennas • Two 32.768-kHz crystals • 18 PCB 2×4-pin headers 1.15 Hardware Installation, MSP-FET430PIF Follow these steps to install the hardware for the MSP-FET430PIF tools: 1. Use the 25-conductor cable to connect the FET interface module to the parallel port of the PC. The necessary driver for accessing the PC parallel port is installed automatically during CCS or IAR Embedded Workbench installation. Note that a restart is required after the CCS or IAR Embedded Workbench installation for the driver to become active. 2. Use the 14-conductor cable to connect the parallel-port debug interface module to a target board, such as an MSP-TS430xxx target socket module. Module schematics and PCBs are shown in Appendix B. SLAU278R–May 2009–Revised May 2014 Get Started Now! 17 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware Installation, MSP-FET430UIF www.ti.com 1.16 Hardware Installation, MSP-FET430UIF Follow these steps to install the hardware for the MSP-FET430UIF tool: 1. Install the IDE (CCS or IAR) you plan to use before connecting USB-FET interface to PC. The IDE installation installs drivers automatically. 2. Use the USB cable to connect the USB-FET interface module to a USB port on the PC. The USB FET should be recognized, as the USB device driver is installed automatically. If the driver has not been installed yet, the install wizard starts. Follow the prompts and point the wizard to the driver files. The default location for CCS is c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_CDC or c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_FET_XP_XX, depending of firmware version of the tool. The default location for IAR Embedded Workbench is \Embedded Workbench x.x\430\drivers\TIUSBFET\eZ430-UART or \Embedded Workbench x.x\430\drivers\, depending of firmware version of the tool. The USB driver is installed automatically. Detailed driver installation instructions can be found in Appendix C. 3. After connecting to a PC, the USB FET performs a self-test during which the red LED may flash for approximately two seconds. If the self-test passes successfully, the green LED stays on. 4. Use the 14-conductor cable to connect the USB-FET interface module to a target board, such as an MSP-TS430xxx target socket module. 5. Ensure that the MSP430 device is securely seated in the socket, and that its pin 1 (indicated with a circular indentation on the top surface) aligns with the "1" mark on the PCB. 6. Compared to the parallel-port debug interface, the USB FET has additional features including JTAG security fuse blow and adjustable target VCC (1.8 V to 3.6 V). Supply the module with up to 60 mA. 1.17 Hardware Installation, MSP-FET Follow these steps to install the hardware for the MSP-FET tool: 1. Install the IDE (CCS or IAR) that you plan to use before connecting MSP-FET to PC. During IDE installation, USB drivers are installed automatically. Make sure to use the latest IDE version, otherwise the USB drivers might not be able to recognize the MSP-FET. 2. Connect the MSP-FET to a USB port on the PC with the provided USB cable. 3. The following procedure applies to operation under Windows: (a) After connecting to the PC, the MSP-FET should be recognized automatically, as the USB device driver has been already installed together with the IDE. (b) If the driver has not been installed yet, the Found New Hardware wizard starts. Follow the instructions and point the wizard to the driver files. (c) The default location for CCS is c:\ti\ccsv6\ccs_base\emulation\drivers\msp430\USB_CDC. (d) The default location for IAR Embedded Workbench is \Embedded Workbench x.x\430\drivers\. 4. After connecting to a PC, the MSP-FET performs a self-test. If the self-test passes successfully, the green LED stays on. For a complete list of LED signals, please refer to the MSP-FET chapter in this document. 5. Connect the MSP-FET to a target board, such as an MSP-TS430xxx target socket module, with the 14-conductor cable. 6. Make sure that the MSP430 device is securely seated in the socket and that its pin 1 (indicated with a circular indentation on the top surface) aligns with the "1" mark on the PCB. 1.18 Hardware Installation, eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSPEXP430F5529 To install the eZ430-XXXX, MSP-EXP430G2, MSP-EXP430FR5739, MSP-EXP430F5529 tools, follow steps 1 and 2 of Section 1.16 18 Get Started Now! SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware Installation, MSP-FET430Uxx, MSP-TS430xxx, FET430F6137RF900, EM430Fx137RF900 1.19 Hardware Installation, MSP-FET430Uxx, MSP-TS430xxx, FET430F6137RF900, EM430Fx137RF900 Follow these steps to install the hardware for the MSP-FET430Uxx and MSP-TS430xxx tools: 1. Follow steps 1 and 2 of Section 1.16 2. Connect the MSP-FET430PIF or MSP-FET430UIF debug interface to the appropriate port of the PC. Use the 14-conductor cable to connect the FET interface module to the supplied target socket module. 3. Ensure that the MSP430 device is securely seated in the socket and that its pin 1 (indicated with a circular indentation on the top surface) aligns with the "1" mark on the PCB. 4. Ensure that the two jumpers (LED and VCC) near the 2×7-pin male connector are in place. Illustrations of the target socket modules and their parts are found in Appendix B. SLAU278R–May 2009–Revised May 2014 Get Started Now! 19 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Important MSP430 Documents on the Web www.ti.com 1.20 Important MSP430 Documents on the Web The primary sources of MSP430 information are the device-specific data sheet and user's guide. The MSP430 web site (www.ti.com/msp430) contains the most recent version of these documents. PDF documents describing the CCS tools (CCS IDE, the assembler, the C compiler, the linker, and the librarian) are in the msp430\documentation folder. A Code Composer Studio specific Wiki page (FAQ) is available, and the Texas Instruments E2E Community support forums for the MSP430 and Code Composer Studio v5 provide additional help besides the product help and Welcome page. PDF documents describing the IAR tools (Workbench C-SPY, the assembler, the C compiler, the linker, and the librarian) are in the common\doc and 430\doc folders. Supplements to the documents (that is, the latest information) are available in HTML format in the same directories. A IAR specific Wiki Page is also available. 20 Get Started Now! SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Chapter 2 SLAU278R–May 2009–Revised May 2014 Design Considerations for In-Circuit Programming This chapter presents signal requirements for in-circuit programming of the MSP430. Topic ........................................................................................................................... Page 2.1 Signal Connections for In-System Programming and Debugging............................. 22 2.2 External Power................................................................................................... 26 2.3 Bootstrap Loader (BSL) ...................................................................................... 26 SLAU278R–May 2009–Revised May 2014 Design Considerations for In-Circuit Programming 21 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Signal Connections for In-System Programming and Debugging www.ti.com 2.1 Signal Connections for In-System Programming and Debugging MSP-FET430PIF, MSP-FET430UIF, MSP-GANG, MSP-GANG430, MSP-PRGS430 With the proper connections, the debugger and an FET hardware JTAG interface (such as the MSPFET430PIF and MSP-FET430UIF) can be used to program and debug code on the target board. In addition, the connections also support the MSP-GANG430 or MSP-PRGS430 production programmers, thus providing an easy way to program prototype boards, if desired. Figure 2-1 shows the connections between the 14-pin FET interface module connector and the target device required to support in-system programming and debugging for 4-wire JTAG communication. Figure 2-2 shows the connections for 2-wire JTAG mode (Spy-Bi-Wire). The 4-wire JTAG mode is supported on most MSP430 devices, except devices with low pin counts (for example, MSP430G2230). The 2-wire JTAG mode is available on selected devices only. See the Code Composer Studio for MSP430 User's Guide (SLAU157) or IAR Embedded Workbench Version 3+ for MSP430 User's Guide (SLAU138) for information on which interface method can be used on which device. The connections for the FET interface module and the MSP-GANG, MSP-GANG430, or MSP-PRGS430 are identical. Both the FET interface module and MSP-GANG430 can supply VCC to the target board (through pin 2). In addition, the FET interface module, MSP-GANG, and MSP-GANG430 have a VCCsense feature that, if used, requires an alternate connection (pin 4 instead of pin 2). The VCC-sense feature senses the local VCC present on the target board (that is, a battery or other local power supply) and adjusts the output signals accordingly. If the target board is to be powered by a local VCC, then the connection to pin 4 on the JTAG should be made, and not the connection to pin 2. This uses the VCCsense feature and prevents any contention that might occur if the local on-board VCC were connected to the VCC supplied from the FET interface module, MSP-GANG or the MSP-GANG430. If the VCC-sense feature is not necessary (that is, if the target board is to be powered from the FET interface module, MSPGANG, or MSP-GANG430), the VCC connection is made to pin 2 on the JTAG header, and no connection is made to pin 4. Figure 2-1 and Figure 2-2 show a jumper block that supports both scenarios of supplying VCC to the target board. If this flexibility is not required, the desired VCC connections may be hard-wired to eliminate the jumper block. Pins 2 and 4 must not be connected at the same time. Note that in 4-wire JTAG communication mode (see Figure 2-1), the connection of the target RST signal to the JTAG connector is optional when using devices that support only 4-wire JTAG communication mode. However, when using devices that support 2-wire JTAG communication mode in 4-wire JTAG mode, the RST connection must be made. The MSP430 development tools and device programmers perform a target reset by issuing a JTAG command to gain control over the device. However, if this is unsuccessful, the RST signal of the JTAG connector may be used by the development tool or device programmer as an additional way to assert a device reset. 22 Design Considerations for In-Circuit Programming SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 3 5 7 9 11 13 2 4 6 8 10 12 14 TDO/TDI TDI/VPP TMS TCK GND TEST/VPP JTAG VCC TOOL VCC TARGET J1 (see Note A) J2 (see Note A) VCC R1 47 k (see Note B) W C2 10 μF C3 0.1 μF VCC/AVCC/DVCC RST/NMI TDO/TDI TDI/VPP TMS TCK TEST/VPP (see Note C) V /AV /DV SS SS SS MSP430Fxxx C1 10 nF/2.2 nF (see Notes B and E) RST (see Note D) Important to connect www.ti.com Signal Connections for In-System Programming and Debugging A If a local target power supply is used, make connection J1. If power from the debug or programming adapter is used, make connection J2. B The configuration of R1 and C1 for the RST/NMI pin depends on the device family. See the respective MSP430 family user's guide for the recommended configuration. C The TEST pin is available only on MSP430 family members with multiplexed JTAG pins. See the device-specific data sheet to determine if this pin is available. D The connection to the JTAG connector RST pin is optional when using a device that supports only 4-wire JTAG communication mode, and it is not required for device programming or debugging. However, this connection is required when using a device that supports 2-wire JTAG communication mode in 4-wire JTAG mode. E When using a device that supports 2-wire JTAG communication in 4-wire JTAG mode, the upper limit for C1 should not exceed 2.2 nF. This applies to both TI FET interface modules (LPT and USB FET). Figure 2-1. Signal Connections for 4-Wire JTAG Communication SLAU278R–May 2009–Revised May 2014 Design Considerations for In-Circuit Programming 23 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 3 5 7 9 11 13 2 4 6 8 10 12 14 TEST/SBWTCK MSP430Fxxx RST/NMI/SBWTDIO TDO/TDI TCK GND TEST/VPP JTAG VCC TOOL VCC TARGET 330! R2 J1 (see Note A) J2 (see Note A) Important to connect VCC/AVCC/DVCC V /AV /DV SS SS SS R1 47 k! See Note B C1 2.2 nF See Note B VCC C2 10 μF C3 0.1 μF Signal Connections for In-System Programming and Debugging www.ti.com A If a local target power supply is used, make connection J1. If power from the debug or programming adapter is used, make connection J2. B The device RST/NMI/SBWTDIO pin is used in 2-wire mode for bidirectional communication with the device during JTAG access, and any capacitance that is attached to this signal may affect the ability to establish a connection with the device. The upper limit for C1 is 2.2 nF when using current TI tools. C R2 protects the JTAG debug interface TCK signal from the JTAG security fuse blow voltage that is supplied by the TEST/VPP pin during the fuse blow process. If fuse blow functionality is not needed, R2 is not required (populate 0 Ω) and do not connect TEST/VPP to TEST/SBWTCK. Figure 2-2. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F2xx, MSP430G2xx, and MSP430F4xx Devices 24 Design Considerations for In-Circuit Programming SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 3 5 7 9 11 13 2 4 6 8 10 12 14 TEST/SBWTCK MSP430Fxxx RST/NMI/SBWTDIO TDO/TDI TCK GND JTAG R1 47 k! See Note B VCC TOOL VCC TARGET C1 2.2 nF See Note B J1 (see Note A) J2 (see Note A) Important to connect VCC/AVCC/DVCC V /AV /DV SS SS SS VCC C2 10 μF C3 0.1 μF www.ti.com Signal Connections for In-System Programming and Debugging A Make connection J1 if a local target power supply is used, or make connection J2 if the target is powered from the debug or programming adapter. B The device RST/NMI/SBWTDIO pin is used in 2-wire mode for bidirectional communication with the device during JTAG access, and any capacitance that is attached to this signal may affect the ability to establish a connection with the device. The upper limit for C1 is 2.2 nF when using current TI tools. Figure 2-3. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F5xx and MSP430F6xx Devices SLAU278R–May 2009–Revised May 2014 Design Considerations for In-Circuit Programming 25 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated External Power www.ti.com 2.2 External Power The MSP-FET430UIF can supply targets with up to 60 mA through pin 2 of the 14-pin connector. Note that the target should not consume more than 60 mA, even as a peak current, as it may violate the USB specification. For example, if the target board has a capacitor on VCC more than 10 μF, it may cause inrush current during capacitor charging that may exceed 60 mA. In this case, the current should be limited by the design of the target board, or an external power supply should be used. The VCC for the target can be selected between 1.8 V and 3.6 V in steps of 0.1 V. Alternatively, the target can be supplied externally. In this case, the external voltage should be connected to pin 4 of the 14-pin connector. The MSP-FET430UIF then adjusts the level of the JTAG signals to external VCC automatically. Only pin 2 (MSP-FET430UIF supplies target) or pin 4 (target is externally supplied) must be connected; not both at the same time. When a target socket module is powered from an external supply, the external supply powers the device on the target socket module and any user circuitry connected to the target socket module, and the FET interface module continues to be powered from the PC through the parallel port. If the externally supplied voltage differs from that of the FET interface module, the target socket module must be modified so that the externally supplied voltage is routed to the FET interface module (so that it may adjust its output voltage levels accordingly). See the target socket module schematics in Appendix B. The PC parallel port can source a limited amount of current. Because of the ultra-low-power requirement of the MSP430, a standalone FET does not exceed the available current. However, if additional circuitry is added to the tool, this current limit could be exceeded. In this case, external power can be supplied to the tool through connections provided on the target socket modules. See the schematics and pictorials of the target socket modules in Appendix B to locate the external power connectors. Note that the MSPFET430PIF is not recommended for new design. 2.3 Bootstrap Loader (BSL) The JTAG pins provide access to the memory of the MSP430 and CC430 devices. On some devices, these pins are shared with the device port pins, and this sharing of pins can complicate a design (or sharing may not be possible). As an alternative to using the JTAG pins, most MSP430Fxxx devices contain a program (a "bootstrap loader") that permits the flash memory to be erased and programmed using a reduced set of signals. The MSP430 Programming Via the Bootstrap Loader User's Guide (SLAU319) describes this interface. See the MSP430 web site for the application reports and a list of MSP430 BSL tool developers. TI suggests that MSP430Fxxx customers design their circuits with the BSL in mind (that is, TI suggests providing access to these signals by, for example, a header). See FAQ Hardware #10 for a second alternative to sharing the JTAG and port pins. 26 Design Considerations for In-Circuit Programming SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix A SLAU278R–May 2009–Revised May 2014 Frequently Asked Questions and Known Issues This appendix presents solutions to frequently asked questions regarding the MSP-FET430 hardware. Topic ........................................................................................................................... Page A.1 Hardware FAQs.................................................................................................. 28 A.2 Known Issues .................................................................................................... 30 SLAU278R–May 2009–Revised May 2014 Frequently Asked Questions and Known Issues 27 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware FAQs www.ti.com A.1 Hardware FAQs 1. MSP430F22xx Target Socket Module (MSP-TS430DA38) – Important Information Due to the large capacitive coupling introduced by the device socket between the adjacent signals XIN/P2.6 (socket pin 6) and RST/SBWTDIO (socket pin 7), in-system debugging can disturb the LFXT1 low-frequency crystal oscillator operation (ACLK). This behavior applies only to the Spy-Bi-Wire (2-wire) JTAG configuration and only to the period while a debug session is active. Workarounds: • Use the 4-wire JTAG mode debug configuration instead of the Spy-Bi-Wire (2-wire) JTAG configuration. This can be achieved by placing jumpers JP4 through JP9 accordingly. • Use the debugger option "Run Free" that can be selected from the Advanced Run drop-down menu (at top of Debug View). This prevents the debugger from accessing the MSP430 device while the application is running. Note that, in this mode, a manual halt is required to see if a breakpoint was hit. See the IDE documentation for more information on this feature. • Use an external clock source to drive XIN directly. 2. With current interface hardware and software, there is a weakness when adapting target boards that are powered externally. This leads to an accidental fuse check in the MSP430 device. This is valid for PIF and UIF but is seen most often on the UIF. A solution is being developed. Workarounds: • Connect the RST/NMI pin to the JTAG header (pin 11). LPT and USB tools are able to pull the RST line, which also resets the device internal fuse logic. • Use the debugger option "Release JTAG On Go" that can be selected from the IDE drop-down menu. This prevents the debugger from accessing the MCU while the application is running. Note that in this mode, a manual halt is required to see if a breakpoint was hit. See the IDE documentation for more information on this feature. • Use an external clock source to drive XIN directly. 3. The 14-conductor cable that connects the FET interface module and the target socket module must not exceed 8 inches (20 centimeters) in length. 4. The signal assignment on the 14-conductor cable is identical for the parallel port interface and the USB FET. 5. To use the on-chip ADC voltage references, the capacitor must be installed on the target socket module. See the schematic of the target socket module to populate the capacitor according to the data sheet of the device. 6. To use the charge pump on the devices with LCD+ Module, the capacitor must be installed on the target socket module. See the schematic of the target socket module to populate the capacitor according to the data sheet of the device. 7. Crystals or resonators Q1 and Q2 (if applicable) are not provided on the target socket module. For MSP430 devices that contain user-selectable loading capacitors, see the device and crystal data sheets for the value of capacitance. 8. Crystals or resonators have no effect upon the operation of the tool and the CCS debugger or C-SPY (as any required clocking and timing is derived from the internal DCO and FLL). 9. On devices with multiplexed port or JTAG pins, to use these pin in their port capability: For CCS: "Run Free" (in Run pulldown menu at top of Debug View) must be selected. For C-SPY: "Release JTAG On Go" must be selected. 10. As an alternative to sharing the JTAG and port pins (on low pin count devices), consider using an MSP430 device that is a "superset" of the smaller device. A very powerful feature of the MSP430 is that the family members are code and architecturally compatible, so code developed on one device (for example, one without shared JTAG and port pins) ports effortlessly to another (assuming an equivalent set of peripherals). 28 Frequently Asked Questions and Known Issues SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware FAQs 11. Information memory may not be blank (erased to 0xFF) when the device is delivered from TI. Customers should erase the information memory before its first use. Main memory of packaged devices is blank when the device is delivered from TI. 12. The device current is higher then expected. The device current measurement may not be accurate with the debugger connected to the device. For accurate measurement, disconnect the debugger. Additionally some unused pins of the device should be terminated. See the Connection of Unused Pins table in the device's family user's guide. 13. The following ZIF sockets are used in the FET tools and target socket modules: • 8-pin device (D package): Yamaichi IC369-0082 • 14-pin device (PW package): Enplas OTS-14-065-01 • 14-pin package for 'L092 (PW package): Yamaichi IC189-0142-146 • 24-pin package (PW package): Enplas OTS-24(28)-0.65-02 • 28-pin device (DW package): Wells-CTI 652 D028 • 28-pin device (PW package): Enplas OTS-28-0.65-01 • 38-pin device (DA package): Yamaichi IC189-0382-037 • 40-pin device (RHA package): Enplas QFN-40B-0.5-01 • 40-pin device (RSB package): Enplas QFN-40B-0.4 • 48-pin device (RGZ package): Yamaichi QFN11T048-008 A101121-001 • 48-pin device (DL package): Yamaichi IC51-0482-1163 • 64-pin device (PM package): Yamaichi IC51-0644-807 • 64-pin device (RGC package): Yamaichi QFN11T064-006 • 80-pin device (PN package): Yamaichi IC201-0804-014 • 100-pin device (PZ package): Yamaichi IC201-1004-008 • 128-pin device (PEU package): Yamaichi IC500-1284-009P Enplas: www.enplas.com Wells-CTI: www.wellscti.com Yamaichi: www.yamaichi.us SLAU278R–May 2009–Revised May 2014 Frequently Asked Questions and Known Issues 29 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Known Issues www.ti.com A.2 Known Issues MSP-FET430UIF Current detection algorithm of the UIF firmware Problem Description If high current is detected, the ICC monitor algorithm stays in a loop of frequently switching on and off the target power supply. This power switching puts some MSP430 devices such as the MSP430F5438 in a state that requires a power cycle to return the device to JTAG control. A side issue is that if the UIF firmware has entered this switch on and switch off loop, it is not possible to turn off the power supply to the target by calling MSP430_VCC(0). A power cycle is required to remove the device from this state. Solution IAR KickStart and Code Composer Essentials that have the MSP430.dll version 2.04.00.003 and higher do not show this problem. Update the software development tool to this version or higher to update the MSP-FET430UIF firmware. MSP-FET430PIF Some PCs do not supply 5 V through the parallel port Problem Description Device identification problems with modern PCs, because the parallel port often does not deliver 5 V as was common with earlier hardware. 1. When connected to a laptop, the test signal is clamped to 2.5 V. 2. When the external VCC becomes less than 3 V, up to 10 mA is flowing in the adapter through pin 4 (sense). Solution Measure the voltage level of the parallel port. If it is too low, provide external 5 V to the VCC pads of the interface. The jumper on a the target socket must be switched to external power. 30 Frequently Asked Questions and Known Issues SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix B SLAU278R–May 2009–Revised May 2014 Hardware This appendix contains information relating to the FET hardware, including schematics, PCB pictorials, and bills of materials (BOMs). All other tools, such as the eZ430 series, are described in separate productspecific user's guides. SLAU278R–May 2009–Revised May 2014 Hardware 31 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix B www.ti.com Topic ........................................................................................................................... Page B.1 MSP-TS430D8 .................................................................................................... 33 B.2 MSP-TS430PW14................................................................................................ 36 B.3 MSP-TS430L092 ................................................................................................. 39 B.4 MSP-TS430L092 Active Cable .............................................................................. 42 B.5 MSP-TS430PW24................................................................................................ 45 B.6 MSP-TS430DW28................................................................................................ 48 B.7 MSP-TS430PW28................................................................................................ 51 B.8 MSP-TS430PW28A.............................................................................................. 54 B.9 MSP-TS430RHB32A............................................................................................ 57 B.10 MSP-TS430DA38 ................................................................................................ 60 B.11 MSP-TS430QFN23x0........................................................................................... 63 B.12 MSP-TS430RSB40 .............................................................................................. 66 B.13 MSP-TS430RHA40A............................................................................................ 69 B.14 MSP-TS430DL48 ................................................................................................ 72 B.15 MSP-TS430RGZ48B ............................................................................................ 75 B.16 MSP-TS430RGZ48C ............................................................................................ 78 B.17 MSP-TS430PM64 ................................................................................................ 81 B.18 MSP-TS430PM64A.............................................................................................. 84 B.19 MSP-TS430RGC64B............................................................................................ 87 B.20 MSP-TS430RGC64C............................................................................................ 90 B.21 MSP-TS430RGC64USB ....................................................................................... 94 B.22 MSP-TS430PN80 ................................................................................................ 98 B.23 MSP-TS430PN80A ............................................................................................ 101 B.24 MSP-TS430PN80USB ........................................................................................ 104 B.25 MSP-TS430PZ100 ............................................................................................. 108 B.26 MSP-TS430PZ100A ........................................................................................... 111 B.27 MSP-TS430PZ100B ........................................................................................... 114 B.28 MSP-TS430PZ100C ........................................................................................... 117 B.29 MSP-TS430PZ100D ........................................................................................... 121 B.30 MSP-TS430PZ5x100 .......................................................................................... 124 B.31 MSP-TS430PZ100USB ....................................................................................... 127 B.32 MSP-TS430PEU128 ........................................................................................... 131 B.33 EM430F5137RF900 ........................................................................................... 134 B.34 EM430F6137RF900 ........................................................................................... 138 B.35 EM430F6147RF900 ........................................................................................... 142 B.36 MSP-FET ......................................................................................................... 146 B.37 MSP-FET430PIF................................................................................................ 157 B.38 MSP-FET430UIF ............................................................................................... 159 32 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated GND 100nF 330R 10uF/10V 47K 2.2nF GND 330R GND GND green FE4L FE4H GND Ext_PWR Socket: YAMAICHI Type: IC369-0082 Vcc ext int to measure supply current DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 SBW C5 R3 C7 R5 C8 1 2 3 J3 1 2 J4 1 2 J6 1 2 3 J5 R2 D1 1 2 3 4 J1 5 6 7 8 J2 DVCC 1 DVSS 8 P1.2/TA1/A2 2 P1.5/TA0/A5/SCLK 3 P1.6/TA1/A6/SDO/SCL 4 TST/SBWTCK 7 RST/SBWTDIO 6 P1.7/A7/SDI/SDA 5 U1 MSP-TS430D8 GND VCC RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO SBWTCK VCC430 TST/SBWTCK TST/SBWTCK TST/SBWTCK P1.5 P1.6 P1.7 P1.2 Date: 28.07.201111:03:35 Sheet: /11 REV: TITLE: Document Number: MSP-TS430D8 + 1.0 MSP-TS430D8 Target Socket Board www.ti.com MSP-TS430D8 B.1 MSP-TS430D8 Figure B-1. MSP-TS430D8 Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 33 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper J4 Open to disconnect LED D1 LED connected to P1.2 Orient Pin 1 of MSP430 device 14-pin connector for debugging in Spy-Bi-Wire mode only (4-Wire JTAG not available) Jumper J6 Open to measure current Jumper J5 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector J3 External power connector Jumper J5 to “ext” MSP-TS430D8 www.ti.com Figure B-2. MSP-TS430D8 Target Socket Module, PCB 34 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430D8 Table B-1. MSP-TS430D8 Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 J4, J6 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 2 J5 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 3 SBW 1 10-pin connector, male, TH HRP10H-ND 4 J3 1 3-pin header, male, TH SAM1035-03-ND 5 C8 1 2.2nF, CSMD0805 Buerklin 53 D 292 6 C7 1 10uF, 10V, 1210ELKO 478-3875-1-ND 7 R5 1 47K, 0805 541-47000ATR-ND 8 C5 1 100nF, CSMD0805 311-1245-2-ND 9 R2, R3 2 330R, 0805 541-330ATR-ND 10 J1, J2 2 4-pin header, TH SAM1029-04-ND DNP: headers enclosed with kit. Keep vias free of solder. 10,1 J1, J2 1 4-pin socket, TH SAM1029-04-ND DNP: receptacles enclosed with kit. 11 U1 1 SO8 Socket: Type IC369-0082 Manuf.: Yamaichi 12 D1 1 red, LED 0603 13 MSP430 2 MSP430G2210, MSP430G2230 DNP: enclosed with kit. Is supplied by TI 14 PCB 1 50,0mmx44,5mm MSP-TS430D8 Rev. 1.0 SLAU278R–May 2009–Revised May 2014 Hardware 35 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 12pF 12pF GND 100nF 330R 10uF/10V 47K 2.2nF GND 330R 100nF GND GND GND green Ext_PWR Socket: ENPLAS Type: OTS-14-065 Vcc ext int to measure supply current DNP DNP DNP DNP DNP JTAG -> SBW -> JTAG-Mode selection: 4-wire JTAG: Set jumpers J7 to J12 to position 2-3 2-wire "SpyBiWire": Set jumpers J7 to J12 to position 2-1 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C5 R3 C7 R5 C8 1 2 3 J3 Q1 8 9 10 11 12 13 14 J2 1 2 3 4 5 6 7 J1 1 2 J4 1 2 J6 J5 1 2 3 R2 C3 J7 1 2 3 J8 1 2 3 J9 1 2 3 J10 1 2 3 J11 1 2 3 J12 1 2 3 1 2 3 4 5 6 7 8 9 10 14 13 12 11 D1 P1.0 P1.3 P1.2 P1.1 XOUT XOUT GND XIN XIN VCC RST/SBWTDIO RST/SBWTDIO SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK VCC430 P1.4/TCK P1.4/TCK P1.5/TMS P1.5/TMS P1.6/TDI P1.6/TDI P1.7/TDO P1.7/TDO TDO/SBWTDIO RST/NMI TMS TDI Date: 7/16/2007 8:22:36 AM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430PW14 + 2.0 MSP-TS430PW14 Target Socket Board MSP-TS430PW14 www.ti.com B.2 MSP-TS430PW14 Figure B-3. MSP-TS430PW14 Target Socket Module, Schematic 36 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper J4 Open to disconnect LED Orient Pin 1 of MSP430 device Jumper J6 Open to measure current Connector J3 External power connector D1 Jumper J5 to "ext" LED connected to P1.0 Jumpers J7 to J12 Close 1-2 to debug in Spy-Bi-Wire mode. Close 2-3 to debug in 4-wire JTAG mode. Jumper J5 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool www.ti.com MSP-TS430PW14 Figure B-4. MSP-TS430PW14 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 37 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PW14 www.ti.com Table B-2. MSP-TS430PW14 Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C7 1 10uF, 10V, Tantal Size 511-1463-2-ND B 3 C3, C5 1 100nF, SMD0805 478-3351-2-ND DNP: C3 4 C8 0 2.2nF, SMD0805 DNP 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: Headers and receptacles enclosed with kit. Keep vias free of 6 J1, J2 0 7-pin header, TH solder SAM1029-07-ND : Header SAM1213-07-ND : Receptacle J3, J5, J7, Place jumpers on headers J5, J7, J8, 7 J8, J9, J10, 8 3-pin header, male, TH SAM1035-03-ND J9, J10, J11, J12; Pos 1-2 J11, J12 8 J4, J6 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND Place on: J5, J7-J12; Pos 1-2 10 JTAG 1 14-pin connector, male, HRP14H-ND TH Micro Crystal MS1V-T1K 12 Q1 0 Crystal 32.768kHz, C(Load) = DNP: keep vias free of solder 12.5pF 13 R2, R3 2 330 Ω, SMD0805 541-330ATR-ND 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: OTS-14-0.65-01 Manuf.: Enplas 17 PCB 1 56 x 53 mm 2 layers Adhesive Approximately 6mm For example, 3M 18 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 19 MSP430 2 MSP430F2013IPW DNP: enclosed with kit, supplied by TI 38 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430L092 B.3 MSP-TS430L092 Figure B-5. MSP-TS430L092 Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 39 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J3 External power connector Jumper JP3 Open to measure current Jumper JP1 Write enable for EPROM Orient pin 1 of MSP430 device MSP-TS430L092 www.ti.com Settings of the MSP-TS430L092 Target Socket Figure B-6 shows the PCB layout of the MSP-TS430L092 target socket. The following pinning is recommended: • JP1 is write enable for the EPROM. If this is not set, the EPROM can only be read. • JP2 and JP3 connect device supply with boost converter. They can be opened to measure device current consumption. For default operation, they should be closed. Figure B-6. MSP-TS430L092 Target Socket Module, PCB 40 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430L092 Table B-3. MSP-TS430L092 Bill of Materials Pos. Ref Des No. No. Per Description Digi-Key Part No. Comment Board 1 C1, C2 2 330nF, SMD0603 2 C5 1 100n, SMD0603 3 C6 1 10u, SMD0805 4 C10 1 100n, SMD0603 5 EEPROM1 1 M95512 SO08 (SO8) ST Micro M95160R Digikey: 497-8688-1-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2 2 7-pin header, TH Keep vias free of solder. SAM1213-07-ND : Header SAM1035-07-ND : Receptacle 8 J3 1 3-pin header, male, TH SAM1035-03-ND 9 J4, J5 2 FE4L, FE4H 4 pol. Stiftreihe DNP; Keep vias free of solder. 11 J13 1 MICRO_STECKV_10 Reichelt: MicroMaTch- Connector: MM FL 10G 12 JP1, JP2,JP3 3 2-pin header, male, TH SAM1035-02-ND place jumper on header 15 L1 1 33uH, SMD0806 LQH2MCN330K02L Farnell: 151-5557 16 LED1, LED4 2 LEDCHIPLED_0603 Farnell: 1686065 17 Q2 1 BC817-16LT1SMD BC817-16LT1SMD SOT23-BEC 18 R0, R6, R7 3 2K7, SMD0603 19 R1 1 1k, SMD0603 20 R2 1 47k, SMD0603 21 R4,R5, R8, 6 10k, SMD0603 R10, RC, RD 22 RA 1 3.9k, SMD0603 23 RB 1 6.8k, SMD0603 24 U1 1 14 Pin Socket - IC189-0142- Manuf. Yamaichi 146 22 MSP430 2 MSP430L092PWR DNP: Enclosed with kit. Is supplied by TI. SLAU278R–May 2009–Revised May 2014 Hardware 41 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430L092 Active Cable www.ti.com B.4 MSP-TS430L092 Active Cable Figure B-7. MSP-TS430L092 Active Cable Target Socket Module, Schematic 42 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector JTAG For JTAG Tool JP2 JP1 www.ti.com MSP-TS430L092 Active Cable Figure B-8 shows the PCB layout for the Active Cable. The following pinning is possible: • JP1 has two jumpers (Jumper 1 and Jumper 2) that can be set as shown in Table B-4. Table B-4. MSP-TS430L092 JP1 Settings Jumper 1 Jumper 2 Description Off Off The active cable has no power and does not function. Off On The active cable receives power from target socket. For this option, the target socket must have its own power supply. On Off The active cable receives power from the JTAG connector. The JTAG connector powers the active cable and the target socket. For On On this option, the target socket must not have its own power source, as this would cause a not defined state. • JP2 is for reset. For the standard MSP-TS430L092, this jumper must be set. It sets the reset pin to high and can also control it. Without this jumper on the MSP-TS430L092, reset is set to zero. Figure B-8. MSP-TS430L092 Active Cable Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 43 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430L092 Active Cable www.ti.com Table B-5. MSP-TS430L092 Active Cable Bill of Materials Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 1 C1, C3, C5, 4 100nF, SMD0603 C6 2 C2, C4 2 1uF, SMD0805 3 R1, R10 2 10K, SMD0603 4 R2 1 4K7, SMD0603 5 R5, R6, R7, 4 100, SMD0603 R9 6 R8 1 680k, SMD0603 7 R11, R15 2 1K, SMD0603 8 R12 0 SMD0603 DNP 9 R13 0 SMD0603 DNP 10 R14 1 0, SMD0603 11 IC1 1 SN74AUC1G04DBVR Manu: TI 12 IC2, IC3, IC4 3 SN74AUC2G125DCTR Manu: TI 13 J2 1 MICRO_STECKV_10 Reichelt: MicroMaTch- Connector: MM FL 10G 14 JP1 1 2x2 Header JP2Q Put jumper on Position 1 and 2. Do not mix direction. 15 JP2 1 2-pin header, male, TH SAM1035-02-ND place jumper on header 16 JTAG 1 14-pin connector, male, TH HRP14H-ND 17 Q1 1 BC817-25LT1SMD, SOT23- Digi-Key: BC817- BEC 25LT1GOSCT-ND 18 U1, U2 2 TLVH431IDBVR SOT23-5 Manu: TI 44 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PW24 B.5 MSP-TS430PW24 Figure B-9. MSP-TS430PW24 Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 45 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Orient Pin 1 of MSP430 device D1 LED connected to P1.0 Jumper JP3 Open to disconnect LED Connector J5 External power connector Jumper JP1 to "ext" Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool MSP-TS430PW24 www.ti.com Figure B-10. MSP-TS430PW24 Target Socket Module, PCB 46 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PW24 Table B-6. MSP-TS430PW24 Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C5 1 2.2nF, SMD0805 3 C3, C7 2 10uF, 10V, SMD0805 4 C4, C6, C8 3 100nF, SMD0805 478-3351-2-ND 5 D1 1 green LED, SMD0805 P516TR-ND SAM1029-07- DNP: Headers and receptacles 6 J1, J2 0 12-pin header, TH NDSAM1213-07-ND enclosed with kit. Keep vias free of solder. (Header and Receptacle) J5, JP1, 7 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND Place jumper on 1-2 of JP4-JP9 JP6, JP7, Place on 1-2 on JP1 JP8, JP9 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND see Pos 7 an 8 10 JTAG 1 14-pin connector, male, HRP14H-ND TH 11 Q1 0 Crystal DNP: keep vias free of solder 12 R1, R7 2 330 Ω, SMD0805 541-330ATR-ND 13 R5, R6, 2 0 Ohm, SMD0805 541-000ATR-ND DNP R5, R6 R8, R9, 14 R4 1 47k Ohm, SMD0805 541-47000ATR-ND 15 U1 1 Socket: OTS 24(28)- Manuf.: Enplas 065-02-00 16 PCB 1 68.5 x 61 mm 2 layers Adhesive Approximately 6mm for example, 3M 17 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 18 MSP430 2 MSP430AFE2xx DNP: enclosed with kit, supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 47 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated ML14 LED3 12pF 12pF GND GND 100nF 560R ML10 JP1Q JP1Q 10uF/10V 50K 10nF 0R 0R 0R - - 0R - U1 SOCK28DW F123 FE14H FE14L 0R GND remove R8 and add R9 (0 Ohm) If external supply voltage: remove R11 and add R10 (0 Ohm) SMD-Footprint Socket: Yamaichi 2.0 MSP-TS430DW28 Target Socket DW28 Type: IC189-0282-042 If external supply voltage: R1, C1, C2 not assembled not assembled 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG D1 C2 C1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 1 2 J5 J4 1 2 C7 R5 C8 R6 R7 R8 R9 R10 R11 R1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 TST 1 VCC 2 P2.5 3 VSS 4 XOUT 5 XIN 6 RST 7 P2.0 8 P2.1 9 P2.2 10 P2.3 19 P2.4 20 P1.0 21 P1.1 22 P1.2 23 P1.3 24 P1.4 25 P1.5 26 P1.6 27 P1.7 28 P3.0 11 P3.1 12 P3.2 13 P3.3 14 P3.4 15 P3.5 16 P3.6 17 P3.7 18 U2 15 16 17 18 19 20 21 22 23 24 25 26 27 28 J2 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 R2 1 2 3 J3 Q1 QUARZ3 P1.0 P1.0 P1.3 P1.3 P1.2 P1.2 P1.1 P1.1 RST/NMI RST/NMI RST/NMI RST/NMI RST/NMI TCK TCK TCK TMS TMS TMS TDI TDI TDI TDO TDO TDO XOUT XOUT VCC GND GND GND P2.3 P2.3 P2.4 P2.4 XIN XIN P2.5 P2.5 P2.2 P2.2 P2.1 P2.1 P2.0 P2.0 TST/VPP TST/VPP TST/VPP P3.0 P3.0 P3.1 P3.1 P3.2 P3.2 P3.3 P3.3 P3.7 P3.7 P3.6 P3.6 P3.5 P3.5 P3.4 P3.4 VCC430 Ext_PWR Date: 11/14/2006 1:26:04 PM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430DW28 + VCC430 MSP-TS430DW28 www.ti.com B.6 MSP-TS430DW28 Figure B-11. MSP-TS430DW28 Target Socket Module, Schematic 48 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper J4 Open to disconnect LED Orient Pin 1 of MSP430 device Jumper J5 Open to measure current Connector J3 External power connector Remove R8 and jumper R9 D1 LED connected to P1.0 Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool www.ti.com MSP-TS430DW28 Figure B-12. MSP-TS430DW28 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 49 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430DW28 www.ti.com Table B-7. MSP-TS430DW28 Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2, Cover holes while soldering 2 C5 1 100nF, SMD0805 3 C7 1 10uF, 10V Tantal Elko B 4 C8 1 10nF SMD0805 5 D1 1 LED3 T1 3mm yellow RS: 228-4991 Micro Crystal MS1V-T1K 6 Q1 0 QUARZ, Crystal 32.768kHz, C(Load) = DNP: Cover holes while soldering 12.5pF DNP: Headers and receptacles enclosed with kit. Keep vias free of 7 J1, J2 2 14-pin header, TH male solder. : Header : Receptacle DNP: Headers and receptacles enclosed with kit. Keep vias free of 7.1 2 14-pin header, TH solder. female : Header : Receptacle 8 J3 1 3-Pin Connector, male 9 J4, J5 2 2-Pin Connector, male With jumper 10 BOOTST 0 ML10, 10-Pin Conn., m RS: 482-115 DNP, Cover holes while soldering 11 JTAG 1 ML14, 14-Pin Conn., m RS: 482-121 R1, R2, 12 R6, R7, 4 0R, SMD0805 DNP: R1, R2, R9, R10 R8,R9, R10, R11 13 R3 1 560R, SMD0805 14 R5 1 47K, SMD0805 15 U1 1 SOP28DW socket Yamaichi: IC189-0282- 042 16 U2 0 TSSOP DNP 50 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 12pF 12pF GND GND 100nF 330R 10uF/10V - 0R GND GND green 2.2nF 47k GND 0R 0R 330R MSP430F12xx If external supply voltage: remove R11 and add R10 (0 Ohm) 3.1 MSP-TS430PW28: OTS-28-0.65-01 Socket: Enplas Vcc int ext Target Socket Board for MSP430's in PW28 package DNP DNP DNP DNP DNP DNP DNP JTAG -> SBW -> JTAG-Mode selection: 4-wire JTAG: Set jumpers JP4 to JP9 to position 2-3 2-wire "SpyBiWire": Set jumpers JP4 to JP9 to position 1-2 DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C4 R1 1 2 3 4 5 6 7 8 9 10 BOOTST C3 R2 R3 1 2 3 J5 JP1 1 2 3 JP2 1 2 1 2 JP3 D1 C5 R4 JP4 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 JP9 1 2 3 R5 R6 1 2 Q1 R7 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 U1 TST 1 VCC 2 P2.5 3 VSS 4 XOUT 5 XIN 6 RST 7 P2.0 8 P2.1 9 P2.2 10 P2.3 19 P2.4 20 P1.0 21 P1.1 22 P1.2 23 P1.3 24 P1.4 25 P1.5 26 P1.6 27 P1.7 28 P3.0 11 P3.1 12 P3.2 13 P3.3 14 P3.4 15 P3.5 16 P3.6 17 P3.7 18 P1.0 P1.0 RST/NMI TMS TDI VCC GND GND VCC430 VCC430 P2.0 P1.1 P1.1 P3.3 P3.2 P3.1 P3.0 P2.2 P2.2 XIN/P2.6 XIN/P2.6 XOUT/P2.7 XOUT/P2.7 P2.1 RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO P3.4 P3.5 P3.6 P3.7 P2.3 P2.4 P1.2 P1.3 P1.4/TCK P1.4/TCK P1.5/TMS P1.5/TMS P1.6/TDI P1.6/TDI P1.7/TDO P1.7/TDO TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK P2.5 TCK/SBWTCK TDO/SBWTDIO XTLGND Ext_PWR + www.ti.com MSP-TS430PW28 B.7 MSP-TS430PW28 Figure B-13. MSP-TS430PW28 Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 51 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Jumper JP3 Open to disconnect LED D1 LED connected to P5.1 Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumper JP4 to JP9: Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Orient Pin 1 of MSP430 device Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Connector J5 External power connector Jumper JP1 to “ext” MSP-TS430PW28 www.ti.com Figure B-14. MSP-TS430PW28 Target Socket Module, PCB 52 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PW28 Table B-8. MSP-TS430PW28 Bill of Materials(1) Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 , Cover holes while soldering 2 C3 1 10uF, 10V Tantal Elko B 3 C4 1 100nF, SMD0805 4 C5 0 2.2nF, SMD0805 DNP 5 D1 1 LED green SMD0603 Micro Crystal MS1V-T1K DNP: Cover holes and 6 Q1 0 QUARZ, Crystal 32.768kHz, C(Load) = neighboring holes while 12.5pF soldering DNP: Headers and receptacles enclosed with 7 J1, J2 2 14-pin header, TH male kit.Keep vias free of solder. : Header : Receptacle DNP: headers and receptacles enclosed with 7.1 2 14-pin header, TH female kit.Keep vias free of solder. : Header : Receptacle 8 J5, IP1 1 3-Pin Connector , male JP1, JP4, 8a JP5, JP6, 7 3-Pin Connector , male Jumper on Pos 1-2 JP7, JP8, JP9 9 JP2, JP3 2 2-Pin Connector , male with Jumper 10 BOOTST 0 ML10, 10-Pin Conn. , m RS: 482-115 DNP: Cover holes while soldering 11 JTAG 1 ML14, 14-Pin Conn. , m RS: 482-121 12 R1, R7 2 330R, SMD0805 12 R2, R3, R5, 0 0R, SMD0805 DNP R6 14 R4 1 47K, SMD0805 15 U1 1 SOP28PW socket Enplas: OTS-28-0.65-01 (1) PCB 66 x 79 mm, two layers; Rubber stand off, four pieces SLAU278R–May 2009–Revised May 2014 Hardware 53 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated JTAG Mode selection: 4-wire JTAG: Set jumpers J4 to J9 to position 2-3 2-wire "SpyBiWire": Set jumpers J4 to J9 to position 2-1 MSP-TS430PW28A www.ti.com B.8 MSP-TS430PW28A Figure B-15. MSP-TS430PW28A Target Socket Module, Schematic 54 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Orient Pin 1 of MSP430 device Jumper JP3 Open to disconnect LED D1 LED connected to P1.0 Connector J5 External power connector Jumper JP1 to "ext" Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply www.ti.com MSP-TS430PW28A Figure B-16. MSP-TS430PW28A Target Socket Module, PCB (Red) SLAU278R–May 2009–Revised May 2014 Hardware 55 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PW28A www.ti.com Table B-9. MSP-TS430PW28A Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C5 1 2.2nF, SMD0805 3 C3 1 10uF, 10V, SMD0805 4 C4, C6, 2 100nF, SMD0805 478-3351-2-ND 5 D1 1 green LED, SMD0805 P516TR-ND DNP: Headers and receptacles 6 J1, J2 0 14-pin header, TH enclosed with kit. Keep vias free of solder: (Header and Receptacle) J5, JP1, 7 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND Place jumper on 1-2 of JP4-JP9 JP6, JP7, Place on 1-2 on JP1 JP8, JP9 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND see Pos 7 an 8 10 JTAG 1 14-pin connector, male, HRP14H-ND TH 11 BOOTST 0 DNP Keep vias free of solder Micro Crystal MS3V 12 Q1 0 Crystal 32.768kHz, C(Load) = DNP: keep vias free of solder 12.5pF 13 R1, R7 2 330 Ω, SMD0805 541-330ATR-ND 14 R2, R3,R5, 0 0 Ohm, SMD0805 541-000ATR-ND DNP R2, R3,R5, R6 R6, 15 R4 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: OTS-28-0.65-01 Manuf.: Enplas 17 PCB 1 63.5 x 64.8 mm 2 layers Adhesive Approximately 6mm for example, 3M 18 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 19 MSP430 2 MSP430G2553IPW28 DNP: enclosed with kit, supplied by TI 56 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated DNP DNP DNP DNP DNP DNP DNP DNP GND 0R 330R 2.2nF PWR3 GND GND 0R 47K 470nF 100nF 10uF 100nF GND GND 20k/0.1% 10k 10k 10k 10k GND AVSS AVSS 10k 10k 10k 10k GND SAM1029-08-ND1-8 SAM1029-08-ND9-16 MSP430I2040TRHBQFN11T032-003 SAM1029-08-ND17-2417-24 SAM1029-08-ND25-32 1.0 for MSP430i2040 MSP430: Target-Socket MSP-TS430RHB32A DNP <- SBW <- JTAG Vcc int ext Socket: Yamaichi QFN11T032-003 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG R1 R3 C8 J5 1 2 3 1 JP1 2 1 2 JP2 R4 1 2 3 JP4 1 2 3 JP9 1 2 3 JP8 1 2 3 JP7 1 2 3 JP6 1 2 3 JP5 R5 D1 C9 1 2 3 JP3 C14 C12 C13 R2 R6 R8 R9 R10 R11 R12 R13 R14 1 2 3 4 5 6 7 8 J1 9 10 11 12 13 14 15 16 J2 A0.0+ 1 A0.0- 2 A1.0+ 3 A1.0- 4 A2.0+ 5 A2.0- 6 A3.0+ 7 A3.0- 8 VREF 9 AVSS 10 ROSC 11 DVSS 12 VCC 13 VCORE 14 P2.3/VMONIN 28 P2.2/TA1.2 27 P2.1/TA1.1 26 P2.0/TA1.0/CLKIN 25 P1.7/UCB0SDA/UCB0SIMO/TA1CLK 24 P1.6/UCB0SCL/UCB0SOMI/TA0.2 23 P1.5/UCB0CLK/TA0.1 22 P1.4/UCB0STE/TA0.0 21 P1.3/UCA0TXD/UCA0SIMO/TA0CLK/TDO/TDI 20 P1.2/UCA0RXD/UCA0SOMI/ACLK/TDI/TCLK 19 P1.1/UCA0CLK/SMCLK/TMS 18 P1.0/UCA0STE/MCLK/TCK 17 TEST/SBWTCK 16 RST/NMI/SBWTDIO 15 U1 P2.4/TA1.0 29 P2.5/TA0.0 30 P2.6/TA0.1 31 P2.7/TA0.2 32 17 18 19 20 21 22 23 24 J3 25 26 27 28 29 30 31 32 J4 TMS TMS TDI TDI TDO TDO TDO VCC GND GND P1.4 P1.4 DVCC DVCC DVCC AVSS M M I I O O RST/NMI RST/NMI TCK TCK TCK C TEST/SBWTCK C TEST/SBWTCK VCORE A0.0+ A0.0- A1.0+ A1.0- VREF ROSC RST RST RST A2.0+ A2.0- A3.0+ A3.0- P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 www.ti.com MSP-TS430RHB32A B.9 MSP-TS430RHB32A Figure B-17. MSP-TS430RHB32A Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 57 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Orient Pin 1 of MSP430 device D1 LED connected to P1.4 Jumper JP1 Open to measure current Connector J5 External power connector Jumper JP3 to “ext” Connector JTAG For JTAG Tool Jumper JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 3-4 to debug in 4-wire JTAG mode Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumper JP2 Open to disconnect LED P1.4 14 1 2 GND GND VCC 1 2 3 3 2 1 8 5 1 16 9 17 20 24 25 30 32 Vcc ext int MSP-TS430RHB32A Rev.: 1.0 RoHS SBW JTAG 1 Curr. Meas. JTAG R1 R3 C8 J5 JP1 JP2 R4 JP4 JP9 JP8 JP7 JP6 JP5 R5 D1 C9 JP3 C14 C13 C12 R2 R6 R8 R9 R10 R11 R12 R13 R14 J1 J2 U1 J3 J4 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 MSP-TS430RHB32A www.ti.com Figure B-18. MSP-TS430RHB32A Target Socket Module, PCB 58 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RHB32A Table B-10. MSP-TS430RHB32A Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 PCB 1 76.9 x 67.6 mm MSP-TS430RHB32A Rev. 2 layers, red solder mask 1 2 D1 1 green LED, DIODE0805 P516TR-ND 3 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 4 JP3, JP4, 7 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 1-2 JP5, JP6, (SBW) JP7, JP8, JP9 5 R1, R4 2 0R, 0805 541-0.0ATR-ND 6 C8 1 2.2nF, CSMD0805 490-1628-2-ND DNP 7 R6, R8, R9, 8 10k, 0805 311-10KARTR-ND DNP R10, R11, R12, R13, R14 8 C12 1 10uF, CSMD0805 445-1371-2-ND 9 R2 1 20k/0.1%, 0805 P20KDACT-ND 10 R5 1 47K, 0805 311-47KARTR-ND 11 C13, C14 2 100nF, CSMD0805 311-1245-2-ND 12 R3 1 330R, 0805 541-330ATR-ND 13 C9 1 470nF, CSMD0805 445-1357-2-ND 14 J1, J2, J3, 1 8-pin header, TH SAM1029-08-ND DNP: headers and J4 receptacles, enclosed with kit. Keep vias free of solder. 15 J1, J2, J3, 1 8-pin receptable, TH SAM1213-08-ND DNP: headers and J4 receptacles, enclosed with kit. Keep vias free of solder. 16 JTAG 1 14-pin connector, male, TH HRP14H-ND 17 U1 1 Socket QFN11T032-003 Manuf.: Yamaichi 18 U1 1 MSP430i2041TRHB DNP: enclosed with kit. Is supplied by TI 19 J5 1 3-pin header, male, TH SAM1035-03-ND 20 Rubber 4 Buerklin: 20H1724 apply to corners at bottom stand off side SLAU278R–May 2009–Revised May 2014 Hardware 59 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 12pF 12pF GND GND 100nF 560R 10uF/10V 47k 10nF - 0R GND MSP430F2274IDA GND 330R GND yellow If external supply voltage: remove R11 and add R10 (0 Ohm) IC189-0382-037 Socket: 4-wire JTAG: 2-wire "SpyBiWire": JTAG-Mode selection: Set jumpers JP4 to JP9 to position 2-3 Set jumpers JP4 to JP9 to position 2-1 JTAG -> SBW -> Yamaichi DNP DNP DNP DNP DNP DNP DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C5 R3 1 2 3 4 5 6 7 8 9 10 BOOTST C7 R5 C8 R10 R11 1 2 3 J3 Q1 TEST/SBWTCK 1 P3.5 26 P3.6 27 P1.4/TCK 35 RST/SBWDAT 7 DVCC 2 DVSS 4 P4.7 24 P3.7 28 AVSS 15 AVCC 16 P3.0 11 P3.1 12 P3.2 13 P3.3 14 P4.0 17 P4.1 18 P4.2 19 P3.4 25 P2.5 3 P2.4 30 P2.3 29 P2.2 10 P2.1 9 P2.0 8 P1.5/TMS 36 P1.6/TDI 37 P1.7/TDO 38 P2.7 5 P2.6 6 P4.6 23 P4.5 22 P4.4 21 P4.3 20 P1.0 31 P1.1 32 P1.2 33 P1.3 34 U1 JP1 1 2 3 JP2 1 2 1 2 JP3 1 2 3 JP4 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 R1 JP9 1 2 3 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 1 J1 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 20 J2 D1 P1.0 P1.0 RST/NMI TMS TDI VCC GND GND GND VCC430 VCC430 VCC430 TCK/SBWTCK TDO/SBWTDIO TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK P2.5 P2.0 P2.1 P3.0 P3.1 P3.2 P3.3 P4.0 P4.1 P4.2 P1.7/TDO P1.7/TDO P1.6/TDI P1.6/TDI P1.5/TMS P1.5/TMS P1.4/TCK P1.4/TCK P1.3 P1.2 P1.1 P1.1 P2.4 P2.3 P3.7 P3.6 P3.5 P3.4 P4.7 P4.6 P4.5 P4.4 P4.3 P2.7/XOUT P2.7/XOUT P2.6/XIN P2.6/XIN RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO P2.2 P2.2 Ext_PWR Date: 6/18/2008 11:04:56 AM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430DA38 + 1.3 MSP-TS430DA38: Vcc int ext Target Socket Board for MSP430F2247IDA MSP-TS430DA38 www.ti.com B.10 MSP-TS430DA38 Figure B-19. MSP-TS430DA38 Target Socket Module, Schematic 60 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Orient pin 1 of MSP430 device D1 LED connected to P1.0 Connector J3 External power connector Jumper JP1 to "ext" Jumper JP3 Open to disconnect LED Jumper JP2 Open to measure current Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool www.ti.com MSP-TS430DA38 Figure B-20. MSP-TS430DA38 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 61 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430DA38 www.ti.com Table B-11. MSP-TS430DA38 Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 0 2.2nF, SMD0805 DNP 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: headers and receptacles enclosed with 6 J1, J2 0 19-pin header, TH kit.Keep vias free of solder. SAM1029-19-ND : Header SAM1213-19-ND : Receptacle "J3, JP1, Place jumpers on headers 7 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND JP1, JP4,JP5, JP6, JP7, JP6, JP7, JP8, JP9; Pos 1-2 JP8, JP9" 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 9 Jumper 15-38-1024-ND Place on: JP1 - JP9; Pos 1- 2 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R1, R3 2 330 Ω, SMD0805 541-330ATR-ND 14 R10, R11 0 0 Ω, SMD0805 541-000ATR-ND DNP 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC189-0382--037 Manuf.: Yamaichi 17 PCB 1 67 x 66 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430F2274IDA DNP: enclosed with kit supplied by TI 62 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430QFN23x0 B.11 MSP-TS430QFN23x0 Figure B-21. MSP-TS430QFN23x0 Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 63 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated D1 LED connected to P1.0 Connector J5 External power connector Jumper JP1 to "ext" Jumper JP3 Open to disconnect LED Jumper JP2 Open to measure current Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Orient Pin 1 of MSP430 device MSP-TS430QFN23x0 www.ti.com Figure B-22. MSP-TS430QFN23x0 Target Socket Module, PCB 64 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430QFN23x0 Table B-12. MSP-TS430QFN23x0 Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3 1 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C4 1 100nF, SMD0805 478-3351-2-ND 4 C5 1 10nF, SMD0805 478-1383-2-ND 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: headers and receptacles enclosed with 6 J1, J2, J3, 0 10-pin header, TH kit.Keep vias free of solder. J4 SAM1034-10-ND : Header SAM1212-10-ND : Receptacle 7 J5, JP1 2 3-pin header, male, TH SAM1035-03-ND Place jumper on header JP1; Pos 1-2. 8 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 3 Jumper 15-38-1024-ND Place on: JP1, JP2, JP3 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R1 1 330 Ω, SMD0805 541-330ATR-ND 14 R2, R3 0 0 Ω, SMD0805 541-000ATR-ND DNP 15 R4 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: QFN-40B-0.5-01 Manuf.: Enplas 17 PCB 1 79 x 66 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430F2370IRHA DNP: enclosed with kit supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 65 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RSB40 www.ti.com B.12 MSP-TS430RSB40 Figure B-23. MSP-TS430RSB40 Target Socket Module, Schematic 66 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Orient Pin 1 of MSP430 device Jumper JP3 Open to disconnect LED D1 LED connected to P1.0 Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Connector J5 External power connector Jumper JP1 to "ext" Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply www.ti.com MSP-TS430RSB40 Figure B-24. MSP-TS430RSB40 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 67 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RSB40 www.ti.com Table B-13. MSP-TS430RSB40 Bill of Materials Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 2 C3, C7, C10, 3 10uF, 10V, SMD 0805 445-1371-1-ND DNP C12 C12 3 C4, C6, C8, 3 100nF, SMD0805 311-1245-2-ND DNP C11 C11 4 C5 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 4 10-pin header, TH Keep vias free of solder. : Header : Receptacle DNP: headers and receptacles enclosed with kit. 7.1 4 10-pin header, TH Keep vias free of solder. : Header : Receptacle JP1, JP4,JP5, Jumper: 1-2 on JP1, JP10; 2- 8 JP6, JP7, 9 3-pin header, male, TH SAM1035-03-ND 3 on JP4-JP9 JP8, JP9, J5, JP10 9 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP. Keep vias free of solder 12 U1 1 QFN-40B-0.4_ Enplas ENPLAS_SOCKET Micro Crystal MS3V-T1R DNP: Q1. Keep vias free of 13 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF Place on: JP1, JP2, JP3, 15 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 16 R1,R7 2 330R SMD0805 R2, R3, R5, 17 R6, R8, R9, 3 0R SMD0805 DNP R2, R3, R5, R6 R10 18 R4 1 47k SMD0805 19 MSP430 2 MSP430F5132 DNP: enclosed with kit. Is supplied by TI 20 Rubber stand 4 select appropriate; for apply to corners at bottom off example, Buerklin: 20H1724 side 68 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RHA40A B.13 MSP-TS430RHA40A Figure B-25. MSP-TS430RHA40A Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 69 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Connector J5 External power connector Jumper JP1 to "ext" Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 Jumper JP3 Open to disconnect LED Orient Pin 1 of MSP430 device Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool MSP-TS430RHA40A www.ti.com Figure B-26. MSP-TS430RHA40A Target Socket Module, PCB 70 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RHA40A Table B-14. MSP-TS430RHA40A Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 2 C5 0 2.2nF, SMD0805 DNP C12 3 C3, C7 2 10uF, 10V, SMD0805 5 DNP C11 4 C4, C6 2 100nF, SMD0805 478-3351-2-ND 5 C9 1 470nF, SMD0805 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. Keep vias free of 7 J1, J2, J3, 4 10-pin header, TH solder. J4 : Header : Receptacle DNP: headers and receptacles enclosed with kit. Keep vias free of 7.1 4 10-pin header, TH solder. : Header : Receptacle J5, JP1, 8 JP4, JP5, 8 3-pin header, male, TH SAM1035-03-ND Place jumper on 1-2 of JP4-JP9; JP6, JP7, Place on 1-2 on JP1 JP8, JP9 9 JP2, JP3 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10 9 Jumper 15-38-1024-ND see Pos 8 an 9 11 JTAG 1 14-pin connector, male, HRP14H-ND TH 12 BOOTST 0 10-pin connector, male, DNP. Keep vias free of solder TH 13 U1 1 Socket: QFN-40B-0.5-01 Manuf.: Enplas Micro Crystal MS3V-T1R 14 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1. Keep vias free of solder 12.5pF 15 R1,R7 2 330R SMD0805 541-330ATR-ND R2, R3, 16 R5, R6, 2 0 Ohm, SMD0805 541-000ATR-ND DNP:R2, R3, R5, R6 R8, R9, 17 R4 1 47k SMD0805 18 PCB 1 79 x 66 mm 2 layers Rubber select appropriate; for 19 stand off 4 example, Buerklin: apply to corners at bottom side 20H1724 20 MSP430 2 MSP430N5736IRHA DNP: enclosed with kit. Is supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 71 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated ML14 LED3 12pF 12pF GND GND 100nF 560R ML10 JP1Q JP1Q 10uF/10V 47K 10nF 0R 0R GND 0R 0R 10uF/10V GND IC51-1387.KS-15186 100nF 1.3 MSP-TS430DL48 Target Socket DL48 Q1, C1, C2 not assembled 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG D1 C2 C1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 1 2 J5 J4 1 2 C7 R5 C8 R6 R7 1 2 3 J3 Q1 QUARZ3 J2 1 3 5 2 4 6 7 9 8 10 11 13 15 12 14 16 17 19 18 20 21 23 22 24 1 3 5 2 4 6 7 9 8 10 11 13 15 12 14 16 17 19 18 20 21 23 22 24 J1 R12 R4 JP1 1 2 3 1 2 3 JP2 C4 U1 TDO/TDI 1 TDI/TCLK 2 TMS 3 TCK 4 RST/NMI 5 DVCC 6 DVSS 7 XIN 8 XOUT 9 AVSS 10 AVCC 11 VREF+ 12 P6.0 13 P6.1 14 P6.2 15 P6.3 16 P6.4 17 P6.5 18 P6.6 19 P6.7 20 P2.5 39 P2.4 40 P2.3 41 P2.2 42 P2.1 43 P2.0 44 COM0 45 P5.2 46 P5.3 47 P5.4 48 LCDREF 29 LCDCAP 30 P5.1 31 P5.0 32 P5.5 33 P5.6 34 P5.7 35 S5 36 P2.7 37 P2.6 38 P1.7 21 P1.6 22 P1.5 23 P1.4 24 P1.0 28 P1.1 27 P1.2 26 P1.3 25 C3 P1.0 P1.0 RST/NMI RST/NMI RST/NMI TCK TCK TCK TMS TMS TDI TDI TDO TDO XOUT XOUT GND GND GND XIN XIN BSL_TX VCC BSL_RX Ext_PWR Date: 11/14/2006 1:24:44 PM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430DL48 + + Vcc ext int int ext Vcc MSP-TS430DL48 www.ti.com B.14 MSP-TS430DL48 Figure B-27. MSP-TS430DL48 Target Socket Module, Schematic 72 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper J4 Open to disconnect LED D1 LED connected to P1.0 Orient pin 1 of MSP430 device Jumper J5 Open to measure current Connector J3 External power connector Jumper JP2 to "ext" Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP2 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply www.ti.com MSP-TS430DL48 Figure B-28. MSP-TS430DL48 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 73 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430DL48 www.ti.com Table B-15. MSP-TS430DL48 Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C4, C7 2 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C3, C5 2 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 D1 1 yellow LED, TH, 3mm, T1 511-1251-ND DNP: Headers and receptacles enclosed with 6 J1, J2 0 24-pin header, TH kit.Keep vias free of solder. SAM1034-12-ND : Header SAM1212-12-ND : Receptacle 7 J3, JP1, JP2 2 3-pin header, male, TH SAM1035-03-ND Place jumper on header JP1; Pos 1-2. DNP: JP2 8 J4, J5 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 3 Jumper 15-38-1024-ND Place on: JP1, J4, J5 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R3 1 560 Ω, SMD0805 541-560ATR-ND 14 R4, R6, R7, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R6, R7 R12 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC51-1387 KS- Manuf.: Yamaichi 15186 17 PCB 1 58 x 66 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430F4270IDL DNP: Enclosed with kit supplied by TI 74 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGZ48B B.15 MSP-TS430RGZ48B Figure B-29. MSP-TS430RGZ48B Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 75 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to disconnect LED Connector J5 External power connector Jumper JP3 to "ext" Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 Jumper JP1 Open to measure current Orient Pin 1 of MSP430 device Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply MSP-TS430RGZ48B www.ti.com Figure B-30. MSP-TS430RGZ48B Target Socket Module, PCB 76 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGZ48B Table B-16. MSP-TS430RGZ48B Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3, C4 0 47pF, SMD0805 DNP 3 C6, C7, 3 10uF, 6.3V, SMD0805 C12 4 C5, C11, 4 100nF, SMD0805 311-1245-2-ND C13, C14 5 C8 1 2.2nF, SMD0805 6 C9 1 470nF, SMD0805 478-1403-2-ND 7 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-12-ND DNP: Headers and receptacles 8 J4 0 12-pin header, TH (Header) SAM1213-12- enclosed with kit. Keep vias free of ND (Receptacle) solder: 9 J5 1 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, 10 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP6, JP7, JP8, JP9, JP10 place JP8, JP9, jumpers on pins 1-2 on JP3, JP10 11 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 12 9 Jumper 15-38-1024-ND See Pos. 10and Pos. 11 13 JTAG 1 14-pin connector, male, HRP14H-ND TH 14 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH Micro Crystal MS3V-T1R 15 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1 Keep vias free of solder 12.5pF 16 Q2 0 Crystal Q2: 4MHz Buerklin: DNP: Q2 Keep vias free of solder 78D134 Insulating http://www.ettinger.de/Ar 17 disk to Q2 0 Insulating disk to Q2 t_Detail.cfm?ART_ART NUM=70.08.121 18 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, R6, 19 R8, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11,R12 R9,R10, R11, R12 20 R5 1 47k Ω, SMD0805 541-47000ATR-ND 21 U1 1 Socket: QFN11T048- Manuf.: Yamaichi 008_A101121_RGZ48 22 PCB 1 81 x 76 mm 2 layers Adhesive Approximately 6mm for example, 3M 23 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 24 MSP430 2 MSP430F5342IRGZ DNP: enclosed with kit, supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 77 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated DNP DNP DNP GND GND 100nF 330R 0R - GND GND 47k 1.1nF GND 0R 0R 0R 1uF/10V QUARZ5 1uF/10V 100nF green DNP yellow (DNP) DNP red (DNP) 0R GND DNP DNP 0R 0R QUARZ5 EVQ11 0R DNP DNP If external supply voltage: remove R3 and add R2 (0 Ohm) 1.3 Ext_PWR MSP-TS430RGZ48C Vcc int ext Target Socket Board for MSP430FR58xx, FR59xx IRGZ DNP DNP DNP DNP DNP JTAG -> SBW -> JTAG-Mode selection: 4-wire JTAG: Set jumpers JP3 to JP8 to position 2-3 2-wire "SpyBiWire": Set jumpers JP3 to JP8 to position 1-2 connection by via DNP DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C4 R1 1 2 3 4 5 6 7 8 9 10 BOOTST R3 R2 1 2 3 J2 J1 1 2 3 JP1 1 2 1 2 JP9 R4 C5 1 2 3 JP3 1 2 3 JP4 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 R5 R6 R7 C3 Q1 C7 C6 D1 R10 1 2 JP10 D2 R11 1 2 JP11 D3 R12 JP2 1 2 C8 C9 R9 R8 Q2 SV4 1 2 3 4 5 6 7 8 9 10 11 12 SV1 1 2 3 4 5 6 7 8 9 10 11 12 SV2 1 2 3 4 5 6 7 8 9 10 11 12 SV3 1 2 3 4 5 6 7 8 9 10 11 12 1 1_P1.0 2 2_P1.1 3 3_P1.2 4 4_P3.0 5 5_P3.1 6 6_P3.2 7 7_P3.3 8 8_P4.7 9 9_P1.3 10 10_P1.4 11 11_P1.5 12 12_PJ.0_TDO 13 13_PJ.1_TDI 14 14_PJ.2_TMS 15 15_PJ.3/TCK 16 16_P4.0 17 17_P4.1 18 18_P4.2 19 19_P4.3 20 20_P2.5 21 21_P2.6 22 22_TEST/SBWTCK 23 23_RST/SBWTDIO 24 24_P2.0 25_P2.1 25 26_P2.2 26 27_P3.4 27 28_P3.5 28 29_P3.6 29 30_P3.7 30 31_P1.6 31 32_P1.7 32 33_P4.4 33 34_P4.5 34 35_P4.6 35 36_DVSS 36 37_DVCC 37 38_P2.7 38 39_P2.3 39 40_P2.4 40 41_AVSS 41 42_HFXIN 42 43_HFXOUT 43 44_AVSS 44 45_LFXIN 45 46_LFXOUT 46 47_AVSS 47 48_AVCC 48 U1 SW1 R13 TP1TP2 SW2 R14 P1.0 P1.0 RST/NMI TMS TDI VCC GND P1.1 P1.1 RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO TCK/SBWTCK TDO/SBWTDIO PJ.0/TDO PJ.0/TDO PJ.2/TMS PJ.2/TMS PJ.3/TCK PJ.3/TCK PJ.1/TDI PJ.1/TDI P1.2 P1.2 P2.0 P2.0 P2.1 P2.1 P1.3 P1.3 P1.4 P1.5 AVCC AVCC AVSS AVSS AVSS AVSS LFXOUT LFXIN LFGND HFGND HFXOUT HFXIN P2.4 P2.3 P2.7 DVCC DVCC DVCC DVCC DVSS DVSS P4.6 P4.5 P4.4 P1.7 P1.6 P3.7 P3.6 P3.5 P3.4 P2.2 P2.6 P2.5 P4.3 P4.2 P4.1 P4.0 P4.7 P3.3 P3.2 P3.1 P3.0 TEST/SBWTCK1 TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK MSP-TS430RGZ48C www.ti.com B.16 MSP-TS430RGZ48C Figure B-31. MSP-TS430RGZ48C Target Socket Module, Schematic 78 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP1 Open to measure current Connector J2 External power connector Jumper J1 to "ext" Jumpers JP3 to JP8 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Switch SW1 Device reset LEDs connected to P1.0, P1.1, P1.2 via JP9, JP10, JP11 (only D1 assembled) Orient Pin 1 of MSP430 device Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper J1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumper JP2 Analog/digital power Switch SW2 Connected to P1.3 HF ands LF oscillators with capacitors and resistors to connect pinheads www.ti.com MSP-TS430RGZ48C Figure B-32. MSP-TS430RGZ48C Target Socket Module, PCB Table B-17. MSP-TS430RGZ48C Revision History Revision Comments 1.2 Initial release LFOSC pins swapped at SV1 (9-10). 1.3 HFOSC pins swapped at SV1 (6-7). BOOTST pin 4 now directly connected to the device RST/SBWTDIO pin. SLAU278R–May 2009–Revised May 2014 Hardware 79 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGZ48C www.ti.com Table B-18. MSP-TS430RGZ48C Bill of Materials Number Pos Ref Des Per Description Digi-Key Part Number Comment Board 1 SV1, SV2, SV3, 4 12-pin header, TH DNP: headers and receptacles enclosed with kit. SV4 Keep vias free of solder. SAM1029-12-ND : Header : Receptacle 1.1 SV1, SV2, SV3, 4 12-pin receptable, TH DNP: headers and receptacles enclosed with kit. SV4 Keep vias free of solder. : Header SAM1213-12-ND : Receptacle 2 JP1, JP2, JP9 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header 3 JP10, JP11 2 2-pin header, male, TH SAM1035-02-ND DNP 4 J1, JP3, JP4, JP5, 7 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 2-3 JP6, JP7, JP8 5 J2 1 3-pin header, male, TH SAM1035-03-ND 6 JP1, JP2, JP9, J1, 10 Jumper 15-38-1024-ND Place on: JP1, JP2, JP9, J1, JP3, JP4, JP5, JP6, JP3, JP4, JP5, JP7, JP8 JP6, JP7, JP8 7 R2, R3, R5, R6, 9 DNP, 0805 DNP R8, R9, R10, R11, R14 8 R12, R13, R7 3 0R, 0805 541-000ATR-ND 9 C5 1 1.1nF, CSMD0805 490-1623-2-ND 10 C3, C7 2 1uF, 10V, CSMD0805 490-1702-2-ND 11 R4 1 47k, 0805 541-47000ATR-ND 12 C4, C6 2 100nF, CSMD0805 311-1245-2-ND 13 R1 1 330R, 0805 541-330ATR-ND 14 C1, C2, C8, C9 4 DNP, CSMD0805 DNP 15 SW1, SW2 2 EVQ-11L05R P8079STB-ND DNP 16 BOOTST 1 10-pin connector, male, TH HRP10H-ND DNP, keep vias free of solder 17 JTAG 1 14-pin connector, male, TH HRP14H-ND 18 Q1 1 DNP: MS3V-TR1 (32768kHz, depends on application Micro Crystal, DNP, enclosed in kit, keep vias 20ppm, 12.5pF) free of solder 19 Q2 1 DNP, Christal depends on application DNP, keep vias free of solder 20 U1 1 Socket: QFN11T048-008 Manuf.: Yamaichi A101121-001 20.1 U1 1 MSP430FR5969IRGZ DNP: enclosed with kit. Is supplied by TI. 21 D1 1 green LED, DIODE0805 P516TR-ND 22 D3 1 red (DNP), DIODE0805 DNP 23 D2 1 yellow (DNP), DIODE0805 DNP 24 TP1, TP2 2 Testpoint DNP, keep pads free of solder 25 Rubber stand off 4 Buerklin: 20H1724 apply to corners at bottom side 26 PCB 1 79.6 x 91.0 mm MSP-TS430RGZ48C 2 layers, black solder mask Rev. 1.2 80 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated ML14 LED3 0R 12pF 12pF 12pF 12pF GND GND 0R 100nF 560R ML10 JP1Q JP1Q 10uF/6,3V 10uF/10V 47K 10nF 0R 0R 0R - - 0R - 0R 0R FE16-1-1 FE16-1-2 FE16-1-3 FE16-1-4 PWR3 GNDGND - MSP64PM not assembled not assembled not assembled not assembled enhancement reserved for future JTAG 1 3 5 7 9 11 13 2 4 6 12 14 8 10 D1 R2 C2 C1 C3 C4 R1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 J7 1 2 J6 1 2 C6 C7 R5 C8 R6 R7 R8 R9 R10 R11 R12 R13 R14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 J2 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 J3 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 J4 J5 1 2 3 R4 Q1 LFXTCLK XTCLK U2 DVCC 2 3 4 5 6 7 XIN XOUT 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 TDO TDI TMS TCK RST 59 60 61 AVSS DVSS AVCC RST/NMI TCK TMS TDI TDO VCC Date: 3/14/2006 10:46:30 AM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430PM64 + + 1 MSP-TS430PM64 Target Socket PM64 Yamaichi IC51-0644-807 Socket: 1.2 for F14x and F41x Open J6 if LCD is connected If external supply voltage: remove R8 and add R9 (0 Ohm) If external supply voltage: remove R11 and add R10 (0 Ohm) For BSL usage add: R6 R7 R13 R14 MSP430F14x : 0 0 open open MSP430F41x : open open 0 0 www.ti.com MSP-TS430PM64 B.17 MSP-TS430PM64 NOTE: Connections between the JTAG header and pins XOUT and XIN are no longer required and should not be made. Figure B-33. MSP-TS430PM64 Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 81 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connection Remove R8 and jumper R9 D1 LED connected to pin 12 Jumper J6 Open to disconnect LED Jumper J7 Open to measure current Orient Pin 1 of MSP430 device Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool MSP-TS430PM64 www.ti.com Figure B-34. MSP-TS430PM64 Target Socket Module, PCB 82 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PM64 Table B-19. MSP-TS430PM64 Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 1.1 C3, C4 0 47pF, SMD0805 DNP: Only recommendation. Check your crystal spec. 2 C6, C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND DNP: C6 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: Headers and receptacles enclosed with 7 J1, J2, J3, J4 0 16-pin header, TH kit.Keep vias free of solder. SAM1029-16-ND : Header SAM1213-16-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND 9 J6, J7 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 11 2 Jumper 15-38-1024-ND Place on: J6, J7 12 JTAG 1 14-pin connector, male, TH HRP14H-ND 13 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V-T1K DNP: Keep vias free of 14 Q1, Q2 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 15 R3 1 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, R6, R7, R8, DNP: R4, R6, R7, R9, R10, 16 R9, R10, 3 0 Ω, SMD0805 541-000ATR-ND R11, R12, R13, R14 R11, R12, R13, R14 17 R5 1 47k Ω, SMD0805 541-47000ATR-ND 18 U1 1 Socket: IC51-0644-807 Manuf.: Yamaichi 19 PCB 1 78 x 75 mm 2 layers 20 Rubber 4 select appropriate Apply to corners at bottom standoff side 21 MSP430 22 MSP430F2619IPM DNP: Enclosed with kit MSP430F417IPM supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 83 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 0R 12pF 12pF GND GND 0R 100nF 330R 10uF/6.3V 0R 0R 0R 0R PWR3 GND 47k 2.2nF 330R GND GND 100nF GND 0R 0R MSP-TS430PM64A Target Socket DNP Yamaichi IC51-0644-807 Socket: DNP 1.1 for F4152 Open JP1 if LCD is connected JTAG -> SBW -> DNP DNP DNP DNP DNP DNP DNP Vcc ext int TEST/SBWTCK RST/SBWTDIO P7.0/TDO P7.1/TDI P7.2/TMS P7.3/TCK ADD LCD-CAP! DNP DNP JTAG 1 3 5 7 9 11 13 2 4 6 12 14 8 10 R2 C2 C1 R1 C5 R3 BOOTST 1 2 3 4 5 6 7 8 9 10 C6 R10 R11 R13 R14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 J2 J3 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 J4 J5 1 2 3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1 2 3 4 5 6 7 8 9 11 12 13 14 15 10 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 1 2 Q1 R4 C3 1 2 3 JP4 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 R6 JP9 1 2 3 1 2 JP1 JP2 1 2 JP3 1 2 3 D1 C4 R5 R7 RST/NMI TMS TDI VCC GND XTLGND TCK/SBWTCK TDO/SBWTDIO VCC430 VCC430 VCC430 P5.1 P5.1 AVCC AVCC AVSS AVSS P1.0 P1.1 XIN XOUT A A A B B B C C D D E E F F Date: 3/29/2011 3:07:02 PM Sheet: 1/1 REV: TITLE: Document Number: MSP-TS430PM64A + TEST/SBWTCK RST/SBWTDIO If supplied locally: populate R10 (0R), remove R11 If supplied by interface: populate R11 (0R), remove R10 MSP-TS430PM64A www.ti.com B.18 MSP-TS430PM64A Figure B-35. MSP-TS430PM64A Target Socket Module, Schematic 84 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to measure current Jumper JP1 Open to disconnect LED D1 LED connected to P5.1 Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumpers JP4 to JP9 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Orient Pin 1 ofMSP430 device Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Connector J5 External power connector Jumper JP3 to "ext" www.ti.com MSP-TS430PM64A Figure B-36. MSP-TS430PM64A Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 85 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PM64A www.ti.com Table B-20. MSP-TS430PM64A Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2, 0 12pF, SMD0805 DNP 2 C3 0 2.2nF, SMD0805 DNP 3 C6, 1 10uF, 10V, Tantal Size B 511-1463-2-ND 4 C4, C5 2 100nF, SMD0805 478-3351-2-ND 5 D1 1 green LED, SMD0805 P516TR-ND DNP: Headers and receptacles enclosed with kit. 6 J1, J2, J3, J4 0 16-pin header, TH Keep vias free of solder. SAM1029-16-ND : Header SAM1213-16-ND : Receptacle J5, JP3, JP4, 7 JP5, JP6, 8 3-pin header, male, TH SAM1035-03-ND JP7, JP8, JP9 8 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 2 Jumper 15-38-1024-ND Place on: J6, J7 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R3, R6 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R5, 14 R7, R9, R10, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R5, R7, R9, R10, R11, R11, R13, R13, R14 R14 15 R4 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC51-0644-807 Manuf.: Yamaichi 17 PCB 1 78 x 75 mm 4 layers 18 Rubber stand 4 select appropriate Apply to corners at bottom off side 19 MSP430 2 MSP430F4152IPM DNP: Enclosed with kit supplied by TI 86 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGC64B B.19 MSP-TS430RGC64B Figure B-37. MSP-TS430RGC64B Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 87 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP2 Open to disconnect LED Connector J5 External power connector Jumpers JP5 to JP10 Jumper JP3 to "ext" Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 If the system should be supplied via LDOI (J6), close JP4 and set JP3 to "ext" Orient Pin 1 of MSP430 device Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumper JP1 Open to measure current MSP-TS430RGC64B www.ti.com Figure B-38. MSP-TS430RGC64B Target Socket Module, PCB 88 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGC64B Table B-21. MSP-TS430RGC64B Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3, C4 0 47pF, SMD0805 DNP 3 C6, C7, C10 3 10uF, 6.3V, SMD0805 C5, C11, 4 C13, C14, 5 100nF, SMD0805 311-1245-2-ND C15 5 C8 1 2.2nF, SMD0805 6 C9 1 470nF, SMD0805 478-1403-2-ND 7 C16 1 4.7uF, SMD0805 8 C17 1 220nF, SMD0805 9 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-16-ND DNP: Headers and receptacles 10 J4 0 16-pin header, TH (Header) SAM1213-16- enclosed with kit. Keep vias free of ND (Receptacle) solder: 11 J5 , J6 2 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, JP6, 12 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP7, JP8, JP9, JP10 place jumpers on JP8, JP9, pins 1-2 on JP3, JP10 13 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 14 10 Jumper 15-38-1024-ND See Pos. 12 and Pos. 13 15 JTAG 1 14-pin connector, male, HRP14H-ND TH 16 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH Micro Crystal MS3V-T1R 17 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1 Keep vias free of solder 12.5pF 18 Q2 0 Crystal Q2: 4MHz Buerklin: DNP: Q2 Keep vias free of solder 78D134 Insulating http://www.ettinger.de/Art 19 disk to Q2 0 Insulating disk to Q2 _Detail.cfm?ART_ARTNU M=70.08.121 20 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 21 R6, R8, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11,R12 R9,R10, R11, R12 22 R5 1 47k Ω, SMD0805 541-47000ATR-ND 23 U1 1 Socket: QFN11T064-006- Manuf.: Yamaichi N-HSP 24 PCB 1 85 x 76 mm 2 layers Adhesive Approximately 6mm for example, 3M 25 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 26 D3,D4 27 MSP430 2 MSP430F5310 RGC DNP: enclosed with kit, supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 89 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64C www.ti.com B.20 MSP-TS430RGC64C The MSP-TS430RGC64C target board has been designed with the option to operate with the target device DVIO input voltage supplied via header J6 (see Figure B-39). This development platform does not supply the 1.8-V DVIO rail on board and it MUST be provided by external power supply for proper device operation. For correct JTAG connection, programming, and debug operation, it is important to follow this procedure: 1. Make sure that the VCC and DVIO voltage supplies are OFF and that the power rails are fully discharged to 0 V. 2. Enable the 1.8-V external DVIO power supply. 3. Enable the 1.8-V to 3.6-V VCC power supply (alternatively, this supply can be provided from the MSPFET430UIF JTAG debugger interface). 4. Connect the MSP-FET430UIF JTAG connector to the target board. 5. Start the debug session using IAR or CCS IDE. For more information on debugging the MSP4and MSP430F525x, see the device-specific data sheets (MSP430F522x: SLAS718; MSP430F525x: SLAS903) and Designing with MSP430F522x and MSP430F521x Devices (SLAA558). For debugging of devices (MSP430F524x and MSP430F523x) without use of the DVIO power domain, short JP4 with the jumper. 90 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1.1 MSP-TS430RGC64C TI Friesing Tools MSP430 1 1 12/14/10 S.G. 1 2 3 4 5 6 A B C D A B C D Design: Appr.: Rev.: Comment: Drawing#: Revision: File: Page: Size: Title of Schematic of Mentor Pads Logic V9 Date: Name: 1 2 3 4 5 6 MSP-TS430RGC64C.sch <-- SBW <-- JTAG ext int VCC DVIO Power Circle BSL 1 P6.0/CB0/A0 2 P6.1/CB1/A1 3 P6.2/CB2/A2 4 P6.3/CB3/A3 5 P6.4/CB4/A4 6 P6.5/CB5/A5 7 P6.6/CB6/A6 8 P6.7/CB7/A7 9 P5.0/A8/VEREF+ 10 P5.1/A9/VEREF- 11 AVCC 12 P5.4/XIN 13 P5.5/XOUT 14 AVSS 15 DVCC 16 DVSS 17 VCORE 18 P1.0/TA0CLK/ACLK 19 P1.1/TA0.0 20 P1.2/TA0.1 21 P1.3/TA0.2 22 P1.4/TA0.3 23 P1.5/TA0.4 24 P1.6/TA1CLK/CBOUT 25 P1.7/TA1.0 26 P2.0/TA1.1 27 P2.1/TA1.2 28 P2.2/TA2CLK/SMCLK 29 P2.3/TA2.0 30 P2.4/TA2.1 31 P2.5/TA2.2 32 P2.6/RTCCLK/DMAE0 P2.7/UCB0STE/UCA0CLK 33 P3.0/UCB0SIMO/UCB0SDA 34 P3.1/UCB0SOMI/UCB0SCL 35 P3.2/UCB0CLK/UCA0STE 36 P3.3/UCA0TXD/UCA0SIMO 37 P3.4/UCA0RXD/UCA0SOMI 38 DVSS 39 DVIO 40 P4.0/PM_UCB1STE 41 P4.1/PM_UCB1SIMO 42 P4.2/PM_UCB1SOMI 43 P4.3/PM_UCB1CLK 44 P4.4/PM_UCA1TXD 45 P4.5/PM_UCA1RXD 46 P4.6/PM_NONE 47 P4.7/PM_NONE 48 49 P7.0/TB0.0 50 P7.1/TB0.1 51 P7.2/TB0.2 52 P7.3/TB0.3 53 P7.4/TB0.4 54 P7.5/TB0.5 55 BSLEN 56 RST/NMI 57 P5.2/XT2IN 58 P5.3/XT2OUT 59 TEST/SBWTCK 60 PJ.0/TDO 61 PJ.1/TDI/TCLK 62 PJ.2/TMS 63 PJ.3/TCK 64 RSTDVCC/SBWTDIO 65 THERMAL_1 66 THERMAL_2 67 THERMAL_3 68 THERMAL_4 69 THERMAL_5 70 THERMAL_6 71 THERMAL_7 72 THERMAL_8 U1 MSP430F5229 2 1 4 3 6 5 8 7 10 9 12 11 14 13 JTAG 1 2 3 4 5 6 7 8 9 0 1 BOOTST CN-ML10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J4 1 2 3 JP5 PINHEAD_1X3 1 2 3 JP6 PINHEAD_1X3 1 2 3 JP7 PINHEAD_1X3 1 2 3 JP8 PINHEAD_1X3 1 2 3 JP9 PINHEAD_1X3 1 2 3 JP10 PINHEAD_1X3 1 2 3 J5 PINHEAD_1X3 R7 330R 1 2 3 JP3 C10 10uF C14 100nF C5 10uF C6 100nF R1 0R R2 0R R6 0R R8 0R C1 12pF C2 12pF C7 10uF C13 100nF 1 2 JP2 R3 330R 1 2 D1 ??? R4 0R C9 470nF R5 47K C8 2.2nF R11 0R R12 0R C16 4.7uF tbd C3 tbd C4 R9 0R R10 0R C15 100nF 1 2 3 J6 PINHEAD_1X3 1 2 JP4 PINHEAD_1X2 D3 Q2 QUARZ_4PIN 26MHz/ASX53 Q1 1 2 JP1 PINHEAD_1X2 SHC1 SHORTCUT2 GND GND GND GND XTLGND VCORE GND GND DVCC DVCC GND XTLGND2 GND GND DVCC GND RST/NMI TCK TMS TDI TDO RSTDVCC_SBWTDIO TDO RST/NMI TCK C TCK M TMS I TDI O TDO DVCC P1.2/TA0.1 P1.1/TA0.0 TEST/SBWTCK C M I O DVCC P1.1/TA0.0 P1.2/TA0.1 RSTDVCC_SBWTDIO TEST/SBWTCK AVSS www.ti.com MSP-TS430RGC64C Figure B-39. MSP-TS430RGC64C Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 91 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector for DVCC Set jumper JP3 to "ext" IMPORTANT NOTE: Rev1.0 of the board does not have connection from pin 4 of BOOTST to pin 64 of MCU. To use BSL, these pins should be connected by a wire. Jumper JP2 Open to disconnect LED D1 LED connected to P1.0 Orient Pin 1 of MSP430 device Jumper JP4 For F524x devices, close. For F522x, F523x, and F525x devices, close only if one power supply is used for VCC and DVIO, and if VCC is not higher then 1.98 V. Otherwise, supply DVIO over J6. Do not close if VCC > 1.98 V, as it may damage the chip. Ÿ Ÿ Connector J6 External power connector to supply DVIO Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumper JP1 Open to measure current MSP-TS430RGC64C www.ti.com Figure B-40. MSP-TS430RGC64C Target Socket Module, PCB 92 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGC64C Table B-22. MSP-TS430RGC64C Bill of Materials Item Qty Reference Value Description Comment Supplier No. 1 0 C1, C2 12pF CAP, SMD, Ceramic, 0805 DNP C1 C2 2 0 C3, C4 tbd CAP, SMD, Ceramic, 0805 DNP C3 C4 4 3 C5, C7, C10 10uF CAP, SMD, Ceramic, 0805 5 5 C8 C6 C13-15 100nF CAP, SMD, Ceramic, 0805 Digi-Key: 311-1245-2-ND 5 5 C8 2.2nF CAP, SMD, Ceramic, 0805 6 1 C9 470nF CAP, SMD, Ceramic, 0805 Digi-Key: 478-1403-2-ND 7 1 C16 4.7uF CAP, SMD, Ceramic, 0805 8 1 D1 Green LED LED, SMD, 0805 DNP: headers and receptacles enclosed with 9 4 J1-J4 16-pin header Pin header 1x16: Grid: 100mil kit. Keep vias free of (2.54 mm) solder. : Header SAM1029-16-ND : Receptacle SAM1213-16-ND 10 2 J5, J6 3-pin header, male, TH Pin header 1x3: Grid: 100mil SAM1035-03-ND (2.54 mm) 11 JP5, JP6, JP7, 3-pin header, male, TH Pinheader 1x3: Grid: 100mil place jumpers on pins 2-3 SAM1035-03-ND JP8, JP9, JP10 (2.54 mm) 12 JP3 3-pin header, male, TH Pin header 1x3: Grid: 100mil place jumper on pins 1-2 SAM1035-03-ND (2.54 mm) 13 JP1, JP2, JP4 2-pin header, male, TH Pin header 1x2; Grid: 100mil place jumper on header SAM1035-02-ND (2.54 mm) Place on: JP1, JP2, JP3, 14 10 Jumper JP4, JP5, JP6, JP7, JP8, 15-38-1024-ND JP9, JP10 15 1 JTAG 2x7Pin,Wanne Header, THD, Male 2x7 Pin, HRP14H-ND Wanne, 100mil spacing 16 0 BOOTST 2x5Pin,Wanne Header, THD, Male 2x5 Pin, DNP Wanne, 100mil spacing 17 1 Q1 26MHz/ASX53 CRYSTAL, SMD, 5x3MM, Only Kit. 26MHz 18 0 Q2 26MHz/ASX53 CRYSTAL, SMD, 5x3MM, 300-8219-1-ND 26MHz 19 1 D3 LL103A DIODE, SMD, SOD123, Buerklin: 24S3406 Schottky 20 2 R3, R7 330 Ohm, SMD0805 541-330ATR-ND 21 1 R5 47k Ohm, SMD0805 RES, SMD, 0805, 1/8W, x% 541-47000ATR-ND R1, R2, R4, DNP: R6, R8, R9, R10, 22 R6, R8, R9, 0 Ohm, SMD0805 RES, SMD, 0805, 1/8W, x% R11,R12 541-000ATR-ND R10, R11, R12 23 1 U1 Socket: QFN11T064-006-N- Manuf.: Yamaichi HSP 24 2 MSP430 MSP430F5229IRGCR IC, MCU, SMD, 9.15x9.15mm Thermal Pad with Socket 25 4 Rubber stand Rubber stand off apply to corners at bottom Buerklin: 20H1724 off side 26 1 PCB 84 x 76 mm 84 x 76 mm SLAU278R–May 2009–Revised May 2014 Hardware 93 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64USB www.ti.com B.21 MSP-TS430RGC64USB Due to the use of diodes in the power chain, the voltage on the MSP430F5xx device is approximately 0.3 V lower than is set by the debugging tool. Set the voltage in the IDE to 0.3 V higher than desired; for example, to run the MCU at 3.0 V, set it to 3.3 V. Figure B-41. MSP-TS430RGC64USB Target Socket Module, Schematic 94 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool USB1 USB connector Connector J5 External power connector Jumper JP3 to "ext" Jumper JP2 Open to disconnect LED D1 LED connected to P1.0 Jumper JP1 Open to measure current www.ti.com MSP-TS430RGC64USB Figure B-42. MSP-TS430RGC64USB Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 95 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430RGC64USB www.ti.com Table B-23. MSP-TS430RGC64USB Bill of Materials Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND 3 C5, C11, 4 100nF, SMD0805 311-1245-2-ND C13, C14 3.1 C10, C12 0 10uF, SMD0805 DNP: C10, C12 4 C8 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 4 16-pin header, TH Keep vias free of solder. SAM1029-16-ND : Header SAM1213-16-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 2-3 JP9, JP10 10 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND place jumper on header JP4 11 JP3 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 Place on: JP1, JP2, JP3, 12 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND Q1: Micro Crystal MS1V-T1K DNP: Q1 14 Q1 0 Crystal 32.768kHz, C(Load) = Keep vias free of solder" 12.5pF 15 Q2 1 Crystal Q2: 4MHz Buerklin: 78D134 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R6, R8, R9, R12 R12 18 R10 1 100 Ω, SMD0805 Buerklin: 07E500 18 R11 1 1M Ω, SMD0805 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket: QFN11T064-006 Manuf.: Yamaichi 20 PCB 1 79 x 77 mm 2 layers 21 Rubber stand 4 Buerklin: 20H1724 apply to corners at bottom off side 22 MSP430 2 MSP430F5509 RGC DNP: enclosed with kit. Is supplied by TI Insulating http://www.ettinger.de/Art_De 23 disk to Q2 1 Insulating disk to Q2 tail.cfm?ART_ARTNUM=70.0 8.121 27 C33 1 220n SMD0603 Buerklin: 53D2074 28 C35 1 10p SMD0603 Buerklin: 56D102 29 C36 1 10p SMD0603 Buerklin: 56D102 30 C38 1 220n SMD0603 Buerklin: 53D2074 31 C39 1 4u7 SMD0603 Buerklin: 53D2086 32 C40 1 0.1u SMD0603 Buerklin: 53D2068 33 D2, D3, D4 3 LL103A Buerklin: 24S3406 96 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430RGC64USB Table B-23. MSP-TS430RGC64USB Bill of Materials (continued) Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 34 IC7 1 TPD4E004 Manu: TI 36 LED 0 JP3QE SAM1032-03-ND DNP 37 LED1 0 LEDCHIPLED_0603 FARNELL: 852-9833 DNP 38 LED2 0 LEDCHIPLED_0603 FARNELL: 852-9868 DNP 39 LED3 0 LEDCHIPLED_0603 FARNELL: 852-9841 DNP 40 R13, R15, 0 470R Buerklin: 07E564 DNP R16 41 R33 1 1k4 / 1k5 Buerklin: 07E612 42 R34 1 27R Buerklin: 07E444 43 R35 1 27R Buerklin: 07E444 44 R36 1 33k Buerklin: 07E740 45 S1 0 PB P12225STB-ND DNP 46 S2 0 PB P12225STB-ND DNP 46 S3 1 PB P12225STB-ND 47 USB1 1 USB_RECEPTACLE FARNELL: 117-7885 SLAU278R–May 2009–Revised May 2014 Hardware 97 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PN80 www.ti.com B.22 MSP-TS430PN80 NOTE: For MSP430F47x and MSP430FG47x devices: Connect pins 7 and 10 (GND) externally to DVSS (see data sheet). Connect load capacitance on Vref pin 60 when SD16 is used (see data sheet). For use of BSL: connect pin 1 of BOOST to pin 58 of U1 and pin 3 of BOOST to pin 57 of U1. Figure B-43. MSP-TS430PN80 Target Socket Module, Schematic 98 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP1 to "ext" D1 LED connected to pin 12 Jumper J6 Open to disconnect LED Orient Pin 1 of MSP430 device Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumper JP2 Open to measure current www.ti.com MSP-TS430PN80 Figure B-44. MSP-TS430PN80 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 99 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PN80 www.ti.com Table B-24. MSP-TS430PN80 Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 0 47pF, SMD0805 DNP: Only recommendation. Check your crystal spec. 2 C6, C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 D1 1 green LED, SMD0603 475-1056-2-ND DNP: Headers and receptacles enclosed with 6 J1, J2, J3, J4 0 25-pin header, TH kit.Keep vias free of solder. SAM1029-20-ND : Header SAM1213-20-ND : Receptacle 7 J5, JP1 2 3-pin header, male, TH SAM1035-03-ND 8 J6, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 9 3 Jumper 15-38-1024-ND Place on: J6, JP2, JP1/Pos1- 2 10 JTAG 1 14-pin connector, male, TH HRP14H-ND 11 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V-T1K DNP: Keep vias free of 12 Q1, Q2 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 13 R3 1 560 Ω, SMD0805 541-560ATR-ND R1, R2, R4, DNP: R4, R6, R7, R10, R11, 14 R6, R7, R10, 2 0 Ω, SMD0805 541-000ATR-ND R12 R11, R12 15 R5 1 47k Ω, SMD0805 541-47000ATR-ND 16 U1 1 Socket: IC201-0804-014 Manuf.: Yamaichi 17 PCB 1 77 x 77 mm 2 layers 18 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 19 MSP430 2 MSP430FG439IPN DNP: Enclosed with kit supplied by TI 100 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PN80A B.23 MSP-TS430PN80A Figure B-45. MSP-TS430PN80A Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 101 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP3 to "ext" Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode D1 LED connected to P1.0 Jumper JP2 Open to disconnect LED Connector J6 If the system is supplied via LDOI, close JP4 and set JP3 to external Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Jumper JP1 Open to measure current MSP-TS430PN80A www.ti.com Figure B-46. MSP-TS430PN80A Target Socket Module, PCB 102 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PN80A Table B-25. MSP-TS430PN80A Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 2 C3, C4 0 47pF, SMD0805 DNP 3 C6, C7, 3 10uF, 6.3V, SMD0805 DNP C10 C10, C12 C5, C11, 4 C13, C14, 5 100nF, SMD0805 311-1245-2-ND C15 5 C8 1 2.2nF, SMD0805 6 C9 1 470nF, SMD0805 478-1403-2-ND 7 C16 1 4.7uF, SMD0805 8 C17 1 220nF, SMD0805 9 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-20-ND DNP: Headers and receptacles 10 J4 0 20-pin header, TH (Header) SAM1213-20- enclosed with kit. Keep vias free of ND (Receptacle) solder: 11 J5 , J6 2 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, 12 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP6, JP7, JP8, JP9, JP10 place JP8, JP9, jumpers on pins 1-2 on JP3, JP10 13 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 14 10 Jumper 15-38-1024-ND See Pos. 12 and Pos. 13 15 JTAG 1 14-pin connector, male, HRP14H-ND TH 16 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH Micro Crystal MS3V-T1R 17 Q1 0 Crystal 32.768kHz, C(Load) = DNP: Q1 Keep vias free of solder 12.5pF 18 Q2 0 Crystal Q2: 4MHz Buerklin: DNP: Q2 Keep vias free of solder 78D134 Insulating http://www.ettinger.de/Ar 19 disk to Q2 0 Insulating disk to Q2 t_Detail.cfm?ART_ART NUM=70.08.121 20 D3,D4 2 LL103A Buerklin: 24S3406 21 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, R6, 22 R8, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11,R12 R9,R10, R11, R12 23 R5 1 47k Ω, SMD0805 541-47000ATR-ND 24 U1 1 Socket:IC201-0804-014 Manuf.: Yamaichi 25 PCB 1 77 x 91 mm 2 layers Adhesive Approximately 6mm for example, 3M 26 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 27 MSP430 2 MSP430F5329IPN DNP: enclosed with kit, supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 103 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PN80USB www.ti.com B.24 MSP-TS430PN80USB Due to the use of diodes in the power chain, the voltage on the MSP430F5xx device is approximately 0.3 V lower than is set by the debugging tool. Set the voltage in the IDE to 0.3 V higher than desired; for example, to run the MCU at 3.0 V, set it to 3.3 V. NOTE: R11 should be populated. Figure B-47. MSP-TS430PN80USB Target Socket Module, Schematic 104 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP3 1-2 (int): Power supply via JTAG debug interface 2-3 (ext): External power supply Connector J5 External power connector Jumper JP3 to "ext" USB Connector Button S3 BSL invoke Jumper JP4 Close for USB bus powered device Jumper JP2 Open to disconnect LED D1 LED connected to P1.0 Jumper JP1 Open to measure current Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Connector JTAG For JTAG Tool Orient Pin 1 of MSP430 device www.ti.com MSP-TS430PN80USB Figure B-48. MSP-TS430PN80USB Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 105 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PN80USB www.ti.com Table B-26. MSP-TS430PN80USB Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND 3 C5, C11, 4 100nF, SMD0805 311-1245-2-ND C13, C14 3.1 C10, C12 0 10uF, SMD0805 311-1245-2-ND DNP: C10, C12 4 C8 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and 7 J1, J2, J3, 4 20-pin header, TH SAM1029-20-ND receptacles enclosed with J4 kit. Keep vias free of solder. DNP: headers and receptacles enclosed with kit. Keep vias free of 7.1 4 20-pin header, TH solder. SAM1213-20-ND : Header : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, 6 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 2-3 JP8,JP9, JP10 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 1 SAM1035-02-ND Place jumper only on one pin 11 JP3 1 3-pin header, male, TH SAM1035-03-ND Place jumper on pins 1-2 Place on: JP1, JP2, JP3, 12 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND Micro Crystal MS1V-T1K DNP: Q1 Keep vias free of 14 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 15 Q2 1 Crystal "Q2: 4MHzBuerklin: 78D134" 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R6, R8, R9, R12 R12 18 R10 1 100 Ω, SMD0805 Buerklin: 07E500 18 R11 0 1M Ω, SMD0805 DNP 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket:IC201-0804-014 Manuf.: Yamaichi 20 PCB 1 79 x 77 mm 2 layers 21 Rubber 4 Buerklin: 20H1724 Apply to corners at bottom standoff side 22 MSP430 2 MSP430F5529 DNP: Enclosed with kit supplied by TI Insulating http://www.ettinger.de/Art_ 23 disk to Q2 1 Insulating disk to Q2 Detail.cfm?ART_ARTNUM =70.08.121 27 C33 1 220n Buerklin: 53D2074 106 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PN80USB Table B-26. MSP-TS430PN80USB Bill of Materials (continued) Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 28 C35 1 10p Buerklin: 56D102 29 C36 1 10p Buerklin: 56D102 30 C38 1 220n Buerklin: 53D2074 31 C39 1 4u7 Buerklin: 53D2086 32 C40 1 0.1u Buerklin: 53D2068 33 D2, D3, D4 3 LL103A Buerklin: 24S3406 34 IC7 1 TPD4E004 Manu: TI 36 LED 0 JP3QE SAM1032-03-ND DNP 37 LED1 0 LEDCHIPLED_0603 FARNELL: 852-9833 DNP 38 LED2 0 LEDCHIPLED_0603 FARNELL: 852-9868 DNP 39 LED3 0 LEDCHIPLED_0603 FARNELL: 852-9841 DNP 40 R13, R15, 0 470R Buerklin: 07E564 DNP R16 41 R33 1 1k4 Buerklin: 07E612 42 R34 1 27R Buerklin: 07E444 43 R35 1 27R Buerklin: 07E444 44 R36 1 33k Buerklin: 07E740 45 S1 0 PB P12225STB-ND DNP 46 S2 0 PB P12225STB-ND DNP 46 S3 1 PB P12225STB-ND 47 USB1 1 USB_RECEPTACLE FARNELL: 117-7885 SLAU278R–May 2009–Revised May 2014 Hardware 107 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100 www.ti.com B.25 MSP-TS430PZ100 NOTE: Connections between the JTAG header and pins XOUT and XIN are no longer required and should not be made. Figure B-49. MSP-TS430PZ100 Target Socket Module, Schematic 108 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connection Remove R8 and jumper R9 D1 LED connected to pin 12 Jumper J6 Open to disconnect LED Orient Pin 1 of MSP430 device Jumper J7 Open to measure current Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool www.ti.com MSP-TS430PZ100 Figure B-50. MSP-TS430PZ100 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 109 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100 www.ti.com Table B-27. MSP-TS430PZ100 Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP DNP: Only 1b C3, C4 0 47pF, SMD0805 recommendation. Check your crystal spec. 2 C6, C7 1 10uF, 10V, Tantal Size B 511-1463-2-ND DNP: C6 3 C5 1 100nF, SMD0805 478-3351-2-ND 4 C8 1 10nF, SMD0805 478-1383-2-ND 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 yellow LED, TH, 3mm, T1 511-1251-ND DNP: Headers and receptacles enclosed with 7 J1, J2, J3, 0 25-pin header, TH kit.Keep vias free of solder. J4 SAM1029-25-ND : Header SAM1213-25-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND 9 J6, J7 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10 2 Jumper 15-38-1024-ND Place on: J6, J7 11 JTAG 1 14-pin connector, male, TH HRP14H-ND 12 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V- DNP: Keep vias free of 13 Q1, Q2 0 Crystal T1K 32.768kHz, C(Load) = solder 12.5pF 14 R3 1 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 15 R8, R9, R10, 3 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R9, R10, R12 R11, R12 16 R5 1 47k Ω, SMD0805 541-47000ATR-ND 17 U1 1 Socket: IC201-1004-008 or Manuf.: Yamaichi IC357-1004-53N 18 PCB 1 82 x 90 mm 2 layers 19 Adhesive 4 ~6mm width, 2mm height for example, 3M Bumpons Apply to corners at bottom Plastic feet Part No. SJ-5302 side 20 MSP430 2 MSP430FG4619IPZ DNP: enclosed with kit supplied by TI 110 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100A B.26 MSP-TS430PZ100A Figure B-51. MSP-TS430PZ100A Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 111 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumper JP1 Open to measure current Jumper JP2 Open to disconnect LED D1 LED connected to P5.1 Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Orient Pin 1 of MSP430 Device Connector J5 External power connector Jumper JP3 to "ext" Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool MSP-TS430PZ100A www.ti.com Figure B-52. MSP-TS430PZ100A Target Socket Module, PCB 112 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100A Table B-28. MSP-TS430PZ100A Bill of Materials Pos. Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP DNP: Only 1b C3, C4 0 47pF, SMD0805 recommendation. Check your crystal spec. 2 C7, C9 2 10uF, 10V, Tantal Size B 511-1463-2-ND 3 C5, C11, 3 100nF, SMD0805 311-1245-2-ND C14 4 C8 1 10nF, SMD0805 478-1358-1-ND 5 C6 0 470nF, SMD0805 478-1403-2-ND DNP 6 D1 1 green LED, SMD0805 67-1553-1-ND DNP: Headers and receptacles enclosed with 7 J1, J2, J3, 0 25-pin header, TH kit.Keep vias free of solder. J4 SAM1029-25-ND : Header SAM1213-25-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND pPlace jumper on header 11 JP3 1 3-pin header, male, TH SAM1035-03-ND Place jumper on pins 1-2 12 3 Jumper 15-38-1024-ND Place on: JP1, JP2, JP3 13 JTAG 1 14-pin connector, male, TH HRP14H-ND 14 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V- DNP: Keep vias free of 15 Q1, Q2 0 Crystal T1K 32.768kHz, C(Load) = solder 12.5pF 16 R3 1 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R7, R8, 2 0 Ω, SMD0805 541-000ATR-ND DNP: R4, R6, R7, R8, R9, R9, R10, R10, R11, R12 R11, R12 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 20 PCB 1 90 x 82 mm 4 layers 21 Rubber 4 Select appropriate Apply to corners at bottom standoff side 22 MSP430 2 MSP430F47197IPZ DNP: Enclosed with kit supplied by TI SLAU278R–May 2009–Revised May 2014 Hardware 113 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100B www.ti.com B.27 MSP-TS430PZ100B Figure B-53. MSP-TS430PZ100B Target Socket Module, Schematic 114 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP3 to "ext" Jumper JP1 Open to measure current Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode JP11, JP12, JP13 Connect 1-2 to connect AUXVCCx with DVCC or drive AUXVCCx externally D1 LED connected to P1.0 Jumper JP2 Open to disconnect LED Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool www.ti.com MSP-TS430PZ100B Figure B-54. MSP-TS430PZ100B Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 115 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100B www.ti.com Table B-29. MSP-TS430PZ100B Bill of Materials Position Ref Des No. per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP C4, C5, 2 C6 , C7, 6 100nF, SMD0805 311-1245-2-ND C8, C9 3 C10, C26 2 470 nF, SMD0805 478-1403-2-ND 4 C11, C12 1 10 uF / 6.3 V SMD0805 C12 DNP C13, C14, 5 C16, C18, 6 4.7 uF SMD0805 C19, C29 6 D1 1 green LED, SMD0805 P516TR-ND J1, J2, J3, SAM1029-25-ND DNP: Headers and receptacles 7 J4 0 25-pin header, TH (Header) SAM1213-25- enclosed with kit. Keep vias free of ND (Receptacle) solder: 8 J5 1 3-pin header, male, TH JP3, JP5, place jumpers on pins 2-3 on JP5, 9 JP6, JP7, 7 3-pin header, male, TH SAM1035-03-ND JP6, JP7, JP8, JP9, JP10 place JP8, JP9, jumpers on pins 1-2 on JP3, JP10 10 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header JP4 11 JP11, 3 4-pin header, male, TH place jumper on header 1-2 JP12, JP13 12 13 Jumper 15-38-1024-ND See Pos. 9 and Pos. 10 and Pos. 11 15 JTAG 1 14-pin connector, male, HRP14H-ND TH 16 BOOTST 0 10-pin connector, male, "DNP Keep vias free of solder" TH 17 Q1 0 Crystal DNP: Q1 Keep vias free of solder 21 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, 22 R4, R6, 2 0 Ohm, SMD0805 541-000ATR-ND DNP: R4, R6, R8, R10, R11 R8, R10, R11 23 R5 1 47k Ω, SMD0805 541-47000ATR-ND 24 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 25 PCB 1 90 x 82 mm 2 layers Adhesive Approximately 6mm for example, 3M 26 plastic feet 4 width, 2mm height Bumpons Part No. SJ- Apply to corners at bottom side 5302 27 MSP430 2 MSP430F6733IPZ DNP: enclosed with kit, supplied by TI 116 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated DNP DNP DNP DNP DNP DNP 0R 12pF 12pF 47pF 47pF GND 0R 100nF 330R 10uF/6.3V 10uF/6.3V 2.2nF PWR3 GND GND GND 0R GND 330R 47K 100nF 100nF P516TR-ND 470nF 100nF 100nF 0R 0R 0R 0R GND VCC 100nF GND 100nF 100nF GND 100nF LL103A GND 4.7n HCTC_XTL_4 HCTC_XTL_4 HCTC_XTL_4 HCTC_XTL_4 GND 0R 0R GND GND GND 4.7uF GND 100nF 220nF GND VCC LL103A 1.1 MSP430: Target-Socket MSP-TS430PZ100C Socket: Yamaichi IC201-1004-008 LFXTCLK <- SBW <- JTAG Vcc int ext DNP DNP DNP DNP DNP DNP BSL-Rx BSL-Tx DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG R2 C2 C1 C3 C4 C5 R1 R3 C6 C7 C8 1 2 3 J5 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 64 63 62 61 44 43 42 41 37 38 39 40 17 18 19 20 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 U1 QFP100PZ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 J1 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 J2 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 J3 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 J4 1 JP1 2 1 JP2 2 R4 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 JP9 1 2 3 R7 JP10 R5 C11 C12 D1 C9 C13 C10 R6 R8 R9 R12 1 2 3 JP3 C17 C18 C19 C14 D3 C16 1 2 3 JP11 4 1 2 Q1G$1 3 4 Q1G$2 2 1 Q2G$1 4 3 Q2G$2 1 2 3 4 5 6 7 8 9 10 BOOTST R10 R11 C15 C20 C21 1 JP4 2 D4 1 2 3 J6 TMS TMS TDI TDI TDO TDO TDO XOUT VCC GND GND GND XIN P1.0 DVCC1 DVCC1 DVCC1 DVCC1 DVCC1 DVCC1 AVCC XT2OUT AVSS AVSS AVSS M M I I O O XT2IN RST/NMI RST/NMI TCK TCK TCK C C TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK RST RST RST XTLGND2 XTLGND1 PU.0 PU.1 P1.6 P1.7 P8.0 P8.1 P8.2 VBAK VBAT VBAT VBAT P1.1 P1.1 P1.2 P1.2 LDOI LDOI LDOO LDOO BSL Interface LDOI/LDOO Interface + + Note: If the system should be supplied via LDOI (J6) close JP4 and set JP3 to external www.ti.com MSP-TS430PZ100C B.28 MSP-TS430PZ100C Figure B-55. MSP-TS430PZ100C Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 117 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated If the system should be supplied via LDOI (J6), close JP4 and set JP3 to external Jumper JP2 Open to disconnect LED D1 LED connected to P1.0 Orient Pin 1 of MSP430 device LDOI/LDOO 14 1 2 GND GND VCC 1 05 11 5 2 0 25 26 30 3540 45 50 75 70 65 60 55 51 100 95 90 85 80 76 1 2 3 123 123 123 123 123 3 2 1 1 2 3 4 10 1 2 1 2 3 1 SBW JTAG Vcc int ext GND VBAT DVCC JTAG R2 C2 C1 C3 C4 R1 C5 R3 + C6 + C7 C8 J5 U1 J1 J2 J3 J4 JP1 JP2 R4 JP5 JP6 JP7 JP8 JP9 JP10 R7 R5 C11 C12 D1 C9 C13 C10 R6 R8 R9 R12 JP3 C17 C18 C19 C14 D3 C16 JP11 Q1 Q2 BOOTST R10 R11 C15 C20 C21 JP4 D4 J6 Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Connector J5 External power connector Jumper JP3 to "ext" Jumper JP1 Open to measure current MSP-TS430PZ100C www.ti.com Figure B-56. MSP-TS430PZ100C Target Socket Module, PCB 118 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100C Table B-30. MSP-TS430PZ100C Bill of Materials Number Pos. Ref Des Per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 DNP: C3, C4 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND C5, C11, 3 C13, C14, 6 100nF, SMD0805 311-1245-2-ND C19, C20 3.1 C10, C12, 0 100nF, SMD0805 311-1245-2-ND DNP: C10, C12,C18, C17 C18,17 4 C8 1 2.2nF, SMD0805 Buerklin 53 D 292 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND 7 J1, J2, J3, 4 25-pin header, TH SAM1029-25-ND DNP: headers and receptacles enclosed J4 with kit. Keep vias free of solder. 7.1 4 25-pin header, TH SAM1213-25-ND DNP: headers and receptacles enclosed with kit. Keep vias free of solder. 8 J5, J6 2 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, 6 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 2-3 JP8,JP9, JP10 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND place jumper on header 10.1 JP4 1 2-pin header, male, TH SAM1035-02-ND place jumper on header 11 JP3 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 12 10 Jumper 15-38-1024-ND Place on: JP1, JP2, JP3, JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND 14 BOOTST 1 10-pin connector, male, TH HRP10H-ND DNP, keep vias free of solder 15 Q1 0 Crystal DNP: Q1 Keep vias free of solder 16 Q2 1 Crystal DNP: Q2 Keep vias free of solder 17 R3, R7 2 330 Ohm, SMD0805 541-330ATR-ND R1, R2, R4, 18 R6, R8, R9, 3 0 Ohm, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11, R12 R10, R11, R12 19 R5 1 47k Ohm, SMD0805 541-47000ATR-ND 20 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 21 PCB 1 79.5 x 99.5 mm MSP-TS430PZ100C 2 layers Rev 1.0 22 Rubber 4 Buerklin: 20H1724 apply to corners at bottom side stand off 23 MSP430 2 MSP430F643x DNP: enclosed with kit. Is supplied by TI. 24 C16 1 4.7 nF SMD0603 Buerklin 53 D 2042 26 D3, D4 2 LL103A Buerklin: 24S3406 27 JP11 1 4-pin header, male, TH SAM1035-04-ND Place jumper on Pin 1 and Pin 2 28 C15 1 4.7 uF, SMD0805 Buerklin 53 D 2430 29 C21 1 220nF, SMD0805 Buerklin 53 D 2381 SLAU278R–May 2009–Revised May 2014 Hardware 119 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100C www.ti.com 120 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated DNP Socket: Yamaichi IC201-1004-008 DNP DNP GND GND 100nF 330R 0R - GND GND 47k 1.1nF GND 0R 0R QUARZ5 1uF/10V 1uF/10V 100nF green DNP yellow (DNP) DNP red (DNP) 0R GND DNP DNP 0R 0R QUARZ5 EVQ11 0R DNP DNP MSP430FR698XPZ FE25-1A1 FE25-1A2 FE25-1A3 FE25-1A4 100nF GND 100nF GND 1uF/10V 100nF GND GND 470nF GND 0R 4u7 GND If external supply voltage: remove R3 and add R2 (0 Ohm) Ext_PWR MSP-TS430PZ100D Vcc int ext Target Socket Board for MSP430FR698xPZ, FR688xPZ DNP DNP DNP DNP DNP JTAG -> SBW -> JTAG-Mode selection: 4-wire JTAG: Set jumpers JP3 to JP8 to position 2-3 2-wire "SpyBiWire": Set jumpers JP3 to JP8 to position 1-2 connection by via DNP DNP Petersen 1099/1/001/01.1 1.2 DNP DNP DNP DNP DNP DNP DNP 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG C2 C1 C4 R1 1 2 3 4 5 6 7 8 9 10 BSL R3 R2 1 2 3 J2 1 2 3 J1 1 2 JP1 1 2 JP9 R4 C5 1 2 3 JP3 1 2 3 JP4 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 R5 R6 Q1 C3 C7 C6 D1 R10 1 2 JP10 D2 R11 1 2 JP11 D3 R12 1 2 JP2 C8 C9 R9 R8 Q2 SW1 R13 TP1TP2 SW2 R14 1 P4.3/UCA0SOMI/UCA0RXD/UCB1STE 2 P1.4/UCB0CLK/UCA0STE/TA1.0/S1 3 P1.5/UCB0STE/UCA0CLK/TA0.0/S0 4 P1.6/UCB0SIMO/USB0SDA/TA0.1 5 P1.7/UCB0SOMI/UCB0SCL/TA0.2 6 R33/LCDCAP 7 P6.0/R23 8 P6.1/R13/LCDREF 9 P6.2/COUT/R03 10 P6.3/COM0 11 P6.4/TB0.0/COM1 12 P6.5/TB0.1/COM2 13 P6.6/TB0.2/COM3 14 P2.4/TB0.3/COM4/S43 15 P2.5/TB0.4/COM5/S42 16 P2.6/TB0.5/COM6/S41 17 P2.7/TB0.6/COM7/S40 18 P10.2/TA1.0/SMCLK/S39 19 P5.0/TA1.1/MCLK/S38 20 P5.1/TA1.2/S37 21 P5.2/TA1.0/TA1CLK/ACLK/S36 22 P5.3/UCB1STE/S35 23 P3.0/UCB1CLK/S34 24 P3.1/UCB1SIMO/UCB1SDA/S33 25 P3.2/UCB1SOMI/UCB1SCL/S32 26 DVSS1 27 DVCC1 28 TEST/SBWTCK 29 XRST/NMI/SBWTDIO 30 PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1 31 PJ.1/TDI/TCLK/MCLK/SRSCG0 32 PJ.2/TMS/ACLK/SROSCOFF 33 PJ.3/TCK/COUT/SRCPUOFF 34 P6.7/TA0CLK/S31 35 P7.5/TA0.2/S30 36 P7.6/TA0.1/S29 37 P10.1/TA0.0/S28 38 P7.7/TA1.2/TB0OUTH/S27 39 P3.3/TA1.1/TB0CLK/S26 40 P3.4/UCA1SIMO/UCA1TXD/TB0.0/S25 41 P3.5/UCA1SOMI/UCA1RXD/TB0.1/S24 42 P3.6/UCA1CLK/TB0.2/S23 43 P3.7/UCA1STE/TB0.3/S22 44 P8.0/RTCCLK/S21 45 P8.1/DMAE0/S20 46 P8.2/S19 47 P8.3/MCLK/S18 48 P2.3/UCA0STE/TB0OUTH 49 P2.2/UCA0CLK/TB0.4/RTCCLK 50 P2.1/UCA0SOMI/UCA0RXD/TB0.5/DMAE0 P2.0/UCA0SIMO/UCA0TXD/TB0.6/TB0CLK51 P7.0/TA0CLK/S17 52 P7.1/TA0.0/S16 53 P7.2/TA0.1/S15 54 P7.3/TA0.2/S14 55 P7.4/SMCLK/S13 56 DVSS2 57 DVCC2 58 P8.4/A7/C7 59 P8.5/A6/C6 60 P8.6/A5/C5 61 P8.7/A4/C4 62 P1.3/ESITEST4/TA1.2/A3/C3 63 P1.2/TA1.1/TA0CLK/COUT/A2/C2 64 P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VEREF+65 P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VEREF66 P9.0/ESICH0/ESITEST0/A8/C8 67 P9.1/ESICH1/ESITEST1/A9/C9 68 P9.2/ESICH2/ESITEST2/A10/C10 69 P9.3/ESICH3/ESITEST3/A11/C11 70 P9.4/ESICI0/A12/C12 71 P9.5/ESICI1/A13/C13 72 P9.6/ESICI2/A14/C14 73 P9.7/ESICI3/A15/C15 74 ESIVCC 75 ESIVSS 76 ESICI 77 ESICOM 78 AVCC1 79 AVSS3 80 PJ.7/HFXOUT 81 PJ.6/HFXIN 82 AVSS1 83 P4.2/UCA0SIMO/UCA0TXD/UCB1CLK 100 DVCC3 99 DVSS3 98 P4.1/UCB1SOMI/UCB1SCL/ACLK/S2 97 P4.0/UCB1SIMO/UCB1SDA/MCLK/S3 96 P10.0/SMCLK/S4 95 P4.7/UCB1SOMI/UCB1SCL/TA1.2/S5 94 P4.6/UCB1SIMO/UCB1SDA/TA1.1/S6 93 P4.5/UCB1CLK/TA1.0/S7 92 P4.4/UCB1STE/TA1CLK/S8 91 P5.7/UCA1STE/TB0CLK/S9 90 P5.6/UCA1CLK/S10 89 P5.5/UCA1SOMI/UCA1RXD/S11 88 P5.4/UCA1SIMO/UCA1TXD/S12 87 AVSS2 86 PJ.5/LFXOUT 85 PJ.4/LFXIN 84 IC1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 J3 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 J4 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 J5 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 J6 C10 C11 1 2 JP12 C12 C13 C14 R7 P1.0 C15 P1.0 RST/NMI TMS TDI VCC GND P1.1 P1.1 TCK/SBWTCK TDO/SBWTDIO PJ.0/TDO PJ.0/TDO PJ.2/TMS PJ.2/TMS PJ.3/TCK PJ.3/TCK PJ.1/TDI PJ.1/TDI P1.2 P1.2 BSLTX BSLTX BSLRX BSLRX P1.3 P1.3 AVCC AVCC AVSS AVSS AVSS AVSS LFXOUT LFXIN LFGND HFGND HFXIN HFXOUT DVCC DVCC DVCC DVCC DVCC DVCC DVCC DVCC DVCC DVSS DVSS DVSS DVSS TEST/SBWTCK1 TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK LCDCAP LCDCAP ESIVCC ESIVCC ESICOM ESICOM ESIVSS RST/SBWTDIO RST/SBWTDIO RST/SBWTDIO 1 2 3 4 5 6 1 2 3 4 5 6 Titel: Datum: Bearb.: Seite 1/1 MSP-TS430PZ100D 7/9/2013 5:23:25 PM A3 A B C D E F G H I A B C D E F G H I File: Dok: Rev.: www.ti.com MSP-TS430PZ100D B.29 MSP-TS430PZ100D Figure B-57. MSP-TS430PZ100D Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 121 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 Vcc ext int Vcc GND GND JTAG SBW RESET Ext. Pwr. PWR DVCC AVCC TCK TMS TDI TDO RST/SBWTDIO TEST/SBWTCK GND GND P1.3 ESIVCC 14 1 2 10 1 2 1 1 1 1 1 1 1 1 25 5 10 15 20 50 45 40 35 30 26 51 75 55 60 65 70 76 80 85 90 95 100 MSP-TS430PZ100D Rev. 1.2 RoHS Q2 Q1 P1.0 P1.1 P1.2 JTAG C2 C1 C4 R1 BSL R2 R3 J2 J1 JP1 JP9 C5 R4 JP3 JP4 JP5 JP6 JP7 JP8 R5 R6 C3 C6 C7 D1 R10 JP10 D2 R11 JP11 D3 R12 JP2 C8 C9 R8 R9 SW1 R13 TP2 TP1 SW2 R14 IC1 J3 J4 J5 J6 C10 C11 JP12 C12 C13 C14 R7 C15 Orient Pin 1 of MSP430 device LEDs connected to P1.0, P1.1, P1.2 via JP9, JP10, JP11 (only D1 assembled) Switch SW2 Connected to P1.3 Jumper JP1 Open to measure current Connector J2 External power connector Jumper J1 to “ext” Connector BSL For Bootstrap Loader Tool Connector JTAG For JTAG Tool Jumper JP3 to JP8 Close 1-2 to debug in Spy-Bi-Wire mode Close 3-4 to debug in 4-wire JTAG mode Jumper J1 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Switch SW1 Device reset HF and LF oscillators with capacitors and resistors to connect pinheads MSP-TS430PZ100D www.ti.com Figure B-58. MSP-TS430PZ100D Target Socket Module, PCB 122 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100D Table B-31. MSP-TS430PZ100D Bill of Materials Number Pos. Ref Des Per Description Digi-Key Part No. Comment Board 1 PCB 1 90.0 x 100.0 mm MSP-TS430PZ100D 2 layers, white solder mask Rev 1.2 2 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND place jumper on header JP9 3 JP10, JP11, 3 2-pin header, male, TH SAM1035-02-ND DNP, keep pads free of solder JP12 4 J1 1 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 1-2 5 JP3, JP4, 6 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 2-3 JP5, JP6, JP7, JP8 6 J2 1 3-pin header, male, TH SAM1035-03-ND 7 R2, R3, R5, 6 0R, 0805 541-0.0ATR-ND DNP R6, R8, R9 8 R7, R12, 3 0R, 0805 541-0.0ATR-ND R13 9 C5 1 1.1nF, CSMD0805 490-1623-2-ND 10 C3, C7 2 1uF/10V, CSMD0805 490-1702-2-ND 11 C12 1 1uF/10V, CSMD0805 490-1702-2-ND DNP 12 R4 1 47k, 0805 541-47KATR-ND 13 C4, C6, 4 100nF, CSMD0805 490-1666-1-ND C10, C11 14 C13 1 100nF, CSMD0805 490-1666-1-ND DNP 15 C15 1 4u7, CSMD0805 445-1370-1-ND DNP 16 R1 1 330R, 0805 541-330ATR-ND 17 C14 1 470nF, CSMD0805 587-1290-2-ND DNP 18 R10, R11 2 330R, 0805 541-330ATR-ND DNP 19 R14 1 47k, 0805 541-47KATR-ND DNP 20 C1, C2, C8, 4 DNP, CSMD0805 DNP C9 21 SW2 1 EVQ-11L05R P8079STB-ND DNP 22 SW1 1 EVQ-11L05R P8079STB-ND DNP 23 J3, J4, J5, 4 25-pin header, TH DNP: headers and receptacles enclosed J6 with kit. Keep vias free of solder. SAM1029-25-ND : Header 24 J3, J4, J5, 4 25-pin receptacle, TH DNP: headers and receptacles enclosed J6 with kit. Keep vias free of solder. SAM1213-25-ND : Receptacle 25 TP1, TP2 2 Testpoint DNP, keep pads free of solder 26 BSL 1 10-pin connector, male, TH HRP10H-ND DNP, keep vias free of solder 27 JTAG 1 14-pin connector, male, TH HRP14H-ND 28 IC1 1 Socket: IC201-1004-008 Manuf. Yamaichi 29 IC1 1 MSP430FR6989 DNP: enclosed with kit. Is supplied by TI 30 Q1 1 DNP: MS3V-TR1 depends on application Micro Crystal, DNP, enclosed in kit, keep (32768kHz/20ppm/12,5pF) vias free of solder 31 Q2 1 DNP, Crystal depends on application DNP, keep vias free of solder 32 D1 1 green LED, DIODE0805 P516TR-ND 33 D3 1 red (DNP), DIODE0805 DNP 34 D2 1 yellow (DNP), DIODE0805 DNP 35 Rubber 4 Buerklin: 20H1724 apply to corners at bottom side stand off SLAU278R–May 2009–Revised May 2014 Hardware 123 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ5x100 www.ti.com B.30 MSP-TS430PZ5x100 Figure B-59. MSP-TS430PZ5x100 Target Socket Module, Schematic 124 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Connector J5 External power connector Jumper JP3 to "ext" Jumper JP1 Open to measure current Jumper JP2 Open to disconnect LED D1 LED connected to P1.0 Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Orient Pin 1 ofMSP430 device www.ti.com MSP-TS430PZ5x100 Figure B-60. MSP-TS430PZ5x100 Target Socket Module, PCB SLAU278R–May 2009–Revised May 2014 Hardware 125 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ5x100 www.ti.com Table B-32. MSP-TS430PZ5x100 Bill of Materials Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP 1b C3, C4 47pF, SMD0805 DNP: Only recommendation. Check your crystal spec. 2 C6, C7 2 10uF, 10V, Tantal Size B 511-1463-2-ND C5, C10, 3 C11, C12, 4 100nF, SMD0805 311-1245-2-ND DNP: C12, C14 C13, C14 4 C8 0 2.2nF, SMD0805 DNP 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 67-1553-1-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 0 25-pin header, TH Keep vias free of solder. SAM1029-25-ND : Header SAM1213-25-ND : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 2-3 JP9, JP10 10 JP1, JP2 2 2-pin header, male, TH SAM1035-02-ND Place jumper on header 11 JP3 1 3-pin header, male, TH SAM1035-03-ND Place jumper on pins 1-2 12 9 Jumper 15-38-1024-ND Place on JP1, JP2, JP3, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND 14 BOOTST 0 10-pin connector, male, TH DNP: Keep vias free of solder Q1: Micro Crystal MS1V-T1K DNP: Keep vias free of 15 Q1, Q2 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 3 0 Ω, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R10, R11, R10, R11, R12 R12 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket: IC357-1004-53N Manuf.: Yamaichi 20 PCB 1 90 x 82 mm 2 layers 21 Rubber 4 Select appropriate Apply to corners at bottom standoff side 22 MSP430 2 MSP430F5438IPZ DNP: Enclosed with kit supplied by TI 126 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100USB B.31 MSP-TS430PZ100USB Due to the use of diodes in the power chain, the voltage on the MSP430F5xx device is approximately 0.3 V lower than is set by the debugging tool. Set the voltage in the IDE to 0.3 V higher than desired; for example, to run the MCU at 3.0 V, set it to 3.3 V. Figure B-61. MSP-TS430PZ100USB Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 127 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Jumpers LED 1, 2, 3 Open to disconnect LED1, LED2, LED3 LED1, D2, D3 LEDs connected to P8.0, LE LE P8.1, P8.2 Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply Connector JTAG For JTAG Tool USB1 USB connector Connector J5 External power connector Jumper JP3 to "ext" Jumper JP2 Open to disconnect LED D1 LED connected to P1.0 Jumper JP1 Open to measure current MSP-TS430PZ100USB www.ti.com Figure B-62. MSP-TS430PZ100USB Target Socket Module, PCB 128 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PZ100USB Table B-33. MSP-TS430PZ100USB Bill of Materials Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 1 C1, C2 0 12pF, SMD0805 DNP: C1, C2 1.1 C3, C4 2 47pF, SMD0805 2 C6, C7 2 10uF, 6.3V, Tantal Size B 511-1463-2-ND C5, C11, 3 C13, C14, 5 100nF, SMD0805 311-1245-2-ND C19 3.1 C10, C12, 0 100nF, SMD0805 311-1245-2-ND DNP: C10, C12,C18, C17 C18, C17 4 C8 1 2.2nF, SMD0805 5 C9 1 470nF, SMD0805 478-1403-2-ND 6 D1 1 green LED, SMD0805 P516TR-ND DNP: headers and receptacles enclosed with kit. 7 J1, J2, J3, J4 4 25-pin header, TH SAM1029-25-ND Keep vias free of solder. : Header : Receptacle DNP: headers and receptacles enclosed with kit. 7.1 4 25-pin header, TH SAM1213-25-ND Keep vias free of solder. : Header : Receptacle 8 J5 1 3-pin header, male, TH SAM1035-03-ND JP5, JP6, 9 JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND place jumpers on pins 2-3 JP9, JP10 10 JP1, JP2, 3 2-pin header, male, TH SAM1035-02-ND place jumper on header JP4 11 JP3 1 3-pin header, male, TH SAM1035-03-ND place jumper on pins 1-2 Place on: JP1, JP2, JP3, 12 10 Jumper 15-38-1024-ND JP4, JP5, JP6, JP7, JP8, JP9, JP10 13 JTAG 1 14-pin connector, male, TH HRP14H-ND Micro Crystal MS1V-T1K DNP: Q1. Keep vias free of 14 Q1 0 Crystal 32.768kHz, C(Load) = solder 12.5pF 15 Q2 1 Crystal Q2: 4MHz, Buerklin: 78D134 16 R3, R7 2 330 Ω, SMD0805 541-330ATR-ND R1, R2, R4, 17 R6, R8, R9, 3 0 Ω, SMD0805 541-000ATR-ND DNP: R6, R8, R9, R12 R12 18 R10 1 100 Ω, SMD0805 Buerklin: 07E500 18 R11 1 1M Ω, SMD0603 not existing in Rev 1.0 18 R5 1 47k Ω, SMD0805 541-47000ATR-ND 19 U1 1 Socket:IC201-1004-008 Manuf.: Yamaichi 20 PCB 1 79 x 77 mm 2 layers 21 Rubber stand 4 Buerklin: 20H1724 apply to corners at bottom off side 22 MSP430 2 MSP430F6638IPZ DNP: enclosed with kit. Is supplied by TI Insulating http://www.ettinger.de/Art_De 23 disk to Q2 1 Insulating disk to Q2 tail.cfm?ART_ARTNUM=70.0 8.121 24 C16 1 4.7 nF SMD0603 27 C33 1 220n SMD0603 Buerklin: 53D2074 28 C35, C36 2 10p SMD0603 Buerklin: 56D102 SLAU278R–May 2009–Revised May 2014 Hardware 129 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-TS430PZ100USB www.ti.com Table B-33. MSP-TS430PZ100USB Bill of Materials (continued) Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 30 C38 1 220n SMD0603 Buerklin: 53D2074 31 C39 1 4u7 SMD0603 Buerklin: 53D2086 32 C40 1 0.1u SMD0603 Buerklin: 53D2068 33 D2, D3, D4 3 LL103A Buerklin: 24S3406 34 IC7 1 TPD4E004 Manu: TI 35 LED 0 JP3QE SAM1032-03-ND DNP 36 LED1, LED2, 0 LEDCHIPLED_0603 FARNELL: 852-9833 DNP LED3 37 R13, R15, 0 470R SMD0603 Buerklin: 07E564 DNP R16 38 R33 1 1k4 / 1k5 SMD0603 Buerklin: 07E612 39 R34 1 27R SMD0603 Buerklin: 07E444 40 R35 1 27R SMD0603 Buerklin: 07E444 41 R36 1 33k SMD0603 Buerklin: 07E740 42 S1, S2, S3 1 PB P12225STB-ND DNP S1 and S2. (Only S3) 43 USB1 1 USB_RECEPTACLE FARNELL: 117-7885 44 JP11 1 4-pin header, male, TH SAM1035-04-ND place jumper only on Pin 1 130 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 0R 12pF 12pF GND GND 0R 100nF 330R 2.2nF 0R 0R PWR3 GND 330R 47K 0R 0R 100nF 4.7uF GND GND 100nF 470nF 0R QUARZ5 100nF 10uF/6,3V 10uF/6,3V 100nF 4.7uF 4.7uF 100nF 4.7uF 4.7uF 4.7uF 470nF FE04-1 VCC GND GND 100nF 4.7uF GND GND GND GND GND VCC1 VCC1 VCC1 VCC1 VCC1 GND GND GND GND GND GND AVSS AVSS DVCC AVCC GND VCC VCC GND MSP430: Target-Socket MSP-TS430PEU128 for F6779 Petersen 1080/1/001/01.1 DNP LFXTCLK DNP <- SBW <- JTAG DNP Vcc int ext DNP DNP DNP DNP DNP DNP DNP DVDSYS 1.1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 J1 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 J2 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 J3 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 J4 1 3 5 7 9 11 13 2 4 6 12 14 8 10 JTAG R2 C2 C1 R1 C5 R3 1 2 3 4 5 6 7 8 9 10 BOOTST C3 R10 R11 J5 1 2 3 1 2 JP1 JP2 1 2 1 2 3 JP5 1 2 3 JP6 1 2 3 JP7 1 2 3 JP8 1 2 3 JP9 1 2 3 JP10 R7 R5 D1 R6 R8 C6 C29 C7 C10 R4 Q1 JP12 1 2 3 4 1 2 3 4 JP11 JP131 2 3 4 C4 C11 C12 C8 C13 C14 C9 C16 C19 C18 C26 1 2 JP4 JP3 1 2 3 4 C15 C17 TP1 TP2 IC1 MSP430F677XIPEU# XIN 1 XOUT 2 AUXVCC3 3 RTCCAP1 4 RTCCAP0 5 P1.5/SMCLK/CB0/A5 6 P1.4/MCLK/SDCLK/CB1/A4 7 P1.3/ADC10CLK/TACLK/RTCCLK/A3 8 P1.2/ACLK/TA3.1/A2 9 P1.1/TA2.1/VEREF+/A1 10 P1.0/TA1.1/TA0.0/VEREF-/A0 11 P2.4/PM_TA2.0 12 P2.5/PM_UCB0SOMI/PM_UCB0SCL 13 P2.6/PM_USB0SIMO/PM_UCB0SDA 14 P2.7/PM_UCB0CLK 15 P3.0/PM_UCA0RXD/PM_UCA0SOMI 16 P3.1/PM_UCA0TXD/PM_UCA0SIMO 17 P3.2/PM_UCA0CLK 18 P3.3/PM_UCA1CLK 19 P3.4/PM_UCA1RXD/PM_UCA1SOMI 20 P3.5/PM_UCA1TXD/PM_UCA1SIMO 21 COM0 22 COM1 23 P1.6/COM2 24 P1.7/COM3 25 P5.0/COM4 26 P5.1/COM5 27 P5.2/COM6 28 P5.3/COM7 29 LCDCAP/R33 30 P5.4/SDCLK/R23 31 P5.5/SD0DIO/LCDREF/R13 32 P5.6/SD1DIO/R03 33 P5.7/SD2DIO/CB2 34 P6.0/SD3DIO 35 P3.6/PM_UCA2RXD/PM_UCA2SOMI 36 P3.7/PM_UCA2TXD/PM_UCA2SIMO 37 P4.0/PM_UCA2CLK 38 P4.1/PM_UCA3RXD/PM_UCA3SOMI 39 P4.2/PM_UCA3TXD/PM_UCA3SIMO 40 P4.3/PM_UCA3CLK 41 P4.4/PM_UCB1SOMI/PM_UCB1SCL 42 P4.5/PM_UCB1SIMO/PM_UCB1SDA 43 P4.6/PM_UCB1CLK 44 P4.7/PM_TA3.0 45 P6.1/SD4DIO/S39 46 P6.2/SD5DIO/S38 47 P6.3/SD6DIO/S37 48 P6.4/S36 49 P6.5/S35 50 P6.6/S34 51 P6.7/S33 52 P7.0/S32 53 P7.1/S31 54 P7.2/S30 55 P7.3/S29 56 P7.4/S28 57 P7.5/S27 58 P7.6/S26 59 P7.7/S25 60 P8.0/S24 61 P8.1/S23 62 P8.2/S22 63 P8.3/S21 64 P8.4/S20 65 P8.5/S19 66 P8.6/S18 67 P8.7/S17 68 DVSYS 69 DVSS2 70 P9.0/S16 71 P9.1/S15 72 P9.2/S14 73 P9.3/S13 74 P9.4/S12 75 P9.5/S11 76 P9.6/S10 77 P9.7/S9 78 P10.0/S8 79 P10.1/S7 80 P10.2/S6 81 P10.3/S5 82 P10.4/S4 83 P10.5/S3 84 P10.6/S2 85 P10.7/S1 86 P11.0/S0 87 P11.1/TA3.1/CB3 88 P11.2/TA1.1 89 P11.3/TA2.1 90 P11.4/CBOUT 91 P11.5/TACLK/RTCCLK 92 P2.0/PM_TA0.0 93 P2.1/PM_TA0.1 94 P2.2/PM_TA0.2 95 P2.3/PM_TA1.0 96 TEST/SBWTCK 97 PJ.0/TDO 98 PJ.1/TDI/TCLK 99 PJ.2/TMS 100 PJ.3/TCK 101 ~RST/NMI/SBWTDIO 102 SD0P0 103 SD0N0 104 SD1P0 105 SD1N0 106 SD2P0 107 SD2N0 108 SD3P0 109 SD3N0 110 VASYS2 111 AVSS2 112 VREF 113 SD4P0 114 SD4N0 115 SD5P0 116 SD5N0 117 SD6P0 118 SD6N0 119 AVSS1 120 AVCC 121 VASYS1 122 AUXVCC2 123 AUXVCC1 124 VDSYS 125 DVCC 126 DVSS1 127 VCORE 128 P1.0 P1.0 P2.0 P2.0 P2.1 P2.1 SD0P0 SD0N0 SD1P0 SD1N0 SD2P0 SD2N0 SD3P0 SD3N0 SD4P0 SD4N0 SD5P0 SD5N0 SD6P0 SD6N0 VASYS1/2 VASYS1/2 VASYS1/2 VASYS1/2 TMS TMS TDI TDI TDO TDO TDO XOUT GND GND XIN DVCC AVCC DVDSYS DVDSYS DVDSYS DVDSYS AVSS AVSS PJ.2 PJ.2 PJ.1 PJ.1 PJ.0 PJ.0 RST/NMI RST/NMI TCK TCK TCK PJ.3 PJ.3 TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK TEST/SBWTCK RST RST RST RST LCDCAP LCDCAP VREF VREF VEREF+ VEREF+ VCORE AUXVCC2 AUXVCC2 AUXVCC1 AUXVCC1 AUXVCC3 AUXVCC3 1 2 3 4 5 6 1 2 3 4 5 6 Titel: Datum: Bearb.: Seite 1/1 MSP-TS430PEU128 22.05.2012 09:37:33 A3 A B C D E F G H I A B C D E F G H I File: Dok: Rev.: www.ti.com MSP-TS430PEU128 B.32 MSP-TS430PEU128 Figure B-63. MSP-TS430PEU128 Target Socket Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 131 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 1 P1.0 SBW JTAG DVDSYS ext int MSP-TS430PEU128 Rev. 1.1 RoHS DVCC AUXVCC GND AUXVCC1 AUXVCC2 AUXVCC3 GND GND RST/NMI TCK TDI TDO TEST/SBWTCK TMS 1 25 5 10 15 20 30 35 40 45 50 55 60 64 65 90 70 75 80 85 95 100 128 125 120 115 110 105 14 1 2 10 1 2 GND GND VCC 3 2 1 3 2 1 3 2 1 3 2 1 3 2 1 3 2 1 1 2 3 4 1234 1234 1 J1 J2 J3 J4 JTAG R2 C2 C1 R1 C5 R3 BOOTST C3 R10 R11 J5 JP1 JP2 JP5 JP6 JP7 JP8 JP9 JP10 R7 R5 D1 R6 R8 C6 C29 C7 C10 R4 JP12 JP11 JP13 C4 C11 C12 C8 C13 C14 C9 C16 C19 C18 C26 JP4 JP3 C15 C17 TP1 TP2 IC1 Connector J5 External power connector Jumper JP3 to "ext" Jumper JP1 Open to measure current Orient Pin 1 of MSP430 device Jumpers JP5 to JP10 Close 1-2 to debug in Spy-Bi-Wire mode Close 2-3 to debug in 4-wire JTAG mode JP11, JP12, JP13 Connect 1-2 to connect AUXVCCx with DVCC or drive AUXVCCx externally D1 LED connected to P1.0 Jumper JP2 Open to disconnect LED Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool Jumper JP3 1-2 (int): Power supply via JTAG interface 2-3 (ext): External power supply MSP-TS430PEU128 www.ti.com Figure B-64. MSP-TS430PEU128 Target Socket Module, PCB NOTE: The MSP-TS430PEU128 Rev 1.1 ships with the following modifications: • R7 value is changed to 0 Ω instead of 330 Ω. • JTAG pin 8 is connected only to JP5 pin 3, and not to pin 2. • JP5 pin 2 is connected to IC1 pin 97. • BOOTST pin 7 is connected to IC1 pin 97. 132 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-TS430PEU128 Table B-34. MSP-TS430PEU128 Bill of Materials Pos. Ref Des No. Per Description Digi-Key Part No. Comment Board 1 PCB 1 94x119.4mm, 4 layers MSP-TS430PEU128 4 layers, green solder mask Rev. 1.1 2 D1 1 green LED, DIODE0805 516-1434-1-ND 3 JP1, JP2, JP4 3 2-pin header, male, TH SAM1035-02-ND Place jumper on header 4 JP5, JP6, JP7, JP8, 6 3-pin header, male, TH SAM1035-03-ND Place jumpers on pins 1-2 (SBW) JP9, JP10 5 JP11, JP12, JP13 3 4-pin header, male, TH SAM1035-04-ND Place jumpers on pins 1-2 (AVCC=VCC) 6 JP3 1 4-pin header, male, TH SAM1035-04-ND Place jumpers on pins 1-2 JP1, JP2, JP3, JP4, Jumper WM4592-ND 7 JP5, JP6, JP7, JP8, 13 JP9, JP10, JP11, JP12, JP13 8 R1, R2, R4, R6, R8 5 0R, 0805 541-0.0ATR-ND 9 R10, R11 2 0R, 0805 541-0.0ATR-ND DNP 10 C3 1 2.2nF, CSMD0805 490-1628-2-ND DNP 11 C13, C14, C16, 7 4.7uF, 6.3V, CSMD0805 587-1302-2-ND C17, C18, C19, C29 12 C11 1 10uF, 6.3V, CSMD0805 445-1372-2-ND 13 C12 1 10uF, 6.3V, CSMD0805 445-1372-2-ND DNP 14 C1, C2 2 12pF, CSMD0805 490-5531-2-ND DNP 15 R5 1 47K, 0805 311-47KARTR-ND 16 C4, C5, C6, C7, C8, 6 100nF, CSMD0805 311-1245-2-ND C15 17 C9 1 100nF, CSMD0805 311-1245-2-ND DNP 18 R3, R7 2 330R, 0805 541-330ATR-ND 19 C10, C26 2 470nF, CSMD0805 587-1282-2-ND 20 BOOTST 1 10-pin connector, male, TH HRP10H-ND DNP, keep vias free of solder 21 JTAG 1 14-pin connector, male, TH HRP14H-ND 22 IC1 Socket 1 Socket: IC500-1284-009P Manuf. Yamaichi 23 IC1 2 MSP430F67791IPEU DNP: enclosed with kit. Is supplied by TI 24 J5 1 3-pin header, male, TH SAM1035-03-ND 25 Q1 1 Crystal: MS3V-T1R 32.768kHz DNP: Crystal enclosed with kit. Keep vias 12.5pF ±20ppm free of solder 26 TP1, TP2 2 Test point DNP, keep vias free of solder 27 J2,J4 2 26-pin header, TH SAM1029-26-ND DNP: Headers enclosed with kit. Keep vias free of solder. 28 J2,J4 2 26-pin receptable, TH SAM1213-26-ND DNP: Receptacles enclosed with kit. Keep vias free of solder. 29 J1, J3 2 38-pin header, TH SAM1029-38-ND DNP: Headers enclosed with kit. Keep vias free of solder. 30 J1, J3 2 38-pin receptable, TH SAM1213-38-ND DNP: Receptacles enclosed with kit. Keep vias free of solder. 31 Rubber feet 4 Rubber feet Buerklin: 20H1724 apply to bottom side corners SLAU278R–May 2009–Revised May 2014 Hardware 133 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Power Management VCC01 = external VCC Vdd = DVCC Vdda1 = AVDD_RF / AVCC_RF Vdda2 = AVCC Port connectors CON1 .. CON3 = Port1 .. Port3 of cc430 CON4 = spare CON5 = 1: XIN 2: XOUT CON6 = Vdd, GND, Vcore, COM0, LCDCAP CON7 = Vdda1, Vdda2, GND, AGND CON8 = JTAG_BASE (JTAG Port) CON9 = Vdd, GND, AGND (May be addedclose to therespective pins to reduce emissions at 5GHz toel vel required byETSI) EM430F5137RF900 www.ti.com B.33 EM430F5137RF900 Figure B-65. EM430F5137RF900 Target board, Schematic 134 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated JTAG connector External power connector CON12 GND GND VCC Open to disconnect LEDs jumper JP5/JP10 LED D2 (red) connected to P3.6 via JP10 LED D1 (green) connected to P1.0 via JP5 RF - Crystal Q1 26 MHz RF - Signal SMA Reset button S1 Push-button S2 connected to P1.7 Jumper JP1 Close JTAG position to debug in JTAG mode Jumper JP2 Close EXT for external supply Close INT for JTAG supply Close SBW position to debug in Spy-Bi-Wire mode Jumper JP1 Spy-Bi-Wire mode Footprint for 32kHz crystal Use 0 resistor for R431/R441 to make XIN/XOUT available on connector port5 ! Open to measure current jumper JP3 www.ti.com EM430F5137RF900 Figure B-66. EM430F5137RF900 Target board, PCB The battery pack that is included with the EM430F5137RF900 kit may be connected to CON12. Ensure correct battery insertion regarding the polarity as indicated in battery holder. SLAU278R–May 2009–Revised May 2014 Hardware 135 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F5137RF900 www.ti.com Table B-35. EM430F5137RF900 Bill of Materials Item Reference No. per Description Value Manufacturer's Part Manufacturer Comment Board Number 1 Q1 1 ( CUSTOMER SUPPLY ) CRYSTAL, 26M ASX-531(CS) AKER SMT, 4P, 26MHz ELECTRONIC C1-C5, C082, C222, C271, CAPACITOR, SMT, 0402, CER, 16V, 2 C281, C311, 14 10%, 0.1uF 0.1uF 0402YC104KAT2A AVX C321, C341, C412, C452 3 C071 1 CAPACITOR, SMT, 0603, CERAMIC, 0.47uF 0603YD474KAT2A AVX 0.47uF, 16V, 10%, X5R 4 R401 1 RES0402, 47.0K 47kΩ CRCW04024702F10 DALE 0 5 CON11 1 HEADER, THU, MALE, 14P, 2X7, 09 18 514 6323 HARTING 25.4x9.2x9.45mm 6 CON10 0 HEADER, THU, MALE, 10P, 2X5, 09 18 510 6323 HARTING DNP 20.32x9.2x9.45mm 7 D1 1 LED, SMT, 0603, GREEN, 2.1V active APT1608MGC KINGBRIGHT 8 D2 1 LED, SMT, 0603, RED, 2.0V active APT1608EC KINGBRIGHT 9 Q3 0 UNINSTALLED CRYSTAL, SMT, 3P, 32.768k MS1V-T1K (UN) MICRO DNP MS1V (Customer Supply) CRYSTAL 10 CON12 1 HEADER, THU, MALE, 3P, 1x3, 22-03-5035 MOLEX 9.9x4.9x5.9mm 11 C251, C261 2 50V, 5%, 27pF 27pF GRM36COG270J50 MURATA 12 L341 1 FERRITE, SMT, 0402, 1.0kΩ, 250mA 1kΩ BLM15HG102SN1D MURATA 13 C293 1 CAPACITOR, SMT, 0402, CERAMIC, 100pF GRM1555C1H101JZ MURATA 100pF, 50V, 0.25pF, C0G(NP0) 01 14 L304 1 INDUCTOR, SMT, 0402, 2.2nH, 0.1nH, 0.0022uH LQP15MN2N2B02 MURATA 220mA, 500MHz 15 L303, L305 2 INDUCTOR, SMT, 0402, 15nH, 2%, 0.015uH LQW15AN15NG00 MURATA 450mA, 250MHz 16 L292, L302 2 INDUCTOR, SMT, 0402, 18nH, 2%, 0.018uH LQW15AN18NG00 MURATA 370mA, 250MHz 17 C291 1 CAPACITOR, SMT, 0402, CERAMIC, 1pF GRM1555C1H1R0W MURATA 1pF, 50V, 0.05pF, C0G(NP0) Z01 18 C303 1 CAPACITOR, SMT, 0402, CERAMIC, 8.2pF GRM1555C1H8R2W MURATA 8.2pF, 50V, 0.05pF, C0G(NP0) Z01 19 C292, C301- 4 CAPACITOR, SMT, 0402, CERAMIC, 1.5pF GRM1555C1H1R5W MURATA C302, C304 1.5pF, 50V, 0.05pF, C0G(NP0) Z01 20 L291, L301 2 INDUCTOR, SMT, 0402, 12nH, 2%, 0.012uH LQW15AN12NG00 MURATA 500mA, 250MHz C282, C312, CAPACITOR, SMT, 0402, CERAMIC, GRM1555C1H2R0B 21 C351, C361, 5 2pF, 50V, 0.1pF, C0G 2.0pF Z01 Murata C371 22 L1 1 INDUCTOR, SMT, 0402, 6.2nH, 0.1nH, 6.2nH LQP15MN6N2B02 Murata 130mA, 500MHz 23 S1-S2 2 ULTRA-SMALL TACTILE SWITCH, SMT, B3U-1000P OMRON 2P, SPST-NO, 1.2x3x2.5mm, 0.05A, 12V R4-R5, R051, UNINSTALLED RESISTOR/JUMPER, 24 R061, R431, 0 SMT, 0402, 0 Ω, 5%, 1/16W 0Ω ERJ-2GE0R00X PANASONIC DNP R441 24a R7 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 0Ω ERJ-2GE0R00X PANASONIC 5%, 1/16W 25 R2-R3, R6 3 RESISTOR, SMT, 0402, THICK FILM, 330Ω ERJ-2GEJ331 PANASONIC 5%, 1/16W, 330 26 C431, C441 0 CAPACITOR, SMT, 0402, CER, 12pF, 12pF ECJ-0EC1H120J PANASONIC 50V, 5%, NPO 27 C401 1 CAPACITOR, SMT, 0402, CER, 2200pF, 0.0022uF ECJ-0EB1H222K PANASONIC 50V, 10%, X7R 28 R331 1 RESISTOR, SMT, THICK FILM, 56K, 56kΩ ERJ-2GEJ563 PANASONIC 1/16W, 5% 29 C081, C221, 4 CAPACITOR, SMT, 0603, CERAMIC, 10uF ECJ-1VB0J106M PANASONIC C411, C451 10uF, 6.3V, 20%, X5R 136 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com EM430F5137RF900 Table B-35. EM430F5137RF900 Bill of Materials (continued) Item Reference No. per Description Value Manufacturer's Part Manufacturer Comment Board Number 30 R1 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 0Ω ERJ-2GE0R00X PANASONIC 5%, 1/16W 31 C041 0 UNINSTALLED CAP CERAMIC 4.7UF 4.7uF ECJ-1VB0J475K Panasonic DNP 6.3V X5R 0603 32 X1 1 SMA STRIGHT JACK, SMT 32K10A-40ML5 ROSENBERGER 33 Q2 0 Crystal, SMT, 32.768 kHz 32.768k MS3V-T1R Micro Crystal DNP 34 U1 1 DUT, SMT, PQFP, RGZ-48, 0.5mmLS, CC430F52x1 TI 7.15x7.15x1mm, THRM.PAD 35 JP1 1 Pin Connector 2x4pin 61300821121 WUERTH 36 CON1-CON9 0 Pin Connector 2x4pin 61300821121 WUERTH DNP 37 JP2 1 Pin Connector 1x3pin 61300311121 WUERTH 38 JP3, JP5, 3 Pin Connector 1x2pin 61300211121 WUERTH JP10 38a JP7, CON13 0 Pin Connector 1x2pin 61300211121 WUERTH DNP 39 JP4 1 Pin Connector 2x2pin 61300421121 WUERTH DNP 40 JP1a 1 Pin Connector 2x3pin 61300621121 WUERTH SLAU278R–May 2009–Revised May 2014 Hardware 137 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Power Management VCC01 = external VCC Vdd = DVCC Vdda1 = AVDD_RF / AVCC_RF Vdda2 = AVCC Port connectors CON1 .. CON5 = Port1 .. Port5 of cc430 CON6 = Vdd, GND, Vcore, COM0, LCDCAP CON7 = Vdda1, Vdda2, GND, AGND CON8 = JTAG_BASE (JTAG Port) CON9 = Vdd, GND, AGND (May beaddedcol se to therespective pins to reduce emissions at 5GHz to el vel required by ETSI) EM430F6137RF900 www.ti.com B.34 EM430F6137RF900 Figure B-67. EM430F6137RF900 Target board, Schematic 138 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated CON12 External power connector Jumper JP2 to "EXT" Jumpers JP5, JP10 Open to disconnect LEDs D2 LED (red) connected to P3.6 via JP10 D1 LED (green) connected to P1.0 via JP5 Crystal Q1 RF - 26 MHz X1 RF - Signal SMA Button S1 Reset Push-button S2 Connected to P1.7 Q2/Q3 Footprint for 32-kHz crystal Jumper JP3 Open to measure current GND GND VCC C392 C422 L451 Jumper JP1 in Spy-Bi-Wire mode Jumper JP2 Close INT for power supply via JTAG interface Close EXT to external power supply (CON12) Jumper JP1 Close SBW position to debug in Spy-Bi-Wire mode Close JTAG position to debug in 4-wire JTAG mode R541 and R551 Use 0- resistor to make P5.0 and P5.1 available on connector Port 5 W Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool www.ti.com EM430F6137RF900 Figure B-68. EM430F6137RF900 Target Board, PCB The battery pack that is included with the EM430F6137RF900 kit may be connected to CON12. Ensure correct battery insertion regarding the polarity as indicated in battery holder. SLAU278R–May 2009–Revised May 2014 Hardware 139 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F6137RF900 www.ti.com Table B-36. EM430F6137RF900 Bill of Materials No. Pos. Ref Des per Description Part No. Manufacturer Board 1 Q1 1 ( CUSTOMER SUPPLY ) CRYSTAL, SMT, ASX-531(CS) AKER 4P, 26MHz ELECTRONIC C1-C5, C112, C252, C381, CAPACITOR, SMT, 0402, CER, 16V, 10%, 2 C391, C421, 14 0.1uF 0402YC104KAT2A AVX C431, C451, C522, C562 3 C101 1 CAPACITOR, SMT, 0603, CERAMIC, 0.47uF, 0603YD474KAT2A AVX 16V, 10%, X5R 4 R511 1 RES0402, 47.0K CRCW04024702F100 DALE 5 CON11 1 HEADER, THU, MALE, 14P, 2X7, 09 18 514 6323 HARTING 25.4x9.2x9.45mm, 90deg 7 D1 1 LED, SMT, 0603, GREEN, 2.1V APT1608MGC KINGBRIGHT 8 D2 1 LED, SMT, 0603, RED, 2.0V APT1608EC KINGBRIGHT 10 CON12 1 HEADER, THU, MALE, 3P, 1x3, 22-03-5035 MOLEX 9.9x4.9x5.9mm 11 C361, C371 2 50V, ±5%, 27pF GRM36COG270J50 MURATA 12 L451 1 FERRITE, SMT, 0402, 1.0kΩ, 250mA BLM15HG102SN1D MURATA 13 C403 1 CAPACITOR, SMT, 0402, CERAMIC, 100pF, GRM1555C1H101JZ01 MURATA 50V, ±0.25pF, C0G(NP0) 14 L414 1 INDUCTOR, SMT, 0402, 2.2nH, ±0.2nH, LQW15AN2N2C10 MURATA 1000mA, 250MHz 15 L413, L415 2 INDUCTOR, SMT, 0402, 15nH, ±5%, 460mA, LQW15AN15NJ00 MURATA 250MHz 16 L402, L412 2 INDUCTOR, SMT, 0402, 18nH, ±5%, 370mA, LQW15AN18NJ00 MURATA 250MHz 17 C401 1 CAPACITOR, SMT, 0402, CER, 1pF, 50V, GJM1555C1H1R0CB01D MURATA ±0.25pF, NP0 18 C413 1 CAPACITOR, SMT, 0402, CERAMIC, 8.2pF, GRM1555C1H8R2CZ01 MURATA 50V, ±0.25pF, C0G(NP0) 19 C402, C411- 4 CAPACITOR, SMT, 0402, CERAMIC, 1.5pF, GRM1555C1H1R5CZ01 MURATA C412, C414 50V, ±0.25pF, C0G(NP0) 20 L401, L411 2 INDUCTOR, SMT, 0402, 12nH, ±5%, 500mA, LQW15AN12NJ00 MURATA 250MHz 21 C46-C48, 5 CAPACITOR, SMT, 0402, CERAMIC, 2.0pF, GRM1555C1H2R0CZ01 Murata C392, C422 50V, ±0.25pF, C0G(NP0) 22 L1 1 INDUCTOR, SMT, 0402, 6.2nH, ±0.1nH, LQW15AN6N2D00 Murata 700mA, 250MHz 23 S1-S2 2 ULTRA-SMALL TACTILE SWITCH, SMT, 2P, B3U-1000P OMRON SPST-NO, 1.2x3x2.5mm, 0.05A, 12V 24 R7 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 5%, ERJ-2GE0R00X (UN) PANASONIC 1/16W 25 R2-R3, R6 3 RESISTOR, SMT, 0402, THICK FILM, 5%, ERJ-2GEJ331 PANASONIC 1/16W, 330 27 C511 1 CAPACITOR, SMT, 0402, CER, 2200pF, ECJ-0EB1H222K PANASONIC 50V, 10%, X7R 28 C111, C251, 4 CAPACITOR, SMT, 0603, CERAMIC, 10uF, ECJ-1VB0J106M PANASONIC C521, C561 6.3V, 20%, X5R 28a C041 1 CAP CERAMIC 4.7UF 6.3V X5R 0603 ECJ-1VB0J475M PANASONIC 29 R441 1 RESISTOR, SMT, THICK FILM, 56K, 1/16W, ERJ-2RKF5602 PANASONIC 1% 30 R1 1 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 5%, ERJ-2GE0R00X PANASONIC 1/16W 31 X1 1 SMA STRIGHT JACK, SMT 32K10A-40ML5 ROSENBERGER 140 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com EM430F6137RF900 Table B-36. EM430F6137RF900 Bill of Materials (continued) No. Pos. Ref Des per Description Part No. Manufacturer Board 33 U1 1 DUT, SMT, PQFP, RGC-64, 0.5mmLS, CC430F6137 TI 9.15x9.15x1mm, THRM.PAD 34 JP1 1 Pin Connector 2x4pin 61300821121 WUERTH 35 JP2 1 Pin Connector 1x3pin 61300311121 WUERTH 36a JP3, JP5, JP10 3 Pin Connector 1x2pin 61300211121 WUERTH 38 JP1a 1 Pin Connector 2x3pin 61300621121 WUERTH SLAU278R–May 2009–Revised May 2014 Hardware 141 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F6147RF900 www.ti.com B.35 EM430F6147RF900 Figure B-69. EM430F6147RF900 Target Board, Schematic 142 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Orient pin 1 of MSP430 device D1 LED (green) connected to P1.0 via JP5 Jumpers JP5 and JP10 Open to disconnect LEDs D2 LED (red) connected to P3.6 via JP10 Jumpers JP6 and JP8 Close 1-2 for Bypass mode Jumper JP9 Close 2-3 for TPS mode TPS status Connector JTAG For JTAG Tool Connector BOOTST For Bootstrap Loader Tool TPS62730 Jumper JP2 Close INT: Power supply via JTAG interface Close EXT: External power supply Button S2 Connected to P1.7 32-kHz crystal R554 and R551 Use 0- resistor to make P5.0 and P5.1 available on connector Port 5 W Button S1 Reset Jumper JP3 Open to measure current CON12 External poser connector Jumper JP2 to "EXT" Crystal Q1 RF - 26 MHz SMA1 RF - Signal SMA Jumper JP1 Close JTAG position to debug in JTAG mode Close SBW position to debug in Spy-BI-Wire mode www.ti.com EM430F6147RF900 Figure B-70. EM430F6147RF900 Target Board, PCB The battery pack which comes with the EM430F6147RF900 kit may be connected to CON12. Ensure correct battery insertion regarding the polarity as indicated in battery holder. SLAU278R–May 2009–Revised May 2014 Hardware 143 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated EM430F6147RF900 www.ti.com Table B-37. EM430F6147RF900 Bill of Materials No. Pos. Ref Des per Description Part No. Manufacturer Board 1 Q1 1 ( CUSTOMER SUPPLY ) CRYSTAL, SMT, ASX-531(CS) AKER 4P, 26MHz ELECTRONIC C1-5 C112 C252 C381 CAPACITOR, SMT, 0402, CER, 16V, 10%, 2 C391 C421 14 0.1uF 0402YC104KAT2A AVX C431 C451 C522 C562 3 C101 1 CAPACITOR, SMT, 0603, CERAMIC, 0.47uF, 0603YD474KAT2A AVX 16V, 10%, X5R 4 R511 1 RES0402, 47.0K CRCW04024702F100 DALE 5 CON11 1 HEADER, THU, MALE, 14P, 2X7, 09 18 514 6323 HARTING 25.4x9.2x9.45mm, 90deg 7 D1 1 LED, SMT, 0603, GREEN, 2.1V APT1608MGC KINGBRIGHT 8 D2 1 LED, SMT, 0603, RED, 2.0V APT1608EC KINGBRIGHT 10 CON12 1 HEADER, THU, MALE, 3P, 1x3, 22-03-5035 MOLEX 9.9x4.9x5.9mm 11 C361, C371 2 50V, ±5%, 27pF GRM36COG270J50 MURATA 12 L451 1 Inductor, SMD, 0402, 12nH, 5%, 370mA LQW15AN12NJ00 MURATA 13 C403 1 CAPACITOR, SMT, 0402, CERAMIC, 100pF, GRM1555C1H101JZ01 MURATA 50V, ±0.25pF, C0G(NP0) 14 L414 1 INDUCTOR, SMT, 0402, 2.2nH, ±0.2nH, LQW15AN2N2C10 MURATA 1000mA, 250MHz 15 L413 1 Inductor, SMD, 0402, 15nH, 5%, 370mA, LQW15AN15NJ00 MURATA 250MHz 15 L415 1 INDUCTOR,SMT,0402,15nH,±5%,460mA,250 LQW15AN15NJ00 MURATA MHz 16 L402, L412 2 Inductor, SMD, 0402, 18nH, 5%, 460mA, LQW15AN18NJ00 MURATA 250MHz 17 C401 1 CAPACITOR, SMT, 0402, CER, 1pF, 50V, GJM1555C1H1R0CB01D MURATA ±0.25pF, NP0 18 C413 1 CAPACITOR, SMT, 0402, CERAMIC, 8.2pF, GRM1555C1H8R2CZ01 MURATA 50V, ±0.25pF, C0G(NP0) 19 C402, C411- 4 CAPACITOR, SMT, 0402, CERAMIC, 1.5pF, GRM1555C1H1R5CZ01 MURATA C412, C414 50V, ±0.25pF, C0G(NP0) 20 L1, L401, L411 3 INDUCTOR, SMT, 0402, 12nH, ±5%, 500mA, LQW15AN12NJ00 MURATA 250MHz 21 C46-C48, 4 CAPACITOR, SMT, 0402, CERAMIC, 2.0pF, GRM1555C1H2R0CZ01 MURATA C392 50V, ±0.25pF, C0G(NP0) 22 L2 1 Inductor, SMD, 0805, 2.2uH, 20%, 600mA, LQM21PN2R2MC0 MURATA 50MHz 23 S1-S2 2 ULTRA-SMALL TACTILE SWITCH, SMT, 2P, B3U-1000P OMRON SPST-NO, 1.2x3x2.5mm, 0.05A, 12V 24 R1, R7, R551, 4 RESISTOR/JUMPER, SMT, 0402, 0 Ω, 5%, ERJ-2GE0R00X (UN) PANASONIC R554 1/16W 25 R2-R3, R6 3 RESISTOR, SMT, 0402, THICK FILM, 5%, ERJ-2GEJ331 PANASONIC 1/16W, 330 27 C511 1 CAPACITOR, SMT, 0402, CER, 2200pF, ECJ-0EB1H222K PANASONIC 50V, 10%, X7R 28 C111, C251, 4 CAPACITOR, SMT, 0603, CERAMIC, 1uF, ECJ-1VB0J105K PANASONIC C521, C561 6.3V, 20%, X5R 28a C041 1 CAP CERAMIC 4.7UF 6.3V X5R 0603 ECJ-1VB0J475M PANASONIC 29 R441 1 RESISTOR, SMT, THICK FILM, 56K, 1/16W, ERJ-2RKF5602 PANASONIC 1% 30 X1 1 SMA STRIGHT JACK, SMT 32K10A-40ML5 ROSENBERGER 144 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com EM430F6147RF900 Table B-37. EM430F6147RF900 Bill of Materials (continued) No. Pos. Ref Des per Description Part No. Manufacturer Board 31 U1 1 DUT, SMT, PQFP, RGC-64, 0.5mmLS, CC430F6147 TI 9.15x9.15x1mm, THRM.PAD 33 U2 1 IC, Step Down Converter with Bypass Mode TPS62370 TI for Low Power Wireless 34 JP1 1 Pin Connector 2x4pin 61300821121 WUERTH 35 JP2, JP6, JP8 3 Pin Connector 1x3pin 61300311121 WUERTH 36a JP3, JP5, JP9, 4 Pin Connector 1x2pin 61300211121 WUERTH JP10 38 JP1a 1 Pin Connector 2x3pin 61300621121 WUERTH 38 C7 1 Capacitor, Ceramic, 1206, 16V, X5R, 20% GRM31CR61C226ME15L MURATA 38 C8-9 2 CAP, SMD, Ceramic, 0402, 2.2uF, X5R GRM155R60J225ME15D MURATA 38 C041 1 CAP, SMD, Ceramic, 0603, 4.7uF, 16V, 10%, MURATA X5R SLAU278R–May 2009–Revised May 2014 Hardware 145 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET www.ti.com B.36 MSP-FET The MSP-FET is a powerful flash emulation tool to quickly begin application development on MSP430 microcontrollers. It includes a USB interface to program and debug the MSP430 in-system through the JTAG interface or the pin-saving Spy-Bi-Wire (2-wire JTAG) protocol. The enclosed MSP-FET development tool supports development with all MSP430 devices and is designed for use in conjunction with PCBs that contain MSP430 devices; for example, the MSP430 target socket boards. B.36.1 Features • USB debugging interface to connect a MSP430 MCU to a PC for real-time in-system programming and debugging • Software configurable supply voltage between 1.8 V and 3.6 V at 100 mA • Supports JTAG Security Fuse blow to protect code • Supports all MSP430 boards with JTAG header • Supports both JTAG and Spy-Bi-Wire (2-wire JTAG) debug protocols B.36.2 Release Notes The MSP-FET is supported by MSP Debug Stack (MSPDS) revision 3.4.0.20 and higher. Observe the following MSPDS-specific MSP-FET limitations. B.36.2.1 MSPDS 3.4.0.20 Limitations • EEM access to F149 and L092 devices is possible only when JTAG speed is set to slow. • Poly Fuse Blow in Spy-Bi-Wire mode is in beta state and is not officially supported. • The UART backchannel function is not implemented (even though an additional COM port is shown on the PC). B.36.2.2 MSPDS UART Backchannel Implementation In MSPDS v3.4.1.0 and later, the UART backchannel function is implemented and supported for the MSPFET. The baud rates that are supported depend on the target configuration and the debug settings. Table B-38 shows which baud rates are supported with certain configuration combinations. A green cell with ✓ means that the corresponding baud rate is supported without any data loss with the specified combination of settings. A red cell with ✗ means that the corresponding baud rate is not supported (data loss is expected) with the specified combination of settings. Table B-38. UART Backchannel Implementation Target MCLK Frequency: 1 MHz 1 MHz 8 MHz 8 MHz 1 MHz 1 MHz 8 MHz 8 MHz Debugger: Active Active Active Active Inactive Inactive Inactive Inactive Flow Control: No Yes No Yes No Yes No Yes 4800 baud ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ 9600 baud ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ 19200 baud ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ 28800 baud ✗ ✓ ✓ ✓ ✓ ✓ ✓ ✓ 38400 baud ✗ ✓ ✗ ✓ ✗ ✓ ✓ ✓ 57200 baud ✗ ✓ ✗ ✓ ✗ ✓ ✗ ✓ 115200 baud ✗ ✗ ✗ ✓ ✗ ✗ ✗ ✓ 146 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET Figure B-71. MSP-FET Top View Figure B-72. MSP-FET Bottom View SLAU278R–May 2009–Revised May 2014 Hardware 147 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET Rev 1.2 1 3/12/2014 3/12/2014 C 4 A B C D Date E Sheet of F 4 2 1 Title 3 1 A B C D E Size Number F 2 3 Rev 1 A 5 General power supply Additional supply LED USB interface Host MCU DVCC1 DVCC3 DVCC2 AVCC1 Debug i/f USB BSL activation VBUS bypass 1 P6.4/CB4/A4 2 P6.5/CB5/A5 3 P6.6/CB6/A6/DAC0 4 P6.7/CB7/A7/DAC1 5 P7.4/CB8/A12 6 P7.5/CB9/A13 7 P7.6/CB10/A14/DAC0 8 P7.7/CB11/A15/DAC1 9 P5.0/VREF+/VEREF+ 10 P5.1/VREF-/VEREF- 11 AVCC1 12 AVSS1 13 XIN 14 XOUT 15 AVSS2 16 P5.6/ADC12CLK/DMAE0 17 P2.0/P2MAP0 18 P2.1/P2MAP1 19 P2.2/P2MAP2 20 P2.3/P2MAP3 21 P2.4/P2MAP4 22 P2.5/P2MAP5 23 P2.6/P2MAP6/R03 24 P2.7/P2MAP7/LCDREF/ 25 DVCC1 26 DVSS1 27 VCORE(2) 28 P5.2/R23 29 LCDCAP/R33 30 COM0 31 P5.3/COM1/S42 32 P5.4/COM2/S41 33 P5.5/COM3/S40 34 P1.0/TA0CLK/ACLK/S3 35 P1.1/TA0.0/S38 36 P1.2/TA0.1/S37 37 P1.3/TA0.2/S36 38 P1.4/TA0.3/S35 39 P1.5/TA0.4/S34 40 P1.6/TA0.1/S33 41 P1.7/TA0.2/S32 42 P3.0/TA1CLK/CBOUT/S 43 P3.1/TA1.0/S30 44 P3.2/TA1.1/S29 45 P3.3/TA1.2/S28 46 P3.4/TA2CLK/SMCLK/S 47 P3.5/TA2.0/S26 48 P3.6/TA2.1/S25 49 P3.7/TA2.2/S24 50 P4.0/TB0.0/S23 P4.1/TB0.1/S22 51 P4.2/TB0.2/S21 52 P4.3/TB0.3/S20 53 P4.4/TB0.4/S19 54 P4.5/TB0.5/S18 55 P4.6/TB0.6/S17 56 P4.7/TB0OUTH/SVMOUT57 P8.0/TB0CLK/S1558 P8.1/UCB1STE 59 P8.2/UCA1TXD 60 P8.3/UCA1RXD 61 P8.4/UCB1CLK/UCA1ST62 DVSS2 63 DVCC2 64 P8.5/UCB1SIMO 65 P8.6/UCB1SOMI 66 P8.7/S8 67 P9.0/S7 68 P9.1/S6 69 P9.2/S5 70 P9.3/S4 71 P9.4/S3 72 P9.5/S2 73 P9.6/S1 74 P9.7/S0 75 VSSU 76 PU.0/DP 77 PUR 78 PU.1/DM 79 VBUS 80 81 VUSB V18 82 AVSS3 83 P7.2/XT2IN 84 P7.3/XT2OUT 85 VBAK 86 87 VBAT P5.7/RTCCLK 88 DVCC3 89 DVSS3 90 TEST/SBWTCK 91 PJ.0/TDO 92 93 PJ.1/TDI/TCLK PJ.2/TMS 94 PJ.3/TCK 95 RST/NMI/SBWTDIO96 P6.0/CB0/A0 97 P6.1/CB1/A1 98 99 P6.2/CB2/A2 100 P6.3/CB3/A3 U1 MSP430F6638IPZR C6 100n + C5 10uF/6.3V C7 100n C9 100n C11 100n 0R R1 C15 68p C16 470n C17 220n C18 4.7n D1 D2 R47 470R 0R R50 1 IO1 2 IO2 3 GND IO3 4 IO4 5 VCC 6 U5 TPD4E004DRYR 1k4 R2 C14 4.7u, dnp C23 100n 33k R60 C31 10p C33 10p R61 1M R62 100R J5 C8 220n 3 1 2 P1 0R R17 A C D7 B0530W-7-F R76 27k C70 4.7u, dnp C71 100n R85 0R, dnp C55 1n R3 27R R45 27R R46 470R + C12 10uF/6.3V 1 2 3 4 5 6 7 11 10 J1 R28 4k7 R30 4k7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VCC_DT_REF VCC_DCDC_REF VCC_DT2TRGT_CTRL VCC_SUPPLY2TRGT_CTRL LED1 TDIOFF_CTRL PWM_SETVF FPGA_TCK FPGA_TDI FPGA_TMS FPGA_TDO FPGA_TRST VF2TEST_CTRL VF2TDI_CTRL AVCC_POD VCC_POD33 VCC_POD33 VCC_POD33 VREF+ VCORE VBAK MCU_DMAE0 DCDC_PULSE MCU_P2.2 MCU_P2.3 MCU_P2.4 MCU_P2.5 MCU_P2.6 MCU_P2.7 MCU_P1.0 MCU_P1.1 MCU_P1.2 MCU_P1.3 MCU_P1.4 MCU_P1.5 MCU_P1.6 MCU_P1.7 MCU_P3.0 MCU_P3.1 MCU_P3.2 MCU_P3.3 MCU_P3.4 MCU_P3.5 MCU_P3.6 MCU_P3.7 MCU_P4.0 MCU_P4.1 MCU_P4.2 MCU_P4.3 MCU_P4.4 MCU_P4.5 MCU_P4.6 MCU_P4.7 MCU_P8.1 MCU_P8.2 MCU_P8.3 PUR PU.1/DM PU.0/DP VBUS VUSB AVCC_POD VCC_POD33 VCC_POD33 VCC_POD33 AVCC_POD VCC_POD33 VREF+ VCORE V18 V18 VBAK HOST_TEST HOST_RST FPGA_RESET LED0 LED1 PUR VUSB PU.1/DM PU.0/DP DCDC_RST HOST_SCL HOST_SDA DCDC_IO0 LED0 A_VBUS5 VBUS A_VCC_SUPPLY_HOST DCDC_TEST A_VF MCU_P9.5 DCDC_IO1 HOST_TCK HOST_TMS HOST_TDI HOST_TDO VCC_POD33 HOST_RST VCC_POD33 GND1 VBUS5 MCU_P2.1 GND1 GND1 VCC_DT2SUPPLY_CTRL A_VCC_DT A_VCC_DT_BSR A_VCC_SENSE0_TRGT VCC_POD33 VCC_DT_SENSE MSP-FET www.ti.com B.36.3 Schematics Figure B-73. MSP-FET USB Debugger, Schematic (1 of 5) 148 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET Rev 1.2 3/12/2014 5 1 A 2 Rev 3 2 F Size Number A B C D E 1 3 Title 1 2 4 F Sheet of E Date A B C D 4 C 3/12/2014 VCC_PUMP VCC_JTAG FPGA 1 GND 2 GAA2/IO51RSB1 3 IO52RSB1 4 GAB2/IO53RSB1 5 IO95RSB1 6 GAC2/IO94RSB1 7 IO93RSB1 8 IO92RSB1 9 GND 10 GFB1/IO87RSB1 11 GFB0/IO86RSB1 12 VCOMPLF 13 GFA0/IO85RSB1 14 VCCPLF 15 GFA1/IO84RSB1 16 GFA2/IO83RSB1 17 VCC 18 VCCIB1 19 GEC1/IO77RSB1 20 GEB1/IO75RSB1 21 GEB0/IO74RSB1 22 GEA1/IO73RSB1 23 GEA0/IO72RSB1 24 VMV1 25 GNDQ 26 GEA2/IO71RSB1 27 FF/GEB2/IO70RSB1 28 GEC2/IO69RSB1 29 IO68RSB1 30 IO67RSB1 31 IO66RSB1 32 IO65RSB1 33 IO64RSB1 34 IO63RSB1 35 IO62RSB1 36 IO61RSB1 37 VCC 38 GND 39 VCCIB1 40 IO60RSB1 41 IO59RSB1 42 IO58RSB1 43 IO57RSB1 44 GDC2/IO56RSB1 45 GDB2/IO55RSB1 46 GDA2/IO54RSB1 47 TCK 48 TDI 49 TMS 50 VMV1 GND 51 VPUMP 52 NC 53 TDO 54 TRST 55 VJTAG 56 GDA1/IO49RSB057 GDC0/IO46RSB058 GDC1/IO45RSB059 GCC2/IO43RSB060 GCB2/IO42RSB061 GCA0/IO40RSB062 GCA1/IO39RSB063 GCC0/IO36RSB064 GCC1/IO35RSB065 VCCIB0 66 GND 67 VCC 68 IO31RSB0 69 GBC2/IO29RSB070 GBB2/IO27RSB071 IO26RSB0 72 GBA2/IO25RSB073 VMV0 74 GNDQ 75 GBA1/IO24RSB076 GBA0/IO23RSB077 GBB1/IO22RSB078 GBB0/IO21RSB079 GBC1/IO20RSB080 81 GBC0/IO19RSB0 IO18RSB0 82 IO17RSB0 83 IO15RSB0 84 IO13RSB0 85 IO11RSB0 86 87 VCCIB0 GND 88 VCC 89 IO10RSB0 90 IO09RSB0 91 IO08RSB0 92 93 GAC1/IO07RSB0 GAC0/IO06RSB094 GAB1/IO05RSB095 GAB0/IO04RSB096 GAA1/IO03RSB097 GAA0/IO02RSB098 99 IO01RSB0 100 IO00RSB0 U2 A3PN125-VQG100 R4 1k R5 1k 1 2 L3 33n + C19 10uF/6.3V C20 100n C21 10n C22 100n C34 10n C35 100n C36 10n C37 100n C38 10n C39 100n C40 10n C41 100n C42 10n C43 100n C44 10n C45 100n C46 10n C47 100n C48 10n C49 100n C50 10n C51 100n C52 10n R44 27R 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VCC_PLF VCC_POD15 VCC_POD15 VCC_POD15 VCC_POD15 VCC_POD33 VCC_POD33 VCC_POD33 VCC_POD33 VCC_POD33 VCC_POD33 VCC_POD33 VCC_POD33 VCC_POD33 FPGA_TCK FPGA_TDI FPGA_TMS FPGA_TRST MCU_DMAE0 MCU_P2.2 MCU_P2.3 MCU_P2.4 MCU_P2.5 MCU_P2.6 MCU_P1.0 MCU_P1.1 MCU_P1.2 MCU_P1.3 MCU_P1.4 MCU_P1.5 MCU_P1.6 MCU_P1.7 MCU_P3.0 MCU_P3.1 MCU_P3.2 MCU_P3.3 MCU_P3.4 MCU_P3.5 MCU_P3.6 MCU_P3.7 MCU_P4.0 MCU_P4.1 MCU_P4.2 MCU_P4.3 MCU_P4.4 MCU_P4.5 MCU_P4.6 MCU_P4.7 MCU_P8.1 MCU_P8.2 MCU_P8.3 FPGA_IO_TCK FPGA_DIR_CTRL_TCK FPGA_IO_TMS FPGA_DIR_CTRL_TMS FPGA_IO_TDI FPGA_DIR_CTRL_TDI FPGA_IO_TDO FPGA_DIR_CTRL_TDO MCU_P2.7 FPGA_DIR_CTRL_RST FPGA_IO_TEST FPGA_DIR_CTRL_TEST FPGA_IO_UART_TXD FPGA_DIR_CTRL_UART_TXD FPGA_IO_UART_RXD FPGA_DIR_CTRL_UART_RXD FPGA_IO_UART_CTS FPGA_DIR_CTRL_UART_CTS FPGA_IO_UART_RTS FPGA_DIR_CTRL_UART_RTS FPGA_TDO FPGA_RESET VCC_POD15 VCC_POD15 VCC_POD33 VCC_PLF VCC_POD33 VCC_POD33 FPGA_IO_RST FPGA_TP0 FPGA_TP1 FPGA_TP2 MCU_P9.5 MCU_P2.1 www.ti.com MSP-FET Figure B-74. MSP-FET USB Debugger, Schematic (2 of 5) SLAU278R–May 2009–Revised May 2014 Hardware 149 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 3/12/2014 3/12/2014 C 4 A B C D Date E Sheet of F 4 2 1 3 1 A B C D E Size Number F 2 3 Rev 3 A 1 5 S/W controlled DCDC converter DCDC MCU reference voltage DT level shifter supply DCDC calibration switch DCDC MCU DCDC MCU debug i/f DT current measurement shunt DT current sense MSP-FET Rev 1.2 Energy measurement method protected under U.S. Patent Application 13/329,073 and subsequent patent applications 1 DVCC 2 P1.0/TA0CLK 3 P1.1/TA0.0 4 P1.2/TA0.1 5 P1.3/ADC10CLK 6 P1.4/TA0.2 7 P1.5/TA0.0 P1.6/TA0.1 8 P1.7/SDI 9 NMI-RST 10 TEST/SBWTCK 11 XOUT/P2.7 12 XIN/P2.6 13 DVSS 14 U4 MSP430G2452PW MSP430G2452PW 1 2 L4 R53 R55 R56 R64 1 2 3 D4 R65 220k C28 33p R63 C53 100n 1 NO1 2 COM1 3 NO2 4 COM2 5 IN2 6 IN3 7 GND NO3 8 COM3 9 COM4 10 NO4 11 IN4 12 IN1 13 V+ 14 U20 TS3A4751PWR TS3A4751PWR C13 1n, dnp C56 4.7u + C57 2.2u C63 100n R19 1 A1 2 A2 C1,C2 3 D8 C66 1n 0R R20 R23180k R25150k R15 220k 1 G 2 S 3 D Q3 R26 27k, dnp 1 IN 2 GND 3 EN NR 4 OUT 5 U7 TPS73401DDCT C54 1n C26 2.2u R24160k C24 1n C62 10n C29 4.7u C10 1u 2E B1 C 3 Q4 R6 220k C1 33p R7 220k C65 100n 5 IN- 4 IN+ 6 OUT 1 REF 2 GND 3 V+ U10 INA21XDCK INA214AIDCKT C67 10p C68 1n 10R R49 10R R54 R57 0.2 C69 2.2u C72 2.2u C73 2.2u 1 1 DCDC_CAL0 DCDC_CAL2 DCDC_TEST DCDC_RST HOST_SDA DCDC_CAL1 VCC_POD33 DCDC_PULSE DCDC_IO0 VCC_DCDC_REF A_VCC_SUPPLY VBUS5 VCC_SUPPLY A_VCC_SUPPLY DCDC_CAL0 VCC_SUPPLY VCC_DT DCDC_CAL1 DCDC_CAL2 DCDC_RST VCC_POD33 GND1 GND1 GND1 GND1 GND1 VBUS GND1 GND1 GND1 DCDCGND GND1 DCDCGND DCDCGND DCDCGND DCDCGND DCDCGND GND1 VCC_SUPPLY GND1 GND1 VCC_DT_REF GND1 DCDC_IO1 VCC_DT HOST_SCL VCC_DT_BSR VCC_SUPPLY A_VCC_SUPPLY_HOST VCC_SUPPLY VCC_POD33 VCC_DT_SENSE VCC_DT VCC_DT_BSR GND1 GND1 GND1 MSP-FET www.ti.com Figure B-75. MSP-FET USB Debugger, Schematic (3 of 5) 150 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 3/12/2014 5 1 A 4 Rev 3 2 F Size Number A B C D E 1 3 1 2 4 F Sheet of E Date A B C D 4 C 3/12/2014 VF = +5V ... 6.5V Fuse blow step-up converter Fuse voltage multiplexer / VCC_DT to level shifters ESD protection Target MCU connector DT level shifters MSP-FET Rev 1.2 S1 D1 IN2 GND S2 D2 IN1 VDD U6 ADG821BRMZ-REEL7 D5 dnp MMSZ5232B-7-F R13 100R R14 2k2 S1 D1 IN2 GND S2 D2 IN1 VDD U9 ADG821BRMZ-REEL7 L2 33u C30 330n E B C Q1 BC817-16LT1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 J6 R35 100R 1 IO1 2 IO2 3 IO3 4 IO4 IO5 5 IO6 6 IO7 7 IO8 8 9 GND U3 TPD8E003DQD TPD8E003DQDR 1 IO1 2 IO2 3 IO3 4 IO4 IO5 5 IO6 6 IO7 7 IO8 8 9 GND U21 TPD8E003DQD TPD8E003DQDR R22 47k R29 47k R42 1k D3 dnp DDZ9692-7 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U12 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U13 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U14 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U15 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U16 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U17 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U22 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U26 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U27 SN74LVC1T45DCKR 1 VCCA 2 GND 3 A B 4 DIR 5 VCCB 6 U28 SN74LVC1T45DCKR R27 47k R31 47k R84 47k, dnp R86 47k R87 47k R88 47k R89 47k R90 47k R91 47k R92 47k R93 47k R94 47k R95 47k R96 47k R97 47k R98 47k R99 47k R100 47k R101 47k R102 47k C77 100n C78 100n C79 100n C80 100n C82 100n C83 100n C84 100n C85 100n R32 100R R33 100R R34 100R R37 100R R38 100R R39 100R R40 100R R41 100R R43 100R A C D10 B0530W-7-F A C D6 DNP B0530W-7-F + C74 100u/10V R48 47k R58 47k R59 47k 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VF VF2TDI_CTRL VF VF2TEST_CTRL TDIOFF_CTRL VF TC_TDI_FD VF_TDI VBUS VF TC_TEST_FD VF_TEST TC_TEST_BSR TC_TDI_BSR TC_TDO_FD VCC_SENSE0_TRGT TC_TMS_FD TC_TCK_FD TC_UART_CTS_FD TC_RST_FD TC_UART_TXD_FD TC_UART_RTS_FD TC_UART_RXD_FD VCC_SUPPLY_TRGT TC_TDI_BSR TC_TEST_BSR VCC_SUPPLY_TRGT TC_TDO_FD TC_TCK_FD TC_TEST_BSR VCC_SENSE0_TRGT TC_TMS_FD TC_TDI_BSR TC_UART_CTS_FD TC_UART_RTS_FD TC_UART_RXD_FD TC_RST_FD TC_UART_TXD_FD VCC_JTAGLDO_TRGT VCC_JTAGLDO_TRGT VCC_DT2TRGT_CTRL VCC_DT_TRGT VCC_DT GND1 PWM_SETVF VCC_POD33 FPGA_IO_TCK FPGA_DIR_CTRL_TCK TC_TCK_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_TMS FPGA_DIR_CTRL_TMS TC_TMS_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_TDI FPGA_DIR_CTRL_TDI TC_TDI_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_TDO FPGA_DIR_CTRL_TDO TC_TDO_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_RST FPGA_DIR_CTRL_RST TC_RST_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_TEST FPGA_DIR_CTRL_TEST TC_TEST_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_UART_TXD FPGA_DIR_CTRL_UART_TXD TC_UART_TXD_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_UART_RXD FPGA_DIR_CTRL_UART_RXD TC_UART_RXD_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_UART_CTS FPGA_DIR_CTRL_UART_CTS TC_UART_CTS_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 FPGA_IO_UART_RTS FPGA_DIR_CTRL_UART_RTS TC_UART_RTS_FD VCC_DT_TRGT VCC_DT_TRGT VCC_POD33 GND1 VCC_DT_TRGT GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 VCC_POD33 GND1 GND1 VF_TDI VF_TEST www.ti.com MSP-FET Figure B-76. MSP-FET USB Debugger, Schematic (4 of 5) SLAU278R–May 2009–Revised May 2014 Hardware 151 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 3/12/2014 3/12/2014 C 4 A B C D Date E Sheet of F 4 2 1 3 1 A B C D E Size Number F 2 3 Rev 5 A 1 5 MSP-FET power supply Target power switch Analog inputs to Host MCU Test points Common debug and test i/f MSP-FET Rev 1.2 R80R R11 150k C3 33p R51 240k R52 150k C27 33p R12 270k R36 150k C4 33p TP3 TP0 TP4 TP5 TP6 TP1 TP2 R10 150k R21 47k 1 2 3 4 5 6 7 8 J4 HEADER_1X8_50MIL_A 1 2 3 4 5 6 7 8 J2 HEADER_1X8_50MIL_A 1 2 3 4 5 6 7 8 J3 HEADER_1X8_50MIL_A C32 33p R78 150k R79 150k TP7 TP9 TP8 TP11 R16 47k 1 NO1 2 V+ 3 IN1 4 COM2 NO2 5 GND 6 IN2 7 COM1 8 U18 TS5A21366RSE TS5A21366RSER 1 EN1 2 IN 3 EN2 GND 4 OUT2 5 OUT1 6 U19 TLV7111533D C25 10n C58 1u C59 1u C61 1u C2 33p R9 150k R18 150k 1 1 1 1 1 1 VCC_SENSE0_TRGT A_VCC_SENSE0_TRGT VBUS5 A_VBUS5 VF A_VF DCDC_PULSE VCC_SUPPLY FPGA_TP0 FPGA_TP1 FPGA_TP2 VBUS GND1 VBUS HOST_TEST HOST_TDO HOST_TDI HOST_TMS HOST_TCK HOST_RST DCDC_RST DCDC_TEST VCC_POD33 FPGA_TRST FPGA_TCK FPGA_TMS FPGA_TDI FPGA_TDO GND1 GND1 A_VCC_SUPPLY_HOST VCC_POD15 VBUS5 VCC_DT A_VCC_DT GND1 DCDC_IO0 DCDC_IO1 VCC_DT HOST_SCL HOST_SDA VCC_SUPPLY_TRGT VCC_SUPPLY_TRGT VBUS VCC_SUPPLY2TRGT_CTRL VCC_SUPPLY VCC_DT VCC_DT2SUPPLY_CTRL GND1 GND1 GND1 VCC_POD15 VBUS VCC_POD33 PWRGND PWRGND PWRGND PWRGND PWRGND VCC_DT_BSR A_VCC_DT_BSR MSP-FET www.ti.com Figure B-77. MSP-FET USB Debugger, Schematic (5 of 5) 152 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET B.36.4 Layout Figure B-78. MSP-FET USB Debugger, PCB (Top) Figure B-79. MSP-FET USB Debugger, PCB (Bottom) B.36.5 LED Signals The MSP-FET shows its operating states using two LEDs, one green and one red. Table B-39 lists all available operation modes. An or icon indicates that the LED is off, an or icon indicates that the LED is on, and an or icon indicates that the LED flashes. Table B-39. MSP-FET LED Signals Function Power LED Mode LED MSP-FET not connected to PC, or MSP-FET not ready; for example, after a major firmware update. Connect or reconnect MSP-FET to PC. MSP-FET connected and ready MSP-FET waiting for data transfer Ongoing data transfer An error has occurred; for example, target VCC overcurrent. Unplug MSP-FET from target, and cycle the power off and on. Check target connection, and reconnect MSP-FET. Firmware update in progress. Do not disconnect MSP-FET while both LEDs are blinking. SLAU278R–May 2009–Revised May 2014 Hardware 153 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET www.ti.com B.36.6 JTAG Target Connector Figure B-80 shows the pinout of the JTAG connector. Figure B-80. JTAG Connector Pinout Table B-40. JTAG Connector Pin State by Operating Mode Pin Name After Power-Up When JTAG Protocol is When Spy-Bi-Wire Protocol Selected is Selected 1 TDO/TDI Hi-Z, pulled up to 3.3 V In, TDO In and Out, SBWTDIO 2 VCC_TOOL 3.3 V VCC VCC 3 TDI/VPP Hi-Z, pulled up to 3.3 V Out, TDI Hi-Z, pulled up to VCC 4 VCC_TARGET In, external VCC sense In, external VCC sense In, external VCC sense 5 TMS Hi-Z, pulled up to 3.3 V Out, TMS Hi-Z, pulled up to VCC 6 N/C N/C N/C N/C 7 TCK Hi-Z, pulled up to 3.3 V Out, TCK Out, SBWTCK 8 TEST/VPP Out, Gnd Out, TEST Hi-Z, pulled up to VCC 9 GND Ground Ground Ground 10 UART_CTS/SPI_CLK/I2C_SCL Hi-Z, pulled up to 3.3 V Out, Target UART Clear-To- Out, Target UART Clear-To- Send Handshake input Send Handshake input 11 RST Out, VCC Out, RST Out 12 UART_TXD/SPI_SOMI/I2C_SDA Hi-Z, pulled up to 3.3 V In, Target UART TXD output In, Target UART TXD output 13 UART_RTS Hi-Z, pulled up to 3.3 V In, Target UART Ready-to- In, Target UART Ready-to- Send Handshake output Send Handshake output 14 UART_RXD/SPI_SIMO Hi-Z, pulled up to 3.3 V Out, Target UART RXD input Out, Target UART RXD input 154 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated 12 UART_TXD 11 RST 8 TEST 7 TCK 5 TMS 3 TDI 1 TDO/TDI 2 VCC_TOOL - USB Power 10 UART_CTS 14 UART_RXD 13 UART_RTS Pin Signal www.ti.com MSP-FET Figure B-81 shows the state of each pin in the connector after power-up. Figure B-81. Pin States After Power-Up SLAU278R–May 2009–Revised May 2014 Hardware 155 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET www.ti.com B.36.7 Specifications Table B-41 shows the physical and electrical specifications of the MSP-FET. Table B-41. Specifications Mechanical Size (without cables) 80 mm x 50 mm x 20 mm Interfaces USB interface USB 2.0, full speed Target interface JTAG 14-pin See Table B-40 for pinout JTAG cable length 20 cm (max) JTAG and Spy-Bi-Wire Interface, Electrical Power supply USB powered, 200 mA (max) Target output voltage 1.8 V to 3.6 V Selectable in 0.1-V steps. VCC_TOOL available from JTAG pin 2. VCC_TOOL Target output current 100 mA (max) Current supplied through JTAG pin 2 Target output overcurrent 160 mA (max) detection level JTAG signal overcurrent 30 mA (max) Total current supplied through JTAG pins 1, 3, 5, 7, 8, 10, 11, 12, 13, 14 detection level External target supply Supported (1.8 V to 3.6 V) Connect external target voltage VCC_TARGET to JTAG pin 4. JTAG and SBW signals are regulated to external target voltage ±100 mV. Fuse blow Supported For devices with poly-fuse JTAG and Spy-Bi-Wire Interface, Timing JTAG clock speed 8 MHz (max) Protocol speed selectable by software Spy‑Bi‑Wire clock speed 8 MHz (max) Protocol speed selectable by software. System limitations due to external RC components on reset pin (SBWTDIO) might apply. JTAG and Spy-Bi-Wire Interface, Speed Flash write speed (JTAG) Up to 20 kB/sec Flash write speed Up to 7 kB/sec (Spy‑Bi‑Wire) FRAM write speed (JTAG) Up to 50 kB/sec FRAM write speed Up to 14 kB/sec (Spy‑Bi‑Wire) EnergyTrace™ Technology Target output current ± 2%, ± 500 nA For target output voltage = 1.8 V to 3.6 V, target output current <75 mA accuracy and USB voltage = 5 V constant during and after calibration B.36.8 MSP-FET Revision History Revision numbers are printed on the PCB and are stored in nonvolatile memory in firmware. Table B-42 shows the revision history of the MSP-FET. Table B-42. MSP-FET Revision History Revision Date Comments Revision 1.2 March 2014 Initial release 156 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430PIF B.37 MSP-FET430PIF Figure B-82. MSP-FET430PIF FET Interface Module, Schematic SLAU278R–May 2009–Revised May 2014 Hardware 157 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430PIF www.ti.com Figure B-83. MSP-FET430PIF FET Interface Module, PCB 158 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430UIF B.38 MSP-FET430UIF Figure B-84. MSP-FET430UIF USB Interface, Schematic (1 of 4) SLAU278R–May 2009–Revised May 2014 Hardware 159 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430UIF www.ti.com Figure B-85. MSP-FET430UIF USB Interface, Schematic (2 of 4) 160 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430UIF Figure B-86. MSP-FET430UIF USB Interface, Schematic (3 of 4) SLAU278R–May 2009–Revised May 2014 Hardware 161 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430UIF www.ti.com Figure B-87. MSP-FET430UIF USB Interface, Schematic (4 of 4) 162 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com MSP-FET430UIF Figure B-88. MSP-FET430UIF USB Interface, PCB SLAU278R–May 2009–Revised May 2014 Hardware 163 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated MSP-FET430UIF www.ti.com B.38.1 MSP-FET430UIF Revision History Revision 1.3 • Initial released hardware version Assembly change on 1.3 (May 2005) • R29, R51, R42, R21, R22, R74: value changed from 330R to 100R Changes 1.3 to 1.4 (Aug 2005) • J5: VBUS and RESET additionally connected • R29, R51, R42, R21, R22, R74: value changed from 330R to 100R • U1, U7: F1612 can reset TUSB3410; R44 = 0R added • TARGET-CON.: pins 6, 10, 12, 13, 14 disconnected from GND • Firmware-upgrade option through BSL: R49, R52, R53, R54 added; R49, R52 are currently DNP • Pullups on TCK and TMS: R78, R79 added • U2: Changed from SN74LVC1G125DBV to SN74LVC1G07DBV NOTE: Using a locally powered target board with hardware revision 1.4 Using an MSP-FET430UIF interface hardware revision 1.4 with populated R62 in conjunction with a locally powered target board is not possible. In this case, the target device RESET signal is pulled down by the FET tool. It is recommended to remove R62 to eliminate this restriction. This component is located close to the 14-pin connector on the MSP-FET430UIF PCB. See the schematic and PCB drawings in this document for the exact location of this component. Assembly change on 1.4a (January 2006) • R62: not populated 164 Hardware SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Appendix C SLAU278R–May 2009–Revised May 2014 Hardware Installation Guide This section describes the hardware installation process of the following USB debug interfaces on a PC running Windows XP: • MSP-FET430UIF • eZ430-F2013 • eZ430-RF2500 • eZ430-Chronos • eZ430-RF2780 • eZ430-RF2560 • MSP-WDSxx "Metawatch" • LaunchPad (MSP-EXP430G2) • MSP-EXP430FR5739 • MSP-EXP430F5529 The installation procedure for other supported versions of Windows is very similar and, therefore, not shown here. Topic ........................................................................................................................... Page C.1 Hardware Installation ........................................................................................ 166 SLAU278R–May 2009–Revised May 2014 Hardware Installation Guide 165 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware Installation www.ti.com C.1 Hardware Installation Table C-1 shows the USB VIDs and PIDs used in MSP430 tools. Table C-1. USB VIDs and PIDs Used in MSP430 Tools Tool USB VID USB PID INF File Name eZ430-F2013 0x0451 0xF430 usbuart3410.inf eZ430-RF2500 0x0451 0xF432 430CDC.inf eZ430-RF2780 0x0451 0xF432 430CDC.inf eZ430-RF2560 0x0451 0xF432 430CDC.inf MSP-WDSxx "Metawatch" 0x0451 0xF432 430CDC.inf eZ430-Chronos 0x0451 0xF432 430CDC.inf MSP-FET430UIF(1) 0x2047 0x0010 msp430tools.inf MSP-FET 0x2047 0x0204 msp430tools.inf eZ-FET 0x2047 0x0203 msp430tools.inf LaunchPad (MSP-EXP430G2) 0x0451 0xF432 430CDC.inf MSP-EXP430FR5739 0x0451 0xF432 430CDC.inf MSP-EXP430F5529 0x0451 0xF432 430CDC.inf (1) The older MSP-FET430UIF used with IAR versions before v5.20.x and CCS versions before v5.1 has VID 0x0451 and PID 0xF430. With the firmware update, it is updated to the 0x2047 and 0x0010, respectively. 1. Before connecting of the USB Debug Interface with a USB cable to a USB port of the PC the one of IDEs (CCS or IAR) should be installed. The IDE installation isntalls also drivers for USB Debug Interfaces without user interaction. After IDE installation the USB Debug Interface can be connected and will be ready to work within few seconds. 2. The driver can be also installed manually. After plug in the USB Debug Interface to USB port of the PC the Hardware Wizard starts automatically and opens the "Found New Hardware Wizard" window. 3. Select "Install from a list or specific location (Advanced)" (see Figure C-1). Figure C-1. Windows XP Hardware Wizard 166 Hardware Installation Guide SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware Installation 4. Browse to the folder where the driver information files are located (see Figure C-2). For CCS, the default folder is: c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_CDC, or c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_FET_XP_XX, or c:\ti\ccsv5\ccs_base\emulation\drivers\msp430\USB_eZ-RF depending of firmware version of the tool. For IAR Embedded Workbench, the default folder is: \Embedded Workbench x.x\430\drivers\TIUSBFET\eZ430-UART, or \Embedded Workbench x.x\430\drivers\. Figure C-2. Windows XP Driver Location Selection Folder 5. The Wizard generates a message that an appropriate driver has been found. SLAU278R–May 2009–Revised May 2014 Hardware Installation Guide 167 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware Installation www.ti.com 6. The wizard installs the driver files. 7. The wizard shows a message that it has finished the installation of the software USB Debug Interface. 8. The USB debug interface is installed and ready to use. The Device Manager lists a new entry as shown in Figure C-3, Figure C-4, or Figure C-5. Figure C-3. Device Manager Using USB Debug Interface using VID/PID 0x2047/0x0010 168 Hardware Installation Guide SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Hardware Installation Figure C-4. Device Manager Using USB Debug Interface with VID/PID 0x0451/0xF430 SLAU278R–May 2009–Revised May 2014 Hardware Installation Guide 169 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Hardware Installation www.ti.com Figure C-5. Device Manager Using USB Debug Interface With VID/PID 0x0451/0xF432 170 Hardware Installation Guide SLAU278R–May 2009–Revised May 2014 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated www.ti.com Revision History Revision History Changes from Q Revision (January 2014) to R Revision ............................................................................................... Page • In Table 1-1, added support for "BT5190, F5438A" to "eZ430-RF2560" column ............................................... 12 • Added Section 1.10...................................................................................................................... 14 • Added MSP-TS430RHB32A to Table 1-2 ............................................................................................ 15 • Added MSP-TS430PZ100D to Table 1-2............................................................................................. 16 • Added Section 1.17...................................................................................................................... 18 • Updated descriptive labels on all PCB figures in Appendix B ..................................................................... 31 • In Table B-1, updated Description for Position 13................................................................................... 35 • Added Section B.9 MSP-TS430RHB32A............................................................................................. 57 • In Table B-18, updated Description of Pos 20.1 and Comment of Pos 15. ...................................................... 80 • In Table B-28, corrected the device in the Description column for Pos. 22 .................................................... 113 • Added Section B.29 MSP-TS430PZ100D .......................................................................................... 121 • In Table B-33, corrected the device in the Description column for Pos. 22 .................................................... 129 • Added Section B.36 and all of its subsections ..................................................................................... 146 • Added rows for MSP-FET and eZ-FET to Table C-1.............................................................................. 166 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. SLAU278R–May 2009–Revised May 2014 Revision History 171 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. 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Hardware User Guide AT90USBKey Hardware User Guide User Guide 1 7627A–AVR–04/06 Section 1 Introduction ........................................................................................... 1-3 1.1 Overview ...................................................................................................1-3 1.2 AT90USBKey Features............................................................................1-4 Section 2 Using the AT90USBKey ....................................................................... 2-5 2.1 Overview ...................................................................................................2-5 2.2 Power Supply ............................................................................................2-6 2.3 Reset.........................................................................................................2-8 2.4 On-board Resources.................................................................................2-9 2.5 In-System Programming .........................................................................2-13 2.6 Debugging...............................................................................................2-14 Section 3 Troubleshooting Guide ....................................................................... 3-15 Section 4 Technical Specifications ..................................................................... 4-16 Section 5 Technical Support............................................................................... 5-17 Section 6 Complete Schematics......................................................................... 6-18 AT90USBKey Hardware User Guide 1-3 7627A–AVR–04/06 Section 1 Introduction Congratulations on acquiring the AVR® AT90USBKey. This kit is designed to give designers a quick start to develop code on the AVR® and for prototyping and testing of new designs with the AT90USB microcontroller family. 1.1 Overview This document describes the AT90USBKey dedicated to the AT90USB AVR microcontroller. This board is designed to allow an easy evaluation of the product using demonstration software. To increase its demonstrative capabilities, this stand alone board has numerous onboard resources: USB, joystick, data-flash and temperature sensor. Figure 1-1 . AT90USBKey Introduction 1-4 AT90USBKey Hardware User Guide 7627A–AVR–04/06 1.2 AT90USBKey Features The AT90USBKey provides the following features: 􀀀 AT90USB QFN64 􀀀 AVR Studio® software interface (1) 􀀀 USB software interface for Device Firmware Upgrade (DFU bootloader) (2) 􀀀 Power supply flagged by “VCC-ON” LED: – regulated 3.3V – from an external battery connector (for reduced host or OTG operation) – from the USB interface (USB device bus powered application) 􀀀 JTAG interface (connector not mounted): – for on-chip ISP – for on-chip debugging using JTAG ICE 􀀀 Serial interfaces: – 1 USB full/low speed device/host/OTG interface 􀀀 On-board resources: – 4+1-ways joystick – 2 Bi-Color LEDs – temperature sensor – serial dataflash memories – all microcontroller I/O ports access on 2x8pin headers (not mounted) 􀀀 On-board RESET button 􀀀 On-board HWB button to force bootloader section execution at reset. 􀀀 System clock: – 8 MHz crystal Notes: 1. The AVRUSBKey is supported by AVR Studio®, version 4.12 or higher. For up-todate information on this and other AVR tool products, please consult our web site. The most recent version of AVR Studio®, AVR tools and this User Guide can be found in the AVR section of the Atmel web site, http://www.atmel.com. 2. ATMEL Flip®, In System Programming Version 3 or Higher shall be used for Device Firmware Upgrade. Please consult Atmel web site to retrieve the latex version of Flip and the DFU bootloader Hex file if needed. AT90USBKey Hardware User Guide 2-5 7627A–AVR–04/06 Section 2 Using the AT90USBKey This chapter describes the AVRUSBKey and all its resources. 2.1 Overview Figure 2-1 . AT90USBKey Overview Using the AT90USBKey 2-6 AT90USBKey Hardware User Guide 7627A–AVR–04/06 2.2 Power Supply 2.2.1 Power Supply Sources The on-board power supply circuitry allows two power supply configurations: 􀀀 from USB connector 􀀀 from battery connector USB powered When used as a USB device bus powered application, the AVRUSBKey can be directly powered via the USB VBUS power supply line. Battery powered The external battery connector should be used when the AT90USBKey is used as a USB host. This mode allows the AT90USBKey to provide a 5V power supply from its VBUS pin. – Need of a female battery clip – Input supply from 8 up to 15V DC (min. 100mA) Figure 2-2 . Power supply schematic VCC3 IN 1 GND 2 OUT 3 U5 LM340 VBUS VBAT D4 LL4148 - C16 4.7uF R19 124k 1% U3out=1.25*(1+(R15+R18)/R19) 100k 1% R18 D3 LL4148 C17 220nF VCC3 5V R15 100k 1% MTA Ext power supply 1 2 J8 C18 100nF OUT 1 IN 2 GND 3 OUT 4 FAULT SHDN 8 7 CC 6 SET 5 U4 LP3982 C15 33nF D6 LL4148 Using the AT90USBKey AT90USBKey Hardware User Guide 2-7 7627A–AVR–04/06 2.2.2 VBUS Generator When using the AT90USB microcontroller in USB host mode, the AT90USBKey should provide a 5V power supply over the VBUS pin of its USB mini AB connector. A couple of transistors allows the UVCON pin of the AT90USB to control the VBUS generation (See Figure 2-3). In this mode the AT90USBKey is powered by external battery power supply source. Figure 2-3 . VBUS generator schematic 2.2.3 “POWER-ON“ LED The POWER-ON LED (“D1”) is always lit when power is applied to AVRUSBKey regardless of the power supply source. R25 100k Q1 BC847B - C19 4.7uF R24 10k M1 FDV304P/FAI UVCON 5V VBUS Using the AT90USBKey 2-8 AT90USBKey Hardware User Guide 7627A–AVR–04/06 2.3 Reset Although the AT90USB has its on-chip RESET circuitry (c.f. AT90USB Datasheet, section “System Control and Reset), the AVRUSBKey provides to the AT90USB a RESET signal witch can come from two different sources: Figure 2-4 . Reset Implementation 2.3.1 Power-on RESET The on-board RC network acts as power-on RESET. 2.3.2 RESET Push Button By pressing the RESET push button on the AVRUSBKey, a warm RESET of the AT90USB is performed. 2.3.3 Main Clock XTAL To use the USB interface of the AT90USB, the clock source should always be a crystal or external clock oscillator (the internal 8MHz RC oscillator can not be used to operate with the USB interface). Only the following crystal frequency allows proper USB operations: 2MHz, 4MHz, 6MHz, 8MHz, 12MHz, 16MHz. The AT90USBKey comes with a default 8MHz crystal oscillator. RST VCC R6 47k C8 220nF RESET Using the AT90USBKey AT90USBKey Hardware User Guide 2-9 7627A–AVR–04/06 2.4 On-board Resources 2.4.1 USB The AVRUSBKey is supplied with a standard USB mini A-B receptacle. The mini AB receptacle allows to connect both a mini A plug or a mini B plug connectors. Figure 2-5 . USB mini A-B Receptacle When connected to a mini B plug, the AT90USB operates as an “USB device” (the ID pin of the plug is unconnected) and when connected to a mini A plug, the AT90USB operates as a “USB host” (the ID pin of the A plug is tied to ground). 2.4.2 Joystick The 4+1 ways joystick offers an easy user interface implementation for a USB application (it can emulate mouse movements, keyboard inputs...). Pushing the push-button causes the corresponding signal to be pulled low, while releasing (not pressed) causes an H.Z state on the signal. The user must enable internal pull-ups on the microcontroller input pins, removing the need for an external pull-up resistors on the push-button. Figure 2-6 . Joystick Schematic C7 1uF VBUS R4 0 GND VBUS 1-V_BUS 3-D+ 2-D- 4-ID 5-GND SHIELD USB_MiniAB J3 VBUS VBUS GND R3 22 R2 22 D+ DUID CR1 CR2 UCAP Select 5 Lef t 7 Up 3 Right 6 Down 4 Com1 1 Com2 2 SW3 TPA511G PE[7..0] PB[7..0] PB5 PB6 PB7 PE4 PE5 Using the AT90USBKey 2-10 AT90USBKey Hardware User Guide 7627A–AVR–04/06 2.4.3 LEDs The AT90USBKey includes 2 bi-color LEDs (green/red) implemented on one line. They are connected to the high nibble of “Port D” of AT90USB (PORTD[4..7]). To light on a LED, the corresponding port pin must drive a high level. To light off a LED, the corresponding port pin must drive a low level. Figure 2-7 . LEDs Implementation schematic Table 2-1 . Leds references 2.4.4 Temperature Sensor The temperature sensor uses a thermistor (R29), or temperature-sensitive resistor. This thermistor have a negative temperature coefficient (NTC), meaning the resistance goes up as temperature goes down. Of all passive temperature measurement sensors, thermistors have the highest sensitivity (resistance change per degree of temperature change). Thermistors do not have a linear temperature/resistance curve. The voltage over the NTC can be found using the A/D converter (connected to channel 0). See the AT90USB Datasheet for how to use the ADC. The thermistor value (RT) is calculate with the following expression: Where: RT = Thermistor value (Ω) at T temperature (°Kelvin) RH = Second resistor of the bridge -100 KΩ ±10% at 25°C VADC0 = Voltage value on ADC-0 input (V) VCC = Board power supply LED Reference AT90USB Connection Color D2 PORTD.4 Red PORTD.5 Green D5 PORTD.6 Green PORTD.7 Red D2 D5 1k R14 1k R17 LEDs In-line Grouped LEDs PD4 PD5 PD7 PD[7..0] PD6 1k R22 1k R23 RT (RH ⋅ VADC0) VCC VADC0 – = ⁄ ( ) Using the AT90USBKey AT90USBKey Hardware User Guide 2-11 7627A–AVR–04/06 The NTC thermistor used in AT90USBKey has a resistance of 100 KΩ ±5% at 25°C (T0) and a beta-value of 4250 ±3%. By the use of the following equation, the temperature (T) can be calculated: Where: RT = Thermistor value (Ω) at T temperature (°Kelvin) ß = 4250 ±3% R0 = 100 KΩ ±5% at 25°C T0 = 298 °K (273 °K + 25°K) The following cross table also can be used. It is based on the above equation. Table 2-2 . Thermistor Values versus Temperature Temp. (°C) RT (KΩ) Temp. (°C) RT (KΩ) Temp. (°C) RT (KΩ) Temp. (°C) RT (KΩ) -20 1263,757 10 212,958 40 50,486 70 15,396 -19 1182,881 11 201,989 41 48,350 71 14,851 -18 1107,756 12 191,657 42 46,316 72 14,329 -17 1037,934 13 181,920 43 44,380 73 13,828 -16 973,006 14 172,740 44 42,537 74 13,347 -15 912,596 15 164,083 45 40,781 75 12,885 -14 856,361 16 155,914 46 39,107 76 12,442 -13 803,984 17 148,205 47 37,513 77 12,017 -12 755,175 18 140,926 48 35,992 78 11,608 -11 709,669 19 134,051 49 34,542 79 11,215 -10 667,221 20 127,555 50 33,159 80 10,838 -9 627,604 21 121,414 51 31,840 81 10,476 -8 590,613 22 115,608 52 30,580 82 10,128 -7 556,056 23 110,116 53 29,378 83 9,793 -6 523,757 24 104,919 54 28,229 84 9,471 -5 493,555 25 100,000 55 27,133 85 9,161 -4 465,300 26 95,342 56 26,085 86 8,863 -3 438,854 27 90,930 57 25,084 87 8,576 -2 414,089 28 86,750 58 24,126 88 8,300 -1 390,890 29 82,787 59 23,211 89 8,035 0 369,145 30 79,030 60 22,336 90 7,779 1 348,757 31 75,466 61 21,498 91 7,533 2 329,630 32 72,085 62 20,697 92 7,296 3 311,680 33 68,876 63 19,930 93 7,067 4 294,826 34 65,830 64 19,196 94 6,847 T β RT R0 ⎝ ln-------⎠ ⎛ ⎞ β T0 + ------ = ------------------------------- Using the AT90USBKey 2-12 AT90USBKey Hardware User Guide 7627A–AVR–04/06 Figure 2-8 . Thermistor Schematic 2.4.5 Data Flash memory For mass-storage class demonstration purpose, the AT90USBKey provides two on-chip serial Flash memories (AT45DB642D) connected to the AT90USB Serial Port Interface (SPI). The data-flash chip select signals are connected to PortE bit 0 and bit 1 of the AT90USB (See Figure 2-9). Figure 2-9 . On-board data flash schematic 5 278,995 35 62,937 65 18,493 95 6,635 6 264,119 36 60,188 66 17,820 96 6,430 7 250,134 37 57,576 67 17,174 97 6,233 8 236,981 38 55,093 68 16,556 98 6,043 9 224,606 39 52,732 69 15,964 99 5,860 Temp. (°C) RT (KΩ) Temp. (°C) RT (KΩ) Temp. (°C) RT (KΩ) Temp. (°C) RT (KΩ) PF[7..0] R29 R27 100k PF0 VCC PE0 VCC3 VCC3 PB[7..0] PB1 R9 100k RESET PB3 PB2 SI 1 SCK 2 RESET 3 CS 4 WP VCC 5 GND 6 SO 7 8 U2 AT45DB642D CASON8 PE1 VCC3 VCC3 RESET PB1 R10 100k PB3 PB2 SI 1 SCK 2 RESET 3 CS 4 WP VCC 5 GND 6 SO 7 8 U3 AT45DB642D CASON8 R12 100k R11 100k Using the AT90USBKey AT90USBKey Hardware User Guide 2-13 7627A–AVR–04/06 2.5 In-System Programming 2.5.1 Programming with USB bootloader: DFU (Device Firmware Upgrade) AT90USB part comes with a default factory pre-programmed USB bootloader located in the on-chip boot section of the AT90USB. This is the easiest and fastest way to reprogram the device directly over the USB interface. The “Flip” PC side application, is available from the Atmel website, offers a flexible an user friendly interface to reprogram the application over the USB bus. The HWB pin of the AT90USB allows to force the bootloader section execution after reset. (Refer to AT90USB datasheet section “boot loader support”). To force bootloader execution, operate as follow: 􀀀 Press both “RST” and “HWB” push buttons 􀀀 First release the “RST” push button 􀀀 Release the “HWB” push button For more information about the USB bootloader and “Flip” application, please refer to the “USB bootloader datasheet document” and “Flip’s user manual”. Note: The HWB pin is active only if the HWBE fuse is set (default factory configuration). 2.5.2 Programming with AVR JTAGICEmKII The AT90USB can be programmed using specific JTAG link. To use the AVR JTAGICEmkII with an AT90USBKey an optional HE10 connector should be soldered to J9 footprint. Then the JTAG probe can be connected to the AT90USBKey as shown in Figure 2-10. Note: When the JTAGEN Fuse is unprogrammed, the four TAP pins are normal port pins, and the TAP controller is in reset. When programmed, the input TAP signals are internally pulled high and the JTAG is enabled for Boundary-scan and programming. The AT90USB device is shipped with this fuse programmed. Using the AT90USBKey 2-14 AT90USBKey Hardware User Guide 7627A–AVR–04/06 Figure 2-10 . Connecting AVR JTAG ICE to AVRUSBKey The Flash, EEPROM and all Fuse and Lock Bit options ISP-programmable can be programmed individually or with the sequential automatic programming option. Note: See AVR Studio® on-line Help for information. 2.6 Debugging 2.6.1 Debugging with AVR JTAG ICE mkII The AT90USBKey can be used for debugging with JTAG ICE MK II. Connect the JTAG ICE mkII as shown in Figure 2-10, for debugging, please refer to AVR Studio® Help information. When using JTAG ICE MK II for debugging, and as AT90USB parts are factory configured with the higher security level set, a chip erase operation will be performed on the part before debugging. Thus the on-chip flash bootloader will be erased. It can be restored after the debug session using the bootloader hex file available from ATMEL website. AT90USBKey Hardware User Guide 3-15 7627A–AVR–04/06 Section 3 Troubleshooting Guide Figure 3-1 . Troubleshooting Guide Problem Reason Solution The Green “VCC-ON” LED is not on No power supply Verify the power supply source (check AVRUSBKey does not battery charge or USB connection). work The AT90USB cannot be programmed The AVR JTAG ICE probe is not connected Connect the JTAG ICE 10-PIN header to the correct AVRUSBKey JTAG header (page 13) The memory lock bits are programmed Erase the memory before programming with JTAG ICE. The fuse bits are wrongly programmed Check the fuse bits with JTAG ICE Can not connect to USB bootloader Force bootloader execution with HWB under reset. USB bootloader erased after a JTAG debugging session: reprogram the USB bootloader with JTAG. AVR Studio does not detect the AVR JTAG ICE. Serial/USB cable is not connected, or power is off Connect serial cable to RS232 (STK500 - AVR ISP) and check power connections Connect serial cable to USB (JATG ICE MKII, AVR ISPmkIIl) and check power connections PC COM port is in use Disable other programs that are using PC COM port. Change PC COM port AVR Studio does not detect COM port. Disable COM port auto-detection in AVR Studio file menu. Force COM port to correct COM port AT90USBKey Hardware User Guide 4-16 7627A–AVR–04/06 Section 4 Technical Specifications 􀀀 System Unit – Physical Dimensions.....................................................L=90 x W=30 x H=8 mm – Weight ...........................................................................................................12 g 􀀀 Operating Conditions – Internal Voltage Supply ............................................................................... 3.3V – External Voltage Supply .........................................................................8V -15V 􀀀 Connections – USB Connector ......................................................................Mini AB receptacle – USB Communications .......................................................Full speed/low speed – JTAG Connector.................................................... Footprint for HE10 connector – All ports connectors.............................................................J1, J2, J4, J5, J6, J7 – Battery connector ....................................................................... MTA right angle AT90USBKey Hardware User Guide 5-17 7627A–AVR–04/06 Section 5 Technical Support For Technical support, please contact avr@atmel.com. When requesting technical support, please include the following information: 􀀀 Which target AVR device is used (complete part number) 􀀀 Target voltage and speed 􀀀 Clock source and fuse setting of the AVR 􀀀 Programming method (ISP, JTAG or specific Boot-Loader) 􀀀 Hardware revisions of the AVR tools, found on the PCB 􀀀 Version number of AVR Studio. This can be found in the AVR Studio help menu. 􀀀 PC operating system and version/build 􀀀 PC processor type and speed 􀀀 A detailed description of the problem AT90USBKey Hardware User Guide 6-18 7627A–AVR–04/06 Section 6 Complete Schematics On the next pages, the following documents of AT90USBKey are shown: 􀀀 Complete schematics, 􀀀 Bill of materials. Complete Schematics AT90USBKey Hardware User Guide 6-19 7627A–AVR–04/06 Figure 6-1 . Schematics, 1 of 2 C7 1uF C3216-A VBUS RST RST DTSM-3 AVCC PD[7..0] PD[7..0] PA0 UCAP Capacitor Closed to the MCU VCC PA1 R4 0 R0603 PE0 PF7 PE2 PE1 PE4 PE3 PE6 PE[7..0] PE5 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 J2 1.27 mm Dual H1.27-10 PE7 PA3 UGND (not mounted) PE2 VCC PA[7..0] PF0 PA2 RESET PA4 PF2 Reset Circuit UVCON VBUS PA5 HWB HWB DTSM-3 R1 0 R0603 PF4 RESET UGND R8 0 R0603 PA6 AGND C1 100nF C0603 PF1 UCAP PA7 (not mounted) (not mounted) (not mounted) PF3 PE2 PF[7..0] PC7 R5 0 R0603 VCC C9 220nF C0603 (not mounted) PE4 VCC PB[7..0] PB[7..0] PE5 PC6 VCC AVCC C2 100nF C0603 GND Title Size Document Number Rev Date: Sheet of 1.0.0 CPU A4 Monday , January 09, 2006 1 2 PE6 PF6 PC5 PD0 PD2 PD1 PD4 PD3 PD6 PD[7..0] PD5 (not mounted) 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 J4 1.27 mm Dual H1.27-10 PD7 PC4 QFN64 VCC PB0 VCC Ferrite & capacitors closed to the MCU PB0 PB2 PB1 PB4 PB1 PB3 PB6 PB[7..0] PB5 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 J6 1.27 mm Dual H1.27-10 PB7 PA0 1-V_BUS 3-D+ 2-D- 4-ID 5-GND SHIELD USB_MiniABF J3 MINI_USBC PA2 PA1 PA4 PA3 PA6 PA[7..0] PB2 PA5 PC3 PF[7..0] 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 J7 1.27 mm Dual H1.27-10 PA7 R6 47k R0603 PE7 2 UVcc 3 D- 4 D+ 5 UGND 6 UCAP 7 VBUS 8 PE3 9 PB0 10 PB1 11 PB2 12 PB3 13 PB4 14 PB5 15 PB6 16 PB7 17 PD0 25 PD1 26 PD2 27 PD3 28 PD4 29 PD5 30 PD6 31 PD7 32 PE4 18 PE5 19 AREF 62 RESET 20 GND 53 GND 63 GND 22 XTAL2 23 XTAL1 24 PE0 PE1 33 34 PE6 1 PE2 43 PC0 PC1 35 PC2 36 PC3 37 PC4 38 PC5 39 PC6 40 PC7 41 42 PA7 PA6 44 PA5 45 PA4 46 PA3 47 48 PA2 PA1 49 PA0 50 51 PF7 PF6 54 PF5 55 PF4 56 PF3 57 PF2 58 PF1 59 PF0 60 61 VCC 52 VCC 21 AVCC 64 AT90USB128 U1 QFN64 PB3 UVCON PE7 C5 100nF C0603 VCC DECOUPLING CAPACITORS CLOSED TO THE DEVICE VBUS MCU Pin3 PC2 PB4 Y1 8MHz CRYSTAL 8MHz 49US C11 15pF C0603 C10 15pF C0603 PC1 PB5 PC0 PC2 PC1 PC4 PC3 PC6 PC[7..0] PC5 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 J5 1.27 mm Dual H1.27-10 PC7 VBUS AREF PC0 PB6 PE[7..0] PE1 PB7 VCC PF0 PE0 C8 220nF C0603 UGND UGND PC[7..0] PC[7..0] C3 100nF C0603 GND PF1 R3 22 R0603 R7 47k R0603 R2 22 R0603 RESET D+ C4 100nF C0603 DUID PE3 PF2 A90USB Key VCC GND PD0 XTAL2 PD1 PD2 PF5 PF3 PD3 AGND CR1 PGB0010603 R0603 CR2 PGB0010603 R0603 PD4 XTAL1 VCC PD5 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 J1 1.27 mm Dual H1.27-10 PD6 DECOUPLING CAPACITORS CLOSED TO THE DEVICE MCU Pin52 RESISTORS CLOSED TO THE DEVICE PD7 PF4 VCC XTAL2 VCC UCAP PF7 UVCC D+ D- RESISTORS Closed to the MCU PF5 Bootloader Activation C6 100nF C0603 VCC PA[7..0] VCC AREF DECOUPLING CAPACITORS CLOSED TO THE DEVICE MCU Pin21 PF6 XTAL1 Complete Schematics 6-20 AT90USBKey Hardware User Guide 7627A–AVR–04/06 Figure 6-2 . Schematics, 2 of 2 PE0 VCC3 !!! R21 not mounted D2 IN 1 GND 2 OUT 3 U5 LM340 - C14 4.7uF VCC3 When mounting R21: R20 not mounted U4 not mounted Allows to generate 3.3V from U1 internal regulator CAUTION: R21 default not mounted !!! VBUS generator f or OTG/HOST mode 1F 1.0.0 Power & Interf aces A4 Saturday , February 18, 2006 2 2 1k R17 LEDs In-line Grouped LEDs PD4 PD5 PD7 PD[7..0] PD6 1k R22 C17 220nF VBat Mon. VCC 1k R23 VCC3 - C19 4.7uF 5V PE1 VCC3 VCC3 VCC3 DECOUPLING CAPACITOR CLOSE TO THE DEVICE C13 100nF RESET PB1 R10 100k PB3 PB2 SI 1 SCK 2 RESET 3 CS 4 WP VCC 5 GND 6 SO 7 8 U3 AT45DB642D CASON8 R12 100k R24 10k R15 100k 1% MTA Ext power supply 1 2 J8 C18 100nF VCC OUT 1 IN 2 GND 3 OUT 4 FAULT SHDN 8 7 CC 6 SET 5 U4 LP3982 C15 33nF R11 100k (not mounted) M1 D6 FDV304P/FAI LL4148 R16 0 R20 0 UCAP UVCON R21 0 VCC VBUS Complete Schematics AT90USBKey Hardware User Guide 6-21 7627A–AVR–04/06 Table 6-1 . Bill of material Item Q.ty Reference Part Tech. Characteristics Package 1 2 CR1,CR2 ESD protection (PGB0010603) 2 10 C1,C2,C3,C4,C5,C6,C12, C13, C18, C20 100nF 50V-10% Ceramic CASE 0603 3 1 C7 1uF 10Vmin ±10% EIA/IECQ 3216 4 3 C8,C9, C17 220nF 50V-10% Ceramic CASE 0603 5 2 C10, C11 15pF 50V-5% Ceramic CASE 0603 6 3 C14, C16, C19 4.7uF 10Vmin ±10% EIA/IECQ 3216 7 1 C15 33nF 50V-5% Ceramic CASE 0603 8 2 D2,D5 LED BI-COLOUR/ LSGT670 I=10 mA_ PLCC-4 9 1 D1 TOPLED/ LPM676-K2M1 I=10 mA_ PLCC-2 10 2 D3,D4 DII LL4148-7 i=200mA max LL-34 11 1 J3 USB mini AB receptacle Surface mount 12 0 J9 CON 2x5 (2.54mm) (Not Mounted) 13 0 J1,J2,J4,J5,J6,J7 1.27 mm Dual header (Not Mounted) 14 1 J8 Connector MTA 2 cts right angle 15 1 M1 FDV304P/FAI SOT23 16 1 Q1 BC847B IC peak=200mA SOT23 17 2 R2,R3 22 1/16W-5% SMD CASE 0603 18 1 R5 68k 1/16W-5% SMD CASE 0603 19 2 R6,R7 47k 1/16W-5% SMD CASE 0603 20 7 R1,R4,R5,R8,R16,R20, R26 0 CASE 0603 21 0 R21 0 (Not Mounted) CASE 0603 22 1 R28 220k 1/16W-5% SMD CASE 0603 23 7 R9,R10,R11,R12,R25,R27,R3 0 100k 1/16W-5% SMD CASE 0603 24 5 R13,R14,R17,R22,R23 1k 1/16W-5% SMD CASE 0603 25 2 R24,R28 10k 1/16W-5% SMD CASE 0603 26 1 R29 NCP18WF104J03RB 100K - ß=4250 CASE 0603 27 2 R15,R18 100k 1% 1/16W-1% SMD CASE 0603 28 1 R19 120k 1% 1/16W-1% SMD CASE 0603 29 2 SW1,SW2 PUSH-BUTTON / DTSM31N 6x3.5mm - 1.6N See DS 30 1 SW3 TPA511G 4 ways joystick + center CMS mount 31 1 U1 AT90USB1287 QFN64 32 2 U2,U3 AT45DB642D CASON8 33 1 U4 LP3982IMM-ADJ Vin Max 6V, 300mA MSOP8 34 1 U6 LM340MP5.0 35 1 Y1 8MHz CRYSTAL H=4mm HC49/4H Printed on recycled paper. 7627A–AVR–04/06 /xM © Atmel Corporation 2006. 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Copyright  2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1Y 2A 2Y 3A 3Y GND VCC 6A 6Y 5A 5Y 4A 4Y SN5404 . . . J PACKAGE SN54LS04, SN54S04 . . . J OR W PACKAGE SN7404, SN74S04 . . . D, N, OR NS PACKAGE SN74LS04 . . . D, DB, N, OR NS PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 2Y 2A VCC 3A 3Y 4A 1Y 6A 6Y GND 5Y 5A 4Y SN5404 . . . W PACKAGE (TOP VIEW) 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 6Y NC 5A NC 5Y 2A NC 2Y NC 3A SN54LS04, SN54S04 . . . FK PACKAGE (TOP VIEW) 1Y 1A NC 4Y 4A 6A 3Y GND NC NC − No internal connection VCC      !"   #!$% &"' &!   #" #" (" "  ") !" && *+' &! #", &"  ""%+ %!&" ",  %% #""'  #&! #%  - ./.010 %% #"" " ""& !%" ("*" "&'  %% (" #&! #&! #", &"  ""%+ %!&" ",  %% #""'          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN7404N SN7404N PDIP − N Tube SN74LS04N SN74LS04N Tube SN74S04N SN74S04N Tube SN7404D 7404 Tape and reel SN7404DR SOIC − D Tube SN74LS04D LS04 0°C to 70°C Tape and reel SN74LS04DR 0 70 Tube SN74S04D S04 Tape and reel SN74S04DR Tape and reel SN7404NSR SN7404 SOP − NS Tape and reel SN74LS04NSR 74LS04 Tape and reel SN74S04NSR 74S04 SSOP − DB Tape and reel SN74LS04DBR LS04 Tube SN5404J SN5404J Tube SNJ5404J SNJ5404J CDIP − J Tube SN54LS04J SN54LS04J Tube SN54S04J SN54S04J Tube SNJ54LS04J SNJ54LS04J −55°C to 125°C Tube SNJ54S04J SNJ54S04J Tube SNJ5404W SNJ5404W CFP − W Tube SNJ54LS04W SNJ54LS04W Tube SNJ54S04W SNJ54S04W LCCC − FK Tube SNJ54LS04FK SNJ54LS04FK Tube SNJ54S04FK SNJ54S04FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each inverter) INPUT A OUTPUT Y H L L H          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 logic diagram (positive logic) 1A 2A 3A 4A 5A 6A 1Y 2Y 3Y 4Y 5Y 6Y Y = A          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 schematics (each gate) Input A VCC Output Y GND 130 Ω 1 kΩ 1.6 kΩ ’04 4 kΩ Input A VCC Output Y GND 20 kΩ 120 Ω ’LS04 8 kΩ 12 kΩ 1.5 kΩ 3 kΩ 4 kΩ Input A VCC Output Y GND 2.8 kΩ 900 Ω ’S04 50 Ω 3.5 kΩ 250 Ω 500 Ω Resistor values shown are nominal.          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: ’04, ’S04 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V ’LS04 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. This are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Voltage values are with respect to network ground terminal. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN5404 SN7404 UNIT MIN NOM MAX MIN NOM MAX VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V IOH High-level output current −0.4 −0.4 mA IOL Low-level output current 16 16 mA TA Operating free-air temperature −55 125 0 70 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST SN5404 SN7404 CONDITIONS‡ UNIT MIN TYP§ MAX MIN TYP§ MAX VIK VCC = MIN, II = − 12 mA −1.5 −1.5 V VOH VCC = MIN, VIL = 0.8 V, IOH = −0.4 mA 2.4 3.4 2.4 3.4 V VOL VCC = MIN, VIH = 2 V, IOL = 16 mA 0.2 0.4 0.2 0.4 V II VCC = MAX, VI = 5.5 V 1 1 mA IIH VCC = MAX, VI = 2.4 V 40 40 μA IIL VCC = MAX, VI = 0.4 V −1.6 −1.6 mA IOS¶ VCC = MAX −20 −55 −18 −55 mA ICCH VCC = MAX, VI = 0 V 6 12 6 12 mA ICCL VCC = MAX, VI = 4.5 V 18 33 18 33 mA ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. § All typical values are at VCC = 5 V, TA = 25°C. ¶ Not more than one output should be shorted at a time.          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1) FROM TO SN5404 PARAMETER SN7404 (INPUT) (OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT tPLH A Y RL = 400 Ω, CL = 15 pF 12 22 ns tPHL 8 15 recommended operating conditions (see Note 3) SN54LS04 SN74LS04 UNIT MIN NOM MAX MIN NOM MAX VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.7 0.8 V IOH High-level output current −0.4 −0.4 mA IOL Low-level output current 4 8 mA TA Operating free-air temperature −55 125 0 70 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS† SN54LS04 SN74LS04 UNIT MIN TYP‡ MAX MIN TYP‡ MAX VIK VCC = MIN, II = − 18 mA −1.5 −1.5 V VOH VCC = MIN, VIL = MAX, IOH = −0.4 mA 2.5 3.4 2.7 3.4 V VOL VCC = MIN, VIH = 2 V IOL = 4 mA 0.25 0.4 0.4 V IOL = 8 mA 0.25 0.5 II VCC = MAX, VI = 7 V 0.1 0.1 mA IIH VCC = MAX, VI = 2.7 V 20 20 μA IIL VCC = MAX, VI = 0.4 V −0.4 −0.4 mA IOS§ VCC = MAX −20 −100 −20 −100 mA ICCH VCC = MAX, VI = 0 V 1.2 2.4 1.2 2.4 mA ICCL VCC = MAX, VI = 4.5 V 3.6 6.6 3.6 6.6 mA † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ All typical values are at VCC = 5 V, TA = 25°C. § Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second. switching characteristics, VCC = 5 V, TA = 25°C (see Figure 2) FROM TO SN54LS04 PARAMETER SN74LS04 (INPUT) (OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT tPLH A Y RL = 2 kΩ, CL = 15 pF 9 15 ns tPHL 10 15          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 recommended operating conditions (see Note 3) SN54S04 SN74S04 UNIT MIN NOM MAX MIN NOM MAX VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V IOH High-level output current −1 −1 mA IOL Low-level output current 20 20 mA TA Operating free-air temperature −55 125 0 70 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS† SN54S04 SN74S04 UNIT MIN TYP‡ MAX MIN TYP‡ MAX VIK VCC = MIN, II = − 18 mA −1.2 −1.2 V VOH VCC = MIN, VIL = 0.8 V, IOH = −1 mA 2.5 3.4 2.7 3.4 V VOL VCC = MIN, VIH = 2 V, IOL = 20 mA 0.5 0.5 V II VCC = MAX, VI = 5.5 V 1 1 mA IIH VCC = MAX, VI = 2.7 V 50 50 μA IIL VCC = MAX, VI = 0.5 V −2 −2 mA IOS§ VCC = MAX −40 −100 −40 −100 mA ICCH VCC = MAX, VI = 0 V 15 24 15 24 mA ICCL VCC = MAX, VI = 4.5 V 30 54 30 54 mA † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ All typical values are at VCC = 5 V, TA = 25°C. § Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second. switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1) FROM TO SN54S04 PARAMETER SN74S04 (INPUT) (OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT tPLH A Y RL = 280 Ω, CL = 15 pF 3 4.5 ns tPHL 3 5 tPLH A Y RL = 280 Ω, CL = 50 pF 4.5 ns tPHL 5          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION SERIES 54/74 AND 54S/74S DEVICES tPHL tPLH tPLH tPHL LOAD CIRCUIT FOR 3-STATE OUTPUTS High-Level Pulse Low-Level Pulse VOLTAGE WAVEFORMS PULSE DURATIONS Input Out-of-Phase Output (see Note D) 3 V 0 V VOL VOH VOH VOL In-Phase Output (see Note D) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCC RL Test Point From Output Under Test CL (see Note A) LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 2-STATE TOTEM-POLE OUTPUTS (see Note B) VCC RL From Output Under Test CL (see Note A) Test Point (see Note B) VCC RL From Output Under Test CL (see Note A) Test Point 1 kΩ NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL. E. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO≈ 50 Ω; tr and tf ≤ 7 ns for Series 54/74 devices and tr and tf ≤ 2.5 ns for Series 54S/74S devices. F. The outputs are measured one at a time, with one input transition per measurement. S1 S2 tPHZ tPZL tPLZ tPZH 3 V 3 V 0 V 0 V th tsu VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Timing Input Data Input 3 V 0 V Output Control (low-level enabling) Waveform 1 (see Notes C and D) Waveform 2 (see Notes C and D) ≈1.5 V VOH − 0.5 V VOL + 0.5 V ≈1.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V tw 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V VOH VOL Figure 1. Load Circuits and Voltage Waveforms          SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 PARAMETER MEASUREMENT INFORMATION SERIES 54LS/74LS DEVICES tPHL tPLH tPLH tPHL LOAD CIRCUIT FOR 3-STATE OUTPUTS High-Level Pulse Low-Level Pulse VOLTAGE WAVEFORMS PULSE DURATIONS Input Out-of-Phase Output (see Note D) 3 V 0 V VOL VOH VOH VOL In-Phase Output (see Note D) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCC RL Test Point From Output Under Test CL (see Note A) LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 2-STATE TOTEM-POLE OUTPUTS (see Note B) VCC RL From Output Under Test CL (see Note A) Test Point (see Note B) VCC RL From Output Under Test CL (see Note A) Test Point 5 kΩ NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL. E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples. F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 1.5 ns, tf ≤ 2.6 ns. G. The outputs are measured one at a time, with one input transition per measurement. S1 S2 tPHZ tPZL tPLZ tPZH 3 V 3 V 0 V 0 V th tsu VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Timing Input Data Input 3 V 0 V Output Control (low-level enabling) Waveform 1 (see Notes C and D) Waveform 2 (see Notes C and D) ≈1.5 V VOH − 0.5 V VOL + 0.5 V ≈1.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V tw 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V VOL VOH Figure 2. Load Circuits and Voltage Waveforms PACKAGE OPTION ADDENDUM www.ti.com 2-May-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples JM38510/00105BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 00105BCA JM38510/00105BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 00105BDA JM38510/07003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 07003BCA JM38510/07003BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 07003BDA JM38510/30003B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 30003B2A JM38510/30003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003BCA JM38510/30003BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003BDA JM38510/30003SCA ACTIVE CDIP J 14 25 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003SCA JM38510/30003SDA ACTIVE CFP W 14 25 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003SDA M38510/00105BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 00105BCA M38510/00105BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 00105BDA M38510/07003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 07003BCA M38510/30003B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 30003B2A M38510/30003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003BCA M38510/30003BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003BDA M38510/30003SCA ACTIVE CDIP J 14 25 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003SCA M38510/30003SDA ACTIVE CFP W 14 25 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 30003SDA PACKAGE OPTION ADDENDUM www.ti.com 2-May-2014 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples SN5404J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN5404J SN54LS04J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS04J SN54S04J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54S04J SN7404D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7404 SN7404DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7404 SN7404DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7404 SN7404DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7404 SN7404DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7404 SN7404DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7404 SN7404N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN7404N SN7404N3 OBSOLETE PDIP N 14 TBD Call TI Call TI 0 to 70 SN7404NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN7404N SN74LS04D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS04 SN74LS04DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS04 SN74LS04DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS04 SN74LS04DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS04 SN74LS04DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS04 SN74LS04DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS04 SN74LS04J OBSOLETE CDIP J 14 TBD Call TI Call TI 0 to 70 PACKAGE OPTION ADDENDUM www.ti.com 2-May-2014 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples SN74LS04N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS04N SN74LS04N3 OBSOLETE PDIP N 14 TBD Call TI Call TI 0 to 70 SN74LS04NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS04N SN74LS04NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS04 SN74LS04NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS04 SN74S04D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S04 SN74S04DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S04 SN74S04DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S04 SN74S04DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S04 SN74S04DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S04 SN74S04DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S04 SN74S04N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S04N SN74S04N3 OBSOLETE PDIP N 14 TBD Call TI Call TI 0 to 70 SN74S04NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S04N SN74S04NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74S04 SN74S04NSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74S04 SN74S04NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74S04 SNJ5404J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ5404J SNJ5404W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ5404W PACKAGE OPTION ADDENDUM www.ti.com 2-May-2014 Addendum-Page 4 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples SNJ54LS04FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54LS 04FK SNJ54LS04J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS04J SNJ54LS04W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS04W SNJ54S04FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54S 04FK SNJ54S04J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S04J SNJ54S04W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S04W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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OTHER QUALIFIED VERSIONS OF SN5404, SN54LS04, SN54LS04-SP, SN54S04, SN7404, SN74LS04, SN74S04 : • Catalog: SN7404, SN74LS04, SN54LS04, SN74S04 • Military: SN5404, SN54LS04, SN54S04 • Space: SN54LS04-SP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant SN7404DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LS04DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74S04DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74S04NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN7404DR SOIC D 14 2500 367.0 367.0 38.0 SN74LS04DR SOIC D 14 2500 367.0 367.0 38.0 SN74S04DR SOIC D 14 2500 367.0 367.0 38.0 SN74S04NSR SO NS 14 2000 367.0 367.0 38.0 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2014, Texas Instruments Incorporated 1FEATURES 1 2 3 4 5 6 7 8 2IN+ 2IN– 2OUT V CC+ V CC– 1IN+ 1IN– 1OUT NE5532, NE5532A . . . D, P, OR PS PACKAGE SA5532, SA5532A . . . D OR P PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION NE5532, NE5532A SA5532, SA5532A www.ti.com................................................................................................................................................... SLOS075I–NOVEMBER 1979–REVISED APRIL 2009 DUAL LOW-NOISE OPERATIONAL AMPLIFIERS · Equivalent Input Noise Voltage: 5 nV/√Hz Typ at 1 kHz · Unity-Gain Bandwidth: 10 MHz Typ · Common-Mode Rejection Ratio: 100 dB Typ · High DC Voltage Gain: 100 V/mV Typ · Peak-to-Peak Output Voltage Swing 26 V Typ With VCC± = ±15 V and RL = 600 Ω · High Slew Rate: 9 V/ms Typ The NE5532, NE5532A, SA5532, and SA5532A are high-performance operational amplifiers combining excellent dc and ac characteristics. They feature very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, high slew rate, input-protection diodes, and output short-circuit protection. These operational amplifiers are compensated internally for unity-gain operation. These devices have specified maximum limits for equivalent input noise voltage. ORDERING INFORMATION(1) TA PACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING NE5532P NE5532P PDIP – P Tube of 50 NE5532AP NE5532AP Tube of 75 NE5532D N5532 Reel of 2500 NE5532DR 0°C to 70°C SOIC – D Tube of 75 NE5532AD N5532A Reel of 2500 NE5532ADR NE5532PSR N5532 SOP – PS Reel of 2000 NE5532APSR N5532A SA5532P SA5532P PDIP – P Tube of 50 SA5532AP SA5532AP Tube of 75 SA5532D –40°C to 85°C SA5532 Reel of 2500 SA5532DR SOIC – D Tube of 75 SA5532AD SA5532A Reel of 2500 SA5532ADR (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 1979–2009, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. OUT VCC– VCC+ 36 pF 37 pF 14 pF 7 pF 15 W 460 W 15 W IN+ IN– Component values shown are nominal. ABSOLUTE MAXIMUM RATINGS(1) NE5532, NE5532A SA5532, SA5532A SLOS075I–NOVEMBER 1979–REVISED APRIL 2009................................................................................................................................................... www.ti.com SCHEMATIC (EACH AMPLIFIER) over operating free-air temperature range (unless otherwise noted) VCC+ 22 V VCC Supply voltage(2) VCC– –22 V Input voltage, either input(2) (3) VCC± Input current(4) ±10 mA Duration of output short circuit(5) Unlimited D package 97°C/W qJA Package thermal impedance(6) (7) P package 85°C/W PS package 95°C/W TJ Operating virtual-junction temperature 150°C Tstg Storage temperature range –65°C to 150°C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–. (3) The magnitude of the input voltage must never exceed the magnitude of the supply voltage. (4) Excessive input current will flow if a differential input voltage in excess of approximately 0.6 V is applied between the inputs, unless some limiting resistance is used. (5) The output may be shorted to ground or either power supply. Temperature and/or supply voltages must be limited to ensure the maximum dissipation rating is not exceeded. (6) The package thermal impedance is calculated in accordance with JESD 51-7. (7) Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) - TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 2 Submit Documentation Feedback Copyright © 1979–2009, Texas Instruments Incorporated Product Folder Link(s): NE5532 NE5532A SA5532 SA5532A RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS NE5532, NE5532A SA5532, SA5532A www.ti.com................................................................................................................................................... SLOS075I–NOVEMBER 1979–REVISED APRIL 2009 MIN MAX UNIT VCC+ Supply voltage 5 15 V VCC– Supply voltage –5 –15 V NE5532, NE5532A 0 70 TA Operating free-air temperature °C SA5532, SA5532A –40 85 VCC± = ±15 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT TA = 25°C 0.5 4 VIO Input offset voltage VO = 0 mV TA = Full range(2) 5 TA = 25°C 10 150 IIO Input offset current nA TA = Full range(2) 200 TA = 25°C 200 800 IIB Input bias current nA TA = Full range(2) 1000 VICR Common-mode input-voltage range ±12 ±13 V V Maximum peak-to-peak output-voltage OPP swing RL ≥ 600 Ω, VCC± = ±15 V 24 26 V TA = 25°C 15 50 RL ≥ 600 Ω, VO = ±10 V Large-signal differential-voltage TA = Full range(2) 10 AVD amplification V/mV TA = 25°C 25 100 RL ≥ 2 kΩ, VO±10 V TA = Full range(2) 15 A Small-signal differential-voltage vd amplification f = 10 kHz 2.2 V/mV BOM Maximum output-swing bandwidth RL = 600 Ω, VO = ±10 V 140 kHz B1 Unity-gain bandwidth RL = 600 Ω, CL = 100 pF 10 MHz ri Input resistance 30 300 kΩ zo Output impedance AVD = 30 dB, RL = 600 Ω, f = 10 kHz 0.3 Ω CMRR Common-mode rejection ratio VIC = VICR min 70 100 dB k Supply-voltage rejection ratio SVR (ΔV VCC± = ±9 V to ±15 V, VO = 0 80 100 dB CC±/ΔVIO) IOS Output short-circuit current 10 38 60 mA ICC Total supply curent VO = 0, No load 8 16 mA Crosstalk attenuation (VO1/VO2) V01 = 10 V peak, f = 1 kHz 110 dB (1) All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. (2) Full temperature ranges are: –40°C to 85°C for the SA5532 and SA5532A, and 0°C to 70°C for the NE5532 and NE5532A. Copyright © 1979–2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): NE5532 NE5532A SA5532 SA5532A OPERATING CHARACTERISTICS NE5532, NE5532A SA5532, SA5532A SLOS075I–NOVEMBER 1979–REVISED APRIL 2009................................................................................................................................................... www.ti.com VCC± = ±15 V, TA = 25°C (unless otherwise noted) NE5532, SA5532 NE5532A, SA5532A PARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX SR Slew rate at unity gain 9 9 V/ms Overshoot factor VI = 100 mV, RL = 600 Ω, 10 10 % AVD = 1, CL = 100 pF f = 30 Hz 8 8 10 Vn Equivalent input noise voltage nV/√Hz f = 1 kHz 5 5 6 f = 30 Hz 2.7 2.7 In Equivalent input noise current pA/√Hz f = 1 kHz 0.7 0.7 4 Submit Documentation Feedback Copyright © 1979–2009, Texas Instruments Incorporated Product Folder Link(s): NE5532 NE5532A SA5532 SA5532A PACKAGE OPTION ADDENDUM www.ti.com 17-May-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples NE5532AD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532A NE5532ADE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532A NE5532ADG4 ACTIVE SOIC D 8 TBD Call TI Call TI 0 to 70 NE5532ADR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532A NE5532ADRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532A NE5532ADRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532A NE5532AIP OBSOLETE PDIP P 8 TBD Call TI Call TI -40 to 85 NE5532AP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 NE5532AP NE5532APE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 NE5532AP NE5532APSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532A NE5532APSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532A NE5532APSRG4 ACTIVE SO PS 8 TBD Call TI Call TI 0 to 70 NE5532D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532 NE5532DE4 ACTIVE SOIC D 8 TBD Call TI Call TI 0 to 70 NE5532DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532 NE5532DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 N5532 NE5532DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532 NE5532DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532 PACKAGE OPTION ADDENDUM www.ti.com 17-May-2014 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples NE5532IP OBSOLETE PDIP P 8 TBD Call TI Call TI -40 to 85 NE5532P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 NE5532P NE5532PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 NE5532P NE5532PSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532 NE5532PSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532 NE5532PSRG4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 N5532 SA5532AD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 SA5532A SA5532ADE4 ACTIVE SOIC D 8 TBD Call TI Call TI -40 to 85 SA5532ADG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 SA5532A SA5532ADR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 SA5532A SA5532ADRE4 ACTIVE SOIC D 8 TBD Call TI Call TI -40 to 85 SA5532ADRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 SA5532A SA5532AP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SA5532AP SA5532APE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SA5532AP SA5532D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 SA5532 SA5532DE4 ACTIVE SOIC D 8 TBD Call TI Call TI -40 to 85 SA5532DG4 ACTIVE SOIC D 8 TBD Call TI Call TI -40 to 85 SA5532DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 SA5532 SA5532DRE4 ACTIVE SOIC D 8 TBD Call TI Call TI -40 to 85 PACKAGE OPTION ADDENDUM www.ti.com 17-May-2014 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples SA5532DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 SA5532 SA5532P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SA5532P SA5532PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SA5532P (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. PACKAGE OPTION ADDENDUM www.ti.com 17-May-2014 Addendum-Page 4 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant NE5532ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 NE5532APSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 NE5532DR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1 NE5532DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 NE5532DRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 NE5532PSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SA5532ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SA5532DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 15-Oct-2013 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) NE5532ADR SOIC D 8 2500 340.5 338.1 20.6 NE5532APSR SO PS 8 2000 367.0 367.0 38.0 NE5532DR SOIC D 8 2500 364.0 364.0 27.0 NE5532DR SOIC D 8 2500 340.5 338.1 20.6 NE5532DRG4 SOIC D 8 2500 340.5 338.1 20.6 NE5532PSR SO PS 8 2000 367.0 367.0 38.0 SA5532ADR SOIC D 8 2500 340.5 338.1 20.6 SA5532DR SOIC D 8 2500 340.5 338.1 20.6 PACKAGE MATERIALS INFORMATION www.ti.com 15-Oct-2013 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2014, Texas Instruments Incorporated LM386 LM386 Low Voltage Audio Power Amplifier Literature Number: SNAS545A LM386 Low Voltage Audio Power Amplifier General Description The LM386 is a power amplifier designed for use in low voltage consumer applications. The gain is internally set to 20 to keep external part count low, but the addition of an external resistor and capacitor between pins 1 and 8 will increase the gain to any value from 20 to 200. The inputs are ground referenced while the output automatically biases to one-half the supply voltage. The quiescent power drain is only 24 milliwatts when operating from a 6 volt supply, making the LM386 ideal for battery operation. Features n Battery operation n Minimum external parts n Wide supply voltage range: 4V–12V or 5V–18V n Low quiescent current drain: 4mA n Voltage gains from 20 to 200 n Ground referenced input n Self-centering output quiescent voltage n Low distortion: 0.2% (AV = 20, VS = 6V, RL = 8W, PO = 125mW, f = 1kHz) n Available in 8 pin MSOP package Applications n AM-FM radio amplifiers n Portable tape player amplifiers n Intercoms n TV sound systems n Line drivers n Ultrasonic drivers n Small servo drivers n Power converters Equivalent Schematic and Connection Diagrams DS006976-1 Small Outline, Molded Mini Small Outline, and Dual-In-Line Packages DS006976-2 Top View Order Number LM386M-1, LM386MM-1, LM386N-1, LM386N-3 or LM386N-4 See NS Package Number M08A, MUA08A or N08E August 2000 LM386 Low Voltage Audio Power Amplifier © 2000 National Semiconductor Corporation DS006976 www.national.com Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (LM386N-1, -3, LM386M-1) 15V Supply Voltage (LM386N-4) 22V Package Dissipation (Note 3) (LM386N) 1.25W (LM386M) 0.73W (LM386MM-1) 0.595W Input Voltage ±0.4V Storage Temperature −65°C to +150°C Operating Temperature 0°C to +70°C Junction Temperature +150°C Soldering Information Dual-In-Line Package Soldering (10 sec) +260°C Small Outline Package (SOIC and MSOP) Vapor Phase (60 sec) +215°C Infrared (15 sec) +220°C See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. Thermal Resistance qJC (DIP) 37°C/W qJA (DIP) 107°C/W qJC (SO Package) 35°C/W qJA (SO Package) 172°C/W qJA (MSOP) 210°C/W qJC (MSOP) 56°C/W Electrical Characteristics (Notes 1, 2) TA = 25°C Parameter Conditions Min Typ Max Units Operating Supply Voltage (VS) LM386N-1, -3, LM386M-1, LM386MM-1 4 12 V LM386N-4 5 18 V Quiescent Current (IQ) VS = 6V, VIN = 0 4 8 mA Output Power (POUT) LM386N-1, LM386M-1, LM386MM-1 VS = 6V, RL = 8W, THD = 10% 250 325 mW LM386N-3 VS = 9V, RL = 8W, THD = 10% 500 700 mW LM386N-4 VS = 16V, RL = 32W, THD = 10% 700 1000 mW Voltage Gain (AV) VS = 6V, f = 1 kHz 26 dB 10 μF from Pin 1 to 8 46 dB Bandwidth (BW) VS = 6V, Pins 1 and 8 Open 300 kHz Total Harmonic Distortion (THD) VS = 6V, RL = 8W, POUT = 125 mW 0.2 % f = 1 kHz, Pins 1 and 8 Open Power Supply Rejection Ratio (PSRR) VS = 6V, f = 1 kHz, CBYPASS = 10 μF 50 dB Pins 1 and 8 Open, Referred to Output Input Resistance (RIN) 50 kW Input Bias Current (IBIAS) VS = 6V, Pins 2 and 3 Open 250 nA Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 3: For operation in ambient temperatures above 25°C, the device must be derated based on a 150°C maximum junction temperature and 1) a thermal resistance of 107°C/W junction to ambient for the dual-in-line package and 2) a thermal resistance of 170°C/W for the small outline package. LM386 www.national.com 2 Application Hints GAIN CONTROL To make the LM386 a more versatile amplifier, two pins (1 and 8) are provided for gain control. With pins 1 and 8 open the 1.35 kW resistor sets the gain at 20 (26 dB). If a capacitor is put from pin 1 to 8, bypassing the 1.35 kW resistor, the gain will go up to 200 (46 dB). If a resistor is placed in series with the capacitor, the gain can be set to any value from 20 to 200. Gain control can also be done by capacitively coupling a resistor (or FET) from pin 1 to ground. Additional external components can be placed in parallel with the internal feedback resistors to tailor the gain and frequency response for individual applications. For example, we can compensate poor speaker bass response by frequency shaping the feedback path. This is done with a series RC from pin 1 to 5 (paralleling the internal 15 kW resistor). For 6 dB effective bass boost: R . 15 kW, the lowest value for good stable operation is R = 10 kW if pin 8 is open. If pins 1 and 8 are bypassed then R as low as 2 kW can be used. This restriction is because the amplifier is only compensated for closed-loop gains greater than 9. INPUT BIASING The schematic shows that both inputs are biased to ground with a 50 kW resistor. The base current of the input transistors is about 250 nA, so the inputs are at about 12.5 mV when left open. If the dc source resistance driving the LM386 is higher than 250 kW it will contribute very little additional offset (about 2.5 mV at the input, 50 mV at the output). If the dc source resistance is less than 10 kW, then shorting the unused input to ground will keep the offset low (about 2.5 mV at the input, 50 mV at the output). For dc source resistances between these values we can eliminate excess offset by putting a resistor from the unused input to ground, equal in value to the dc source resistance. Of course all offset problems are eliminated if the input is capacitively coupled. When using the LM386 with higher gains (bypassing the 1.35 kW resistor between pins 1 and 8) it is necessary to bypass the unused input, preventing degradation of gain and possible instabilities. This is done with a 0.1 μF capacitor or a short to ground depending on the dc source resistance on the driven input. LM386 3 www.national.com Typical Performance Characteristics Quiescent Supply Current vs Supply Voltage DS006976-5 Power Supply Rejection Ratio (Referred to the Output) vs Frequency DS006976-12 Peak-to-Peak Output Voltage Swing vs Supply Voltage DS006976-13 Voltage Gain vs Frequency DS006976-14 Distortion vs Frequency DS006976-15 Distortion vs Output Power DS006976-16 Device Dissipation vs Output Power—4W Load DS006976-17 Device Dissipation vs Output Power—8W Load DS006976-18 Device Dissipation vs Output Power—16W Load DS006976-19 LM386 www.national.com 4 Typical Applications Amplifier with Gain = 20 Minimum Parts DS006976-3 Amplifier with Gain = 200 DS006976-4 Amplifier with Gain = 50 DS006976-6 Low Distortion Power Wienbridge Oscillator DS006976-7 Amplifier with Bass Boost DS006976-8 Square Wave Oscillator DS006976-9 LM386 5 www.national.com Typical Applications (Continued) Note 4: Twist Supply lead and supply ground very tightly. Note 5: Twist speaker lead and ground very tightly. Note 6: Ferrite bead in Ferroxcube K5-001-001/3B with 3 turns of wire. Note 7: R1C1 band limits input signals. Note 8: All components must be spaced very closely to IC. Frequency Response with Bass Boost DS006976-10 AM Radio Power Amplifier DS006976-11 LM386 www.national.com 6 Physical Dimensions inches (millimeters) unless otherwise noted SO Package (M) Order Number LM386M-1 NS Package Number M08A LM386 7 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead (0.118” Wide) Molded Mini Small Outline Package Order Number LM386MM-1 NS Package Number MUA08A LM386 www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com Dual-In-Line Package (N) Order Number LM386N-1, LM386N-3 or LM386N-4 NS Package Number N08E LM386 Low Voltage Audio Power Amplifier National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Audio www.ti.com/audio Communications and Telecom www.ti.com/communications Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps DLP® Products www.dlp.com Energy and Lighting www.ti.com/energy DSP dsp.ti.com Industrial www.ti.com/industrial Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical Interface interface.ti.com Security www.ti.com/security Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Mobile Processors www.ti.com/omap Wireless Connectivity www.ti.com/wirelessconnectivity TI E2E Community Home Page e2e.ti.com Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2011, Texas Instruments Incorporated LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1  2-kV ESD Protection for: − LM224K, LM224KA − LM324K, LM324KA − LM2902K, LM2902KV, LM2902KAV  Wide Supply Ranges − Single Supply . . . 3 V to 32 V (26 V for LM2902) − Dual Supplies . . . 1.5 V to 16 V (13 V for LM2902)  Low Supply-Current Drain Independent of Supply Voltage . . . 0.8 mA Typ  Common-Mode Input Voltage Range Includes Ground, Allowing Direct Sensing Near Ground  Low Input Bias and Offset Parameters − Input Offset Voltage . . . 3 mV Typ A Versions . . . 2 mV Typ − Input Offset Current . . . 2 nA Typ − Input Bias Current . . . 20 nA Typ A Versions . . . 15 nA Typ  Differential Input Voltage Range Equal to Maximum-Rated Supply Voltage . . . 32 V (26 V for LM2902)  Open-Loop Differential Voltage Amplification . . . 100 V/mV Typ  Internal Frequency Compensation description/ordering information These devices consist of four independent high-gain frequency-compensated operational amplifiers that are designed specifically to operate from a single supply over a wide range of voltages. Operation from split supplies also is possible if the difference between the two supplies is 3 V to 32 V (3 V to 26 V for the LM2902), and VCC is at least 1.5 V more positive than the input common-mode voltage. The low supply-current drain is independent of the magnitude of the supply voltage. Applications include transducer amplifiers, dc amplification blocks, and all the conventional operational-amplifier circuits that now can be more easily implemented in single-supply-voltage systems. For example, the LM124 can be operated directly from the standard 5-V supply that is used in digital systems and provides the required interface electronics, without requiring additional ±15-V supplies. PRODUCTION DATA information is current as of publication date. Copyright  2010, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1OUT 1IN− 1IN+ VCC 2IN+ 2IN− 2OUT 4OUT 4IN− 4IN+ GND 3IN+ 3IN− 3OUT LM124 . . . D, J, OR W PACKAGE LM124A . . . J OR W PACKAGE LM224, LM224A, LM224K, LM224KA . . . D OR N PACKAGE LM324, LM324K . . . D, N, NS, OR PW PACKAGE LM324A . . . D, DB, N, NS, OR PW PACKAGE LM324KA . . . D, N, NS, OR PW PACKAGE LM2902 . . . D, N, NS, OR PW PACKAGE LM2902K . . . D, DB, N, NS, OR PW PACKAGE LM2902KV, LM2902KAV . . . D OR PW PACKAGE (TOP VIEW) 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 4IN+ NC GND NC 3IN+ 1IN+ NC VCC NC 2IN+ LM124, LM124A . . . FK PACKAGE (TOP VIEW) 1IN− 1OUT NC 3IN− 4IN− 2IN− 2OUT NC NC − No internal connection 3OUT 4OUT On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ORDERING INFORMATION TA VIOmax AT 25°C MAX TESTED VCC PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP (N) Tube of 25 LM324N LM324N LM324KN LM324KN Tube of 50 LM324D Reel of 2500 LM324DR LM324 SOIC (D) Reel of 2500 LM324DRG3 Tube of 50 LM324KD LM324K 7 mV 30 V Reel of 2500 LM324KDR Reel of 2000 LM324NSR LM324 SOP (NS) Tube of 50 LM324KNS LM324K Reel of 2000 LM324KNSR Tube of 90 LM324PW L324 TSSOP (PW) Reel of 2000 LM324PWR Tube of 90 LM324KPW L324K 0°C to 70°C Reel of 2000 LM324KPWR PDIP (N) Tube of 25 LM324AN LM324AN Tube of 25 LM324KAN LM324KAN Tube of 50 LM324AD LM324A SOIC (D) Reel of 2500 LM324ADR Tube of 50 LM324KAD LM324KA Reel of 2500 LM324KADR 3 mV 30 V Reel of 2000 LM324ANSR LM324A SOP (NS) Tube of 50 LM324KANS LM324KA Reel of 2000 LM324KANSR SSOP (DB) Reel of 2000 LM324ADBR LM324A Tube of 90 LM324APW L324A TSSOP (PW) Reel of 2000 LM324APWR Tube of 90 LM324KAPW L324KA Reel of 2000 LM324KAPWR PDIP (N) Tube of 25 LM224N LM224N LM224KN LM224KN 5 mV 30 V Tube of 50 LM224D LM224 SOIC (D) Reel of 2500 LM224DR Tube of 50 LM224KD LM224K 25°C to 85°C Reel of 2500 LM224KDR −PDIP (N) Tube of 25 LM224AN LM224AN Tube of 25 LM224KAN LM224KAN 3 mV 30 V Tube of 50 LM224AD LM224A SOIC (D) Reel of 2500 LM224ADR Tube of 50 LM224KAD LM224KA Reel of 2500 LM224KADR † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 ORDERING INFORMATION (CONTINUED) TA VIOmax AT 25°C MAX TESTED VCC PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP (N) Tube of 25 LM2902N LM2902N Tube of 25 LM2902KN LM2902KN Tube of 50 LM2902D LM2902 SOIC (D) Reel of 2500 LM2902DR Tube of 50 LM2902KD LM2902K Reel of 2500 LM2902KDR Reel of 2000 LM2902NSR LM2902 26 V SOP (NS) Tube of 50 LM2902KNS LM2902K 7 mV Reel of 2000 LM2902KNSR −40°C to 125°C SSOP (DB) Tube of 80 LM2902KDB L2902K 40 125 Reel of 2000 LM2902KDBR Tube of 90 LM2902PW L2902 TSSOP (PW) Reel of 2000 LM2902PWR Tube of 90 LM2902KPW L2902K Reel of 2000 LM2902KPWR 32 V SOIC (D) Reel of 2500 LM2902KVQDR L2902KV TSSOP (PW) Reel of 2000 LM2902KVQPWR L2902KV 2 mV 32 V SOIC (D) Reel of 2500 LM2902KAVQDR L2902KA TSSOP (PW) Reel of 2000 LM2902KAVQPWR L2902KA CDIP (J) Tube of 25 LM124J LM124J CFP (W) Tube of 25 LM124W LM124W 5 mV 30 V LCCC (FK) Tube of 55 LM124FK LM124FK 55°C to 125°C SOIC (D) Tube of 50 LM124D −LM124 Reel of 2500 LM124DR CDIP (J) Tube of 25 LM124AJ LM124AJ 2 mV 30 V CFP (W) Tube of 25 LM124AW LM124AW LCCC (FK) Tube of 55 LM124AFK LM124AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. symbol (each amplifier) − + IN− IN+ OUT LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 schematic (each amplifier) To Other Amplifiers ≈6-μA Current Regulator VCC OUT GND IN− IN+ ≈100-μA Current Regulator ≈50-μA Current Regulator COMPONENT COUNT (total device) Epi-FET Transistors Diodes Resistors Capacitors 1 95 4 11 4 ≈6-μA Current Regulator † ESD protection cells - available on LM324K and LM324KA only † † LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† LM2902 ALL OTHER DEVICES UNIT Supply voltage, VCC (see Note 1) ±13 or 26 ±16 or 32 V Differential input voltage, VID (see Note 2) ±26 ±32 V Input voltage, VI (either input) −0.3 to 26 −0.3 to 32 V Duration of output short circuit (one amplifier) to ground at (or below) TA = 25°C, VCC ≤ 15 V (see Note 3) Unlimited Unlimited D package 86 86 DB package 96 96 Package thermal impedance, θJA (see Notes 4 and 5) N package 80 80 °C/W NS package 76 76 PW package 113 113 FK package 5.61 Package thermal impedance, JC (see Notes 6 and 7) J package 15.05 °C/W W package 14.65 Operating virtual junction temperature, TJ 150 150 °C Case temperature for 60 seconds FK package 260 °C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds J or W package 300 300 °C Storage temperature range, Tstg −65 to 150 −65 to 150 °C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values (except differential voltages and VCC specified for the measurement of IOS) are with respect to the network GND. 2. Differential voltages are at IN+, with respect to IN−. 3. Short circuits from outputs to VCC can cause excessive heating and eventual destruction. 4. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/JA. Operating at the absolute maximum TJ of 150°C can affect reliability. 5. The package thermal impedance is calculated in accordance with JESD 51-7. 6. Maximum power dissipation is a function of TJ(max), JC, and TC. The maximum allowable power dissipation at any allowable case temperature is PD = (TJ(max) − TC)/JC. Operating at the absolute maximum TJ of 150°C can affect reliability. 7. The package thermal impedance is calculated in accordance with MIL-STD-883. ESD protection TEST CONDITIONS TYP UNIT Human-Body Model LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV ±2 kV LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS† TA LM124 LM224 LM324 LM324K UNIT ‡ MIN TYP§ MAX MIN TYP§ MAX V Input offset voltage VCC = 5 V to MAX, 25°C 3 5 3 7 VIO mV VIC = VICRmin, VO = 1.4 V Full range 7 9 I Input offset current V 1 4 V 25°C 2 30 2 50 IIO VO = 1.4 nA Full range 100 150 I Input bias current V 1 4 V 25°C −20 −150 −20 −250 IIB VO = 1.4 nA Full range −300 −500 25°C 0 to 0 to V Common-mode V 5 V to MAX VCC − 1.5 VCC − 1.5 VICR V input voltage range VCC = Full range 0 to 0 to VCC − 2 VCC − 2 RL = 2 kΩ 25°C VCC − 1.5 VCC − 1.5 V High-level RL = 10 kΩ 25°C VOH V output voltage V MAX RL = 2 kΩ Full range 26 26 p g VCC = RL ≥ 10 kΩ Full range 27 28 27 28 VOL Low-level output voltage RL ≤ 10 kΩ Full range 5 20 5 20 mV A Large-signal differential voltage VCC = 15 V, VO = 1 V to 11 V, 25°C 50 100 25 100 AVD V/mV amplification RL ≥ 2 kΩ Full range 25 15 CMRR Common-mode rejection ratio VIC = VICRmin 25°C 70 80 65 80 dB k Supply-voltage kSVR rejection ratio 25°C 65 100 65 100 dB (ΔVCC /ΔVIO) VO1/VO2 Crosstalk attenuation f = 1 kHz to 20 kHz 25°C 120 120 dB VCC = 15 V, V 1 V Source CC 25°C −20 −30 −60 −20 −30 −60 VID = V, VO = 0 Full range −10 −10 mA IO Output current VCC = 15 V, V 1 V Sink 25°C 10 20 10 20 O p CC VID = −V, VO = 15 V Full range 5 5 VID = −1 V, VO = 200 mV 25°C 12 30 12 30 μA IOS Short-circuit output current VCC at 5 V, GND at −5 V VO = 0, 25°C ±40 ±60 ±40 ±60 mA Supply current VO = 2.5 V, No load Full range 0.7 1.2 0.7 1.2 ICC (four amplifiers) VCC = MAX, VO = 0.5 VCC, No load Full range 1.4 3 1.4 3 mA † All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. MAX VCC for testing purposes is 26 V for LM2902 and 30 V for the others. ‡ Full range is −55°C to 125°C for LM124, −25°C to 85°C for LM224, and 0°C to 70°C for LM324. § All typical values are at TA = 25°C. LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS† T ‡ LM2902 LM2902V TA UNIT MIN TYP§ MAX MIN TYP§ MAX V 5 V t Non-A-suffix 25°C 3 7 3 7 V Input offset voltage VCC = to devices Full range 10 10 VIO MAX, mV VIC = VICRmin, V 1 4 V A-suffix 25°C 1 2 IC ICR VO = 1.4 devices Full range 4 ΔVIO/ΔT Input offset voltage temperature drift RS = 0 Ω Full range 7 μV/°C I Input offset current V 1 4 V 25°C 2 50 2 50 IIO VO = 1.4 nA Full range 300 150 ΔIIO/ΔT Input offset current temperature drift Full range 10 pA/°C I Input bias current V 1 4 V 25°C −20 −250 −20 −250 IIB VO = 1.4 nA Full range −500 −500 25°C 0 to 0 to V Common-mode V 5 V to MAX VCC − 1.5 VCC − 1.5 VICR V input voltage range VCC = Full range 0 to 0 to VCC − 2 VCC − 2 RL = 2 kΩ 25°C V High-level RL = 10 kΩ 25°C VCC − 1.5 VCC − 1.5 VOH V output voltage V MAX RL = 2 kΩ Full range 22 26 p g VCC = RL ≥ 10 kΩ Full range 23 24 27 VOL Low-level output voltage RL ≤ 10 kΩ Full range 5 20 5 20 mV A Large-signal differential voltage VCC = 15 V, VO = 1 V to 11 V, 25°C 25 100 25 100 AVD V/mV amplification RL ≥ 2 kΩ Full range 15 15 CMRR Common-mode rejection ratio VIC = VICRmin 25°C 50 80 60 80 dB k Supply-voltage kSVR rejection ratio 25°C 50 100 60 100 dB (ΔVCC /ΔVIO) VO1/VO2 Crosstalk attenuation f = 1 kHz to 20 kHz 25°C 120 120 dB VCC = 15 V, V 1 V S CC 25°C −20 −30 −60 −20 −30 −60 VID = V, VO = 0 Source Full range −10 −10 mA IO Output current VCC = 15 V, V 1 V Sink 25°C 10 20 10 20 CC VID = −V, VO = 15 V Full range 5 5 VID = −1 V, VO = 200 mV 25°C 30 12 40 μA IOS Short-circuit output current VCC at 5 V, GND at −5 V VO = 0, 25°C ±40 ±60 ±40 ±60 mA Supply current VO = 2.5 V, No load Full range 0.7 1.2 0.7 1.2 ICC (four amplifiers) VCC = MAX, VO = 0.5 VCC, No load Full range 1.4 3 1.4 3 mA † All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. MAX VCC for testing purposes is 26 V for LM2902 and 32 V for LM2902V. ‡ Full range is −40°C to 125°C for LM2902. § All typical values are at TA = 25°C. LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − MARCH 2010 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS† TA ‡ LM124A LM224A LM324A, T LM324KA UNIT A MIN TYP§ MAX MIN TYP§ MAX MIN TYP § MAX V Input offset voltage VCC = 5 V to 30 V, 25°C 2 2 3 2 3 VIO mV VIC = VICRmin, VO = 1.4 V Full range 4 4 5 I Input offset current V 1 4 V 25°C 10 2 15 2 30 IIO VO = 1.4 nA Full range 30 30 75 I Input bias current V 1 4 V 25°C −50 −15 −80 −15 −100 IIB VO = 1.4 nA Full range −100 −100 −200 V Common-mode input V 30 V 25°C 0 to VCC − 1.5 0 to VCC − 1.5 0 to VCC − 1.5 VICR V voltage range VCC = Full range 0 to VCC − 2 0 to VCC − 2 0 to VCC − 2 RL = 2 kΩ 25°C VCC − 1.5 VCC − 1.5 VCC − 1.5 VOH High-level output voltage V 30 V High RL = 2 kΩ Full range 26 26 26 V VCC = RL ≥ 10 kΩ Full range 27 27 28 27 28 VOL Low-level output voltage RL ≤ 10 kΩ Full range 20 5 20 5 20 mV A Large-signal differential VCC = 15 V, VO = 1 V to 11 V, 25°C 50 100 50 100 25 100 AVD V/mV voltage amplification RL ≥ 2 kΩ Full range 25 25 15 CMRR Common-mode rejection ratio VIC = VICRmin 25°C 70 70 80 65 80 dB kSVR Supply-voltage rejection ratio (ΔVCC /ΔVIO) 25°C 65 65 100 65 100 dB VO1/VO2 Crosstalk attenuation f = 1 kHz to 20 kHz 25°C 120 120 120 dB VCC = 15 V, V 1 V Source 25°C −20 −20 −30 −60 −20 −30 −60 VID = V, VO = 0 Full range −10 −10 −10 mA IO Output current VCC = 15 V, V 1 V Sink 25°C 10 10 20 10 20 VID = −V, VO = 15 V Full range 5 5 5 VID = −1 V, VO = 200 mV 25°C 12 12 30 12 30 μA IOS Short-circuit output current VCC at 5 V, GND at −5 V, VO = 0 25°C ±40 ±60 ±40 ±60 ±40 ±60 mA Supply current VO = 2.5 V, No load Full range 0.7 1.2 0.7 1.2 0.7 1.2 ICC (four amplifiers) VCC = 30 V, VO = 15 V, No load Full range 1.4 3 1.4 3 1.4 3 mA † All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. ‡ Full range is −55°C to 125°C for LM124A, −25°C to 85°C for LM224A, and 0°C to 70°C for LM324A. § All typical values are at TA = 25°C. LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066T − SEPTEMBER 1975 − REVISED MARCH 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 operating conditions, VCC = ±15 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT SR Slew rate at unity gain RL = 1 MΩ, CL = 30 pF, VI = ±10 V (see Figure 1) 0.5 V/μs B1 Unity-gain bandwidth RL = 1 MΩ, CL = 20 pF (see Figure 1) 1.2 MHz Vn Equivalent input noise voltage RS = 100 Ω, VI = 0 V, f = 1 kHz (see Figure 2) 35 nV/√Hz VO − + RL CL VI VCC+ VCC− Figure 1. Unity-Gain Amplifier VO − + 100 Ω VCC+ VCC− RS 900 Ω VI = 0 V Figure 2. Noise-Test Circuit PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples 5962-7704301VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-7704301VC A LM124JQMLV 5962-9950403V9B ACTIVE XCEPT KGD 0 100 TBD Call TI N / A for Pkg Type -55 to 125 5962-9950403VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9950403VC A LM124AJQMLV 77043012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77043012A LM124FKB 7704301CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704301CA LM124JB 7704301DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704301DA LM124WB 77043022A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77043022A LM124AFKB 7704302CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704302CA LM124AJB 7704302DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704302DA LM124AWB JM38510/11005BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510 /11005BCA LM124ADR OBSOLETE SOIC D 14 TBD Call TI Call TI -55 to 125 LM124AFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77043022A LM124AFKB LM124AJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 LM124AJ LM124AJB ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704302CA LM124AJB LM124AWB ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704302DA LM124AWB LM124D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 LM124 LM124DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 LM124 PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM124DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 LM124 LM124DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 LM124 LM124FKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77043012A LM124FKB LM124J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 LM124J LM124JB ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704301CA LM124JB LM124N OBSOLETE PDIP N 14 TBD Call TI Call TI -55 to 125 LM124W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 LM124W LM124WB ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 7704301DA LM124WB LM224AD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224A LM224ADE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224A LM224ADG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224A LM224ADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -25 to 85 LM224A LM224ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224A LM224ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224A LM224AN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224AN LM224ANE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224AN LM224D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224 LM224DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224 LM224DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224 PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM224DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -25 to 85 LM224 LM224DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224 LM224DRG3 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -25 to 85 LM224 LM224DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224 LM224KAD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224KA LM224KADE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224KA LM224KADG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224KA LM224KADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224KA LM224KADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224KA LM224KADRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224KA LM224KAN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224KAN LM224KANE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224KAN LM224KDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224K LM224KDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224K LM224KDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 LM224K LM224KN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224KN LM224KNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224KN LM224N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224N PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 4 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM224NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 LM224N LM2902D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902 LM2902DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902 LM2902DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902 LM2902DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 125 LM2902 LM2902DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902 LM2902DRG3 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM2902 LM2902DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902 LM2902KAVQDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KA LM2902KAVQDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KA LM2902KAVQPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KA LM2902KAVQPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KA LM2902KD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KDB ACTIVE SSOP DB 14 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KDBE4 ACTIVE SSOP DB 14 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KDBG4 ACTIVE SSOP DB 14 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 5 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM2902KDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 LM2902KN LM2902KNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 LM2902KN LM2902KNSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KNSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KNSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902K LM2902KPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KPWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KPWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902K LM2902KVQDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KV LM2902KVQDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KV LM2902KVQPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KV LM2902KVQPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902KV PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 6 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM2902N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 LM2902N LM2902NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 LM2902N LM2902NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902 LM2902NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM2902 LM2902PW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902 LM2902PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902 LM2902PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902 LM2902PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI -40 to 125 LM2902PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 125 L2902 LM2902PWRE4 ACTIVE TSSOP PW 14 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902 LM2902PWRG3 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L2902 LM2902PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L2902 LM2902QN OBSOLETE PDIP N 14 TBD Call TI Call TI -40 to 125 LM324AD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ADBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI LM324ADBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ADBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ADE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 7 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM324ADG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 LM324A LM324ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324AN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM324AN LM324ANE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM324AN LM324ANSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ANSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324ANSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324A LM324APW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324A LM324APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324A LM324APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324A LM324APWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI LM324APWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 L324A LM324APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324A LM324APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324A LM324D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 LM324DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 8 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM324DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 LM324DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 LM324 LM324DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 LM324DRG3 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 LM324 LM324DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 LM324KAD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KADE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KADG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KADRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KAN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM324KAN LM324KANE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM324KAN LM324KANSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KANSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KANSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324KA LM324KAPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324KA LM324KAPWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324KA PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 9 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM324KAPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324KA LM324KAPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324KA LM324KAPWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324KA LM324KAPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324KA LM324KD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM324KN LM324KNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM324KN LM324KNSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KNSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KNSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324K LM324KPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324K LM324KPWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324K LM324KPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324K PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 10 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM324KPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324K LM324KPWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324K LM324KPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324K LM324N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU | CU SN N / A for Pkg Type 0 to 70 LM324N LM324NE3 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU SN N / A for Pkg Type 0 to 70 LM324N LM324NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM324N LM324NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 LM324NSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 LM324NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM324 LM324PW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324 LM324PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324 LM324PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324 LM324PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI 0 to 70 LM324PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 L324 LM324PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324 LM324PWRG3 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 L324 LM324PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L324 LM324Y OBSOLETE DIESALE Y 0 TBD Call TI Call TI M38510/11005BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510 /11005BCA PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 11 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM124, LM124-SP, LM124M, LM2902 : • Catalog: LM124, LM124 • Automotive: LM2902-Q1 PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 Addendum-Page 12 • Enhanced Product: LM2902-EP • Military: LM124M, LM124M • Space: LM124-SP, LM124-SP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects • Enhanced Product - Supports Defense, Aerospace and Medical Applications • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant LM124DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM224ADR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 LM224ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM224ADRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM224ADRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM224DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM224DRG3 SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 LM224KADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM224KDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM2902DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM2902DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM2902DRG3 SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 LM2902DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM2902KAVQPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM2902KAVQPWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM2902KDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM2902KNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 LM2902KPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2013 Pack Materials-Page 1 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant LM2902KVQPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM2902KVQPWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM2902NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 LM2902PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM2902PWRG3 TSSOP PW 14 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1 LM2902PWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM324ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 LM324ADR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 LM324ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM324ADRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM324ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 LM324APWR TSSOP PW 14 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1 LM324APWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM324APWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM324DR SOIC D 14 2500 330.0 16.4 6.55 9.05 2.1 8.0 16.0 Q1 LM324DR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 LM324DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM324DRG3 SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 LM324DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM324KADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM324KANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 LM324KAPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM324KDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LM324KNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 LM324KPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM324PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 LM324PWRG3 TSSOP PW 14 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1 LM324PWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2013 Pack Materials-Page 2 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM124DR SOIC D 14 2500 367.0 367.0 38.0 LM224ADR SOIC D 14 2500 364.0 364.0 27.0 LM224ADR SOIC D 14 2500 333.2 345.9 28.6 LM224ADRG4 SOIC D 14 2500 333.2 345.9 28.6 LM224ADRG4 SOIC D 14 2500 367.0 367.0 38.0 LM224DR SOIC D 14 2500 367.0 367.0 38.0 LM224DRG3 SOIC D 14 2500 364.0 364.0 27.0 LM224KADR SOIC D 14 2500 367.0 367.0 38.0 LM224KDR SOIC D 14 2500 367.0 367.0 38.0 LM2902DR SOIC D 14 2500 333.2 345.9 28.6 LM2902DR SOIC D 14 2500 367.0 367.0 38.0 LM2902DRG3 SOIC D 14 2500 364.0 364.0 27.0 LM2902DRG4 SOIC D 14 2500 333.2 345.9 28.6 LM2902KAVQPWR TSSOP PW 14 2000 367.0 367.0 35.0 LM2902KAVQPWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 LM2902KDR SOIC D 14 2500 367.0 367.0 38.0 LM2902KNSR SO NS 14 2000 367.0 367.0 38.0 LM2902KPWR TSSOP PW 14 2000 367.0 367.0 35.0 LM2902KVQPWR TSSOP PW 14 2000 367.0 367.0 35.0 LM2902KVQPWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2013 Pack Materials-Page 3 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2902NSR SO NS 14 2000 367.0 367.0 38.0 LM2902PWR TSSOP PW 14 2000 367.0 367.0 35.0 LM2902PWRG3 TSSOP PW 14 2000 364.0 364.0 27.0 LM2902PWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 LM324ADBR SSOP DB 14 2000 367.0 367.0 38.0 LM324ADR SOIC D 14 2500 364.0 364.0 27.0 LM324ADR SOIC D 14 2500 367.0 367.0 38.0 LM324ADRG4 SOIC D 14 2500 367.0 367.0 38.0 LM324ANSR SO NS 14 2000 367.0 367.0 38.0 LM324APWR TSSOP PW 14 2000 364.0 364.0 27.0 LM324APWR TSSOP PW 14 2000 367.0 367.0 35.0 LM324APWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 LM324DR SOIC D 14 2500 385.0 388.0 194.0 LM324DR SOIC D 14 2500 364.0 364.0 27.0 LM324DR SOIC D 14 2500 333.2 345.9 28.6 LM324DRG3 SOIC D 14 2500 364.0 364.0 27.0 LM324DRG4 SOIC D 14 2500 333.2 345.9 28.6 LM324KADR SOIC D 14 2500 367.0 367.0 38.0 LM324KANSR SO NS 14 2000 367.0 367.0 38.0 LM324KAPWR TSSOP PW 14 2000 367.0 367.0 35.0 LM324KDR SOIC D 14 2500 367.0 367.0 38.0 LM324KNSR SO NS 14 2000 367.0 367.0 38.0 LM324KPWR TSSOP PW 14 2000 367.0 367.0 35.0 LM324PWR TSSOP PW 14 2000 367.0 367.0 35.0 LM324PWRG3 TSSOP PW 14 2000 364.0 364.0 27.0 LM324PWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2013 Pack Materials-Page 4 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01 28 PINS SHOWN Gage Plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 Seating Plane 7,90 9,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 A 28 1 16 20 6,50 6,50 14 0,05 MIN 5,90 5,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 0,15 M 0°–8° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2013, Texas Instruments Incorporated User's Guide SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U This User’s Guide describes the operation, use, features and characteristics of the TLV320AIC3254EVMU. This small form factor evaluation module (EVM) is a programmable USB audio device that features the TLV320AIC3254 Audio Codec with miniDSP. Figure 1. TLV321AIC3254EVM-U Angle View The following related documents are available through the Texas Instruments Web site at www.ti.com. EVM-Compatible Device Data Sheets Device Literature Number TLV320AIC3254 SLAS549 TAS1020B SLES025 Contents 1 EVM Overview ............................................................................................................... 3 2 EVM Description and Basics .............................................................................................. 4 3 AIC3254EVM-U Control Software ........................................................................................ 7 Appendix A TLV320AIC3254EVM Schematic ............................................................................... 15 Appendix B TLV320AIC3254EVM Bill of Materials ......................................................................... 16 Appendix C Writing Scripts ..................................................................................................... 18 List of Figures 1 TLV321AIC3254EVM-U Angle View ..................................................................................... 1 2 Bottom and Top Views ..................................................................................................... 4 3 Default Input and Output Signals ......................................................................................... 5 4 Sounds and Audio Devices Properties................................................................................... 6 5 Main Panel Window ........................................................................................................ 8 6 Compatibility Tab............................................................................................................ 9 7 Playback Configurations and Controls.................................................................................. 10 8 Associated Script and Description ...................................................................................... 10 9 Tip Strip Example.......................................................................................................... 11 10 Status Flags Panel ........................................................................................................ 12 11 Register Tables Panel .................................................................................................... 13 SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U 1 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com 12 Command Line interface Panel.......................................................................................... 14 List of Tables 1 TLV320AIC3254EVM Bill of Materials .................................................................................. 16 2 TLV320AIC3254EVM-U SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com EVM Overview 1 EVM Overview 1.1 Features • Small USB Stick form factor EVM for the TLV320AIC3254 Audio Codec. • USB connection to the PC provides power, control and streaming audio for easy evaluation. • Pre-programmed EEPROM boots the TLV320AIC3254 as a fully functional USB Audio Device when connected to a PC. • Easy to use AIC3254 Control Software (CS) configures and controls the TLV320AIC3254. The TLV320AIC3254EVM-U is a universal serial bus (USB)-based audio device for use with a personal computer running the Microsoft Windows™ XP operating system 1.2 Introduction The TLV320AIC3254EVM-U is a USB Audio Device with programmable inputs and outputs, effects and extensive routing capabilities. It is a simple platform to evaluate the TLV320AIC3254 miniDSP Audio Codec. SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U 3 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated EVM Description and Basics www.ti.com 2 EVM Description and Basics This section provides information on the analog input and output, digital control, power, and general connection of the TLV320AIC3254EVM-U. 2.1 TLV320AIC3254EVM-U Hardware Description The TLV320AIC3254EVM-U has 2 stereo analog input connectors (Line-in and Mic-in) and 2 stereo analog output connectors (Line-Out and Headphone-Out) that are routed to the TLV320AIC3254. Digital audio as well as control data communicated between the PC and the EVM are interpreted by the TAS1020B USB Streaming Controller. Control data is communicated to the TLV320AIC3254 via the I2C protocol; audio data is communicated via the I2S protocol. An on-board 32KB EEPROM is capable of storing TLV320AIC3254 commands (scripts) as well as the TAS1020B firmware. A push button is provided to cycle between scripts along with an LED that provides the user feedback regarding the script that is currently loaded. The EEPROM Manager in the AIC3254 CS is used to write new scripts into the EEPROM. Figure 2. Bottom and Top Views 4 TLV320AIC3254EVM-U SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com EVM Description and Basics The table below summarizes the audio jacks available to connect analog inputs and outputs to the TLV320AIC3254, as well as a switch. Designator Label Associated Pin Description J1 L IN (LINE IN) IN2_L / IN2_R Line Input. External electric microphone input. J2 MIC IN (MIC IN) IN3_L / IN3_R MICBIAS is connected to both tip and ring through resistors. Line output. Only high impedance loads should J3 L OUT (LINE OUT) LOL / LOR be connected to this output (e.g. external Class-D amplifier). J4 HP OUT (HEADPHONE) HPL / HPR Headphone output. Cycles through scripts SW1 SW1 N/A loaded in the on-board EEPROM. 2.2 Getting Started Evaluation can start right out of the box. Simply connect the TLV320AIC3254EVM-U to an available USB port, connect stereo headphones to HP OUT and start playing audio with any media player. By default, when the TLV320AIC3254EVM-U is connected, the TLV320AIC3254 is automatically configured to play and record stereo audio through all four jacks, as shown below. Figure 3. Default Input and Output Signals To adjust playback volume, open “Sounds and Audio Devices” in the “Control Panel” and click the “Volume” button of the “Sound playback” section of the “Audio” tab. Ensure USB-miniEVM is selected as the default playback and recording device. SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U 5 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated EVM Description and Basics www.ti.com Figure 4. Sounds and Audio Devices Properties Pressing SW1 on the EVM once will set a flat response at the outputs (LED D1 blinks once). Pressing SW1 again will switch to bass and treble boost (LED D1 blinks twice). The following section explains the software installation procedure which allows programming of the audio device. 6 TLV320AIC3254EVM-U SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com AIC3254EVM-U Control Software 3 AIC3254EVM-U Control Software The AIC3254 Control Software (CS) is an intuitive, easy-to-use, powerful tool to learn, evaluate, and control the TLV320AIC3254. This tool was specifically designed to make learning the TLV320AIC3254 software easy. The following sections describe the operation and installation of this software NOTE: For configuration of the codec, the TLV320AIC3254 block diagram located in SLAS549 is a good reference to help determine the signal routing. 3.1 AIC3254EVM-U CS Setup This section provides setup instructions for the AIC3254EVM-U CS. To install the AIC3254EVM-U software: 1. Download the latest version of the AIC3254EVM-U Control Software (CS) located in the TLV320AIC3254EVM-U Product Folder. 2. Open the self-extracting installation file. 3. Extract the software to a known folder. 4. Install the EVM software by double-clicking the Setup executable, and follow the directions. The user may be prompted to restart their computer. This installs all the AIC3254EVM-U software and required drivers onto the PC. SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U 7 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated AIC3254EVM-U Control Software www.ti.com 3.2 AIC3254EVM-U CS Usage The following sections describe the AIC3254EVM-U CS usage. 3.2.1 Main Panel Window The Firmware Name and Version boxes provide The Main Panel window, shown in the figure below, information about the firmware loaded into the EVM's provides easy access to all the features of the EEPROM. AIC3254 CS. The USB-MODEVM Interface drop-down menu allows the user to select which communication protocol the TAS1020B USB Controller uses to communicate with the TLV320AIC3254. The TLV320AIC3254 supports I2C Standard, I2C Fast, and 8-bit register SPI. However, this EVM only supports I2C. The USB Interface selection is global to all panels, including the Command-Line Interface. The Panel Selection Tree provides access to typical configurations, features, and other panels that allow the user to control the TLV320AIC3254. The tree is divided into several categories which contain items that pop up panels. A panel can be opened by double-clicking any item inside a category in the Panel Selection Tree. Below the Panel Selection Tree are three buttons that pop up the following: • Status Flags - Allows the user to monitor the TLV320AIC3254 status flags. • Register Tables - A tool to monitor register pages. • Command-Line Interface - A tool to execute/generate scripts and monitor register activity. The USB LED indicates if the EVM is recognized by the software and the ACTIVITY LED illuminates every time a command request is sent. The dialog box at the bottom of the Main Panel provides feedback of the current status of the software. Figure 5. Main Panel Window 8 TLV320AIC3254EVM-U SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com AIC3254EVM-U Control Software If running the software in Windows Vista or Windows 7, right-click the AIC3254EVM-U CS shortcut and select Properties. Configure the Compatibility tab as shown in Figure 6 Figure 6. Compatibility Tab 3.2.2 Typical Configurations This category can help users to quickly become familiar with the TLV320AIC3254. Each of the panels that can be accessed through this menu have controls relevant to the selected configuration; a tab shows the script that will be loaded for that particular configuration. Each script includes a brief description of the selected configuration. SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U 9 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated AIC3254EVM-U Control Software www.ti.com Figure 7. Playback Configurations and Controls Figure 8. Associated Script and Description 3.2.3 Control Categories The Digital Settings, Analog Settings, and Signal Processing categories provide control of many registers and other features of the TLV320AIC3254 . These categories are intended for the advanced user. Hovering the mouse cursor on top of a control displays a tip strip that contains page, register, and bit information. As an example, hovering on top of IN1_R of the Audio Inputs panel, as shown in Figure 9 displays p1_r55_b7-6 which means that this control writes to Page 1/Register 55/Bits D7 to D6. 10 TLV320AIC3254EVM-U SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com AIC3254EVM-U Control Software Figure 9. Tip Strip Example Before changing a control, see the data sheet to ensure that a particular control is compatible with the current state of the codec. As an example, some controls in the Analog Setup panel must be modified in a particular order as described in the data sheet. Other controls must only be modified with a specific hardware setup, such as powering up the AVDD LDO. All controls update their status with respect to the register contents in the following conditions: • A panel is opened. • The Execute Command Buffer button in the Command-Line Interface is pressed (if enabled). • The Refresh button at the bottom right of a panel is pressed SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U 11 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated AIC3254EVM-U Control Software www.ti.com 3.2.4 Status Flags Panel The TLV320AIC3254 status flags can monitored in the Status Flags panel (Figure 10) which is located below in the Panel Selection Tree . Pressing the POLL button continuously reads all the registers relevant to each flag and updates those flags accordingly. The rate at which the registers are read can be modified by changing the value in the Polling Interval numeric control. Note that a smaller interval reduces responsiveness of other controls, especially volume sliders, due to bandwidth limitations. By default, the polling interval is 200 ms and can be set to a minimum of 20 ms. The Sticky Flags tab contains indicators whose corresponding register contents clear every time a read is performed to that register. To read all the sticky flags, click the Read Sticky Flags button. Figure 10. Status Flags Panel 12 TLV320AIC3254EVM-U SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com AIC3254EVM-U Control Software 3.2.5 Register Tables Panel The contents of configuration and coefficient pages of the TLV320AIC3254 can be accessed through the Register Tables panel (Figure 11). The Page Number control changes to the page to be displayed in the register table. The register table contains page information such as the register name, reset value, current value, and a bitmap of the current value. The contents of the selected page can be exported into a spreadsheet by clicking the Dump to Spreadsheet button. Figure 11. Register Tables Panel SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM-U 13 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated AIC3254EVM-U Control Software www.ti.com 3.2.6 Command-line Interface Panel The Command-Line Interface panel provides a means to communicate with the TLV320AIC3254 using a simple scripting language (described in Appendix C). The TAS1020B USB Controller handles all communication between the PC and the TLV320AIC3254. A script is loaded into the command buffer, either by loading a script file using the File menu or by pasting text from the clipboard using the Ctrl-V key combination (Figure 12). When the command buffer is executed, the return data packets which result from each individual command are displayed in the Command History control. This control is an array (with a maximum size of 100 elements) that contains information about each command as well as status. The Interface box displays the interface used for a particular command in the Command History array. The Command box displays the type of command executed (i.e., write, read) for a particular interface. The Flag Retries box displays the number of read iterations performed by a Wait for Flag command (see Appendix C for details). The Register Data array displays the register number and data bytes that correspond to a particular command. The Information tab provides additional information related to the Command History as well as additional settings. The Syntax and Examples tabs provide useful information related to the scripting language. The File menu provides some options for working with scripts. The first option, Open Script File..., loads a command file script into the command buffer. This script can then be executed by pressing the Execute Command Buffer button. The contents of the Command Buffer can be saved using the Save Script File... option. Both the Command Buffer and Command History can be cleared by clicking their corresponding Clear buttons Figure 12. Command Line interface Panel 14 TLV320AIC3254EVM-U SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com Appendix A TLV320AIC3254EVM Schematic The schematic diagram for the TLV320AIC3254EVM is provided as a reference. SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM Schematic 15 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated DOUT DIN WCLK BCLK MCLK SCLK SDA SCL RESET~ DESIGN LEAD: EDGE #: DATE: FILENAME: SCH REV: PCB REV: SHEET: OF: LEAD # DRAWN BY: PAGE INFO: TI FILENAME DATE OF BY SHEET REV REV C12 0402 0.1ufd/6.3V C16 0603 10ufd/6.3V GND TLV320AIC3254RHB U1 QFN32-RHB 25 26 27 28 29 30 31 32 6 8 4 1 2 3 5 7 16 15 14 13 12 11 10 9 21 24 22 23 19 20 18 17 C15 0805 22ufd/6.3V C11 0402 0.1ufd/6.3V GND GND GND C5 0603 0.47ufd/16V C6 0603 0.47ufd/16V GND C13 0603 .047ufd/25V C9 0603 1.0ufd/16V C14 0603 .047ufd/25V C8 0603 1.0ufd/16V GND GND GND C10 0805 22ufd/6.3V C7 0402 0.1ufd/6.3V GND GND GND C1 0603 0.47ufd/16V C2 0603 0.47ufd/16V C3 0603 10ufd/6.3V GND R4 0603 4.7K +3.3V +3.3V +3.3V J1 LEFT RIGHT Shield 2 4 1 3 6 5 J2 LEFT RIGHT Shield 2 4 1 3 6 5 J3 LEFT RIGHT Shield 2 4 1 3 6 5 J4 LEFT RIGHT Shield 2 4 1 3 6 5 C17 1210 100ufd/6.3V C18 1210 100ufd/6.3V R1 0603 1.2K R2 0603 1.2K C4 0402 0.1ufd/6.3V TLV320AIC3254RHB U1 41 40 39 38 37 36 35 34 33 QFN32-RHB GND GND GND GND GND GND GND GND GND GND C35 0603 10ufd/6.3V R3 100 0603 R5 100 0603 TLV320AIC3254_RHB_USB_EVM TLV320AIC3254_RHB_USB_EVM STEVE LEGGIO JULY 09, 2009 B B 1 4 TLV320AIC3254_RHB_USB_EVM SL LINE IN MIC IN LINE OUT HEADPHONE 6508852 SDA SCL DOUT WCLK BCLK DIN MCLK SCLK RESET~ LEAD # TI FILENAME DATE OF DRAWN BY SHEET PCB REV SCH REV BY: SHEET: OF: REV: REV: FILENAME: DATE: DESIGN LEAD: EDGE #: PAGE INFO: U2 13 14 15 17 18 19 20 22 31 30 29 27 26 25 23 24 32 34 35 36 40 39 38 37 21 8 4 28 16 33 42 41 12 11 10 9 7 6 5 45 44 43 2 1 48 3 47 46 R9 0603 1.50K C26 0603 47pfd/50v C27 0603 47pfd/50v C22 0603 1000pfd/50V 1 2 3 4 5 6 7 8 J5 TYPEA_SMT-RA NC NC CASE CASE Data+ GND +5V Data- R12 0603 100K C30 0603 1.0ufd/16V C28 0402 0.1ufd/6.3V C25 0402 0.1ufd/6.3V C29 0402 0.1ufd/6.3V C24 0402 0.1ufd/6.3V D1 0805 Yellow C23 0805 100pfd/50V C19 0402 0.1ufd/6.3V +3.3V GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +5V +5V +3.3V GND GND GND GND C33 0603 0.1ufd/50V C34 0805 10ufd/16V C32 0805 10ufd/16V 1 2 3 4 Y1 SMT-8002 6MHz/3.3V Vcc OUT OE GND GND +3.3V 1 2 SW1 GND C31 0603 0.1ufd/50V R14 0603 10K +3.3V GND +5V VR1 5 3 2 1 SOT230DBV5 3.3V/400mA 4 1 2 3 4 5 6 7 8 U3 MSOP8-DGK R13 0603 649 R8 0603 30.9K R10 0603 27.4 R11 0603 27.4 R6 0603 2.7K/5% R7 0603 2.7K/5% EEPROM USB INPUT +5.0V USB INPUT +3.3V OUTPUT POWER SUPPLY TLV320AIC3254_RHB_USB_EVM SL 2 4 B B JULY 09, 2009 STEVE LEGGIO TLV320AIC3254_RHB_USB_EVM TLV320AIC3254_RHB_USB_EVM GPIO 6508852 www.ti.com Appendix B TLV320AIC3254EVM Bill of Materials The complete bill of materials for the TLV320AIC3254EVM is provided as a reference. Table 1. TLV320AIC3254EVM Bill of Materials PCB Qty Value Ref Des Description Vendor Part number 1 U1 ULTRA LO PWR ST AUDIO CODEC Texas TLV320AIC3254 W/EMBEDDED MINI DSP QFN32- Instruments RHB RHB ROHS RESISTORS Qty Value Ref Des Description Vendor Part number 1 1.5k R9 RESISTOR SMD0603 1.50K OHM DIGI-KEY P1.50KHCT 1% THICK FILM 1/10W ROHS 3 100k R3,R5,R12 RESISTOR SMD0603 100K OHM 1% DIGI-KEY P100KHCT THICK FILM 1/10W ROHS 1 1.7k R4 RESISTOR SMD0603 4.7K OHMS DIGI-KEY P4.7KGCT 1% 1/10W ROHS 1 10k R14 RESISTOR SMD0603 10K 5% 1/10W DIGI-KEY P10KGCT ROHS 2 1.2k R1,R2 RESISTOR SMD0603 1.2K OHMS DIGI-KEY P1.2KGCT 5% 1/10W ROHS 1 649 R13 RESISTOR SMD0603 THICK FILM DIGI-KEY 311-649HRCT 649 OHMS 1% 1/10W ROHS 1 30.9k R8 RESISTOR SMD0603 30.9K OHMS 541-30.9KHCT 1% 1/10W ROHS 2 27.4k R10,R11 RESISTOR SMD0603 27.4 OHMS DIGI-KEY P27.4HCT 1% 1/10W ROHS 2 2.7k R6,R7 RESISTOR SMD0603 2.7K OHMS DIGI-KEY P2.7KGCT 5% 1/10W ROHS 2 100 R3,R5 RESISTOR SMD0603 100 OHM DIGI-KEY 541-100HCT 1/10W 1% ROHS CAPACITORS Qty Value Ref Des Description Vendor Part number 9 0.1μF C4,C7,C11,C12,C19,C24,C25,C28,C29 CAP SMD0402 CERM 0.1UFD 6.3V DIGI-KEY 445-1266-1 10% X5R ROHS 3 10μF C3,C16, C35 CAP SMD0603 CERM 10UFD 6.3V DIGI-KEY PCC2395CT 20% X5R ROHS 2 22μF C10,C15 CAP SMD0805 CERM 22UFD 6.3V DIGI-KEY 445-1422-1 20% X5R ROHS 2 47pF C26,C27 CAP SMD0603 CERM 47PFD 50V DIGI-KEY PCC470ACVCT 5% NPO ROHS 1 1000pF C22 CAP SMD0603 CERM 1000PFD 50V DIGI-KEY 445-1293-1 5% COG ROHS 1 1μF C30 CAP SMD0603 CERM 1.0UFD 16V DIGI-KEY 445-1604-1 5% X7R ROHS 4 0.47μF C1,C2,C5,C6 CAP SMD0603 CERM 0.47UFD 16V DIGI-KEY 478-1248-1 10% X5R ROHS 2 0.47μF C13,C14 CAP SMD0603 CERM 0.47UFD 25V DIGI-KEY PCC1771CT 10% X7R ROHS 2 1μF C8,C9 CAP SMD0603 CERM 1.0UFD 16V DIGI-KEY PCC2224CT 10% X5R ROHS 1 100pF C23 CAP SMD0805 CERM 100PFD 50V DIGI-KEY 490-1615-1 5% C0G ROHS 2 0.1μF C31,C33 CAP SMD0603 CERM 0.1UFD 50V DIGI-KEY 445-1314-1 10% X7R ROHS 16 TLV320AIC3254EVM Bill of Materials SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com Appendix B Table 1. TLV320AIC3254EVM Bill of Materials (continued) 2 10μF C32,C34 CAP SMD0805 CERM 10UFD 16V DIGI-KEY 490-3886-1 10% X5R ROHS 2 100μF C17,C18 CAP SMD1210 CERM 100UFD 6.3V DIGI-KEY 490-3390-1 20% X5R ROHS INTEGRATED CIRCUITS Qty Value Ref Des Description Vendor Part number 1 U2 USB STREAMING CONTROLLER DIGI-KEY 296-13041-5 TQFP48-PFB ROHS 1 VR1 VOLT REG 3.3V 400MA LDO CAP- DIGI-KEY 296-15819-1 FREE NMOS SOT23-DBV5 ROHS 1 U3 256K I2C SERIAL EEPROM,MSOP-8 DIGI-KEY 24AA256-I/MSND 1 D1 LED, YELLOW 2.0V SMD0805 DIGI-KEY 67-1554-1 ROHS 1 Y1 OSCILLATOR SMT 6MHz 3.3V OUT- DIGI-KEY 788- ENABLE ROHS 8002AI133E- 6.0T MISCELLANEOUS ITEMS Qty Value Ref Des Description Vendor Part number 1 J5 JACK-USB MALE TYPEA SMT-RA DIGI-KEY WM17118 4PIN ROHS J 4 J1,J2,J3,J4 ACK AUDIO MINI(3.5MM ,4-COND DIGI-KEY CP-43516SJCT PCB-RA ROHS 1 SW1 SWITCH, MOM, 160G SMT 4X3MM DIGI-KEY EG4344CT ROHS ATTENTION: All components must be Rhos compliant. Some part numbers may be either leaded or Rhos. Verify that purchased components are Rhos compliant. SLAU295A–September 2009–Revised October 2012 TLV320AIC3254EVM Bill of Materials 17 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com Appendix C Writing Scripts A script is simply a text file that contains data to send to the serial control buses. Each line in a script file is one command. No provision is made for extending lines beyond one line, except for the > command. A line is terminated by a carriage return. The first character of a line is the command. Commands are: I Set interface bus to use r Read from the serial control bus w Write to the serial control bus > Extend repeated write commands to lines below a w # Comment b Break d Delay f Wait for Flag The first command, I, sets the interface to use for the commands to follow. This command must be followed by one of the following parameters: i2cstd Standard mode I2C bus i2cfast Fast mode I2C bus spi8 SPI bus with 8-bit register addressing spi16 SPI bus with 16-bit register addressing For example, if a fast mode I2C bus is to be used, the script begins with: I i2cfast A double quoted string of characters following the b command can be added to provide information to the user about each breakpoint. When the script is executed, the software's command handler halts as soon as a breakpoint is detected and displays the string of characters within the double quotes. The Wait for Flag command, f, reads a specified register and verifies if the bitmap provided with the command matches the data being read. If the data does not match, the command handler retries for up to 200 times. This feature is useful when switching buffers in parts that support the adaptive filtering mode. The command f syntax follows: f [i2c address] [register] [D7][D6][D5][D4][D3][D2][D1][D0] where 'i2c address' and 'register' are in hexadecimal format and 'D7' through 'D0' are in binary format with values of 0, 1 or X for don't care. Anything following a comment command # is ignored by the parser, provided that it is on the same line. The delay command d allows the user to specify a time, in milliseconds, that the script pauses before proceeding. The delay time is entered in decimal format. A series of byte values follows either a read or write command. Each byte value is expressed in hexadecimal, and each byte must be separated by a space. Commands are interpreted and sent to the TAS1020B by the program. The first byte following an r (read) or w (write) command is the I2C slave address of the device (if I2C is used) or the first data byte to write (if SPI is usednote that SPI interfaces are not standardized on protocols, so the meaning of this byte varies with the device being addressed on the SPI bus). The second byte is the starting register address that data will be written to (again, with I2C; SPI varies. Following these two bytes are data, if writing; if reading, the third byte value is the number of bytes to read, (expressed in hexadecimal). 18 Writing Scripts SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated www.ti.com Appendix C For example, to write the values 0xAA 0x55 to an I2C device with a slave address of 0x30, starting at a register address of 0x03, the user writes: #example script I i2cfast w 30 03 AA 55 r 30 03 02 This script begins with a comment, specifies that a fast I2C bus will be used, then writes 0xAA 0x55 to the I2C slave device at address 0x30, writing the values into registers 0x03 and 0x04. The script then reads back two bytes from the same device starting at register address 0x03. Note that the slave device value does not change. It is unnecessary to set the R/W bit for I2C devices in the script; the read or write commands does that. If extensive repeated write commands are sent and commenting is desired for a group of bytes, the > command can be used to extend the bytes to other lines that follow. A usage example for the > command follows: #example script for '>' command I i2cfast # Write AA and BB to registers 3 and 4, respectively w 30 03 AA BB # Write CC, DD, EE and FF to registers 5, 6, 7 and 8, respectively > CC DD EE FF # Place a commented breakpoint b "AA BB CC DD EE FF was written, starting at register 3" # Read back all six registers, starting at register 3 r 30 03 06 The following example demonstrates usage of the Wait for Flag command, f: #example script for 'wait for flag' command I i2cfast # Switch to Page 44 w 30 00 2C # Switch buffers w 30 01 05 # Wait for bit D0 to clear. 'x' denotes a don't care. f 30 01 xxxxxxx0 Any text editor can be used to write these scripts; Jedit is an editor that is highly recommended for general usage. For more information, go to: http://www.jedit.org. Once the script is written, it can be used in the command window by running the program, and then selecting Open Script File... from the File menu. Locate the script and open it. The script is then displayed in the command buffer. The user can also edit the script once it is in the buffer and save it by selecting Save Script File... from the File menu. SLAU295A–September 2009–Revised October 2012 Writing Scripts 19 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Appendix C www.ti.com Once the script is in the command buffer, it can be executed by pressing the Execute Command Buffer button. If there are breakpoints in the script, the script executes to that point, and the user is presented with a dialog box with a button to press to continue executing the script. When ready to proceed, push that button and the script continues. 20 Writing Scripts SLAU295A–September 2009–Revised October 2012 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated  SLLS025A − JULY 1986  Copyright  1986, Texas Instruments Incorporated Revision Information POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3−1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 • Dual Circuits Capable of Driving High-Capacitance Loads at High Speeds • Output Supply Voltage Range up to 24 V • Low Standby Power Dissipation description The SN75372 is a dual NAND gate interface circuit designed to drive power MOSFETs from TTL inputs. It provides high current and voltage levels necessary to drive large capacitive loads at high speeds. The device operates from a VCC1 of 5 V and a VCC2 of up to 24 V. The SN75372 is characterized for operation from 0°C to 70°C. schematic (each driver) VCC1 VCC2 To Other Driver To Other Driver Output Y GND Input A Enable E 1Y 7 2Y 6 E 2 EN 1A 1 2A 3 logic symbol† TTL/MOS 1 2 3 4 8 7 6 5 1A E 2A GND VCC1 1Y 2Y VCC2 D OR P PACKAGE (TOP VIEW) † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.      !"#   $"%&! '#( '"! !  $#!! $# )# #  #* "# '' +,( '"! $!#- '#  #!#&, !&"'# #-  && $##(       SLLS025A − JULY 1986 3−2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Supply voltage range, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 25 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Peak output current, VO (tw < 10 ms, duty cycle < 50%) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: Voltage values are with respect to network GND. DISSIPATION RATING TABLE PACKAGE TA = 25°C DERATING FACTOR TA = 70°C 25 POWER RATING ABOVE TA = 25°C 70 POWER RATING D 725 mW 5.8 mW/°C 464 mW P 1000 mW 8.0 mW/°C 640 mW recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC1 4.75 5 5.25 V Supply voltage, VCC2 4.75 20 24 V High-level input voltage, VIH 2 V Low-level input voltage, VIL 0.8 V High-level output current, IOH −10 mA Low-level output current, IOL 40 mA Operating free-air temperature, TA 0 70 °C       SLLS025A − JULY 1986 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3−3 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 electrical characteristics over recommended ranges of VCC1, VCC2, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK Input clamp voltage II = − 12 mA −1.5 V VOH High-level output voltage VIL = 0.8 V, IOH = −50 μA VCC2−1.3 VCC2−0.8 V VIL = 0.8 V, IOH = − 10 mA VCC2−2.5 VCC2−1.8 VIH = 2 V, IOL = 10 mA 0.15 0.3 VOL Low-level output voltage VCC2 = 15 V to 24 V, IOL = 40 mA VIH = 2 V, 0.25 0.5 V VF Output clamp-diode forward voltage VI = 0, IF = 20 mA 1.5 V II Input current at maximum input VI = 5.5 V 1 mA voltage IIH High-level input current Any A VI = 2.4 V 40 A Any E 80 μA IIL Low-level input current Any A VI = 0.4 V −1 −1.6 mA Any E −2 −3.2 ICC1(H) Supply current from VCC1, both outputs high 2 4 mA ICC2(H) Supply current from VCC2, both outputs high VCC1 = 5.25 V, All inputs at 0 V, VCC2 = 24 V, No load 0.5 mA ICC1(L) Supply current from VCC1, both outputs low 16 24 mA ICC2(L) Supply current from VCC2, both outputs low VCC1 = 5.25 V, All inputs at 5 V, VCC2 = 24 V, No load 7 13 mA ICC2(S) Supply current from VCC2, standby condition VCC1 = 0, All inputs at 5 V, VCC2 = 24 V, No load 0.5 mA † All typical values are at VCC1 = 5 V, VCC2 = 20 V, and TA = 25°C. switching characteristics, VCC1 = 5 V, VCC2 = 20 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tDLH Delay time, low-to-high-level output 20 35 ns tDHL Delay time, high-to-low-level output 10 20 ns tTLH Transition time, low-to-high-level output CL = 390 pF, RD = 10 Ω, See Figure 1 20 30 ns tTHL Transition time, high-to-low-level output 20 30 ns tPLH Propagation delay time, low-to-high-level output 10 40 65 ns tPHL Propagation delay time, high-to-low-level output 10 30 50 ns       SLLS025A − JULY 1986 3−4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PARAMETER MEASUREMENT INFORMATION 10% 5 V 2.4 V VCC1 TEST CIRCUIT Input GND VCC2 Pulse Generator (see Note A) Output CL = 390 pF (see Note B) 20 V RD Input Output VOLTAGE WAVEFORMS ≤ 10 ns 90% 1.5 V 0.5 μs tDHL tTLH VCC2−3 V 2 V 0 V VOH ≤ 10 ns 90% 1.5 V 10% tPHL tPHL tDLH tTHL VCC2−3 V 2 V VOL 3 V NOTES: A. The pulse generator has the following characteristics: PRR = 1 MHz, ZO ≈ 50 Ω. B. CL includes probe and jig capacitance. Figure 1. Test Circuit and Voltage Waveforms, Each Driver TYPICAL CHARACTERISTICS −1 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT −10 −100 0.3 0.2 0.1 0 0 20 40 60 0.4 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.5 80 100 VCC2−0.5 VCC2−1 VCC2−1.5 VCC2−2 VCC2−2.5 VCC2−3 VCC1 = 5 V VCC2 = 20 V VI = 0.8 V TA = 25°C TA = 70°C TA = 0°C VVO0HH − High-Level Output Voltage − V IOL − Low-Level Output Current − mA VCC1 = 5 V VCC2 = 20 V VI = 2 V TA = 70°C TA = 0°C VVOOLL − Low-Level Output Voltage − V IOH − High-Level Output Current − mA VCC2 − 0.01 − 0.1 Figure 2 Figure 3       SLLS025A − JULY 1986 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3−5 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 TYPICAL CHARACTERISTICS 10 20 40 100 400 1000 f − Frequency − kHz POWER DISSIPATION (BOTH DRIVERS) vs FREQUENCY 200 400 200 0 800 1000 1200 12 600 8 4 0 0 0.5 1 1.5 16 20 VOLTAGE TRANSFER CHARACTERISTICS 24 2 2.5 VI − Input Voltage − V VVO) − Output Voltage − V VCC1 = 5 V VCC2 = 20 V No Load TA = 25°C VCC1 = 5 V VCC2 = 20 V Input: 3-V Square Wave 50% Duty Cycle TA = 25°C CL = 600 pF CL = 1000 pF CL = 2000 pF CL = 4000 pF CL = 400 pF PPDT − Power Dissipation − mW Allowable in P Package Only Figure 4 Figure 5 PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT vs FREE-AIR TEMPERATURE PROPAGATION DELAY TIME, LOW-TO-HIGH-LEVEL OUTPUT vs FREE-AIR TEMPERATURE 100 80 20 0 0 10 20 30 40 50 60 High-to-Low-Level Output − ns 140 180 200 70 80 60 160 120 40 TA − Free-Air Temperature − °C tkPSLVHR − Propagation Delay Time, Low-to-High-Level Output − ns ktSPVHRL − Propagation Delay Time, TA − Free-Air Temperature − °C 100 80 20 0 140 180 200 60 160 120 40 0 10 20 30 40 50 60 70 80 CL = 50 pF CL = 200 pF CL = 1000 pF CL = 2000 pF CL = 4000 pF VCC1 = 5 V VCC2 = 20 V RD = 10 Ω See Figure 1 CL = 4000 pF CL = 2000 pF CL = 1000 pF VCC1 = 5 V VCC2 = 20 V RD = 10 Ω See Figure 1 CL = 200 pF CL = 390 pF CL = 50 pF CL = 390 pF Figure 6 Figure 7       SLLS025A − JULY 1986 3−6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 TYPICAL CHARACTERISTICS 0 5 10 15 PROPAGATION DELAY TIME, LOW-TO-HIGH-LEVEL OUTPUT vs VCC2 SUPPLY VOLTAGE 20 25 100 80 20 0 140 180 200 60 160 120 40 Low-to-High-Level Output − ns VCC2 − Supply Voltage − V PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT vs VCC2 SUPPLY VOLTAGE 100 80 20 0 140 180 200 60 160 120 40 0 5 10 15 20 25 VCC2 − Supply Voltage − V tPLH − Propagation Delay Time, VCC1 = 5 V RD = 10 Ω TA = 25°C See Figure 1 CL = 2000 pF CL = 1000 pF CL = 200 pF CL = 390 pF CL = 50 pF VCC1 = 5 V RD = 10 Ω TA = 25°C See Figure 1 CL = 4000 pF CL = 2000 pF CL = 1000 pF CL = 390 pF CL = 200 pF CL = 50 pF CL = 4000 pF High-to-Low-Level Output − ns tPLH − Propagation Delay Time, Figure 8 Figure 9 0 1000 2000 3000 4000 VCC1 = 5 V VCC2 = 20 V TA = 25°C See Figure 1 Low-to-High-Level Output − ns 100 80 20 0 140 180 200 60 160 120 40 PROPAGATION DELAY TIME, LOW-TO-HIGH-LEVEL OUTPUT vs LOAD CAPACITANCE CL − Load Capacitance − pF RD = 10 Ω RD = 0 RD = 24 Ω 100 80 20 0 140 180 200 60 160 120 40 0 1000 2000 3000 4000 CL − Load Capacitance − pF VCC1 = 5 V VCC2 = 20 V TA = 25°C See Figure 1 RD = 24 Ω RD = 10 Ω PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT vs LOAD CAPACITANCE RD = 0 ktSPVLRH − Propagation Delay Time, High-to-Low-Level Output − ns ktSPVLRH − Propagation Delay Time, Figure 10 Figure 11 NOTE: For RD = 0, operation with CL > 2000 pF violates absolute maximum current rating.       SLLS025A − JULY 1986 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3−7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 THERMAL INFORMATION power dissipation precautions Significant power may be dissipated in the SN75372 driver when charging and discharging high-capacitance loads over a wide voltage range at high frequencies. Figure 5 shows the power dissipated in a typical SN75372 as a function of load capacitance and frequency. Average power dissipated by this driver is derived from the equation PT(AV) = PDC(AV) + PC(AV) = PS(AV) where PDC(AV) is the steady-state power dissipation with the output high or low, PC(AV) is the power level during charging or discharging of the load capacitance, and PS(AV) is the power dissipation during switching between the low and high levels. None of these include energy transferred to the load, and all are averaged over a full cycle. The power components per driver channel are PC(AV)  C V2 C f tHL tLH tH tL T = 1/f where the times are as defined in Figure 14. Figure 12. Output Voltage Waveform PDC(AV) = PHtH + PLtL T PS(AV) = PLHtLH + PHLtHL T PL, PH, PLH, and PHL are the respective instantaneous levels of power dissipation, C is the load capacitance. VC is the voltage across the load capacitance during the charge cycle shown by the equation VC = VOH − VOL PS(AV) may be ignored for power calculations at low frequencies. In the following power calculation, both channels are operating under identical conditions: VOH =19.2 V and VOL = 0.15 V with VCC1 = 5 V, VCC2 = 20 V, VC = 19.05 V, C = 1000 pF, and the duty cycle = 60%. At 0.5 MHz, PS(AV) is negligible and can be ignored. When the output voltage is high, ICC2 is negligible and can be ignored. On a per-channel basis using data sheet values, PDC(AV)  (5 V) 2 mA 2  (20 V) 0 mA 2  (0.6)(5 V) 16 mA 2  (20 V) 7 mA 2  (0.4) PDC(AV) = 47 mW per channel Power during the charging time of the load capacitance is PC(AV) = (1000 pF) (19.05 V)2 (0.5 MHz) = 182 mW per channel Total power for each driver is PT(AV) = 47 mW + 182 mW = 229 mW and total package power is PT(AV) = (229) (2) = 458 mW.       SLLS025A − JULY 1986 3−8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 APPLICATION INFORMATION driving power MOSFETs The drive requirements of power MOSFETs are much lower than comparable bipolar power transistors. The input impedance of a FET consists of a reverse biased PN junction that can be described as a large capacitance in parallel with a very high resistance. For this reason, the commonly used open-collector driver with a pullup resistor is not satisfactory for high-speed applications. In Figure 12(a), an IRF151 power MOSFET switching an inductive load is driven by an open-collector transistor driver with a 470-Ω pullup resistor. The input capacitance (Ciss) specification for an IRF151 is 4000 pF maximum. The resulting long turn-on time due to the combination of Ciss and the pullup resistor is shown in Figure 12(b). 5 V 7 4 8 3 5 2 1 6 VVO0HH − − Gate Voltage − V TLC555P 1/2 SN75447 470 Ω 48 V M VOL t − Time − μs (b) (a) IRF151 4 3 2 1 0 0 0.5 1 1.5 2 2.5 3 Figure 13. Power MOSFET Drive Using SN75447       SLLS025A − JULY 1986 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3−9 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 APPLICATION INFORMATION A faster, more efficient drive circuit uses an active pullup as well as an active pulldown output configuration, referred to as a totem-pole output. The SN75372 driver provides the high speed, totem-pole drive desired in an application of this type, see Figure 13(a). The resulting faster switching speeds are shown in Figure 13(b). 5 V TLC555P 1/2 SN75372 M t − Time − μs (b) (a) IRF151 48 V 4 3 2 1 0 0 0.5 1 1.5 2 2.5 3 VVO0HH − VVOOLL − Gate Voltage − V 7 4 8 3 5 2 1 6 Figure 14. Power MOSFET Drive Using SN75372 Power MOSFET drivers must be capable of supplying high peak currents to achieve fast switching speeds as shown by the equation Ipk  VC tr where C is the capacitive load, and tr is the desired drive time. V is the voltage that the capacitance is charged to. In the circuit shown in Figure 13(a), V is found by the equation V = VOH − VOL Peak current required to maintain a rise time of 100 ns in the circuit of Figure 13(a) is IPK  (30)4(109) 100(109)  120 mA Circuit capacitance can be ignored because it is very small compared to the input capacitance of the IRF151. With a VCC of 5 V, and assuming worst-cast conditions, the gate drive voltage is 3 V. For applications in which the full voltage of VCC2 must be supplied to the MOSFET gate, the SN75374 quad MOSFET driver should be used. PACKAGE OPTION ADDENDUM www.ti.com 19-Jun-2010 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) SN75372D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN75372DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN75372DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN75372DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN75372DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN75372P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Contact TI Distributor or Sales Office SN75372PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Contact TI Distributor or Sales Office SN75372PSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN75372PSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN75372PSRG4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. PACKAGE OPTION ADDENDUM www.ti.com 19-Jun-2010 Addendum-Page 2 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant SN75372DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN75372PSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN75372DR SOIC D 8 2500 340.5 338.1 20.6 SN75372PSR SO PS 8 2000 367.0 367.0 38.0 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1  Meets IEEE Standard 488-1978 (GPIB)  8-Channel Bidirectional Transceivers  Power-Up/Power-Down Protection (Glitch Free)  Designed to Implement Control Bus Interface  SN75161B Designed for Single Controller  SN75162B Designed for Multiple Controllers  High-Speed, Low-Power Schottky Circuitry  Low Power Dissipation . . . 72 mW Max Per Channel  Fast Propagation Times . . . 22 ns Max  High-Impedance pnp Inputs  Receiver Hysteresis . . . 650 mV Typ  Bus-Terminating Resistors Provided on Driver Outputs  No Loading of Bus When Device Is Powered Down (VCC = 0) description The SN75161B and SN75162B eight-channel, general-purpose interface bus transceivers are monolithic, high-speed, low-power Schottky devices designed to meet the requirements of IEEE Standard 488-1978. Each transceiver is designed to provide the bus-management and data-transfer signals between operating units of a single- or multiple-controller instrumentation system. When combined with the SN75160B octal bus transceiver, the SN75161B or SN75162B provides the complete 16-wire interface for the IEEE-488 bus. The SN75161B and SN75162B feature eight driver-receiver pairs connected in a front-to-back configuration to form input/output (I/O) ports at both the bus and terminal sides. A powerup/- down disable circuit is included on all bus and receiver outputs. This provides glitch-free operation during VCC power up and power down. PRODUCTION DATA information is current as of publication date. Copyright W 1995, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SC TE REN IFC NDAC NRFD DAV EOI ATN SRQ NC GND 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 VCC NC REN IFC NDAC NRFD DAV EOI ATN SRQ NC DC (TOP VIEW) TE REN IFC NDAC NRFD DAV EOI ATN SRQ GND VCC REN IFC NDAC NRFD DAV EOI ATN SRQ DC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 GPIB I/O Ports Terminal I/O Ports (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 SC TE REN IFC NDAC NRFD DAV EOI ATN SRQ GND VCC NC REN IFC NDAC NRFD DAV EOI ATN SRQ DC (TOP VIEW) NC–No internal connection SN75161B . . . DW OR N PACKAGE SN75162B . . . DW PACKAGE SN75162B . . . N PACKAGE GPIB I/O Ports Terminal I/O Ports GPIB I/O Ports Terminal I/O Ports SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) The direction of data through these driver-receiver pairs is determined by the DC, TE, and SC (on SN75162B) enable signals. The SC input on the SN75162B allows the REN and IFC transceivers to be controlled independently. The driver outputs (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a high impedance to the bus when supply voltage VCC is 0. The drivers are designed to handle loads up to 48 mA of sink current. Each receiver features pnp transistor inputs for high input impedance and hysteresis of 400 mV for increased noise immunity. All receivers have 3-state outputs to present a high impedance to the terminal when disabled. The SN75161B and SN75162B are characterized for operation from 0°C to 70°C. Function Tables SN75161B RECEIVE/TRANSMIT CONTROLS BUS-MANAGEMENT CHANNELS DATA-TRANSFER CHANNELS DC TE ATN† ATN† SRQ REN IFC EOI DAV NDAC NRFD (Controlled by DC) (Controlled by TE) H H H R T R R T T R R H H L R L L H T R T T R R T T L L L T H L X R T R R R R T T L H X T R T T T T R R H = high level, L = low level, R = receive, T = transmit, X = irrelevant Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the bus side to the terminal side. Data transfer is noninverting in both directions. † ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only. SN75162B RECEIVE/TRANSMIT CONTROLS BUS-MANAGEMENT CHANNELS DATA-TRANSFER CHANNELS SC DC TE ATN† ATN† SRQ REN IFC EOI DAV NDAC NRFD (Controlled by DC) (Controlled by SC) (Controlled by TE) H H H R T T T R R H H L R L L H T R R R T T L L L T H L X R T R R T T L H X T R T T R R H T T L R R H = high level, L = low level, R = receive, T = transmit, X = irrelevant Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the bus side to the terminal side. Data transfer is noninverting in both directions. † ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only. SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 CHANNEL-IDENTIFICATION TABLE NAME IDENTITY CLASS DC Direction Control TE Talk Enable Control SC System Control (SN75162B only) ATN Attention SRQ Service Request REN Remote Enable Bus IFC Interface Clear Management EOI End of Identity DAV Data Valid NDAC Not Data Accepted Data NRFD Not Ready for Data Transfer SN75161B logic symbol† EN3 1 ATN 8 1 ATN 13 1 1 EOI 7 3 EOI 14 1 3 SRQ 1 SRQ 12 1 1 REN 2 1 REN 19 1 1 IFC 3 1 IFC 18 1 1 DAV 6 2 DAV 15 1 2 NDAC 4 2 NDAC 17 1 2 2 1 16 NRFD 2 EN1/G4 EN2/G5 5 4 5 NRFD TE 1 DC 11 This symbol is in accordance with IEEE Std 91-1984 and IEC Publication 617-12. Designates 3-state outputs Designates passive-pullup outputs  9 SN75161B logic diagram (positive logic) NRFD 5 NRFD 16 NDAC 4 NDAC 17 DAV 6 DAV 15 IFC 3 IFC 18 REN 2 REN 19 SRQ 9 SRQ 12 EOI 7 EOI 14 11 DC 1 TE 13 ATN 8 ATN SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75162B logic symbol† EN3 . 1 ATN 1 ATN 14 1 1 EOI 6 EOI 1 6 SRQ 1 SRQ 1 1 REN REN 1 3 IFC IFC 1 DAV 2 DAV 1 2 NDAC 2 NDAC 1 2 2 1 NRFD 2 EN1/G4 EN2/G5 5 4 NRFD TE DC This symbol is in accordance with IEEE Std 91-1984 and IEC Publication 617-12. Designates 3-state outputs Designates passive-pullup outputs  EN3 12 2 1 15 SC 13 20 19 16 18 17 9 8 10 3 4 7 5 6 3 3 3 Pin numbers shown are for the N package. SN75162B logic diagram (positive logic) NRFD NRFD NDAC NDAC DAV DAV IFC IFC REN REN SRQ SRQ EOI EOI DC TE ATN ATN 12 2 1 14 15 13 20 19 16 18 17 9 8 10 3 4 7 5 6 SC SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 schematics of inputs and outputs NOM 4 kW R(eq) 1.7 kW NOM 10 kW NOM VCC GND Input/Output Port Input/Output Port GND VCC NOM 10 kW NOM 4 kW NOM 1.7 kW NOM 9 kW GND Input VCC NOM 4 kW EQUIVALENT OF ALL CONTROL INPUTS TYPICAL OF SRQ, NDAC, AND NRFD GPIB I/O PORT Circuit inside dashed lines is on the driver outputs only. TYPICAL OF ALL I/O PORTS EXCEPT SRQ, NDAC, AND NRFD GPIB I/O PORTS Driver output R(eq) = 30 W NOM Receiver output R(eq) = 110 W NOM Circuit inside dashed lines is on the driver outputs only. R(eq) = equivalent resistor absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Low-level driver output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature 1,6 mm (1/16) inch from the case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network ground terminal. SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DISSIPATION RATING TABLE PACKAGE TA 3 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING DW (20 pin) 1125 mW 9.0 mW/°C 720 mW DW (24 pin) 1350 mW 10.8 mW/°C 864 mW N (20 pin) 1150 mW 9.2 mW/°C 736 mW N (22 pin) 1700 mW 13.6 mW/°C 1088 mW recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC 4.75 5 5.25 V High-level input voltage, VIH 2 V Low-level input voltage, VIL 0.8 V High level output current IOH Bus ports with 3-state outputs –5.2 mA High-current, Terminal ports –800 mA Low level output current IOL Bus ports 48 Low-current, mA Terminal ports 16 Operating free-air temperature, TA 0 70 °C SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK Input clamp voltage II = – 18 mA –0.8 –1.5 V Vhys Hysteresis voltage (VIT+ – VIT–) Bus See Figure 7 0.4 0.65 V VOH‡ High level output voltage Terminal IOH = – 800 mA 2.7 3.5 High-V Bus IOH = – 5.2 mA 2.5 3.3 VOL Low level output voltage Terminal IOL = 16 mA 0.3 0.5 Low-V Bus IOL = 48 mA 0.35 0.5 II Input current at maximum Terminal VI = 5 5 V 0 2 100 mA input voltage 5.5 0.2 IIH High-level input current Terminal and VI = 2.7 V 0.1 20 mA IIL Low-level input current control inputs VI = 0.5 V –10 –100 mA VI/O(b ) Voltage at bus port Driver disabled II(bus) = 0 2.5 3.0 3.7 bus) V II(bus) = – 12 mA –1.5 VI(bus) = – 1.5 V to 0.4 V –1.3 VI(bus) = 0.4 V to 2.5 V 0 –3.2 Power on Driver disabled VI(b ) = 2 5 V to 3 7 V 2.5 mA II/O(bus) Current into bus port bus) 2.5 3.7 –3.2 ( ) VI(bus) = 3.7 V to 5 V 0 2.5 VI(bus) = 5 V to 5.5 V 0.7 2.5 Power off VCC = 0, VI(bus) = 0 V to 2.5 V –40 mA IOS Short circuit output current Terminal –15 –35 –75 Short-mA Bus –25 –50 –125 ICC Supply current No load, TE, DE, and SC low 110 mA CI/O(b ) Bus port capacitance VCC = 5 V to 0, bus) Bus-CC 16 pF VI/O = 0 to 2 V, f = 1 MHz † All typical values are at VCC = 5 V, TA = 25°C. ‡ VOH applies for 3-state outputs only. SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low- to high-level output Terminal Bus CL = 30 pF, 14 20 ns tPHL Propagation delay time, high- to low-level output L See Figure 1 14 20 tPLH Propagation delay time, low- to high-level output Terminal Bus (SRQ,NDAC, NRFD) CL = 30 pF, See Figure 1 29 35 ns tPLH Propagation delay time, low- to high-level output Bus Terminal CL = 30 pF, 10 20 ns tPHL Propagation delay time, high- to low-level output L See Figure 2 15 22 tPZH Output enable time to high level Bus (ATN 60 tPHZ Output disable time from high level TE,DC, ATN, EOI, REN, See Figure 3 45 ns tPZL Output enable time to low level or SC , , IFC, and 60 tPLZ Output disable time from low level DAV) 55 tPZH Output enable time to high level 55 tPHZ Output disable time from high level TE,DC, Terminal See Figure 4 50 ns tPZL Output enable time to low level or SC 45 tPLZ Output disable time from low level 55 SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 PARAMETER MEASUREMENT INFORMATION VOLTAGE WAVEFORMS LOAD CIRCUIT 480 W 200 W (see Note A) CL = 30 pF Test Point 5 V Output Bus Input Terminal See Note B VOH VOH 0 V 3 V tPHL 2.2 V 1.0 V 1.5 V tPLH 1.5 V From (Bus) Output Under Test NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 3 1 MHz, 50% duty cycle, tr 3 6 ns, tf 3 6 ns, ZO = 50 W. Figure 1. Terminal-to-Bus Load Circuit and Voltage Waveforms See Note B 1.5 V tPLH 1.5 V 1.5 V 1.5 V tPHL 3 V 0 V VOH VOL Bus Input Output From (Terminal) Output Under Test 4.3 V Test Point CL = 30 pF (see Note A) 240 W 3 kW LOAD CIRCUIT VOLTAGE WAVEFORMS Terminal NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 3 1 MHz, 50% duty cycle, tr 3 6 ns, tf 3 6 ns, ZO = 50 W. Figure 2. Bus-to-Terminal Load Circuit and Voltage Waveforms SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 3 1 MHz, 50% duty cycle, tr 3 6 ns, tf 3 6 ns, ZO = 50 W. S1 Open tPHZ 1.5 V 3 V 0 V S1 Closed 1 V 3.5 V VOL Input Control See Note B 1.5 V tPZH S1 VOLTAGE WAVEFORMS 2 V tPZL 90% 0.5 V tPLZ VOH 0 V Bus Output Bus Output 5 V Test Point CL = 15 pF (see Note A) 200 W 480 W LOAD CIRCUIT From (Bus) Output Under Test Figure 3. Bus Enable and Disable Times Load Circuit and Voltage Waveforms SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 PARAMETER MEASUREMENT INFORMATION Output 90% Terminal S1 Open S1 Closed Terminal tPHZ VOLTAGE WAVEFORMS Output 0 V VOH tPLZ 0.7 V tPZL 1.5 V tPZH 1.5 V See Note B Control Input VOL 4 V 1 V 0 V 3 V 1.5 V LOAD CIRCUIT 3 kW 240 W Test Point S1 4.3 V CL = 15 pF (see Note A) From (Terminal) Output Under Test NOTES: A. CL includes probe and jig capacitance. B. The Input pulse is supplied by a generator having the following characteristics: PRR 3 1 MHz, 50% duty cycle, tr 3 6 ns, tf 3 6 ns, ZO = 50 W. Figure 4. Terminal Enable and Disable Times Load Circuit and Voltage Waveforms SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS VOH – High-Level Output Voltage – V TERMINAL I/O PORTS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 3.5 3 2.5 2 1.5 1 0.5 –5 –10 –15 –20 –25 –30 –35 0 –40 4 0 TA = 25°C VCC = 5 V IOH – High-Level Output Current – mA Figure 5 IOL – Low-Level Output Current – mA – Low-Level Output Voltage – V TERMINAL I/O PORTS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT TA = 25°C VCC = 5 V 0.5 0.4 0.3 0.2 0.1 10 20 30 40 50 0 60 0.6 0 VOL Figure 6 2 – Output Voltage – V TERMINAL I/O PORTS OUTPUT VOLTAGE vs BUS INPUT VOLTAGE VIT– TA = 25°C No Load VCC = 5 V 3.5 3 2.5 2 1.5 1 0.5 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0 4 VI – Bus Input Voltage – V 0 VO VIT+ Figure 7 SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TYPICAL CHARACTERISTICS IOH – High-Level Output Current – mA – High-Level Output Voltage – V GPIB I/O PORTS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT TA = 25°C VCC = 5 V 3 2 1 –10 –20 –40 –30 –50 0 –60 0 0 VOH Figure 8 IOL – Low-Level Output Current – mA – Low-Level Output Voltage – V GPIB I/O PORTS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT TA = 25°C VCC = 5 V 0.5 0.4 0.3 0.2 0.1 10 20 30 40 50 60 70 80 90 0 100 0.6 0 VOL Figure 9 Figure 10 VI – Input Voltage – V VO – Output Voltage – V GPIB I/O PORTS OUTPUT VOLTAGE vs THERMAL INPUT VOLTAGE TA = 25°C No Load VCC = 5 V 3 2 1 1 1.1 1.2 1.3 1.4 1.5 1.6 0 4 0.9 1.7 – Current – mA GPIB I/O PORTS CURRENT vs VOLTAGE 2 1 0 –1 –2 –3 –6 –1 0 1 2 3 4 5 –7 6 VI/O – Voltage – V –2 TA = 25°C VCC = 5 V ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ The Unshaded Area Conforms to Paragraph 3.5.3 of IEEE Standard 488-1978 II/O –5 –4 Figure 11 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) SN75161BDW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75161BDWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75161BDWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75161BDWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75161BDWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75161BN ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75161BNE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75162BDW ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75162BDWE4 ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75162BDWG4 ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75162BDWR ACTIVE SOIC DW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75162BDWRE4 ACTIVE SOIC DW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75162BDWRG4 ACTIVE SOIC DW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75162BN OBSOLETE PDIP N 22 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 Addendum-Page 2 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant SN75161BDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN75161BDWR SOIC DW 20 2000 330.0 24.4 10.8 13.1 2.65 12.0 24.0 Q1 SN75162BDWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Feb-2011 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN75161BDWR SOIC DW 20 2000 346.0 346.0 41.0 SN75161BDWR SOIC DW 20 2000 346.0 346.0 41.0 SN75162BDWR SOIC DW 24 2000 346.0 346.0 41.0 PACKAGE MATERIALS INFORMATION www.ti.com 19-Feb-2011 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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