7 Amphenol® - Amphenol Canada - Farnell Element 14 - Revenir à l'accueil

 

 

Branding Farnell element14 (France)

 

Farnell Element 14 :

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Everything You Need To Know About Arduino

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Tutorial 01 for Arduino: Getting Acquainted with Arduino

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The Cube® 3D Printer

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What's easier- DIY Dentistry or our new our website features?

 

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Ben Heck's Getting Started with the BeagleBone Black Trailer

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Ben Heck's Home-Brew Solder Reflow Oven 2.0 Trailer

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Get Started with Pi Episode 3 - Online with Raspberry Pi

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Discover Simulink Promo -- Exclusive element14 Webinar

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Ben Heck's TV Proximity Sensor Trailer

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Ben Heck's PlayStation 4 Teardown Trailer

See the trailer for the next exciting episode of The Ben Heck show. Check back on Friday to be among the first to see the exclusive full show on element…

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Get Started with Pi Episode 4 - Your First Raspberry Pi Project

Connect your Raspberry Pi to a breadboard, download some code and create a push-button audio play project.

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Ben Heck Anti-Pickpocket Wallet Trailer

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Molex Earphones - The 14 Holiday Products of Newark element14 Promotion

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Tripp Lite Surge Protector - The 14 Holiday Products of Newark element14 Promotion

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Microchip ChipKIT Pi - The 14 Holiday Products of Newark element14 Promotion

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Beagle Bone Black - The 14 Holiday Products of Newark element14 Promotion

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3M E26, LED Lamps - The 14 Holiday Products of Newark element14 Promotion

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3M Colored Duct Tape - The 14 Holiday Products of Newark element14 Promotion

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Tenma Soldering Station - The 14 Holiday Products of Newark element14 Promotion

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Duratool Screwdriver Kit - The 14 Holiday Products of Newark element14 Promotion

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Cubify 3D Cube - The 14 Holiday Products of Newark element14 Promotion

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Bud Boardganizer - The 14 Holiday Products of Newark element14 Promotion

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Raspberry Pi Starter Kit - The 14 Holiday Products of Newark element14 Promotion

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Fluke 323 True-rms Clamp Meter - The 14 Holiday Products of Newark element14 Promotion

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Dymo RHINO 6000 Label Printer - The 14 Holiday Products of Newark element14 Promotion

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3M LED Advanced Lights A-19 - The 14 Holiday Products of Newark element14 Promotion

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Innovative LPS Resistor Features Very High Power Dissipation

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Charge Injection Evaluation Board for DG508B Multiplexer Demo

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Ben Heck The Great Glue Gun Trailer Part 2

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Introducing element14 TV

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Ben Heck Time to Meet Your Maker Trailer

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Détecteur de composants

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Recherche intégrée

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Ben Builds an Accessibility Guitar Trailer Part 1

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Ben Builds an Accessibility Guitar - Part 2 Trailer

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PiFace Control and Display Introduction

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Flashmob Farnell

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Express Yourself in 3D with Cube 3D Printers from Newark element14

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Farnell YouTube Channel Move

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Farnell: Design with the best

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French Farnell Quest

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Altera - 3 Ways to Quickly Adapt to Changing Ethernet Protocols

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Cy-Net3 Network Module

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MC AT - Professional and Precision Series Thin Film Chip Resistors

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Solderless LED Connector

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PSA-T Series Spectrum Analyser: PSA1301T/ PSA2701T

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3-axis Universal Motion Controller For Stepper Motor Drivers: TMC429

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Voltage Level Translation

Puce électronique / Microchip :

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Microchip - 8-bit Wireless Development Kit

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 2 of 3

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 3 of 3

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Microchip - Introduction to mTouch Capacitive Touch Sensing Part 1 of 3

Sans fil - Wireless :

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Microchip - 8-bit Wireless Development Kit

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Wireless Power Solutions - Wurth Electronics, Texas Instruments, CadSoft and element14

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Analog Devices - Remote Water Quality Monitoring via a Low Power, Wireless Network

Texas instrument :

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Texas Instruments - Automotive LED Headlights

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Texas Instruments - Digital Power Solutions

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Texas Instruments - Industrial Sensor Solutions

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Texas Instruments - Wireless Pen Input Demo (Mobile World Congress)

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Texas Instruments - Industrial Automation System Components

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Texas Instruments - TMS320C66x - Industry's first 10-GHz fixed/floating point DSP

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Texas Instruments - TMS320C66x KeyStone Multicore Architecture

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Texas Instruments - Industrial Interfaces

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Texas Instruments - Concerto™ MCUs - Connectivity without compromise

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Texas Instruments - Stellaris Robot Chronos

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Texas Instruments - DRV8412-C2-KIT, Brushed DC and Stepper Motor Control Kit

Ordinateurs :

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Ask Ben Heck - Connect Raspberry Pi to Car Computer

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Ben's Portable Raspberry Pi Computer Trailer

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Ben's Raspberry Pi Portable Computer Trailer 2

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Ben Heck's Pocket Computer Trailer

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Ask Ben Heck - Atari Computer

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Ask Ben Heck - Using Computer Monitors for External Displays

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Raspberry Pi Partnership with BBC Computer Literacy Project - Answers from co-founder Eben Upton

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Installing RaspBMC on your Raspberry Pi with the Farnell element14 Accessory kit

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Raspberry Pi Served - Joey Hudy

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Happy Birthday Raspberry Pi

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Raspberry Pi board B product overview

Logiciels :

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Ask Ben Heck - Best Opensource or Free CAD Software

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Tektronix FPGAView™ software makes debugging of FPGAs faster than ever!

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Ask Ben Heck - Best Open-Source Schematic Capture and PCB Layout Software

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Introduction to Cadsoft EAGLE PCB Design Software in Chinese

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Altera - Developing Software for Embedded Systems on FPGAs

Tutoriels :

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Ben Heck The Great Glue Gun Trailer Part 1

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the knode tutorial - element14

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Ben's Autodesk 123D Tutorial Trailer

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Ben's CadSoft EAGLE Tutorial Trailer

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Ben Heck's Soldering Tutorial Trailer

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Ben Heck's AVR Dev Board tutorial

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Ben Heck's Pinball Tutorial Trailer

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Ben Heck's Interface Tutorial Trailer

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First Stage with Python and PiFace Digital

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Cypress - Getting Started with PSoC® 3 - Part 2

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Energy Harvesting Challenge

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New Features of CadSoft EAGLE v6

Autres documentations :

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April 2005 1 M0450-041405 MIC809/810 Microprocessor Reset Circuits General Description The MIC809 and MIC810 are inexpensive microprocessor supervisory circuits that monitor power supplies in microprocessor based systems. The function of these devices is to assert a reset if the power supply drops below a designated reset threshold level. Several different reset threshold levels are available to accommodate 3V, 3.3V or 5V powered systems. The MIC809 has an active-low /RESET output, while the MIC810 offers an active-high RESET output. The reset output is guaranteed to remain asserted for a minimum of 140ms after VCC has risen above the designated reset threshold level. Having a push-pull output stage, the MIC809/810 does not require a pull-up resistor at the output. The MIC809/810 comes in a 3-pin SOT-23 and SC-70 package. The MIC809 is also available with a shorter reset timeout (30ms min.). See the MIC809-5. All support documentation can be found on Micrel’s web site at www.micrel.com. Typical Application VCC RESET µP RESET VCC MIC809 VCC Features • Precision voltage monitor for 3V, 3.3V or 5V power supplies • /RESET remains valid with VCC as low as 1.4V for SOT- 23 packaged part • /RESET remains valid with VCC as low as 1V for SC70 packaged part • Typically less than15µA supply current for SOT-23 packaged part • 5µ typical supply current for SC70 packaged part • 140ms minimum reset pulse widths available • Available in 3-pin SOT-23 and SC-70 package Applications • Portable equipment • Intelligent instruments • Critical microprocessor power monitoring • Printers/computers • Controllers Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com MIC809/810 Micrel M0450-041405 2 April 2005 Pin Description Pin Number Pin Number Pin Name Pin Function MIC809 MIC810 1 1 GND IC Ground Pin. 2 N/A /RESET /RESET goes low if VCC falls below the reset threshold and remains asserted for one reset timeout period (140ms min.) after VCC exceeds the reset threshold. N/A 2 RESET RESET goes high if VCC falls below the reset threshold and remains asserted for one reset timeout period (140ms min.) after VCC exceeds the reset threshold. 3 3 VCC Power Supply Input. Pin Confi guration 1 2 3 VCC GND MIC809 RESET 1 2 3 VCC GND MIC810 RESET Pin Number Pin Number Pin Name Pin Function MIC809 MIC810 N/A 2 RESET RESET goes high if V 3 3 VCC Power Supply Input. Pin Number Pin Number Pin Name Pin Function MIC809 MIC810 1 1 GND IC Ground Pin. 2 N/A /RESET /RESET goes low if V N/A 2 RESET RESET goes high if V 3 3 VCC Power Supply Input. Pin Number Pin Number Pin Name Pin Function 1 1 GND IC Ground Pin. 2 N/A /RESET /RESET goes low if V N/A 2 RESET RESET goes high if V 3 3 VCC Power Supply Input. Pin Number Pin Number Pin Name Pin Function 1 1 GND IC Ground Pin. 2 N/A /RESET /RESET goes low if V N/A 2 RESET RESET goes high if V 3 3 VCC Power Supply Input. MIC809 3-Lead SOT23 MIC809 3-Lead SC70 Ordering Information Part Number Threshold Operating Lead Finish 3-lead SOT-23 Package 3-lead SC-70 Package Marking Voltage Temp. Range MIC809LU MIC809LBC3 IL 4.63 –40°C to +85°C Standard MIC809MU MIC809MBC3 IM 4.38 –40°C to +85°C Standard MIC809JU MIC809JBC3 IJ 4.00 –40°C to +85°C Standard MIC809TU MIC809TBC3 IT 3.08 –40°C to +85°C Standard MIC809SU MIC809SBC3 IS 2.93 –40°C to +85°C Standard MIC809RU MIC809RBC3 IR 2.63 –40°C to +85°C Standard MIC810LU MIC810LBC3 JL 4.63 –40°C to +85°C Standard MIC810MU MIC810MBC3 JM 4.38 –40°C to +85°C Standard MIC810JU MIC810JBC3 JJ 4.00 –40°C to +85°C Standard MIC810TU MIC810TBC3 JT 3.08 –40°C to +85°C Standard MIC810SU MIC810SBC3 JS 2.93 –40°C to +85°C Standard MIC810RU MIC810RBC3 JR 2.63 –40°C to +85°C Standard MIC809LUY MIC809LYC3 IL 4.63 –40°C to +85°C Pb-Free MIC809MUY MIC809MYC3 IM 4.38 –40°C to +85°C Pb-Free MIC809JUY MIC809JYC3 IJ 4.00 –40°C to +85°C Pb-Free MIC809TUY MIC809TYC3 IT 3.08 –40°C to +85°C Pb-Free MIC809SUY MIC809SYC3 IS 2.93 –40°C to +85°C Pb-Free MIC809RUY MIC809RYC3 IR 2.63 –40°C to +85°C Pb-Free MIC810LUY MIC810LYC3 JL 4.63 –40°C to +85°C Pb-Free 4.63 –40°C to +85°C Pb-Free MIC810MUY MIC810MYC3 JM 4.38 –40°C to +85°C Pb-Free MIC810JUY MIC810JYC3 JJ 4.00 –40°C to +85°C Pb-Free MIC810TUY MIC810TYC3 JT 3.08 –40°C to +85°C Pb-Free MIC810SUY MIC810SYC3 JS 2.93 –40°C to +85°C Pb-Free MIC810RUY MIC810RYC3 JR 2.63 –40°C to +85°C Pb-Free Note: Contact factory for SC70 packaged Pb-free options.. MIC809LU MIC809LBC3 IL 4.63 –40°C to +85°C Standard MIC809MU MIC809MBC3 IM 4.38 –40°C to +85°C Standard MIC809JU MIC809JBC3 IJ 4.00 –40°C to +85°C Standard MIC809TU MIC809TBC3 IT 3.08 –40°C to +85°C Standard MIC809SU MIC809SBC3 IS 2.93 –40°C to +85°C Standard MIC809RU MIC809RBC3 IR 2.63 –40°C to +85°C Standard MIC810LU MIC810LBC3 JL 4.63 –40°C to +85°C Standard MIC810MU MIC810MBC3 JM 4.38 –40°C to +85°C Standard MIC810JU MIC810JBC3 JJ 4.00 –40°C to +85°C Standard MIC810TU MIC810TBC3 JT 3.08 –40°C to +85°C Standard MIC810SU MIC810SBC3 JS 2.93 –40°C to +85°C Standard MIC810RU MIC810RBC3 JR 2.63 –40°C to +85°C Standard Threshold Operating Marking Voltage Temp. Range MIC809LU MIC809LBC3 IL 4.63 –40°C to +85°C Standard MIC809MU MIC809MBC3 IM 4.38 –40°C to +85°C Standard MIC809JU MIC809JBC3 IJ 4.00 –40°C to +85°C Standard MIC809TU MIC809TBC3 IT 3.08 –40°C to +85°C Standard MIC809SU MIC809SBC3 IS 2.93 –40°C to +85°C Standard MIC809RU MIC809RBC3 IR 2.63 –40°C to +85°C Standard MIC810LU MIC810LBC3 JL 4.63 –40°C to +85°C Standard MIC810MU MIC810MBC3 JM 4.38 –40°C to +85°C Standard MIC810JU MIC810JBC3 JJ 4.00 –40°C to +85°C Standard MIC810TU MIC810TBC3 JT 3.08 –40°C to +85°C Standard MIC810SU MIC810SBC3 JS 2.93 –40°C to +85°C Standard MIC810RU MIC810RBC3 JR 2.63 –40°C to +85°C Standard 4.63 –40°C to +85°C Pb-Free 4.38 –40°C to +85°C Pb-Free 4.00 –40°C to +85°C Pb-Free 3.08 –40°C to +85°C Pb-Free 2.93 –40°C to +85°C Pb-Free 2.63 –40°C to +85°C Pb-Free 4.63 –40°C to +85°C Pb-Free 4.38 –40°C to +85°C Pb-Free 4.00 –40°C to +85°C Pb-Free 3.08 –40°C to +85°C Pb-Free 2.93 –40°C to +85°C Pb-Free 2.63 –40°C to +85°C Pb-Free Lead Finish MIC809LU MIC809LBC3 IL 4.63 –40°C to +85°C Standard MIC809MU MIC809MBC3 IM 4.38 –40°C to +85°C Standard MIC809JU MIC809JBC3 IJ 4.00 –40°C to +85°C Standard MIC809TU MIC809TBC3 IT 3.08 –40°C to +85°C Standard MIC809SU MIC809SBC3 IS 2.93 –40°C to +85°C Standard MIC809RU MIC809RBC3 IR 2.63 –40°C to +85°C Standard MIC810LU MIC810LBC3 JL 4.63 –40°C to +85°C Standard MIC810MU MIC810MBC3 JM 4.38 –40°C to +85°C Standard MIC810JU MIC810JBC3 JJ 4.00 –40°C to +85°C Standard MIC810TU MIC810TBC3 JT 3.08 –40°C to +85°C Standard MIC810SU MIC810SBC3 JS 2.93 –40°C to +85°C Standard MIC810RU MIC810RBC3 JR 2.63 –40°C to +85°C Standard 4.63 –40°C to +85°C Pb-Free 4.38 –40°C to +85°C Pb-Free 4.00 –40°C to +85°C Pb-Free 3.08 –40°C to +85°C Pb-Free 2.93 –40°C to +85°C Pb-Free 2.63 –40°C to +85°C Pb-Free 4.63 –40°C to +85°C Pb-Free 4.38 –40°C to +85°C Pb-Free 4.00 –40°C to +85°C Pb-Free 3.08 –40°C to +85°C Pb-Free 2.93 –40°C to +85°C Pb-Free 2.63 –40°C to +85°C Pb-Free MIC809LU MIC809LBC3 IL 4.63 –40°C to +85°C Standard MIC809MU MIC809MBC3 IM 4.38 –40°C to +85°C Standard MIC809JU MIC809JBC3 IJ 4.00 –40°C to +85°C Standard MIC809TU MIC809TBC3 IT 3.08 –40°C to +85°C Standard MIC809SU MIC809SBC3 IS 2.93 –40°C to +85°C Standard MIC809RU MIC809RBC3 IR 2.63 –40°C to +85°C Standard MIC810LU MIC810LBC3 JL 4.63 –40°C to +85°C Standard MIC810MU MIC810MBC3 JM 4.38 –40°C to +85°C Standard MIC810JU MIC810JBC3 JJ 4.00 –40°C to +85°C Standard MIC810TU MIC810TBC3 JT 3.08 –40°C to +85°C Standard MIC810SU MIC810SBC3 JS 2.93 –40°C to +85°C Standard MIC810RU MIC810RBC3 JR 2.63 –40°C to +85°C Standard MIC809LUY MIC809LYC3 MIC809MUY MIC809MYC3 MIC809JUY MIC809JYC3 MIC809TUY MIC809TYC3 MIC809SUY MIC809SYC3 MIC809RUY MIC809RYC3 MIC810LUY MIC810LYC3 MIC810MUY MIC810MYC3 MIC810JUY MIC810JYC3 MIC810TUY MIC810TYC3 MIC810SUY MIC810SYC3 MIC810RUY MIC810RYC3 Threshold Operating Marking Voltage Temp. Range MIC809LU MIC809LBC3 IL 4.63 –40°C to +85°C Standard MIC809MU MIC809MBC3 IM 4.38 –40°C to +85°C Standard MIC809JU MIC809JBC3 IJ 4.00 –40°C to +85°C Standard MIC809TU MIC809TBC3 IT 3.08 –40°C to +85°C Standard MIC809SU MIC809SBC3 IS 2.93 –40°C to +85°C Standard MIC809RU MIC809RBC3 IR 2.63 –40°C to +85°C Standard MIC810LU MIC810LBC3 JL 4.63 –40°C to +85°C Standard MIC810MU MIC810MBC3 JM 4.38 –40°C to +85°C Standard MIC810JU MIC810JBC3 JJ 4.00 –40°C to +85°C Standard MIC810TU MIC810TBC3 JT 3.08 –40°C to +85°C Standard MIC810SU MIC810SBC3 JS 2.93 –40°C to +85°C Standard MIC810RU MIC810RBC3 JR 2.63 –40°C to +85°C Standard 4.63 –40°C to +85°C Pb-Free 4.38 –40°C to +85°C Pb-Free 4.00 –40°C to +85°C Pb-Free 3.08 –40°C to +85°C Pb-Free 2.93 –40°C to +85°C Pb-Free 2.63 –40°C to +85°C Pb-Free 4.63 –40°C to +85°C Pb-Free 4.38 –40°C to +85°C Pb-Free 4.00 –40°C to +85°C Pb-Free 3.08 –40°C to +85°C Pb-Free 2.93 –40°C to +85°C Pb-Free 2.63 –40°C to +85°C Pb-Free MIC810 3-Lead SOT23 MIC810 3-Lead SC70 April 2005 3 M0450-041405 MIC809/810 Micrel Absolute Maximum Ratings(1) Terminal Voltage (VCC) ...................................–0.3V to 6.0V Input Current (VCC) ..................................................... 20mA Output Current (RESET, /RESET) .............................. 20mA Lead Temperature (soldering, 10 sec.) ...................... 300°C Storage Temperature (TS) .......................... –65°C to 150°C Rate of Rise (VCC) .................................................. 100V/µs ESD Rating(3) ............................................3kV (SC70 Package) Operating Ratings(2) Operating Temperature Range MIC809 ..................................................... –40°C to 85°C MIC810 ..................................................... –40°C to 85°C Power Dissipation (TA = +70°C) .............................. 320mW Electrical Characteristics(4) For typical values, VCC = 5V for MIC8_L/M/J, VCC = 3.3V for MIC8_S/T, VCC = 3V for MIC8_R; TA = 25°C, bold values indicate –40°C ≤ TA ≤ +85°C; unless noted. Symbol Parameter Condition Min Typ Max Units VCC Operating Voltage Range TA = 0°C to 70°C SOT-23 package = 0°C to 70°C SOT-23 package 1.4 5.5 V TA = –40°C to 85°C SOT-23 package = –40°C to 85°C SOT-23 package 1.6 5.5 V TA = –40°C to 85°C SC70 package = –40°C to 85°C SC70 package 1 5.5 V I CC Supply Current MIC809L/M/J, MIC810L/M/J SOT-23 Package 9 15 µA For SC-70 Package: MIC809L/M/J, 5 15 µA MIC810L/M/J VCC < 3.6V, MIC809R/S/T, MIC810R/S/T 6 10 µA SOT-23 package For SC-70 Package: VCC < 3.6V, MIC809R/S/T, MIC810R/S/T 5 10 µA VTH Reset Voltage Threshold MIC809L, MIC810L 4.50 4.63 4.75 V MIC809M, MIC810M 4.25 4.38 4.50 V MIC809J, MIC810J 3.89 4.00 4.10 V MIC809T, MIC810T 3.00 3.08 3.15 V MIC809S, MIC810S 2.85 2.93 3.00 V MIC809R, MIC810R 2.55 2.63 2.70 V t RST Reset Timeout Period Reset Timeout Period RST 140 240 560 ms VOH /RESET Output Voltage I SOURCE = 800µA, MIC809L/M/J VCC–1.5V V MIC809 I SOURCE = 500µA, MIC809R/S/T 0.8×VCC V VOL /RESET Output Voltage MIC809 V /RESET Output Voltage MIC809 VCC = VTH min., ISINK = 3.2mA, MIC809L/M/J 0.4 V VCC = VTH min., ISINK = 1.2mA, MIC809R/S/T 0.3 V VCC > 1.4V, ISINK = 50µA, TA = 0°C to +70°C = 0°C to +70°C 0.3 V ` For SC-70 Package: VCC = 1V, ISINK = 50µA 0.3 V TA = –40°C to 85°C VCC > 1.6V, ISINK = 50µA, TA = –40° to +85°C = –40° to +85°C 0.3 V VOH RESET Output Voltage MIC810 1.8V < VCC < VTH min., ISOURCE = 150µA 0.8×VCC V VOL RESET Output Voltage MIC810 I RESET Output Voltage MIC810 I OL SINK = 3.2mA, MIC810L/M/J 0.4 V I SINK = 1.2mA, MIC810R/S/T 0.3 V Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside its operating rating. 3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF. 4. Specifi cation for packaged product only. Symbol Parameter Condition Min Typ Max Units Operating Voltage Range T T T Supply Current MIC809L/M/J, MIC810L/M/J SOT-23 Package 9 V SOT-23 package MIC809R/S/T, MIC810R/S/T Reset Voltage Threshold MIC809L, MIC810L MIC809M, MIC810M MIC809J, MIC810J MIC809T, MIC810T MIC809S, MIC810S MIC809R, MIC810R Reset Timeout Period /RESET Output Voltage I MIC809 I /RESET Output Voltage MIC809 V V V ` For SC-70 Package: V T V RESET Output Voltage MIC810 1.8V < V RESET Output Voltage MIC810 I I Symbol Parameter Condition Min Typ Max Units Operating Voltage Range T T T Supply Current MIC809L/M/J, MIC810L/M/J SOT-23 Package 9 V SOT-23 package MIC809R/S/T, MIC810R/S/T Reset Voltage Threshold MIC809L, MIC810L MIC809M, MIC810M MIC809J, MIC810J MIC809T, MIC810T MIC809S, MIC810S MIC809R, MIC810R Reset Timeout Period /RESET Output Voltage I MIC809 I /RESET Output Voltage MIC809 V V V ` For SC-70 Package: V T V RESET Output Voltage MIC810 1.8V < V RESET Output Voltage MIC810 I I Symbol Parameter Condition Min Typ Max Units Supply Current MIC809L/M/J, MIC810L/M/J SOT-23 Package 9 < 3.6V, MIC809R/S/T, MIC810R/S/T 6 = 3.2mA, MIC809L/M/J = 1.2mA, MIC809R/S/T = 0°C to +70°C A = –40° to +85°C = 3.2mA, MIC810L/M/J = 1.2mA, MIC810R/S/T Symbol Parameter Condition Min Typ Max Units 5.5 Supply Current MIC809L/M/J, MIC810L/M/J SOT-23 Package 9 < 3.6V, MIC809R/S/T, MIC810R/S/T 6 4.63 4.38 4.00 3.08 2.93 2.63 240 V V = 3.2mA, MIC809L/M/J = 1.2mA, MIC809R/S/T = 0°C to +70°C A = –40° to +85°C V = 3.2mA, MIC810L/M/J = 1.2mA, MIC810R/S/T Symbol Parameter Condition Min Typ Max Units 5.5 V V V Symbol Parameter Condition Min Typ Max Units V V V µA µA µA V V V V V V ms V V V V V V V V V V MIC809/810 Micrel M0450-041405 4 April 2005 Functional Diagram + Reset - Threshold (V) VCC (3) RESET (2) RESET (MIC810) GND (1) RESET GENERATOR Timing Diagram VCC VTH VTH /RESET tRST tRST Reset Timing Diagram April 2005 5 M0450-041405 MIC809/810 Micrel Applications Information Microprocessor Reset The /RESET (or RESET) pin is asserted whenever VCC falls below the reset threshold voltage. The /RESET pin remains asserted for a period of 140ms after VCC has risen above the reset threshold voltage. The reset function ensures the microprocessor is properly reset and powers up in a known condition after a power failure. /RESET will remain valid with VCC as low as 1.4V (1V for SC-70 package). VCC Transients The MIC809/810 are relatively immune to negative-going VCC glitches below the reset threshold. Typically, a negative-going transient 125mV below the reset threshold with a duration of 20µs or less (SC70 package) will not cause a reset. Interfacing to Bidirectional Reset Pins The MIC809/810 can interface with µPs with bidirectional reset pins by connecting a 4.7kΩ resistor in series with the MIC809/810 output and the µP reset pin. /RESET Valid at Low Voltage A resistor can be added from the /RESET pin to ground to ensure the /RESET output remains low with VCC down to 0V. A 100kΩ resistor connected from the /RESET to ground is recommended. The resistor should be small enough to pull-down any stray leakage currents and large enough not to load the reset output. See Figure below. VCC RESET µP RESET VCC MIC809 VCC 100K Reset Valid to VCC = 0V MIC809/810 Micrel M0450-041405 6 April 2005 Package Information 0.15 (0.006) 0.076 (0.0030) 0.41 (0.016) 0.13 (0.005) 3.05 (0.120) 2.67 (0.105) 8 0 0.445 (0.0175) TYP 3 PLACES 2.50 (0.098) 2.10 (0.083) 1.40 (0.055) 1.19 (0.047) 0.10 (0.004) 0.013 (0.0005) 1.15 (0.045) 0.76 (0.030) DIMENSIONS: MM (INCH) 2.36 (0.093) 2.28 (0.090) CL CL 3-lead SOT-23 (M3) 3-Lead SC-70 (C3) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifi cations at any time without notifi cation to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a signifi cant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. RESET MR WDI V 100 nF DD GND TPS3823-33 VDD RESET I/O GND MSP430C325 3.3 V 3 2 4 5 TPS3820, TPS3823, TPS3828: DBV PACKAGE TPS3820A, TPS3823A, TPS3828A: DBV PACKAGE (TOP VIEW) RESET 1 GND MR VDD WDI 3 2 4 5 TPS3825 and TPS3825A: DBV PACKAGE (TOP VIEW) RESET 1 GND RESET VDD MR 3 2 4 5 TPS3824 and TPS3824A: DBV PACKAGE (TOP VIEW) RESET 1 GND RESET VDD WDI TPS382x-xx TPS382xA-xx www.ti.com SLVS165J –APRIL 1998–REVISED APRIL 2013 Processor Supervisory Circuits Check for Samples: TPS382x-xx, TPS382xA-xx 1FEATURES 2• Power-On Reset Generator With Fixed Delay Time of 200 ms (TPS3823/4/5/8) or 25 ms (TPS3820) • Manual Reset Input (TPS3820/3/5/8) • Reset Output Available in Active-Low (TPS3820/3/4/5), Active-High (TPS3824/5) and Open-Drain (TPS3828) • Supply Voltage Supervision Range: 2.5 V, 3 V, 3.3 V, 5 V • Watchdog Timer (TPS3820/3/4/8) • Supply Current of 15 μA (Typ) • SOT23-5 Package • Temperature Range: −40°C to 85°C APPLICATIONS • Applications Using DSPs, Microcontrollers, or Microprocessors • Industrial Equipment • Programmable Controls • Automotive Systems • Portable/Battery-Powered Equipment • Intelligent Instruments • Wireless Communications Systems • Notebook/Desktop Computers TYPICAL APPLICATION DESCRIPTION The TPS382x family of supervisors provide circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power-on, RESET asserts when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage, VIT−. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td , starts after VDD has risen above the threshold voltage, VIT−. When the supply voltage drops below the threshold voltage VIT−, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage, VIT– , set by an internal voltage divider. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2All trademarks are the property of their respective owners. UNLESS OTHERWISE NOTED this document contains Copyright © 1998–2013, Texas Instruments Incorporated PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. WDI RESET TPS3824 WDI External TPS382x-xx TPS382xA-xx SLVS165J –APRIL 1998–REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION (CONTINUED) The TPS3820/3/5/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become active. The TPS3824/5 devices include a high-level output RESET. TPS3820/3/4/8 have a watchdog timer that is periodically triggered by a positive or negative transition at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, ttout, RESET becomes active for the time period td . This event also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog. In applications where the input to the WDI pin may be active (transitioning high and low) when the TPS3820/3/4/8 is asserting RESET, the TPS3820/3/4/8 does not return to a non-reset state when the input voltage is above VT. If the application requires that input to WDI is active when RESET pin is asserted, then the “A” version of the device should be used. The “A” versions will not latch the RESET to the asserted state if a WDI pulse is received while RESET is asserted. Figure 1 shows how to decouple WDI from the active signal using when using the non−”A” version. This is accomplished with an N−Channel FET in series with the WDI pin, with the gate of the FET connected to the RESET output. The “A” version of the device does not need this FET but will operate in circuits that have it. Therefore, the “A” version is backward compatible with the non’”A” versions. Figure 1. The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in an SOT23-5 package. The TPS382x devices are characterized for operation over a temperature range of −40°C to 85°C. PACKAGE INFORMATION(1) DEVICE NAME(2) DEVICE NAME(3) THRESHOLD VOLTAGE(4) MARKING TPS3820-33DBVT TPS3820-33DBVR 2.93 V PDEI TPS3820-50DBVT TPS3820-50DBVR 4.55 V PDDI TPS3823-25DBVT TPS3823-25DBVR 2.25 V PAPI TPS3823-30DBVT TPS3823-30DBVR 2.63 V PAQI TPS3823-33DBVT TPS3823-33DBVR 2.93 V PARI TPS3823-50DBVT TPS3823-50DBVR 4.55 V PASI TPS3824-25DBVT TPS3824-25DBVR 2.25 V PATI TPS3824-30DBVT TPS3824-30DBVR 2.63 V PAUI TPS3824-33DBVT TPS3824-33DBVR 2.93 V PAVI TPS3824-50DBVT TPS3824-50DBVR 4.55 V PAWI TPS3825-33DBVT TPS3825-33DBVR 2.93 V PDGI TPS3825-50DBVT TPS3825-50DBVR 4.55 V PDFI TPS3828-33DBVT TPS3828-33DBVR 2.93 V PDII TPS3828-50DBVT TPS3828-50DBVR 4.55 V PDHI TPS3823A-33DBVT TPS3823A-33DBVR 2.93 V PYPI (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) The DBVT package indicates tape and reel of 250 parts. (3) The DBVR package indicates tape and reel of 3000 parts. (4) For other threshold voltage versions, please contact the local TI sales office. 2 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: TPS382x-xx TPS382xA-xx undefined undefined t t d d tt(out) t V d DD VIT 1.1 V RESET WDI _ + VREF RESET Logic RESET(1) RESET VDD 52 kΩ 40 kΩ Transition Detector Auto−Reset Oscillator Watchdog Timer Logic MR(2) WDI TPS382x-xx TPS382xA-xx www.ti.com SLVS165J –APRIL 1998–REVISED APRIL 2013 FUNCTION/TRUTH TABLE INPUTS OUTPUTS MR(1) VDD > VIT RESET RESET(2) L 0 L H L 1 L H H 0 L H H 1 H L (1) TPS3820/3/5/8 (2) TPS3824/5 FUNCTIONAL BLOCK DIAGRAM (1) TPS3824/5 (2) TPS3820/3/5/8 TIMING DIAGRAM Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS382x-xx TPS382xA-xx TPS382x-xx TPS382xA-xx SLVS165J –APRIL 1998–REVISED APRIL 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS(1)(2) over operating free-air temperature range (unless otherwise noted) VALUE UNIT VDD Supply voltage 6 V V RESET, RESET, MR, WDI −0.3 to (VDD + 0.3) V IOL Maximum low output current 5 mA IOH Maximum high output current –5 mA IIK Input clamp current range (VI < 0 or VI > VDD) ±10 mA IOK Output clamp current range (VO < 0 or VO > VDD) ±10 mA Continuous total power dissipation See Dissipation Rating Table TA Operating free-air temperature range –40 to +85 °C Tstg Storage temperature range –65 to +150 °C Soldering temperature 260 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. DISSIPATION RATINGS OPERATING TA ≤ 25°C TA = 70°C TA = 85°C PACKAGE FACTOR POWER RATING POWER RATING POWER RATING ABOVE TA = 25°C DBV 437 mW 3.5 mW/°C 280 mW 227 mW RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VDD Supply voltage 1.1 5.5 V VI Input voltage 0 VDD + 0.3 V VIH High-level input voltage at MR and WDI 0.7 × VDD V VIL Low-level input voltage 0.3 × VDD V Δt/ΔV Input transition rise and fall rate at MR or WDI 100 ns/V TA Operating free-air temperature range –40 85 °C 4 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: TPS382x-xx TPS382xA-xx TPS382x-xx TPS382xA-xx www.ti.com SLVS165J –APRIL 1998–REVISED APRIL 2013 ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TPS382x-25 VDD = VIT− + 0.2 V, IOH = −20 μA TPS382x-30 0.8 × VDD RESET TPS382x-33 VDD = VIT− + 0.2 V, IOH = −30 μA V TPS382xA-33 TPS382x-50 VDD = VIT− + 0.2 V IOH = −120 μA VDD − 1.5 V TPS3824-25 VDD ≥ 1.8 V, IOH = −100 μA VOH High-level output voltage TPS3825-25 TPS3824-30 TPS3825-30 RESET 0.8 × VDD V TPS3824-33 VDD ≥ 1.8 V, IOH = −150 μA TPS3825-33 TPS3824-50 TPS3825-50 TPS3824-25 VDD = VIT− + 0.2 V, IOL = 1 mA TPS3825-25 TPS3824-30 TPS3825-30 RESET VDD = VIT− + 0.2 V, IOL = 1.2 mA 0.4 V TPS3824-33 TPS3825-33 V TPS3824-50 OL Low-level output voltage VDD = VIT− + 0.2 V, IOL = 3 mA TPS3825-50 RESET TPS382x-25 VDD = VIT− −0.2 V, IOL = 1 mA 0.4 V TPS382x-30 VDD = VIT− –0.2 V, IOL = 1.2 mA TPS382x-33 TPS382xA-33 TPS382x-50 VDD = VIT− − 0.2 V, IOL = 3 mA Power-up reset voltage(1) VDD ≥ 1.1 V, IOL = 20 μA 0.4 V TPS382x-25 2.21 2.25 2.30 TPS382x-30 2.59 2.63 2.69 TPS382x-33 TA = 0°C to +85°C V 2.88 2.93 3 TPS382xA-33 Negative-going input TPS382x-50 4.49 4.55 4.64 VIT− threshold voltage (2) TPS382x-25 2.20 2.25 2.30 TPS382x-30 2.57 2.63 2.69 TPS382x-33 TA = − 40°C to +85°C V 2.86 2.93 3 TPS382xA-33 TPS382x-50 4.46 4.55 4.64 TPS382x-25 TPS382x-30 30 Vhys Hysteresis at VDD input TPS382x-33 mV TPS382xA-33 TPS382x-50 50 IIH(AV) Average high-level input current WDI = VDD, time average (dc = 88%) 120 WDI µA IIL(AV) Average low-level input current WDI = 0.3 V, VDD = 5.5 V time average (dc = 12%) –15 WDI WDI = VDD 140 190 IIH High-level input current µA MR MR = VDD × 0.7, VDD = 5.5 V –40 –60 WDI WDI = 0.3 V, VDD = 5.5 V 140 190 IIL Low-level input current µA MR MR = 0.3 V, VDD = 5.5 V –110 –160 (1) The lowest supply voltage at which RESET becomes active. tr , VDD ≥ 15 μs/V. (2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed near the supply terminals. Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPS382x-xx TPS382xA-xx TPS382x-xx TPS382xA-xx SLVS165J –APRIL 1998–REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TPS382x-25 TPS382x-30 Output –400 short-circuit IOS RESET TPS382x-33 VDD = VIT, max + 0.2 V, VO = 0 V µA current(3) TPS382xA-33 TPS382x-50 –800 IDD Supply current WDI, MR, and Outputs unconnected 15 25 µA Internal pullup resistor at MR 52 kΩ Ci Input capacitance at MR, WDI VI = 0 V to 5.5 V 5 pF (3) The RESET short-circuit current is the maximum pullup current when RESET is driven low by a μP bidirectional reset pin. TIMING REQUIREMENTS AT At RL = 1 MΩ, CL = 50 pF, TA = 25°C PARAMETER TEST CONDITIONS MIN MAX UNIT at VDD VDD = VIT− + 0.2 V, VDD = VIT– – 0.2 V 6 μs tw Pulse width at MR VDD ≥ VIT− + 0.2 V, VIL = 0.3 x VDD, VIH = 0.7 x VDD 1 μs at WDI VDD ≥ VIT− + 0.2 V, VIL = 0.3 x VDD, VIH = 0.7 x VDD 100 ns SWITCHING CHARACTERISTICS At RL = 1 MΩ, CL = 50 pF, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TPS3820 V 112 200 300 ms DD ≥ VIT− + 0.2 V, ttout Watchdog time out TPS3823/4/8, TPS3823A See timing diagram 0.9 1.6 2.5 s TPS3820 V 15 25 37 DD ≥ VIT− +0.2 V, td Delay time ms TPS3823/4/5/8, TPS3823A See timing diagram 120 200 300 VDD ≥ VIT− +0.2 V, MR to RESET delay VIL = 0.3 x VDD, 0.1 Propagation (TPS3820/3/5/8, TPS3823A) (delay) time, tPHL VIH = 0.7 x VDD µs high-to-low-level output VIL = VIT– –0.2 V, VDD to RESET delay 25 VIH = VIT– + 0.2 V VDD ≥ VIT− +0.2 V, MR to RESET delay (TPS3824/5) VIL = 0.3 x VDD, 0.1 Propagation (delay) time, tPLH VIH = 0.7 x VDD µs low-to-high-level output V VIL = VIT– –0.2 V, DD to RESET delay 25 (TPS3824/5) VIH = VIT– + 0.2 V 6 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: TPS382x-xx TPS382xA-xx −50 −150 V −I Input Voltage at MR − V −200 50 0 85 C° −100 −40 C° − Input Current − I I Aµ VDD = 5.5 V WDI = Open −1 0 1 2 3 4 6 5 0 3 2.5 2 1.5 1 IOL − Low-Level Output Current − mA 1 0.5 0 VDD = 2.66 V WDI = Open MR = Open VOL− Low-Level Output Voltage − V −40 C° 85 C° 2 3 4 5 6 7 8 9 10 −40 1.001 1 0.999 0.998 −15 10 35 TA − Free-Air Temperature − C° 0.997 0.996 0.995 Normalized Input Threshold 60 85 Voltage −V IT(TA), VIT(25 C) ° −0.5 19 7 5 0.5 1.5 2.5 3.5 VDD − Supply Voltage − V 3 1 −1 4.5 6.5 MR = Open WDI = Open TA = 25°C 11 9 5.5 − Supply Current − IDD Aµ 13 17 15 TPS382x-33 TPS382x-xx TPS382xA-xx www.ti.com SLVS165J –APRIL 1998–REVISED APRIL 2013 TYPICAL CHARACTERISTICS NORMALIZED INPUT THRESHOLD VOLTAGE SUPPLY CURRENT vs vs FREE-AIR TEMPERATURE AT VDD SUPPLY VOLTAGE Figure 2. Figure 3. INPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs vs INPUT VOLTAGE AT MR LOW-LEVEL OUTPUT CURRENT Figure 4. Figure 5. Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TPS382x-xx TPS382xA-xx 0 6 200 400 600 800 4 2 0 − Minimum Pulse Duration at V 1000 8 tw sµ VDD − Threshold Overdrive − mV 10 WDI = Open MR = Open DD− 0 −50 IOH − High-Level Output Current − Aµ VDD = 3.2 V WDI = Open MR = Open VOH − High-Level Output Voltage − V −40 C° 85 C° −100 −150 −200 −250 3 2.5 2 1.5 1 0.5 0 3.5 0 IOH − High-Level Output Current − Aµ VDD = 5.5 V WDI = Open MR = Open VOH − High-Level Output Voltage − V −40 C° 85 C° −100 −200 −300 −400 6 5 4 3 2 1 0 −500 −600 −700 TPS382x-xx TPS382xA-xx SLVS165J –APRIL 1998–REVISED APRIL 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE vs vs HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT Figure 6. Figure 7. MINIMUM PULSE DURATION AT VDD vs VDD THRESHOLD OVERDRIVE Figure 8. 8 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: TPS382x-xx TPS382xA-xx TPS382x-xx TPS382xA-xx www.ti.com SLVS165J –APRIL 1998–REVISED APRIL 2013 REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision I (February 2013) to Revision J Page • Added TPS382xA-33 to second RESET row of VOH parameter in Electrical Characteristics table ...................................... 5 • Added TPS382xA-33 to third RESET row of VOL parameter in Electrical Characteristics table ........................................... 5 • Corrected typo in VOL RESET parameter test conditions ..................................................................................................... 5 • Added TPS382xA-33 to third and seventh rows of VIT– parameter in Electrical Characteristics table ................................. 5 • Added TPS382xA-33 to third row of Vhys parameter in Electrical Characteristics table ....................................................... 5 • Added TPS382xA-33 to third row of IOS parameter in Electrical Characteristics table ......................................................... 6 • Added TPS3823A to second row of ttout parameter in Switching Characteristics table ........................................................ 6 • Added TPS3823A to second row of td parameter in Switching Characteristics table .......................................................... 6 • Added TPS3823A to first row of tPHL parameter in Switching Characteristics table ............................................................. 6 Changes from Revision H (July 2012) to Revision I Page • Added last row to Package Information table ....................................................................................................................... 2 Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPS382x-xx TPS382xA-xx PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPS3820-33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDEI TPS3820-33DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDEI TPS3820-33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDEI TPS3820-33DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDEI TPS3820-50DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDDI TPS3820-50DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDDI TPS3820-50DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDDI TPS3820-50DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDDI TPS3823-25DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAPI TPS3823-25DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAPI TPS3823-25DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAPI TPS3823-25DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAPI TPS3823-30DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAQI TPS3823-30DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAQI TPS3823-30DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAQI TPS3823-30DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAQI TPS3823-33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PARI PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPS3823-33DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PARI TPS3823-33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PARI TPS3823-33DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PARI TPS3823-50DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PASI TPS3823-50DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PASI TPS3823-50DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PASI TPS3823-50DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PASI TPS3823A-33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PYPI TPS3823A-33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PYPI TPS3824-25DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PATI TPS3824-25DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PATI TPS3824-25DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PATI TPS3824-25DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PATI TPS3824-30DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAUI TPS3824-30DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAUI TPS3824-30DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAUI TPS3824-30DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAUI TPS3824-33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAVI PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPS3824-33DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAVI TPS3824-33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAVI TPS3824-33DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAVI TPS3824-50DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAWI TPS3824-50DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PAWI TPS3824-50DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAWI TPS3824-50DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PAWI TPS3825-33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDGI TPS3825-33DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDGI TPS3825-33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDGI TPS3825-33DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDGI TPS3825-50DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDFI TPS3825-50DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDFI TPS3825-50DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDFI TPS3825-50DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDFI TPS3828-33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDII TPS3828-33DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDII TPS3828-33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDII PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 Addendum-Page 4 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPS3828-33DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDII TPS3828-50DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDHI TPS3828-50DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDHI TPS3828-50DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDHI TPS3828-50DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PDHI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 Addendum-Page 5 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS3820-33, TPS3820-50, TPS3823-25, TPS3823-30, TPS3823-33, TPS3823-50, TPS3824-25, TPS3824-30, TPS3824-33, TPS3824-50, TPS3825-33, TPS3825-50, TPS3828-33, TPS3828-50 : • Automotive: TPS3820-33-Q1, TPS3820-50-Q1, TPS3823-25-Q1, TPS3823-30-Q1, TPS3823-33-Q1, TPS3823-50-Q1, TPS3824-25-Q1, TPS3824-30-Q1, TPS3824-33-Q1, TPS3824-50-Q1, TPS3825-33-Q1, TPS3825-50-Q1, TPS3828-33-Q1, TPS3828-50-Q1 NOTE: Qualified Version Definitions: • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TPS3820-33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TPS3820-33DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3820-50DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3820-50DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3820-50DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3820-50DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3823-25DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3823-25DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3823-25DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3823-25DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3823-30DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3823-30DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3823-33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3823-33DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TPS3823-50DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3823-50DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3823A-33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TPS3823A-33DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jan-2015 Pack Materials-Page 1 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TPS3824-25DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3824-25DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3824-25DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3824-25DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3824-30DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3824-30DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3824-33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3824-33DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TPS3824-50DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3824-50DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3824-50DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3825-33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TPS3825-33DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TPS3825-50DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3825-50DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3825-50DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TPS3828-33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3828-33DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3828-50DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3828-50DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jan-2015 Pack Materials-Page 2 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS3820-33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3820-33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3820-50DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3820-50DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS3820-50DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3820-50DBVT SOT-23 DBV 5 250 203.0 203.0 35.0 TPS3823-25DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3823-25DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS3823-25DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3823-25DBVT SOT-23 DBV 5 250 203.0 203.0 35.0 TPS3823-30DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3823-30DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3823-33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3823-33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3823-50DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3823-50DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3823A-33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3823A-33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3824-25DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS3824-25DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3824-25DBVT SOT-23 DBV 5 250 203.0 203.0 35.0 TPS3824-25DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3824-30DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS3824-30DBVT SOT-23 DBV 5 250 203.0 203.0 35.0 TPS3824-33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3824-33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3824-50DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3824-50DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3824-50DBVT SOT-23 DBV 5 250 203.0 203.0 35.0 TPS3825-33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3825-33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3825-50DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3825-50DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS3825-50DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3828-33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3828-33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS3828-50DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS3828-50DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jan-2015 Pack Materials-Page 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated QRE1113, QRE1113GR — Minature Reflective Object Sensor ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com QRE1113, QRE1113GR Rev. 1.7.1 August 2011 QRE1113, QRE1113GR Minature Reflective Object Sensor Features ■ Phototransistor output ■ No contact surface sensing ■ Miniature package ■ Lead form style: Gull Wing ■ Two leadform options: Through hole (QRE1113) SMT gullwing (QRE1113GR) ■ Two packaging options: Tube (QRE1113) Tape and reel (QRE1113GR) QRE1113GR Package Dimensions 2.90 2.50 3.60 0.94 3.20 1.80 0.60 1.00 C LC L 0.40 0.94 1.70 1.50 4.80 4.40 1.10 0.90 1 2 4 3 30 ° 0.40 Notes: 1. Dimensions for all drawings are in millimeters. 2. Tolerance of ±0.15mm on all non-nominal dimensions 0.120 ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com QRE1113, QRE1113GR Rev. 1.7.1 2 QRE1113, QRE1113GR — Minature Reflective Object Sensor QRE1113 Package Dimensions Schematic 2.90 2.50 10.4 0.94 8.4 1.80 0.60 1.00 C L C L 0.40 0.94 1.70 0~20° 0~20° 1.50 1 2 4 3 4.20 3.80 0.40 3.60 3.20 Notes: 1. Dimensions for all drawings are in millimeters. 2. Tolerance of ±0.15mm on all non-nominal dimensions 1 Pin 1: Anode Pin 2: Cathode Pin 3: Collector Pin 4: Emitter 2 34 ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com QRE1113, QRE1113GR Rev. 1.7.1 3 QRE1113, QRE1113GR — Minature Reflective Object Sensor Absolute Maximum Ratings (TA = 25°C unless otherwise specified) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Electrical/Optical Characteristics (TA = 25°C unless otherwise specified) Notes: 1. Derate power dissipation linearly 1.00mW/°C above 25°C. 2. RMA flux is recommended. 3. Methanol or isopropyl alcohols are recommended as cleaning agents. 4. Soldering iron 1/16" (1.6mm) from housing. 5. Pulse conditions: tp = 100µs; T = 10ms. 6. Measured using an aluminum alloy mirror at d = 1mm. 7. No reflective surface at close proximity. Symbol Parameter Rating Units TOPR Operating Temperature -40 to +85 °C TSTG Storage Temperature -40 to +90 °C TSOL-I Soldering Temperature (Iron)(2,3,4) 240 for 5 sec °C TSOL-F Soldering Temperature (Flow)(2,3) 260 for 10 sec °C EMITTER IF Continuous Forward Current 50 mA VR Reverse Voltage 5 V IFP Peak Forward Current(5) 1 A PD Power Dissipation(1) 75 mW SENSOR VCEO Collector-Emitter Voltage 30 V VECO Emitter-Collector Voltage 5 V IC Collector Current 20 mA PD Power Dissipation(1) 50 mW Symbol Parameter Test Conditions Min. Typ. Max. Units INPUT DIODE VF Forward Voltage IF = 20mA 1.2 1.6 V IR Reverse Leakage Current VR = 5V 10 µA λPE Peak Emission Wavelength IF = 20mA 940 nm OUTPUT TRANSISTOR ID Collector-Emitter Dark Current IF = 0mA, VCE = 20V 100 nA COUPLED IC(ON) On-State Collector Current IF = 20mA, VCE = 5V(6) 0.10 0.40 mA ICX Cross-Talk Collector Current IF = 20mA, VCE = 5V(7) 1 µA VCE (SAT) Saturation Voltage 0.3 V tr Rise Time VCC = 5V, IC(ON) = 100µA, RL = 1kΩ 20 µs tf Fall Time 20 ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com QRE1113, QRE1113GR Rev. 1.7.1 4 QRE1113, QRE1113GR — Minature Reflective Object Sensor Typical Performance Curves Fig. 1 Normalized Collector Current vs. Distance between device and reflector d-DISTANCE (mm) 012345 IC (ON)- NORMALIZED COLLECTOR CURRENT 0.0 0.2 0.4 0.6 0.8 1.0 IF = 10 mA VCE = 5 V TA = 25˚C Mirror Sensing Object: White Paper (90% reflective) d 0 Fig. 2 Collector Current vs. Forward Current IF - FORWARD CURRENT (mA) 0 4 8 12 16 20 IC (ON) - COLLECTOR CURRENT (mA) 0.0 0.2 0.4 0.6 0.8 1.0 Fig. 3 Normalized Collector Current vs. Collector to Emitter Voltage VCE - COLLECTOR EMITTER VOLTAGE (V) 0.1 1 10 C (ON) I - NORMALIZED COLLECTOR CURRENT 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 IF = 25mA IF =20mA IF =10mA IF =15mA IF =5mA d = 1 mm, 90% reflection TA = 25˚C Fig. 4 Collector Emitter Dark Current (Normalized) vs. Ambient Temperature TA - Ambient Temperature (˚C) ICEO - NORMALIZED DARK CURRENT 25 40 55 70 85 10-2 10-1 100 101 102 Normalized to: VCE = 10 V TA = 25˚C VCE = 10 V VCE = 5 V ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com QRE1113, QRE1113GR Rev. 1.7.1 5 QRE1113, QRE1113GR — Minature Reflective Object Sensor Typical Performance Curves (Continued) Fig. 6 Forward Current vs. Forward Voltage VF - FORWARD VOLTAGE (V) VF - FORWARD VOLTAGE (V) IF - FORWARD CURRENT (mA) 1.0 1.1 1.2 1.3 1.4 1.5 0 10 20 30 40 50 TA = 25˚C Fig. 7 Rise and Fall Time vs. Load Resistance RL - LOAD RESIST ANGULAR DISPLACEMENT ANCE (KΩ) 0.1 1 10 0.6 0.6 0.4 0.2 0 0.2 0.4 R RELATIVE RADIANT INTENSITY ISE AND FALL TIME (us) 1 10 1.0 0.9 0.8 0.7 100 VCC = 10 V tpw = 100 us T=1ms TA = 25˚C IC = 0.3 mA IC = 1 mA tf tf tr tr Fig. 8 Forward Voltage vs. Ambient Temperature Fig. 8 Radiation Diagram 0.0 0.5 1.0 1.5 2.0 2.5 3.0 IF = 50 mA IF = 10 mA IF = 20 mA TA - AMBIENT TEMPERATURE (˚C) -40 -20 0 20 40 60 80 ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com QRE1113, QRE1113GR Rev. 1.7.1 6 QRE1113, QRE1113GR — Minature Reflective Object Sensor Recommended Solder Screen Pattern for GR option (for reference only) Taping Dimensions for GR option Dimensions in mm 1.0 1.1 2.8 LED (+) 0.8 2.0±0.05 4.0 0.25 5.5±0.05 12.0±0.3 8.0 3.73 4.75 1.98 ø1.5 1.75 Progressive Direction General tolerance ±0.1 Dimensions in mm ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com QRE1113, QRE1113GR Rev. 1.7.1 7 QRE1113, QRE1113GR — Minature Reflective Object Sensor Reel Dimensions Reflow Profile ø13.0 ± 0.5 2.2 ± 0.5 9.0 ± 0.5 12.0 ± 0.15 ø60.0 ± 0.5 ø178.0 ± 1.0 Time (seconds) Temperature (°C) 1°C to 5°C/sec 1°C to 5°C/sec 260°C max. for 10 sec. max. 260°C 120 sec. max. 60 sec. max. above 220°C Pre-heating 180°C to 200°C Note: Reflow soldering should not be done more than twice. 220°C © Fairchild Semiconductor Corporation www.fairchildsemi.com TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 2Cool AccuPower AX-CAP® * BitSiC Build it Now CorePLUS CorePOWER CROSSVOLT CTL Current Transfer Logic DEUXPEED® Dual Cool™ EcoSPARK® EfficientMax ESBC Fairchild® Fairchild Semiconductor® FACT Quiet Series FACT® FAST® FastvCore FETBench FPS F-PFS FRFET® Global Power ResourceSM GreenBridge Green FPS Green FPS e-Series Gmax GTO IntelliMAX ISOPLANAR Making Small Speakers Sound Louder and Better™ MegaBuck MICROCOUPLER MicroFET MicroPak MicroPak2 MillerDrive MotionMax mWSaver OptoHiT OPTOLOGIC® OPTOPLANAR® ® PowerTrench® PowerXS™ Programmable Active Droop QFET® QS Quiet Series RapidConfigure  Saving our world, 1mW/W/kW at a time™ SignalWise SmartMax SMART START Solutions for Your Success SPM® STEALTH SuperFET® SuperSOT-3 SuperSOT-6 SuperSOT-8 SupreMOS® SyncFET Sync-Lock™ ®* TinyBoost TinyBuck TinyCalc TinyLogic® TINYOPTO TinyPower TinyPWM TinyWire TranSiC TriFault Detect TRUECURRENT® * SerDes UHC® Ultra FRFET UniFET VCX VisualMax VoltagePlus XS™ * Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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I64 ® SEED­DIM138 Feature    Product module based on TI OMAP series, suitable for industrial application. SEED is the first company that can supply this product in quantity in China.    Based on DIMM­200 standard interface, convenient for connecting, low cost.     Production­grade standard design and production, More Stable and Reliable.    Special Locking hole design, provide high­insensitive mechanical connection.    Mini­size, 60mm*48mm, suitable for various applications including handheld device.    ARM926 kernel + high performance floating point DSP Parameter    CPU: OMAP­L138 ( ARM926 300MHz + C674x 300MHz )    Storage : DDR 64MB NAND 512MB    Video I/O    Audio I/O    Peripheral interface: Ethernet PHY on board, RTC real clock, power and reset system    Expansion bus: expand all the peripheral interface through DIMM, MMC/SDIO, SATA, UART,  USB Host,  USB OTG2.0, 10/100Mbps Ethernet, GPIO etc.      JTAG : 14­pin Product Documents    Product design schematic (PDF)    DATASHEET for hardware chips    Hardware user manual    Software development Guide Development Tools and Software source code    Cross compiling toolchain(version arm2009q1)    UBL source code (version 03.20.00.06)    U­boot source code    Kernel source code    NFS (Network File System) Application    Power Automation    Intelligent Control     Instrument and meter Telemecanique Global Detection An Essential Quick Selector Guide to Sensor Selection File 9006 CONTENTS Description Page Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Osiris Photoelectric Sensors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Osiprox Inductive Proximity Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Ultrasonic Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Capacitive Proximity Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Osiswitch Limit Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Substitution Guides. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Catalog Number Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 Schneider Electric Brands The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 2 2/03 Introduction The Essential Guide to Detection A selection of the top selling products for simplicity in selection OEM’s with Osiconcept® Improve performance by making your machines less complicated and more intelligent. Introducing Telemecanique’s major innovation: Distributors A worldwide detection first for improving productivity. A complete offer for resolving your most commonly encountered detection problems: ■ product selection simplified ■ maintenance simplified ■ product availability simplified ■ detection simplified using a single supplier. ■ installation and setting-up simplified Improved simplicity for improved productivity. with Osiconcept® Improve customer expertise with an efficient product line offering simplified selection and improved selling potential. Users with Osiconcept® Improve performance by reducing maintenance time with products that are simpler and unequalled in flexibility. Select the sensor according to your specific requirements “Universal” series: “Standard” series: “Application” series: Multi-purpose products Designed for designated Offers functions providing multiple functions. and repetitive functions. specifically for Also includes specialist needs, thus Osiconcept® products. providing the ideal solution for your more complex applications. The Essential Guide to Sensor Selection 3 2/03 © 2003 Schneider Electric All Rights Reserved Introduction A complete range of innovative and simple to use sensors. Osiris Photoelectric Sensors Page 4 A single product that automatically adapts to all modes of sensing Detects any target regardless of material or shape. ■ Detection from a few millimeters to several tens of meters. ■ Accessories ■ Products for specific applications A simple press of the teach button automatically configures the sensor for optimal performance in any condition. Osiprox Inductive Proximity Sensors Page 14 A single product that automatically adapts to all mounting environments Detection of metal targets, in or out of metal surroundings. ■ Sensing distance/object ≤ 60 mm ■ Cylindrical and rectangular body styles ■ Specific products for particular applications A simple press of the teach button automatically configures the sensor for optimal performance whether mounted in or out of metal. Osiswitch Limit Switches Page 24 More than 5,000 interchangeable configurations within 24 hours Detection by contact with rigid objects ■ Positivity of electrical contacts ■ Object speed ≤ 1.5 m/s ■ Specific products for particular 3D applications One type of metal operating head for 5 different bodies. Modularity also in connections and contacts. Ultrasonic Sensors Page 21 Detection using sound waves ■ Sensing distance up to 1 meter Capacitive Proximity Sensors Page 22 Detection of any object or material ■ Sensing distance/object ≤ 20 mm The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 4 2/03 Osiris Photoelectric Sensors Accessories ■ Reflector sold separately ▲ Emitter and receiver are sold individually Osiris Photoelectric Sensors A single product that automatically adapts to all environments. Programmable NO / NC NO: object present = output ON NC: no object present = output ON XUB XUB Design 18 plastic Design 18 metal Max. Sensing Distance Diffuse 11.8" / 30 cm 11.8" / 30 cm Background Sup. 4.7" / 12 cm 4.7" / 12 cm Rolarized Retro ■ 6.5' / 2 m 6.5' / 2 m Thru-Beam ▲ 49.2' / 15 m 49.2' / 15 m Mounting M18 x 1 M18 x 1 Enclosure M (metal) P (plastic) / Dimensions (mm) Ø x L or H x W x L P / M18 x 64 M / M18 x 64 Common Characteristics Adjustable sensing distance: teach mode Sensors for DC applications a (solid state output: transistor) Connection: pre-cabled, PvR (2 m) T / R 3-wire PNP programmable NO / NC XUB0APSNL2 XUB0BPSNL2 NPN programmable NO / NC XUB0ANSNL2 XUB0BNSNL2 PNP / NPN programmable NO / NC – – Connection: M12 connector (M8 for XUM) on M12 only T / R 3-wire PNP programmable NO / NC XUB0APSNM12 XUB0BPSNM12 NPN programmable NO / NC XUB0ANSNM12 XUB0BNSNM12 PNP / NPN programmable NO / NC – – Connection: Screw clamp terminals T / R 3-wire PNP / NPN programmable NO / NC – – Switching Capacity (mA) main output / alarm output 100 / – 100 / – Common Characteristics Supply voltage limits min/max (V) including ripple: 10...36 Thru-beam accessory pre-cabled (2 m) XUB0AKSNL2T XUB0BKSNL2T connector XUB0AKSNM12T XUB0BKSNM12T screw terminals, M16 cable gland – – Sensors for AC or DC applications c / a 10...36 Vdc / 20...264 Vac including ripple on dc relay output, 3 A Connection: pre-cabled, PvR (2 m) T / R programmable NO / NC with time delay – Connection: Screw clamp terminals T / R programmable NO / NC with time delay – LED Output state indication (✖) / power on LED (★) Switching frequency (Hz) – Time delay(s) – Thru-beam accessory pre-cabled, PvR (2 m) – screw terminals, M16 cable gland – 90° head All the above Osiris Design 18 sensors are available with integral 90° head. Replace the “N” with a “W”. Example: For pre-cabled versions: XUB1APANL2 becomes XUB1APAWL2. For versions with connector: XUB1APANM12 becomes XUB1APAWM12. Reflectors (mm) Mounting Brackets Mounting Devices Ø 16 XUZC16 Stainless Steel Plastic Bracket with ball joint for sensors and Ø 21 XUZC21 reflector XUZC50 24 x 21 XUZC24 For For Ø 31 XUZC31 XUB... XUZA118 (stnls. steel) XUZA218 (plastic) XUB… XUZB2003 Ø 39 XUZC39 XUM... XUZA50 – XUM… XUZM2003 Ø 80 XUZC80 XUK... XUZA51 – XUK… XUZK2003 XUZC24 XUZC80 XUZC50 50 x 50 XUZC50 XUX... XUZX2000 – XUX… XUZX2003 Background suppression Polarized Retroreflective Thru-beam Diffuse Snap-C® compatible Also available in 18 mm 2-wire ac/dc version. Please see the Sensors Specification Guide. 9006CT0101 The Essential Guide to Sensor Selection 5 2/03 © 2003 Schneider Electric All Rights Reserved (1) M8 not Snap-C® Compatible XUM XUK XUX Design Miniature Design Compact 50 x 50 Design Compact 1.3' / 40 cm 3.28' / 1 m 6.5' / 2 m 4" / 10cm 11.8" / 30cm 4.2' / 1.3 m 9.8' / 3 m 13' / 4 m 36' / 11 m 45.8' / 14 m 98.2' / 30 m 131' / 40 m direct: (Mounting holes 25.5) with M3 screws direct: (40 x 40) with M4 screws direct: (30 / 38 / 40 / 50 / 74) with M5 screws P / 34 x 12 x 20 P / 50 x 18 x 50 P / 91 x 30 x 70 Alignment LEDs (✜): yes / Temperature range - 13…+ 131 °F (- 25…+ 55 °C) / Degree of protection (conforming to IEC 60 529): IP67 (XUK: IP65) XUM0APSAL2 – – XUM0ANSAL2 – – – XUK0AKSAL2 – XUM0APSAM8 (1) – – XUM0ANSAM8 (1) – – – XUK0AKSAM12 XUX0AKSAM12 – – XUX0AKSAT16 100 / 50 100 / 50 100 / 50 Switching frequency (Hz): 250 / Overload and short-circuit protection: YES / Output state LED (✖) / Power on LED (★): yes XUM0AKSAL2T XUK0AKSAL2T XUX0AKSAM12T XUM0AKSAM8T (1) XUK0AKSAM12T – – – XUX0AKSAT16T – XUK0ARCTL2 – – – XUX0ARCTT16 – ✖ / ★ ✖ / ★ – 20 20 – Adjustment 0 to 15 s, on delay, or off delay, or one shot – XUK0ARCTL2T – – – XUX0ARCTT16T Connector innovation New, innovative connector that is universal, simple and fast. For all Telemecanique brand sensors with Snap-C compatible M12 connectors (pointed pins): – cabling to the required length without using a screwdriver or soldering iron. – ready in just a few seconds, no stripping required. Mounting Devices continued Suitable plug-in female connectors, including pre-wired versions Protective housing with ball joint M12 rod for ball joint Bracket for M12 rod For Length 5 m XUM… XUZM2004 without LED Elbowed Straight Snap-C XUK… XUZK2004 M8 XSZCS152 XSZCS142 – XUX… XUZX2004 XUZ2001 XUZ2003 M12 XSZCD112Y XSZCD102Y XZCC12FDM40V Snap-C® compatible The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 6 2/03 Osiris Photoelectric Sensors Accessories ■ Reflector sold separately ▲ Emitter and receiver are sold individually Osiris Photoelectric Sensors _ Standard XUB XUB XUM Maximum Sensing Distance Diffuse 2' / 60 cm 2' / 60 cm 1.3' / 40 cm Polarized Reflex ■ 6.5' / 2 m 6.5' / 2 m 6.5' / 2 m Reflex ■ 13' / 4 m 13' / 4 m 13' / 4 m Thru-Beam ▲ 49' / 15 m 49' / 15 m 26' / 8 m Mounting (mm) M18 x 1 M18 x 1 direct: (Mounting holes 25.5) with M3 screws Enclosure M (metal) P (plastic) / Dimensions (mm) Ø x L or H x W x L P / M18 x 46 M / M18 x 46 P / 12 x 34 x 27 Alignment LED’s ✜ – – Common Characteristics Temperature range - 13 to 131 °F (- 25...+ 55 °C) Sensors for DC applications a (solid state output: transistor) Connection: 2 meter cable M12 connector 2 meter cable M12 connector 2 meter cable M12 connector Transmitter XUB2AKSNL2T XUB2AKSNM12T XUB2BKSNL2T XUB2BKSNM12T XUM2AKSNL2T XUM2AKSNM8T Receiver or T/R, 3-wire PNP (1) Diffuse adjustable NO XUB5APANL2 XUB5APANM12 XUB5BPANL2 XUB5BPANM12 XUM5APANL2 XUM5APANM8 NC XUB5APBNL2 XUB5APBNM12 XUB5BPBNL2 XUB5BPBNM12 XUM5APBNL2 XUM5APBNM8 Polarized retroreflective NO XUB9APANL2 XUB9APANM12 XUB9BPANL2 XUB9BPANM12 XUM9APANL2 XUM9APANM8 NC XUB9APBNL2 XUB9APBNM12 XUB9BPBNL2 XUB9BPBNM12 XUM9APBNL2 XUM9APBNM8 Retroreflective NO XUB1APANL2 XUB1APANM12 XUB1BPANL2 XUB1BPANM12 XUM1APANL2 XUM1APANM8 NC XUB1APBNL2 XUB1APBNM12 XUB1BPBNL2 XUB1BPBNM12 XUM1APBNL2 XUM1APBNM8 Thru-beam NO XUB2APANL2R XUB2APANM12R XUB2BPANL2R XUB2BPANM12R XUM2APANL2R XUM2APANM8R NC XUB2APBNL2R XUB2APB NM12R XUB2BPBNL2R XUB2BPBNM12R XUM2APBNL2R XUM2APBNM8R Supply voltage limits min/max (V) including ripple 10...36 10...36 10...36 10...36 10...30 10...30 Switching Frequency (Hz) 500 500 500 500 500 500 Common characteristics for dc versions Switching capacity, max (mA): 100 (1) For versions with NPN output, replace the "P" in the above references with an "N". Sensors for AC or DC applications c / a 10...36 Vdc / 20...264 Vac including ripple on dc relay output, 3 A Connection –––– – – Transmitter –––– – – Receiver or T/R Diffuse NO + NC – – – – – – Polarized retro NO + NC – – – – – – Retro NO + NC – – – – – – Thru-beam NO + NC – – – – – – Switching frequency (Hz) – – – – – – LED Output state indication (✖) / power on LED (★) –––– – – 90° head All the above Osiris Design 18 sensors are available with integral 90° head. Replace the “N” with a “W”. Example:For pre-cabled versions: XUB1APANL2 becomes XUB1APAWL2. For versions with connector: XUB1APANM12 becomes XUB1APAWM12. Reflectors (mm) Mounting Brackets Mounting Devices Ø 16 XUZC16 Stainless Steel Plastic Bracket with ball joint for sensors and Ø 21 XUZC21 reflector XUZC50 24 x 21 XUZC24 For For Ø 31 XUZC31 XUB... XUZA118 XUZA218 XUB… XUZB2003 Ø 39 XUZC39 XUM... XUZA50 – XUM… XUZM2003 Ø 80 XUZC80 XUK... XUZA51 – XUK… XUZK2003 XUZC24 XUZC80 XUZC50 50 x 50 XUZC50 XUX... XUZX2000 – XUX… XUZX2003 Detection with object present NO Output ON / object present Thru-beam Polarized Retroreflective Diffuse (T) (R) (T/R) (T/R) Detection with no object present NC Output ON / no object present Thru-beam Polarized Retroreflective Diffuse (T) (R) (T/R) (T/R) The Essential Guide to Sensor Selection 7 2/03 © 2003 Schneider Electric All Rights Reserved XUC XUK XUX 3.9' / 1.2 m (adjustable) 3.28' / 1 m 3.28' / 1 m 6.8' / 2.1 m 29' / 9 m 16' / 5 m 13' / 4 m 36.1' / 11 m – 29' / 9 m 23' / 7 m 46' / 14 m 196' / 60 m 98' / 30 m 65' / 20 m 131' / 40 m direct: (Mounting holes 30 / 38 / 40 / 50 / 74) with M5 screws direct: (40 x 40) with M4 screws direct: ( Mounting holes 30 / 38 / 40 / 50 / 74) with M5 screws P / 95 x 45 x 44 P / 18 x 50 x 50 P / 91 x 30 x 70 ✜✜✜ Degree of protection (conforming to IEC 60 529): IP67 (XUK: IP65) / Output state indication and power on LED (⊗): yes 2 meter cable M12 connector 2 meter cable M12 connector screw terminals, M16 gland M12 connector XUK2AKSNL2T XUK2AKSNM12T XUX0AKSAT16T XUX0AKSAM12T XUC8AKSNL2 XUC8AKSAM12 XUK5APANL2 XUK5APANM12 XUX5APANT16 XUX5APANM12 XUC8AKSNL2 XUC8AKSAM12 XUK5APBNL2 XUK5APBNM12 XUX5APBNT16 XUX5APBNM12 XUC9AKSAL2 XUC9AKSAM12 XUK9APANL2 XUK9APANM12 XUX9APANT16 XUX9APANM12 XUC9AKSAL2 XUC9AKSAM12 XUK9APBNL2 XUK9APBNM12 XUX9APBNT16 XUX9APBNM12 – – XUK1APANL2 XUK1APANM12 XUX1APANT16 XUX1APANM12 – – XUK1APBNL2 XUK1APBNM12 XUX1APBNT16 XUX1APBNM12 XUC2AKSAL2 XUCZAKSAM12 XUK2APANL2R XUK2APANM12R XUX2APANT16R XUX2APANM12R XUC2AKSAL2 XUCZAKSAM12 XUK2APBNL2R XUK2APBNM12R XUX2APBNT16R XUX2APBNM12R 10...38 10...38 10...30 10...30 10...36 10...36 500 500 250 250 250 250 Overload and short-circuit protection: YES / Output state LED (✖): yes / Power on LED (★): yes Example: XUB1APANL2 becomes XUB1ANANL2 – – pre-cabled, L = 2 m – screw terminals, M16 gland – – – XUK2ARCNL2T – XUX0ARCTT16T – XUC8ARCTL2 XUC8ARCTU78 XUK5ARCNL2 – XUX5ARCNT16 – XUC9ARCTL2 XUC9ARCTU78 XUK9ARCNL2 – XUX9ARCNT16 – – – XUK1ARCNL2 – XUX1ARCNT16 – XUC2ARCTL2 XUCZARCTU78 XUK2ARCNL2R – XUX2ARCNT16R – 20 – 20 – 20 – ✖ / ★ – ✖ / ★ – ✖ / ★ – Connector innovation New, innovative connector that is universal, simple and fast. For all Telemecanique brand sensors with Snap-C compatible M12 connectors (pointed pins): – cabling to the required length without using a screwdriver or soldering iron. – ready in just a few seconds, no stripping required. Mounting Devices continued Suitable plug-in female connectors, including pre-wired versions Protective housing with ball joint M12 rod for ball joint Bracket for M12 rod Length 5 m without LED For XUM… XUZM2004 Elbowed Straight Snap-C XUK… XUZK2004 M8 XSZCS152 XSZCS142 – XUX… XUZX2004 XUZ2001 XUZ2003 M12 XSZCD112Y XSZCD102Y XZCC12FDM40V Snap-C® compatible The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 8 2/03 Osiris Photoelectric Sensors Accessories Osiris Photoelectric Sensors _ Fiber Optics, Amplifier Standard Universal System For plastic cables For plastic cables Max. Usable Sensing Distance See Cables See Cables Mounting (mm) DIN rail or direct on 25 mm mounting holes with M3 screws DIN rail or direct on 25 mm mounting holes with M3 screws Dimensions (mm) H x W x L 40 x 10 x 65 40 x 10 x 65 Enclosure: P (plastic) P P Sensitivity adjustment via teach mode via teach mode Alignment LEDs ✜ ✜and 4-digit display Temperature range (°C) - 14 to 131 °F (-10 to + 55 °C) - 14 to 131 °F (-10 to + 55 °C) Degree of protection (conforming to IEC 60 529) IP65 for 1mm Ø cable / IP64 for 0.5mm Ø cable IP65 for 1mm Ø cable / IP64 for 0.5mm Ø cable Sensors for DC applications a (solid state output: transistor) Connection: pre-cabled, PvR (2 m) Amplifier references 3-wire PNP programmable NO / NC XUDA1PSML2 XUDA2PSML2 3-wire NPN programmable NO / NC XUDA1NSML2 XUDA2NSML2 Connection: M8 connector Amplifier references 3-wire PNP programmable NO / NC XUDA1PSMM8 XUDA2PSMM8 3-wire NPN programmable NO / NC XUDA1NSMM8 XUDA2NSMM8 Supply voltage limits min / max (V) including ripple 10...30 10...30 Switching capacity (mA) main output 100 100 Alarm output (switching capacity mA) – 50 Short-circuit protection yes yes LED output state indication (✖) ✖ ✖ Switching frequency (Hz) 1000 1000 (standard mode) 5000 (fast mode - sensing distance reduced by 1/2) Programmable timer – 40 ms on beam break Anti-interference – standard mode Pre-wired plug-in female connectors suitable for use with amplifier XUD●●●M8 length 5 m 90°, without LED fig. 1 XSZCS152 Fig. 1 Fig. 2 Straight, without LED fig. 2 XSZCS142 For plastic fiber optic cables, Thru-beam system For plastic fiber optic cables, all systems Lenses Cable trimmer For increasing sensing distance (pair) XUFZ01 For trimming cable to length (supplied with all plastic fiber optic cables) XUFZ11 With 90° mirror (pair) XUFZ02 Mounting brackets with lens (set of 2) Protective sheath, metallic Front screw mounting for fiber optic cables XUFZ920 XUFZ04 Length 1 m for plastic cables with threaded tips For M4 thread XUFZ210 For M6 thread XUFZ310 A Teach B Teach A Teach B Teach Detection with object present, NO Output ON / object present Detection with no object present, NC Output ON / no object present The Essential Guide to Sensor Selection 9 2/03 © 2003 Schneider Electric All Rights Reserved Plastic Fiber Optic Cables (length 2 m) (1) Models suitable for use with XUFZ01 and XUFZ02 (2) With XUFZ04 mounting bracket lens (3) Depending on length and lens mounting bracket M4 / M2.6 (1) M4/L=90 mm M6 M4 / M6 M6/L=90 mm M4 / M2.6 M4/L=90 mm System Thru-beam Diffuse Sensing distance 25cm to 90cm (3) 20cm or 150cm (1) 18cm 70mm 70mm 70mm 30mm 18mm Cable cross-section Cable Ø (mm) Ø 1 Ø 1 Ø 1 Ø 1 Ø 1+16 Ø 0.265 Ø 1 Ø 0.5 + 4 Ø 0.23 Ø 0.5 Sheath Ø Ø 2.2 Ø 2.2 Ø 2.2 Ø 2.2 x 2 Ø 2.2 x 2 Ø 2.2 x 2 Ø 1 x 2 Ø 1 x 2 Temperature range °F (°C) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) References XUFZ920 XUFN12301 XUFN12311 XUFN05321 XUFN05323 XUFN05331 XUFN02323 XUFN01331 Mounting (2) M4 x 0.7 M4 x 0.7 M6 x 0.75 M6 x 0.75 M6 x 0.75 M4 x 0.7 M4 x 0.7 (1) Models suitable for use with XUFZ01 and XUFZ02 Long distance cables with integral lens Long distance cables Flexible cables for reciprocal movement Teflon cables for food processing or chemical industries M3 / M2.6 (1) M3 / L=90 mm M8 / L = 20 mm M4 / M2.6 M3 / L=15 mm M6 / L = 15 mm M6 / L = 17 mm Ø 6 / L = 16 mm System Thru-beam Diffuse Sensing distance 5cm or 40cm (1) 5cm 150cm 18mm 6mm 95mm 55mm 70mm Cable cross-section Cable Ø (mm) Ø 0.5 Ø 0.5 Ø 1 Ø 0.5 Ø 0.265 Ø 1.5 Ø 0.265 x 16 Ø 1 Sheath Ø Ø 1 Ø 1 Ø 2.2 Ø 1 x 2 Ø 1 x 2 Ø 2.2 x 2 Ø 2.2 x 2 Ø 2.2 x 2 Temperature range °F (°C) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) References XUFN35301 XUFN35311 XUFN2L01L2 XUFN01321 XUFN04331 XUFN5P01L2 XUFN5S01L2 XUFN5T01L2 Mounting M3 x 0.5 M3 x 0.5 M8 x 1.25 M4 x 0.7 M3 x 0.5 M6 x 0.75 M6 x 0.75 by clip supplied (1) Models suitable for use with XUFZ01 and XUFZ02 Long distance cables M4 / M2.6 (1) Flexible cables M4 / M2.6 (1) Teflon cables Ø 5 / L = 20 mm System Thru-beam Focused diffuse for full color sensor XURC4 Sensing distance 30cm or 200cm (1) 10cm or 75cm (1) 100cm 10mm 20mm 30mm Cable cross-section Cable Ø (mm) Ø 1.5 Ø 0.265 x 16 Ø 1 Transmitter Ø 1 Receiver Ø 1.5 Transmitter Ø 1.5 Receiver Ø 1.5 Transmitter and Receiver Ø 1.5 Sheath Ø Ø 2.2 Ø 2.2 Ø 2.2 Ø 2.2 x 2 Ø 2.2 x 2 Ø 2.2 x 2 Temperature range °F (°C) -13...140 (-25...60) -13...140 (-25...60) -13...140 (-25...60) -14...131 (-10...55) -14...131 (-10...55) -14...131 (-10...55) References XUFN2P01L2 XUFN2S01L2 XUFN2T01L2 XUFN5L01L2 XUFN5L02L2 XUFN5L03L2 Mounting M2.6 x 0.45/M4 x 0.7 M2.6 x 0.45/M4 x 0.7 by clip supplied 2 elongated holes Ø 3.2 x 6.7 for M3 screws / 9.8 mm center The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 10 2/03 Osiris Photoelectric Sensors Accessories ■ Reflector sold separately Osiris Photoelectric Sensors _ Application Specific: Packaging Transparent material detection Color mark reader UV sensor Retroreflective ■ Retroreflective (with teach mode) (with 50 x 50 reflector) ■ Diffuse (manual) Diffuse (with teach mode) Diffuse (manual) Max. Sensing Distance 1.1 m / 3.6' (1) 1.5 m / 4.9' 9 mm / .35" (2) 9 mm / .35" (2) 20 mm / .79" Mounting (mm) M18 x 1 direct: holes 40 direct: 21 x 28, M5 screws direct: 21 x 28, M5 screws M18 x 1 Enclosure M (metal) P (plastic) P P M M M Sensitivity adjustment potentiometer with teach mode button with teach mode button Alignment LED’s ✜ – ✜✜✜✜ Temperature range °F (°C) 14...131 (-10…55) -13...131 (-25…55) 14...131 (-10…55) 14...131 (-10…55) -13...131 (-25…55) Degree of protection (conforming to IEC 60 529) IP67 IP65 IP67 IP67 IP67 Sensors for DC applications a (solid state output: transistor) Connection: pre-cabled, PVC (2 m) Dimensions (mm) Ø x L or H x W x L Ø 18 x 55 50 x18 x 50 – – – Transmitter/Receiver 3-wire PNP light switching – – – – – 3-wire PNP dark switching – – – – – 3-wire NPN light switching – – – – – 3-wire NPN dark switching – – – – – Transmitter/Receiver 3-wire PNP light/dark prog. switching XUBH01353 –––– 3-wire NPN light/dark prog. switching XUBJ01353 –––– Transmitter/Receiver 3-wire PNP/NPN light/dark prog. switching – XUKT1KSML2 ––– Connection: M12 connector Dimensions (mm) Ø x L or H x W x L Ø 18 x 68 50 x 18 x 80 100 x 30 x 62.5 96 x 31 x 64 Ø 18 x 95 Transmitter/Receiver 3-wire PNP light switching – – – – XU5M18U1D 3-wire PNP dark switching – – – – – 3-wire NPN light switching – – – – – 3-wire NPN dark switching – – – – – Transmitter/Receiver 3-wire PNP light/dark prog. switching XUBH01353D –––– 3-wire NPN light/dark prog. switching XUBJ01353D –––– Transmitter/Receiver 3-wire PNP/NPN light/dark prog. switching – XUKT1KSMM12 XURK0955D XURK1KSMM12 – Supply voltage limits min/max (V) including ripple 10…30 10…30 10…30 10…30 10…30 Switching capacity, max (mA) 100 100 200 200 100 Short-circuit protection (◆)/ LED output state indication (✖) ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ Switching frequency (Hz) 500 1500 10,000 10,000 1000 (1) with 50 x 50 mm reflector; 0.6 m with 24 x 21 reflector (2) 0.007 m with XURZ02, 0.018 m with XURZ01 Reflectors (mm) Plug-in female connectors, including pre-wired versions Lenses for color mark or UV detection Ø 16 XUZC16 Length 5 m without LED Ø 21 XUZC21 24 x 21 XUZC24 Ø 31 XUZC31 Ø 39 XUZC39 Elbowed Straight Ø 80 XUZC80 M8 XSZCS152 XSZCS142 Lens for doubling the sensing distance Ring for fixed focusing XUZC24 XUZC80 XUZC50 50 x 50 XUZC50 M12 XSZCD112Y XSZCD102Y XURZ01 XURZ02 The Essential Guide to Sensor Selection 11 2/03 © 2003 Schneider Electric All Rights Reserved UV sensor Full color Diffuse Transparent label detection Liquid detection Diffuse (with teach mode) Diffuse (with integral amplifier) Thru-beam or Diffuse (3) (with integral amplifier) Adjustable background suppression Thru-beam infra-red Thru-beam infra-red 9 mm / .35" (2) 40-60 mm / 1.6-2.3" 5-25 mm / .2-1" (3) 1 m / 3.3' 2 mm / .07" 20 cm / 7.8" direct: holes 28, M5 screws direct: holes 68x42, M5 screws on rail, holes 16 direct: holes 40 direct: holes 18 direct: holes 20 MMMPMP with teach mode button with teach mode button with teach mode button with teach mode button ✜✜✜✜✜✜ 14...131 (-10…55) 14...131 (-10…55) 14...131 (-10…55) -13...131 (-25…55) 31...131 (0…55) 32...104 (0…40) IP67 IP67 IP65 IP65 IP65 IP65 – 80 x 30 x 57 82 x 25 x 44 50 x 18 x 50 – 47 x 13 x 33 – XURC3PPML2 XURC4PPML2 ––– –––––– – XURC3NPML2 XURC4NPML2 ––– –––––– ––––– XUMW1KSNL2 –––––– ––– XUK8AKSNL2 – – 96 x 31 x 64 – – 50 x 18 x 80 97 x 20 x 26 – –––––– –––––– –––––– –––––– –––––– –––––– XURU1KSMM12 – – XUK8AKSNM12 XUVK0252S (M8) – 10…30 10…30 10…30 10…30 10…30 10…30 200 100 100 100 100 100 ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ 2000 1200 1200 250 10,000 1000 (3) Depends on fiber optic selected, see table below. Fiber optic cable suitable for use with “full color” sensor XURC4... Guide type System Reference Sensing dist. Focused Diffuse XUFN5L01L2 10 mm XUFN5L02L2 20 mm XUFN5L03L2 30 mm Standard Diffuse XUFN05321 5 mm Thru-beam (color detection by transparency) XUFN12301 + XUFZ01 250 mm The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 12 2/03 Osiris Photoelectric Sensors Osiris Photoelectric Sensors _ Application Specific: Assembly, Material Handling Sturdy and compact Window frames for dynamic detection Fork design with integral amplifier for indexing Assembly Material Handling Diffuse (1) Thru-beam (2) Diffuse Max. Sensing Distance 0.07 m / 2.7" 0.12 / 0.18 / 0.25 m 30 mm / 11.8" Mounting (mm) M8 x 1 direct: 222.5 with M5 screws centers 47 Enclosure M (metal) P (plastic) P P M Sensitivity adjustment potentiometer – – Alignment LED’s ✜ – ✜ – Temperature range °F (°C) -13...131 (-25…55) 32...140 (0…60) 23...131 (-5…55) Degree of protection (conforming to IEC 60 529) IP67 IP65 IP54 Sensors for DC applications a (solid state output: transistor) Connection: pre-cabled (2 m) Dimensions (mm) Ø x L or H x W x L Ø 8 x 40 – – Transmitter/Receiver 3-wire PNP NO XUAH0515 – XUVH0312 3-wire PNP NC XUAH0525 – – 3-wire NPN NO XUAJ0515 – XUVJ0312 3-wire NPN NC XUAJ0525 – – Transmitter/Receiver 3-wire PNP NO / NC – – – 3-wire NPN NO / NC – – – Connection: M8 (S suffix) or M12 connector Dimensions (mm) Ø x L or H x W x L Ø 8 x 66 205 / 265 / 335 x 25 x 230 – Transmitter/Receiver 3-wire PNP NO XUAH0515S – – 3-wire PNP NC XUAH0525S – – 3-wire NPN NO XUAJ0515S – – 3-wire NPN NC XUAJ0525S – – Transmitter/Receiver 3-wire PNP NO / NC – – – 3-wire NPN NO / NC – – – Transmitter/Receiver 3-wire PNP/NPN programmable output ON or OFF internal size 200 x 120 m – XUVF120M12 – internal size 200 x 180 m – XUVF180M12 – internal size 200 x 250 m – XUVF250M12 – Connection: screw clamp terminals Dimensions (mm) Ø x L or H x W x L – – – Receiver or T/R 3-wire PNP – – – Supply voltage limits min/max (V) including ripple 10…30 18…30 19…38 Switching capacity, max (mA) 100 400 150 Short-circuit protection (◆)/ LED output state indication (✖) ◆ / ✖ ◆ / ✖ ◆ / ✖ Switching frequency (Hz) 700 500 1000 (1) Thru-beam also available (2) Dynamic Fork models available (3) With 4…20 mA analogue output The Essential Guide to Sensor Selection 13 2/03 © 2003 Schneider Electric All Rights Reserved Application Specific: Material Handling, Food Processing Analog output for position control Very long sensing distance or accurate sensing Large excess gain to resist accumulation of dirt Stainless steel version for resistance to harsh agents Material Handling Food Processing Diffuse Diffuse Thru-beam or Diffuse Adjustable background Thru-beam infra-red 0.20...0.80 m / 7.8"...2.6' 100 m / 328' 70 m / 230' 3 m / 9.8' 0.15 m / 5.9" centers 30 - 1/2" NPT cable gland M18 x 1 M18 x 1 M18 x 1 M18 x 1 P P M M (stainless steel) M (stainless steel) – – – ✜✜✜ – – -13...140 (-25…60) 14...113 (-10…45) -13...131 (-25…55) -13...131 (-25…55) -13...131 (-25…55) IP67 IP67 IP67 IP67 IP67 ––– –– ––– –– ––– –– ––– –– ––– –– ––– XU9N18PP341 XU5N18PP341 ––– XU9N18NP341 XU5N18NP341 – Ø 18 x 76 M18 x 95 – – – – XU2M18AP20D (3) – – ––– –– ––– –– ––– –– – XU2P18PP340DL – XU9N18PP341D XU5N18PP341D – XU2P18NP340DL – XU9N18NP341D XU5N18NP341D ––– –– ––– –– ––– –– 86 x 27 x 83 – – – – XUJK803538 –– –– 20…30 10…30 10…30 10…30 10…30 max:20 min:4 100 100 100 100 ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ 10,000 500 30 500 500 Laser Class II The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 14 2/03 Osiprox Inductive Proximity Sensors Accessories Osiprox Inductive Proximity Sensors Type E (26 x 26) Type C (40 x 40) Type D (80 x 80) Ø 12 Nominal Sensing Distance Sn 15 mm 25 mm 60 mm 5 mm Usable sensing dist. S (mm) sheilded/non-sheilded 0…10 / 0...15 0…15 / 0...25 0…40 / 0...60 0…3.4 / 0...5 Precision adjustment range (mm) shielded/non-shielded 5...10 / 5...15 8...15 / 8...25 20...40 / 20...60 1.7...3.4 / 1.7...5 Mounting in metal shielded or non-shielded via Osiconcept teach mode Enclosure M (metal) P (plastic) P P P M Temperature range °F (°C) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) Degree of protection (conforming to IEC 60 529) pre-cabled: IP68 (with connector: IP67) Sensors for DC applications a (3-wire) Connection: pre-cabled PvR (2 m) Dimensions (mm) Ø x L or H x W x L 26 x 26 x 13 40 x 40 x 15 80 x 80 x 26 M12 x 54 3-wire PNP NO XS8E1A1PAL2 XS8C1A1PAL2 XS8D1A1PAL2 – PNP NC XS8E1A1PBL2 XS8C1A1PBL2 XS8D1A1PBL2 – NPN NO XS8E1A1NAL2 XS8C1A1NAL2 XS8D1A1NAL2 – NPN NC XS8E1A1NBL2 XS8C1A1NBL2 XS8D1A1NBL2 – Connection: M8 or M12 connector 3-wire PNP NO XS8E1A1PAM8 XS8C1A1PAM8 XS8D1A1PAM12 XS612B2PAL01M12 (2) PNP NC XS8E1A1PBM8 XS8C1A1PBM8 XS8D1A1PBM12 XS612B2PBL01M12 (2) NPN NO XS8E1A1NAM8 XS8C1A1NAM8 XS8D1A1NAM12 XS612B2NAL01M12 (2) NPN NC XS8E1A1NBM8 XS8C1A1NBM8 XS8D1A1NBM12 XS612B2NBL01M12 (2) Supply voltage limits min/max (V) including ripple 10…36 10…36 10…36 10…36 Switching capacity, max (mA) 100 200 200 200 Short-circuit protection (◆) ◆◆◆◆ LED output state indication (✖) and power on LED (★) ✖/ ★ ✖/ ★ ✖/ ★ ✖/ ★ Voltage drop, closed state (V) at I nominal ≤ 2 ≤ 2 ≤ 2 ≤ 2 Switching frequency (Hz) 1000 1000 100 1000 Sensors for AC or DC applications c / a (2-wire) Connection: pre-cabled PvR (2 m) Dimensions (mm) Ø x L or H x W x L 26 x 26 x 13 40 x 40 x 15 80 x 80 x 26 – 2-wire AC/DC without short-circuit protection (1) NO XS8E1A1MAL2 XS8C1A1MAL2 XS8D1A1MAL2 – NC XS8E1A1MBL2 XS8C1A1MBL2 XS8D1A1MBL2 – Connection: 1/2" 20 UNF connector 2-wire AC/DC without short-circuit protection (1) NO XS8E1A1MAL01U20 XS8C1A1MAL01U20 XS8D1A1MAU20 – NC XS8E1A1MBL01U20 XS8C1A1MBL01U20 XS8D1A1MBU20 – Supply voltage limits min/max (V) including ripple on DC 20…264 20…264 20…264 – Switching capacity, max (mA) 200 260 260 – LED output state indication (✖) and power on LED (★) ✖/ ★ ✖/ ★ ✖/ ★ – Residual current, open state (mA) ≤ 1.5 ≤ 1.5 ≤ 1.5 – Voltage drop, closed state (V) at I nominal ≤ 5.5 ≤ 5.5 ≤ 5.5 – Switching frequency (Hz) AC / DC 50 / 1000 50 / 1000 50 / 1000 – (1) It is necessary to place a 0.8 A quick-blow fuse in series with the load. For flat sensors, forms E, C and D straight 90° Adaptor plate for block type sensors XSE / XSC / XSD Mounting bracket with indexing pin for cylindrical sensors M8 XSZB108 Type E XSZBE00 XSZBE90 XSZBE10 M12 XSZB112 Type C XSZBC00 XSZBC90 XSZBC10 M18 XSZB118 Type D XSZBD00 – XSZBD10 M30 XSZB130 non flush mountable in metal flush mountable in metal A single product that adapts to all metal environments Accurate position detection via teach mode. Snap-C® compatible The Essential Guide to Sensor Selection 15 2/03 © 2003 Schneider Electric All Rights Reserved Ø 18 Ø 30 Ø 8 Ø 12 Ø 18 Ø 30 10 mm 18 mm 2.5 mm 4 mm 8 mm 15 mm 0…7 / 0...10 0…12 / 0...18 0…2 0…3.2 0…6.4 0…12 3.5 ... 7 / 3.5...10 6...12 / 6...18 –––– shielded or non-shielded via Osiconcept teach mode shielded shielded shielded shielded MM MMMM - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...176 (- 25…70) - 13...176 (- 25…70) - 13...176 (- 25…70) - 13...176 (- 25…70) pre-cabled: IP68 (with connector: IP67) pre-cabled: IP68 (with connector: IP67) M18 x 67 M30 x 71 M8 x 50 M12 x 50 M18 x 60 M30 x 60 – – XS608B1PAL2 XS612B1PAL2 XS618B1PAL2 XS630B1PAL2 – – XS608B1PBL2 XS612B1PBL2 XS618B1PBL2 XS630B1PBL2 – – XS608B1NAL2 XS612B1NAL2 XS618B1NAL2 XS630B1NAL2 – – XS608B1NBL2 XS612B1NBL2 XS618B1NBL2 XS630B1NBL2 XS618B2PAL01M12 (2) XS630B2PAL01M12 (2) XS608B1PAM12 XS612B1PAM12 XS618B1PAM12 XS630B1PAM12 XS618B2PBL01M12 (2) XS630B2PBL01M12 (2) XS608B1PBM12 XS612B1PBM12 XS618B1PBM12 XS630B1PBM12 XS618B2NAL01M12 (2) XS630B2NAL01M12 (2) XS608B1NAM12 XS612B1NAM12 XS618B1NAM12 XS630B1NAM12 XS618B2NBL01M12 (2) XS630B2NBL01M12 (2) XS608B1NBM12 XS612B1NBM12 XS618B1NBM12 XS630B1NBM12 10…36 10…36 10…36 10…36 10…36 10…36 200 200 100 200 300 300 ◆◆ ◆◆◆◆ ✖/ ★ ✖/ ★ ✖/ – ✖/ – ✖/ – ✖/ – ≤ 2 ≤ 2 ≤ 2 ≤ 2 ≤ 2 ≤ 2 1000 1000 2500 2500 1000 500 – – – M12 x 50 M18 x 60 M30 x 60 –– – XS612B1MAL2 XS618B1MAL2 XS630B1MAL2 –– – XS612B1MBL2 XS618B1MBL2 XS630B1MBL2 –– – XS612B1MAU20 XS618B1MAU20 XS630B1MAU20 –– – XS612B1MBU20 XS618B1MBU20 XS630B1MBU20 – – – 20…264 20…264 20…264 – – – 200 200 200 –– – ✖/ – ✖/ – ✖/ – –– – ≤ 1.5 ≤ 1.5 ≤ 1.5 –– – ≤ 5.5 ≤ 5.5 ≤ 5.5 – – – 25 / 4000 25 / 3000 25 / 3000 (2) Pigtail cable (L = 0.15 m) with end mounted remote control and M12 connector Plug-in female connectors, including pre-wired versions For Osiconcept XS6 remote control elbowed straight Snap-C XSZBPM12 length 5 m w/o LED M8 XSZCS112 XSZCS101 – M12 XSZCD112Y XSZCD102Y XSCC12FDM40V U20 XSZCA111Y XSZCA101Y – The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 16 2/03 Osiprox Inductive Proximity Sensors Accessories Osiprox Inductive Proximity Sensors _ Standard Type J (8 x 22) Type F (15 x 32) Type E (26 x 26) Type C (40 x 40) Nominal Sensing Distance Sn 2.5 mm 5 mm 10 mm 15 mm Usable sensing distance (mm) 0...2 0...4 0…8 0…12 For flush mounting in metal shielded shielded shielded shielded Enclosure M (metal) P (plastic) P P P P Temperature range °F (°C) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) Degree of protection (conforming to IEC 60 529) pre-cabled: IP68 (with connector: IP67) Sensors for DC applications a (3-wire) Connection: pre-cabled PvR (2 m) Dimensions (mm) Ø x L or H x W x L 8 x 8 x 22 8 x 15 x 32 26 x 26 x 13 40 x 40 x 15 3-wire PNP NO XS7J1A1PAL2 XS7F1A1PAL2 XS7E1A1PAL2 XS7C1A1PAL2 PNP NC XS7J1A1PBL2 XS7F1A1PBL2 XS7E1A1PBL2 XS7C1A1PBL2 NPN NO XS7J1A1NAL2 XS7F1A1NAL2 XS7E1A1NAL2 XS7C1A1NAL2 NPN NC XS7J1A1NBL2 XS7F1A1NBL2 XS7E1A1NBL2 XS7C1A1NBL2 Connection: M8 (1) or M12 connector 3-wire PNP NO XS7J1A1PAL01M8 (2) XS7F1A1PAL01M8 (2) XS7E1A1PAM8 XS7C1A1PAM8 PNP NC XS7J1A1PBL01M8 (2) XS7F1A1PBL01M8 (2) XS7E1A1PBM8 XS7C1A1PBM8 NPN NO XS7J1A1NAL01M8 (2) XS7F1A1NAL01M8 (2) XS7E1A1NAM8 XS7C1A1NAM8 NPN NC XS7J1A1NBL01M8 (2) XS7F1A1NBL01M8 (2) XS7E1A1NBM8 XS7C1A1NBM8 Supply voltage limits min/max (V) including ripple 10...36 10...36 10...36 10...36 Switching capacity, max (mA) 100 100 100 100 Overload and Short-circuit protection (◆) / LED output state indication (✖) ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ Voltage drop, closed state (V) at I nominal ≤ 2 ≤ 2 ≤ 2 ≤ 2 Switching frequency (Hz) 2000 2000 1000 1000 Sensors for AC or DC applications c / a (2-wire) Connection: pre-cabled PvR (2 m) Dimensions (mm) Ø x L or H x W x L 8 x 8 x 22 8 x 15 x 32 26 x 26 x 13 40 x 40 x 15 2-wire non-polarized NO XS7J1A1DAL2 XS7F1A1DAL2 XS7E1A1DAL2 XS7C1A1DAL2 NC XS7J1A1DBL2 XS7F1A1DBL2 XS7E1A1DBL2 XS7C1A1DBL2 Connection: M8 or M12 connector 2-wire non-polarized NO XS7J1A1DAL01M8 (2) XS7F1A1DAL01M8 (2) XS7E1A1DAM8 XS7C1A1DAM8 NC XS7J1A1DBL01M8 (2) XS7F1A1DBL01M8 (2) XS7E1A1DBM8 XS7C1A1DBM8 Supply voltage limits min/max (V) including ripple on DC 10...36 10...36 10...36 10...36 Switching capacity, max (mA) 100 100 100 100 Overload and Short-circuit protection (◆) / LED output state indication (✖) ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ Residual current, open state (mA) ≤ 0.5 ≤ 0.5 ≤ 0.5 ≤ 0.5 Voltage drop, closed state (V) at I nominal ≤ 4 ≤ 4 ≤ 4 ≤ 4 Switching frequency (Hz) AC / DC 4000 5000 1000 1000 (1) M8 not Snap-C® compatible (2) Pigtail cable (L = 0.15 m) with M8 connector For flat sensors, forms J, F, E, C and D straight 90° Adaptor plate for block type sensors XSE / XSC / XSD Mounting bracket with indexing pin for cylindrical sensors M8 XSZB108 Type J XSZBJ00 XSZBJ90 – Type F XSZBF00 XSZBF90 – Type E XSZBE00 XSZBE90 XSZBE10 M12 XSZB112 Type C XSZBC00 XSZBC90 XSZBC10 M18 XSZB118 Type D XSZBD00 – XSZBD10 M30 XSZB130 flush mountable in metal Snap-C® compatible Snap-C® compatible The Essential Guide to Sensor Selection 17 2/03 © 2003 Schneider Electric All Rights Reserved Type D (80 x 80) Cylindrical Ø 8 Cylindrical Ø 12 Cylindrical Ø 18 Cylindrical Ø 30 40 mm 1.5 mm 2 mm 5 mm 10 mm 0…32 0…1.2 0…1.6 0…4 0…8 shielded shielded shielded shielded shielded P MMMM - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) pre-cabled: IP68 (with connector: IP67) pre-cabled: IP68 (with connector: IP67) 80 x 80 x 26 M8 x 33 M12 x 33 M18 x 36.5 M30 x 40.6 XS7D1A1PAL2 XS508B1PAL2 XS512B1PAL2 XS518B1PAL2 XS530B1PAL2 XS7D1A1PBL2 XS508B1PBL2 XS512B1PBL2 XS518B1PBL2 XS530B1PBL2 XS7D1A1NAL2 XS508B1NAL2 XS512B1NAL2 XS518B1NAL2 XS530B1NAL2 XS7D1A1NBL2 XS508B1NBL2 XS512B1NBL2 XS518B1NBL2 XS530B1NBL2 XS7D1A1PAM12 XS508B1PAM8 XS512B1PAM12 XS518B1PAM12 XS530B1PAM12 XS7D1A1PBM12 XS508B1PBM8 XS512B1PBM12 XS518B1PBM12 XS530B1PBM12 XS7D1A1NAM12 XS508B1NAM8 XS512B1NAM12 XS518B1NAM12 XS530B1NAM12 XS7D1A1NBM12 XS508B1NBM8 XS512B1NBM12 XS518B1NBM12 XS530B1NBM12 10...36 10...58 10...58 10...58 10...58 100 200 200 200 200 ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ≤ 2 ≤ 2 ≤ 2 ≤ 2 ≤ 2 100 5000 5000 2000 1000 80 x 80 x 26 M8 x 50 M12 x 50 M18 x 52.5 M30 x 50 XS7D1A1DAL2 XS508B1DAL2 XS512B1DAL2 XS518B1DAL2 XS530B1DAL2 XS7D1A1DBL2 XS508B1DBL2 XS512B1DBL2 XS518B1DBL2 XS530B1DBL2 XS7D1A1DAM12 XS508B1DAM12 XS512B1DAM12 XS518B1DAM12 XS530B1DAM12 XS7D1A1DBM12 XS508B1DBM12 XS512B1DBM12 XS518B1DBM12 XS530B1DBM12 10...36 10...36 10...36 10...36 10...36 100 200 200 200 200 ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ ≤ 0.5 ≤ 0.5 ≤ 0.5 ≤ 0.5 ≤ 0.5 ≤ 4 ≤ 4 ≤ 4 ≤ 4 ≤ 4 100 4000 4000 3000 2000 Plug-in female connectors, including pre-wired versions length 5 m w/o LED elbowed straight Snap-C M8 XSZCS112 XSZCS101 – M12 XSZCD112Y XSZCD102Y XSCC12FDM40V U20 XSZCA111Y XSZCA101Y – The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 18 2/03 Osiprox Inductive Proximity Sensors Accessories Osiprox Inductive Proximity Sensors _ Application Specific: Plastic cylindrical (Food processing industry) Ø 8 Ø 12 Ø 18 Ø 30 Nominal Sensing Distance Sn 2.5 mm 4 mm 8 mm 15 mm Usable sensing distance (mm) 0...2 0...3.2 0…6.4 0…12 For flush mounting in metal non-shielded non-shielded non-shielded non-shielded Enclosure M (metal) P (plastic) P P P P Temperature range °F (°C) - 13...176 (- 25…80) - 13...176 (- 25…80) - 13...176 (- 25…80) - 13...176 (- 25…80) Degree of protection (conforming to IEC 60 529) pre-cabled: IP68 (with connector: IP67) Sensors for DC applications a (3-wire) Connection: pre-cabled PvR (2 m) Dimensions (mm) Ø x L or H x W x L M8 x 33 M12 x 33 M18 x 33.5 M30 x 40.5 3-wire PNP NO XS4P08PA340 XS4P12PA340 XS4P18PA340 XS4P30PA340 PNP NC XS4P08PB340 XS4P12PB340 XS4P18PB340 XS4P30PB340 NPN NO XS4P08NA340 XS4P12NA340 XS4P18NA340 XS4P30NA340 NPN NC XS4P08NB340 XS4P12NB340 XS4P18NB340 XS4P30NB340 4...20 mA output metal – – – – plastic – – – – Connection: M8 (S) or M12 (D) connector 3-wire PNP NO XS4P08PA340S XS4P12PA340D XS4P18PA340D XS4P30PA340D PNP NC XS4P08PB340S XS4P12PB340D XS4P18PB340D XS4P30PB340D NPN NO XS4P08NA340S XS4P12NA340D XS4P18NA340D XS4P30NA340D NPN NC XS4P08NB340S XS4P12NB340D XS4P18NB340D XS4P30NB340D 0...10 V output – – – – 4...20 mA output – – – – Supply voltage limits min/max (V) including ripple 10...38 10...38 10...38 10...38 Switching capacity, max (mA) 200 200 200 200 Short-circuit protection (◆) / LED output state indication (✖) ◆ / ✖ ◆ / ✖ ◆ / ✖ ◆ / ✖ Linearity error –––– Voltage drop, closed state (V) at I nominal ≤ 2 ≤ 2 ≤ 2 ≤ 2 Switching frequency (Hz) 5000 5000 2000 1000 Operating frequency (Hz) – – – – Sensors for AC or DC applications c / a (2-wire) Connection: pre-cabled PvR (2 m) Dimensions (mm) Ø x L M8 x 50 M12 x 50 M18 x 60 M30 x 60 2-wire without short-circuit protection (1) NO XS4P08MA230 XS4P12MA230 XS4P18MA230 XS4P30MA230 NC XS4P08MB230 XS4P12MB230 XS4P18MB230 XS4P30MB230 Connection: U20 (K) connector 2-wire without short-circuit protection (1) NO XS4P08MA230K XS4P12MA230K XS4P18MA230K XS4P30MA230K NC XS4P08MB230K XS4P12MB230K XS4P18MB230K XS4P30MB230K Supply voltage limits min/max (V) including ripple on DC 20...264 20...264 20...264 20...264 Switching capacity, max (mA) 100 200 300 AC / 200 DC 300 AC / 200 DC LED output state indication (✖) ✖✖✖✖ Residual current, open state (mA) ≤ 0.6 ≤ 0.6 ≤ 0.6 ≤ 0.6 Voltage drop, closed state (V) at I nominal ≤ 5.5 ≤ 5.5 ≤ 5.5 ≤ 5.5 Switching frequency (Hz) AC / DC 25 AC / 3000 DC 25 AC / 3000 DC 25 AC / 3000 DC 25 AC / 3000 DC (1) It is necessary to place a 0.4 A quick-blow fuse in series with the load For flat sensors, forms J, F, E, C and D straight 90° Adaptor plate for block type sensors XSE / XSC / XSD Mounting bracket with indexing pin for cylindrical sensors M8 XSZB108 Type J XSZBJ00 XSZBJ90 – Type F XSZBF00 XSZBF90 – Type E XSZBE00 XSZBE90 XSZBE10 M12 XSZB112 Type C XSZBC00 XSZBC90 XSZBC10 M18 XSZB118 Type D XSZBD00 – XSZBD10 M30 XSZB130 Flush mountable in metal Non flush mountable in metal The Essential Guide to Sensor Selection 19 2/03 © 2003 Schneider Electric All Rights Reserved Application Specific: Analog (Position control) Type F (8 x 32) Type E (26 x 26) Type C (40 x 40) Type D (80 x 80) Ø 12 Ø 18 Ø 30 5 mm 10 mm 15 mm 40 mm M: 2 mm / P: 4 mm M: 5 mm / P: 8 mm M: 10 mm / P: 15 mm 1…4 1…10 2…15 5…40 M: 0.2…2 / P: 0.4…4 M: 0.5…5 / P: 0.8…8 M: 1…10 / P: 1.5…15 shielded shielded shielded shielded shielded / non-shielded shielded / non-shielded shielded / non-shielded P P P P M or P M or P M or P - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) pre-cabled: IP68 (with connector: IP67) 8 x 15 x 32 26 x 26 x 13 40 x 40 x 15 80 x 80 x 36 Ø 12 x 50 Ø 18 x 50 Ø 30 x 52.5 ––––––– ––––––– ––––––– ––––––– –––– XS1M12AB120 XS1M18AB120 XS1M30AB120 XS9F111A2L2 XS9E111A2L2 XS9C111A2L2 XS9D111A2L2 XS4P12AB120 XS4P18AB120 XS4P30AB120 ––––––– ––––––– ––––––– ––––––– XS9F111A1L01M8 (2) XS9E111A1L01M12 (2) XS9C111A1L01M12 (2) XS9D111A1M12 ––– XS9F111A2L01M8 (2) XS9E111A2L01M12 (2) XS9C111A2L01M12 (2) XS9D111A2M12 ––– 10...36 10...36 10...36 10...36 10...38 10...38 10...38 ––––––– ––––––– 5% 5% 5% 5% 4% 4% 4% ––––––– ––––––– 2000 1000 1000 100 1500 500 300 ––––––– ––––––– ––––––– ––––––– ––––––– ––––––– ––––––– ––––––– ––––––– ––––––– ––––––– (2) Pigtail cable (L = 0.15 m) with molded end connector Plug-in female connectors, including pre-wired versions length 5 m w/o LED elbowed straight Snap-C M8 (or S) XSZCS112 XSZCS101 – M12 (or D) XSZCD112Y XSZCD102Y XSCC12FDM40V U20 (or K) XSZCA111Y XSZCA101Y – The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 20 2/03 Osiprox Inductive Proximity Sensors Accessories Osiprox Inductive Proximity Sensors _ Application Specific: Miniature cylindrical (Assembly), Speed control Miniature cylindrical Speed control Ø 4 M5 Ø 6.5 Type E (26 x 26) Nominal Sensing Distance Sn 1 mm 1 mm 1.5 mm 10 mm Usable sensing distance (mm) 0...0.8 0...0.8 0...1.2 0...8 For flush mounting in metal shielded shielded shielded shielded Enclosure M (metal) P (plastic) M M M P Adjustment means – – – teach mode Temperature range °F (°C) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) Degree of protection (conforming to IEC 60 529) IP67 IP67 IP67 IP67 Dimensions (mm) Ø x L or H x W x L Ø 4 x 29 M5 x 29 M6.5 x 33 26 x 26 x 13 Max. speed of passing target (impulses/min) – – – 48000 Sensing range (impulses/min) – – – 60...6000 Sensors for DC applications a (3-wire) Connection: pre-cabled PvR (2 m) 3-wire PNP NO XS1L04PA310 XS1N05PA310 XS1L06PA340 – PNP NC slow version – – – – fast version – – – – NPN NO XS1L04NA310 XS1N05NA310 XS1L06NA340 – Connection: M8 or M12 connector 3-wire PNP NO XS1L04PA310S XS1N05PA311S XS1L06PA340S – PNP NC – – – XS9E11RPBL01M12 (3) NPN NO XS1L04NA310S XS1N05NA311S XS1L06NA340S – NPN NC – – – – Connection: M12 connector 4-wire PNP / NPN NO / NC programmable – – – – Supply voltage limits min/max (V) including ripple 5...30 5...30 10...38 10...36 Switching capacity, max (mA) 100 100 200 100 Short-circuit protection (◆) / LED output state indication (✖) / Output supply (▲) ◆ / ✖/ – ◆ / ✖/ – ◆ / ✖/ – ◆ / ✖/ ▲ Voltage drop, closed state (V) at I nominal ≤ 2 ≤ 2 ≤ 2 ≤ 2 Switching frequency (Hz) 5000 5000 5000 – Sensors for AC or DC applications c / a (2-wire) Connection: pre-cabled PvR (2 m) 2-wire AC NO – – – – NC – – – XS9E11RMBL01U20 (4) AC / DC without shortcircuit protection (1) NC slow version – – – – fast version – – – – Supply voltage limits min/max (V) including ripple on DC – – – 20...264 Switching capacity, max (mA) – – – 5...200 LED output state indication (✖) / Output supply (▲) – / – – / – – / – ✖/ ▲ Residual current, open state (mA) – – – ≤ 1.5 Voltage drop, closed state (V) at I nominal – – – ≤ 5.5 Switching frequency (Hz) – – – – (1) It is necessary to place a quick-blow fuse in series with the load (2) 6...150 and 6000 impulses / min for XSAV11373 and XSAV11801 (slow version) and 120...3000 and 48000 impulses / min for XSAV12373 and XSAV12801 (fast version) For flat sensors XS7 straight 90° Mounting bracket with indexing pin for cylindrical sensors M4 XSZB104 M12 XSZB112 M4 XSZB105 M18 XSZB118 For XS7C XSZBC00 XSZBC90 M6.5 XSZB165 M30 XSZB130 For XS7E XSZBE00 XSZBE90 M8 XSZB108 Flush mountable in metal The Essential Guide to Sensor Selection 21 2/03 © 2003 Schneider Electric All Rights Reserved Ultrasonic Application Specific: Speed control, Ferrous / Non-ferrous, Ultrasonic Speed control Ferrous / Non-ferrous Ultrasonic (Detection of any object or material) Type C (40 x 40) Ø 30 Ø 18 Ø 30 M 12 M 18 M 30 15 mm 10 mm 5 mm 10 mm 51 mm 152 mm 1 m 0...12 0...8 0...4 0...8 6.4...51 25.4...152 51...991 shielded shielded shielded shielded – – – PM MM P P P teach mode – – – – – - 13...158 (- 25…70) - 13...158 (- 25…70) 32...122 (0…50) 32...122 (0…50) - 4…149 (- 20...65) 32...122 (0…50) 32...122 (0…50) IP67 IP67 pre-cabled: IP68 (with connector: IP67) IP67 IP67 IP67 40 x 40 x 15 M30 x 81 M18 x 70 M30 x 60 M12 x 50 M18 x 65 M30 x 85 48000 6000...48000 (2) – – – – – 60...6000 6...150 / 120...3000 (2) – – – – – –– – – – – – – XSAV11373 –– ––– – XSAV12373 –– ––– –– – – – – – –– – – – – – XS9C11RPBL01M12 (3) – – – – – – –– – – – – – –– – – – – – M12 remote, L = 0.8 m – – XS1M18KPM40D XS1M30KPM40LD XX512A1KAM8 XX518A1KAM12 XX630A1KAM12 10...36 10...58 10...38 10...38 10...28 10...28 10...28 200 200 200 200 100 100 100 ◆ / ✖/ ▲ ◆ / ✖/ – ◆ / ✖/ – ◆ / ✖/ – ◆ / ✖/ – ◆ / – / – ◆ / ✖/ – ≤ 2 ≤ 2 ≤ 2.6 ≤ 2.6 ≤ 1 ≤ 1 ≤ 1 – – 1000 1000 500 500 200 –– – – – – – XS9C11RMBL01U20 (4) – – – – – – – XSAV11801 –– ––– – XSAV12801 –– ––– 20...264 20...264 – – – – – 5...300 AC / 5...200 DC 5...350 AC / 5...200 DC – – – – – ✖/ ▲ ✖/ – – / – – / – – – – ≤ 1.5 ≤ 1.5 – – – – – ≤ 5.5 ≤ 5.7 – – – – – –– – – – – – (3) Pigtail cable (L = 0.15 m) with end mounted remote control and M12 connector (4) Pigtail cable (L = 0.15 m) with end mounted remote control and 1/2-20UNF connector Plug-in female connectors, including pre-wired versions For remote control XS9...R elbowed straight Snap-C XSZBPM12 length 5 m w/o LED M8 XSZCS112 XSZCS101 – M12 XSZCD112Y XSZCD102Y XSCC12FDM40V U20 XSZCA111Y XSZCA101Y – The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 22 2/03 Osiprox Capacitive Accessories Osiprox Capacitive _ Detection of all materials M12 M18 M30 Nominal Sensing Distance Sn 2 mm 5 mm 10 mm Usable sensing distance (mm) 0…1.44 0…3.6 0…7.2 For flush mounting in metal flush mountable flush mountable flush mountable Enclosure M (metal) P (plastic) M M M Temperature range °F (°C) 32...122 (0…50) - 13...158 (- 25…70) - 13...158 (- 25…70) Degree of protection (conforming to IEC 60 529) IP67 IP67 IP67 Sensors for DC applications a (3-wire) Connection: pre-cabled PVC (2 m) Dimensions (mm) Ø x L or H x W x D M12 x 50 M18 x 60 M30 x 60 3-wire PNP NO XT1M12PA372 XT1M18PA372 XT1M30PA372 NC XT1M12PB372 XT1M18PB372 XT1M30PB372 NPN NO XT1M12NA372 XT1M18NA372 XT1M30NA372 Connection: screw clamp terminals 3-wire PNP NO + NO complementary functions – – – NPN NO + NO complementary functions – – – Supply voltage limits min/max (V) including ripple 10...38 10...38 10...38 Switching capacity, max (mA) 300 300 300 Short-circuit protection (◆) / LED output state indication (✖) ◆ / ✖ ◆ / ✖ ◆ / ✖ Voltage drop, closed state (V) at I nominal ≤ 2 ≤ 2 ≤ 2 Switching frequency (Hz) 100 100 100 Sensors for AC or DC applications c / a (2-wire) Connection: pre-cabled PVC (2 m) Dimensions (mm) Ø x L or H x W x D – M18 x 60 M30 x 60 2-wire AC NO – XT1M18FA262 XT1M30FA262 NC – XT1M18FB262 XT1M30FB262 Connection: screw clamp terminals 2-wire AC programmable NO or NC – – – Supply voltage limits min/max (V) including ripple on DC – 20...264 20...264 Switching capacity, max (mA) – 300 300 LED output state indication (✖) – ✖ ✖ Residual current, open state (mA) – ≤ 1.5 / 120 V ≤ 1.5 / 120 V Voltage drop, closed state (V) at I nominal – ≤ 5.5 ≤ 5.5 Switching frequency (Hz) – 25 25 Mounting bracket with indexing pin for cylindrical sensors M12 XSZB112 M18 XSZB118 M30 XSZB130 M32 XUZB32 Flush mountable in metal Non-flush mountable in metal The Essential Guide to Sensor Selection 23 2/03 © 2003 Schneider Electric All Rights Reserved Ø 32 40 x 40 M18 M30 Ø 32 15 mm 15 mm 8 mm 15 mm 210 mm 0…10.8 0…10.8 0…5.8 0…10.8 0…14.4 flush mountable non-flush mountable non-flush mountable non-flush mountable non-flush mountable MP P P P - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) - 13...158 (- 25…70) IP63 IP67 IP67 IP67 IP63 – 117 x 40 x 40 M18 x 60 M30 x 60 – – – XT4P18PA372 XT4P30PA372 – ––– – – – – XT4P18NA372 XT4P30NA372 – – XT7C40PC440 ––– – XT7C40NC440 ––– – 10...58 10...38 10...38 – – 200 300 300 – – ◆ / ✖ ◆ / ✖ ◆ / ✖ – – ≤ 2 ≤ 2 ≤ 2– – 100 100 100 – Ø 32 x 80 117 x 40 x 40 M18 x 60 M30 x 60 Ø 32 x 80 XT1L32FA262 – XT4P18FA262 XT4P30FA262 XT4L32FA262 XT1L32FB262 – – XT4P30FB262 XT4L32FB262 – XT7C40FP262 ––– 20...264 20...264 20...264 20...264 90...250 250 350 300 300 250 ✖✖ ✖ ✖ ✖ ≤ 7 ≤ 1.5 ≤ 1.5 / 120 V ≤ 1.5 / 120 V ≤ 7 ≤ 9 ≤ 5.5 ≤ 5.5 ≤ 5.5 ≤ 9 10 25 25 25 10 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 24 2/03 Osiswitch Limit switches Osiswitch Limit switches_ Complete switches (adabtable sub-assemblies, see pages 26-27) XCMD, XCMN XCKT 2-pole contact N/C + N/O snap action 2-pole contact N/C + N/O slow break 2-pole contact N/C + N/O snap action Miniature type XCMD metal, precabled Type of operator metal end plunger steel roller plunger plastic roller lever variable length plastic roller lever M12 head metal end plunger Actuation speed (in m/s) 0.5 0.5 1.5 1.5 0.5 Switches conforming to standard IEC 60 947-5-1 section 3 Degree of protection conforming to IEC 60 529 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 Rated operational characteristics c AC 15; B 300 (Ue = 240 V, Ie = 1.5 A) / a DC 13; R 300 (Ue = 250 V, Ie = 0.1 A) Cable entry pre-cabled, adjustable direction, length = 1 m (other lengths available on request) Mounting holes (mm) 20 20 20 20 20 Body dimensions (mm) W x D x H 30 x 16 x 59 30 x 16 x 59 30 x 16 x 59 30 x 16 x 59 30 x 16 x 59 Complete switch 2-pole, N/C + N/O snap action XCMD2110L1 XCMD2102L1 XCMD2115L1 XCMD2145L1 XCMD21F0L1 2-pole, N/C + N/O break before make, slow break XCMD2510L1 XCMD2502L1 XCMD2515L1 XCMD2545L1 XCMD25F0L1 XCKP 2-pole contact N/C + N/O snap action 2-pole contact N/C + N/O slow break Compact type XCKD metal and XCKP plastic conforming to standard EN 50047 Type of operator metal end plunger steel roller plunger plastic roller lever horizontal actuation M18 head metal end plunger M18 head steel roller plunger Actuation speed (in m/s) 0.5 0.5 1 0.5 Switches conforming to standard IEC 60 947-5-1 section 3 Degree of protection conforming to IEC 60 529 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 Rated operational characteristics c AC 15; A 300 (Ue = 240 V, Ie = 3 A) / a DC 13; Q 300 (Ue = 250 V, Ie = 0.27 A) Cable entry 1 tapped entry for1/2" NPT cable gland Mounting holes (mm) 20 20 20 M18 x 1 M18 x 1 Body dimensions (mm) W x D x H 30 x 30 x 73 30 x 30 x 73 30 x 30 x 73 30 x 30 x 73 30 x 30 x 73 Metal products Complete switch 2-pole, N/C + N/O snap action XCKD2110N12 XCKD2102N12 XCKD2121N12 XCKD21H0N12 XCKD21H2N12 2-pole, N/C + N/O break before make, slow break XCKD2510N12 XCKD2502N12 XCKD2521N12 XCKD25H0N12 XCKD25H2N12 Plastic, double insulated products Complete switch 2-pole, N/C + N/O snap action XCKP2110N12 XCKP2102N12 XCKP2121N12 XCKP21H0N12 XCKP21H2N12 2-pole, N/C + N/O break before make, slow break XCKP2510N12 XCKP2502N12 XCKP2521N12 XCKP25H0N12 XCKP25H2N12 Indicates positive opening contacts BK WH BK BU BN GN-YE BK WH BK BU BN GN-YE 13 14 22 21 13 14 22 21 13 14 22 21 The Essential Guide to Sensor Selection 25 2/03 © 2003 Schneider Electric All Rights Reserved Type XCKT compact, plastic, 2 cable entries M12 head steel roller plunger cat wisker End plunger metal end plunger metal roller plunger plastic roller lever plastic roller lever, horizontal actuation cat wisker 0.1 1 0.5 0.5 0.5 1.5 1 1 – – IP66 and IP67 IP66 and IP67 IP65 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 c AC 15; B 300 (Ue = 240 V, Ie = 1.5 A) / a DC 13; R 300 (Ue = 250 V, Ie = 0.1 A) c AC 15; A 300 (Ue = 240 V, Ie = 3 A) / a DC 13; Q 300 (Ue = 250 V, Ie = 0.27 A) pre-cabled, adjustable direction, length = 1 m (other lengths available on request) pre-cabled, length = 1 m 2 tapped entries for 1/2" NPT cable gland 20 20 20 20 or 40 20 or 40 20 or 40 20 or 40 20 or 40 30 x 16 x 59 30 x 16 x 59 30 x 16 x 59 60 x 30 x 61 60 x 30 x 61 60 x 30 x 61 60 x 30 x 61 60 x 30 x 61 XCMD21F2L1 XCMD2106L1 XCMN2110L1 (1) XCKT2110N12 XCKT2102N12 XCKT2118N12 XCKT2121N12 XCKT2106N12 XCMD25F2L1 XCMD2506L1 – ––––– With manual reset XCPR and XCDR plastic roller lever variable length plastic roller lever rubber roller lever Ø 50 mm cat wisker metal end plunger steel roller lever plastic roller lever horizontal actuation plastic roller lever vertical actuation plastic roller lever 1.5 1.5 1.5 1 0.5 0.5 1 1 1.5 – IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 IP66 and IP67 c AC 15; A 300 (Ue = 240 V, Ie = 3 A) / a DC 13; Q 300 (Ue = 250 V, Ie = 0.27 A) c AC 15; A 300 (Ue = 240 V, Ie = 3 A) / a DC 13; Q 300 (Ue = 250 V, Ie = 0.27 A) 1 tapped entry for 1/2" NPT cable gland 1 tapped entry for 1/2" NPT cable gland 20 20 20 20 20 20 20 20 20 30 x 30 x 73 30 x 30 x 73 30 x 30 x 73 30 x 30 x 73 30 x 30 x 95 30 x 30 x 95 30 x 30 x 95 30 x 30 x 95 30 x 30 x 95 XCKD2118N12 XCKD2145N12 XCKD2139N12 XCKD2106N12 XCDR2110N12 XCDR2102N12 XCDR2121N12 XCDR2127N12 XCDR2118N12 XCKD2518N12 XCKD2545N12 XCKD2539N12 XCKD2506N12 XCDR2510N12 XCDR2502N12 XCDR2521N12 XCDR2527N12 XCDR2518N12 XCKP2118N12 XCKP2145N12 XCKP2139N12 XCKP2106N12 XCPR2110N12 XCPR2102N12 XCPR2121N12 XCPR2127N12 XCPR2118N12 XCKP2518N12 XCKP2545N12 XCKP2539N12 XCKP2506N12 XCPR2510N12 XCPR2502N12 XCPR2521N12 XCPR2527N12 XCPR2518N12 (1) XCMN switch is not modular The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 26 2/03 Osiswitch Limit switches subassemblies Osiswitch Limit switches_ Adaptable sub-assemblies for miniature and compact switches Common heads for miniature and compact bodies Metal plunger and multi-directional heads Description metal end plunger metal end plunger with elastomer protective boot steel roller plunger retractable steel roller lever plastic roller lever, horizontal actuation plastic roller lever, vertical actuation Reference ZCE10 ZCE11 ZCE02 ZCE24 (2) ZCE21 ZCE27 Metal rotary heads and levers Description rotary head without lever, spring return, for actuation from RH or LH side plastic roller lever, track: 24/31 mm (ZCMD) 29/36 mm (ZCD/P/T) steel roller lever, track: 24/31 mm (ZCMD) 29/36 mm (ZCD/P/T) plastic roller lever, track: 16/39 mm (ZCMD) 21/44 mm (ZCD/P/T) steel roller lever, track: 16/39 mm (ZCMD) 21/44 mm (ZCD/P/T) plastic, roller lever, track: 20/36 mm (ZCMD) 24/40 mm (ZCD/P/T) Reference ZCE01 ZCY15 (2) ZCY16 (2)) ZCY25 (2) ZCY26 (2) ZCY18 (1) (1) Recommended for use with body ZCD... / ZCP... / ZCT... (2) Recommended for use with body: ZCMD... Body/contact assemblies Miniature Type of contact 2-pole N/C + N/O Snap action 3-pole N/C + N/C + N/O Snap action 2-pole N/C + N/O Slow break 3-pole N/C + N/C + N/O Slow break 2-pole N/C + N/O snap action 5 pin connector 1 single pole contact snap action 4-pin connector Reference of metal body ZCMD21 ZCMD39 ZCMD25 ZCMD37 ZCMD21C12 ZCMD21M12 Reference of plastic body –––––– Connection of miniature body/contact assemblies Specific pre-cabled connection components Option: M12 pre-wired connector, L = 2 m 5-pin 4-pin L = 1 m ZCMC21L1 ZCMC39L1 ZCMC25L1 ZCMC37L1 L = 2 m ZCMC21L2 ZCMC39L2 ZCMC25L2 ZCMC37L2 L = 5 m ZCMC21L5 ZCMC39L5 ZCMC25L5 ZCMC37L5 XSZCD1501Y XSZCD101Y BKWH BKBU BN GN-YE RD WH RD BU BN GN-YE BK WH BK BK WH BK BU BN GN-YE RD WH RD BU BN GN-YE BK WH BK BK WH BK BU BN GN-YE BK WH BK BU BN GN-YE The Essential Guide to Sensor Selection 27 2/03 © 2003 Schneider Electric All Rights Reserved Osiswitch sub assemblies M12 head metal plunger M18 head metal plunger M12 head steel roller plunger M18 head steel roller plunger spring lever spring lever with plastic end cat wisker ZCEF0 (2) ZCEH0 (1) ZCEF2 (1) ZCEH2 (1) ZCE08 ZCE07 ZCE06 steel roller lever, for track: 20/36 mm (ZCMD) 24/40 mm (ZCD/P/T) ceramic roller lever variable length plastic roller lever round, glass fiber rod lever Ø 3 mm L = 125 mm metal spring lever plastic roller lever Ø 50 mm adjustable plastic roller lever Ø 50 mm ZCY19 (1) ZCY22 ZCY45 ZCY55 ZCY91 ZCY39 ZCY49 Compact 2-pole N/C + N/O Snap action 3-pole N/C + N/C + N/O Snap action 2-pole N/C + N/O Slow break 3-pole N/C + N/C + N/O Slow break 2-pole N/C + N/O Snap action 2-pole N/C + N/O Snap action 2-pole N/C + N/O Snap action 2-pole N/C + N/O Slow break ZCD21 ZCD39 ZCD25 ZCD37 ZCD21M12 ––– ZCP21 ZCP39 ZCP25 ZCP37 – ZCP21M12 ZCT21P16 ZCT25P16 Connection of compact body/contact assemblies Interchangeable cable gland Option: M12 pre-wired connector, L = 2 m ZCT PG 11 cable gland versions: replace suffix P16 with G11 Example: ZCT21G16 becomes ZCT21G11 ZCT 1/2" NPT versions: replace suffix P16 with N12 (adaptor). Example: ZCT21P16 becomes ZCT21N12 5-pin 4-pin Description Outlet for ISO M16 gland Outlet for ISO M20 gland Outlet for Pg 11 gland Outlet for Pg 13.5 gland Outlet for 1/2” gland Outlet for PF 1/2 gland Metal ZCPEP16 ZCPEP20 ZCPEG11 ZCPEG13 ZCPEN12 ZCPEF12 Plastic ZCDEP16 ZCDEP20 ZCDEG11 ZCDEG13 ZCDEN12 ZCDEF12 XSZCD1501Y XSZCD101Y 13 1422 21 32 31 22 2113 14 13 1422 21 32 31 22 2113 14 13 1422 2113 14 22 21 13 14 22 21 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 28 2/03 Osiswitch Limit switches Indicates positive opening contacts Osiswitch Limit switches_ Standard XCKJ, XCKS, XCKM 2-pole contact N/C + N/O snap action 2-pole contact N/C + N/O slow break 3-pole contact N/C + N/C + N/O snap action Type XCKJ metal, fixed body, conforming to standard EN 50041 Type of operator metal end plunger steel roller plunger plastic roller lever variable length plastic roller lever round rod lever Ø 6 mm polyamide / L = 200 mm Actuation speed (in m/s) 0.5 1 1.5 1.5 1.5 Degree of protection conforming to IEC 60 529 IP667 IP667 IP667 IP667 IP667 Rated operational characteristics c AC 15; A 300 (Ue = 240 V, Ie = 3 A) / a DC 13; Q 300 (Ue = 250 V, Ie = 0.27 A) Cable entry (1) 1 tapped entry for 1/2" NPT cable gland Mounting holes (mm) 30 x 60 30 x 60 30 x 60 30 x 60 30 x 60 Body dimensions (mm) W x D x H 40 x 44 x 77 30 x 16 x 59 30 x 16 x 59 30 x 16 x 59 40 x 44 x 77 Complete switch 2-pole, N/C + N/O snap action XCKJ161 XCKJ167 XCKJ10511 XCKJ10541 XCKJ10559 2-pole, N/C + N/O break before make, slow break XCKJ561 XCKJ567 XCKJ50511 XCKJ50541 XCKJ50559 Body 2-pole N/C + N/O snap action ZCKJ1 ZCKJ1 ZCKJ1 ZCKJ1 ZCKJ1 2-pole N/C + N/O break before make, slow break ZCKJ5 ZCKJ5 ZCKJ5 ZCKJ5 ZCKJ5 3-pole N/C + N/C + N/O snap action ZCKJD39 ZCKJD39 ZCKJD39 ZCKJD39 ZCKJD39 Associated head (including operator) ZCKE61 ZCKE67 ZCK05 ZCKE05 ZCKE05 Operating lever for rotary heads – – ZCKY11 ZCKY41 ZCKY59 13 1422 21 13 1422 21 31 32 21 22 14 13 The Essential Guide to Sensor Selection 29 2/03 © 2003 Schneider Electric All Rights Reserved Substitution guide Photoelectric Sensors Osiconcept Photoelectric Sensors_ Substitution Guide Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors 18 mm XU2M18NP340D XUB0BNSNM12 + XUB0BKSNM12T XU5M18PP340D XUB0BPSNM12 XU1B18NP340 XUB0ANSNL2 + XUZC50 XU2M18NP340WD XUB0BNSWM12 + XUB0BKSWM12T XU5M18PP340L5 XUB0BPSNL5 XU1B18NP340D XUB0ANSNM12 + XUZC50 XU2M18PP340 XUB0BPSNL2 + XUB0BKSNL2T XU5M18PP340W XUB0BPSWL2 XU1B18PP340 XUB 0APSNL2 + XUZC50 XU2M18PP340D XUB0BPSNM12 + XUB0BKSNM12T XU5M18PP340WD XUB0BPSWM12 XU1B18PP340D XUB0APSNM12 + XUZC50 XU2M18PP340L10 XUB0BPSNL10 + XUB0BKSNL10T XU5M18PP340WL5 XUB0BPSWL5 XU1N18NP340 XUB1BNANL2 + XUZC50 XU2M18PP340L5 XUB0BPSNL5 + XUB0BKSNL5T XU5N18NP340 XUB4BNANL2 XU1N18NP340 XUB1BNBNL2 + XUZC50 XU2M18PP340W XUB0BPSWL2 + XUB0BKSWL2T XU5N18NP340 XUB4BNBNL2 XU1N18NP340D XUB1BNANM12 + XUZC50 XU2M18PP340WD XUB0BPSWM12 + XUB0BKSWM12T XU5N18NP340D XUB4BNANM12 XU1N18NP340D XUB1BNBNM12 + XUZC50 XU2M18PP340WL5 XUB0BNSWL5 + XUB0BKSWL5T XU5N18NP340D XUB4BNBNM12 XU1N18NP340L5 XUB1BNANL5 + XUZC50 XU2N18NP340 XUB2BNANL2R + XUB2BKSNL2T XU5N18NP340L5 XUB4BNANL5 XU1N18NP340L5 XUB1BNBNL5 + XUZC50 XU2N18NP340 XUB2BNBNL2R + XUB2BKSNL2T XU5N18NP340L5 XUB4BNBNL5 XU1N18NP340T10 XUB1BNANL2T10 + XUZC50 XU2N18NP340D XUB2BNANM12R + XUB2BKSNM12T XU5N18NP340T10 XUB4BNANL2T10 XU1N18NP340T10 XUB1BNBNL2T10 + XUZC50 XU2N18NP340D XUB2BNBNM12R + XUB2BKSNM12T XU5N18NP340T10 XUB4BNBNL2T10 XU1N18NP340W XUB1BNAWL2 + XUZC50 XU2N18NP340WD XUB2BNAWM12R + XUB2BKAWM12T XU5N18NP340W XUB4BNAWL2 XU1N18NP340W XUB1BNBWL2 + XUZC50 XU2N18NP340WD XUB2BNBWM12R + XUB2BKAWM12T XU5N18NP340W XUB4BNBWL2 XU1N18NP340WD XUB1BNAWM12 + XUZC50 XU2N18PP340 XUB2BPANL2R + XUB2BKSNL2T XU5N18NP340WD XUB4BNAWM12 XU1N18NP340WD XUB1BNBWM12 + XUZC50 XU2N18PP340 XUB2BPBNL2R + XUB2BKSNL2T XU5N18NP340WD XUB4BNBWM12 XU1N18PP340 XUB1BPANL2 + XUZC50 XU2N18PP340D XUB2BPANM12R + XUB2BKSNM12T XU5N18NP340WL5 XUB4BNAWL5 XU1N18PP340 XUB1BPBNL2 + XUZC50 XU2N18PP340D XUB2BPBNM12R + XUB2BKSNM12T XU5N18NP340WL5 XUB4BNBWL5 XU1N18PP340D XUB1BPANM12 + XUZC50 XU2N18PP340L5 XUB2BPANL5R + XUB2BKSNL5T XU5N18PP340 XUB4BPANL2 XU1N18PP340D XUB1BPBNM12 + XUZC50 XU2N18PP340L5 XUB2BPBNL5R + XUB2BKSNL5T XU5N18PP340 XUB4BPBNL2 XU1N18PP340L5 XUB1BPANL5 + XUZC50 XU2N18PP340W XUB2BPAWL2R + XUB2BKSWL2T XU5N18PP340D XUB4BPANM12 XU1N18PP340L5 XUB1BPBNL5 + XUZC50 XU2N18PP340W XUB2BPBWL2R + XUB2BKSWL2T XU5N18PP340D XUB4BPBNM12 XU1N18PP340T10 XUB1BPANL2T10 + XUZC50 XU2N18PP340WD XUB2BPAWM12R + XUB2BKAWM12T XU5N18PP340L5 XUB4BPANL5 XU1N18PP340T10 XUB1BPBNL2T10 + XUZC50 XU2N18PP340WD XUB2BPBWM12R + XUB2BKAWM12T XU5N18PP340L5 XUB4BPBNL5 XU1N18PP340W XUB1BPAWL2 + XUZC50 XU2N18PP340WL5 XUB2BPAWL5R + XUB2BKSWL5T XU5N18PP340T10 XUB4BPANL2T10 XU1N18PP340W XUB1BPBWL2 + XUZC50 XU2N18PP340WL5 XUB2BPBWL5R + XUB2BKSWL5T XU5N18PP340T10 XUB4BPBNL2T10 XU1N18PP340WD XUB1BPAWM12 + XUZC50 XU2P18NP340 XUB2ANANL2R + XUB2AKSNL2T XU5N18PP340W XUB4BPAWL2 XU1N18PP340WD XUB1BPBWM12 + XUZC50 XU2P18NP340 XUB2ANBNL2R + XUB2AKSNL2T XU5N18PP340W XUB4BPBWL2 XU1N18PP340WL5 XUB1BPAWL5 + XUZC50 XU2P18NP340D XUB2ANANM12R + XUB2AKSNM12T XU5N18PP340WD XUB4BPAWM12 XU1N18PP340WL5 XUB1BPBWL5 + XUZC50 XU2P18NP340D XUB2ANBNM12R + XUB2AKSNM12T XU5N18PP340WD XUB4BPBWM12 XU1P18NP340 XUB1ANANL2 + XUZC50 XU2P18NP340W XUB2ANAWL2R + XUB2AKSWL2T XU5N18PP340WL5 XUB4BPAWL5 XU1P18NP340 XUB1ANBNL2 + XUZC50 XU2P18NP340W XUB2ANBWL2R + XUB2AKSWL2T XU5N18PP340WL5 XUB4BPBWL5 XU1P18NP340D XUB1ANANM12 + XUZC50 XU2P18NP340WD XUB2ANAWM12R + XUB2AKAWM12T XU5P18NP340 XUB4ANANL2 XU1P18NP340D XUB1ANBNM12 + XUZC50 XU2P18NP340WD XUB2ANBWM12R + XUB2AKAWM12T XU5P18NP340 XUB4ANBNL2 XU1P18NP340L5 XUB1ANANL5 + XUZC50 XU2P18PP340 XUB2APANL2R + XUB2AKSNL2T XU5P18NP340D XUB4ANANM12 XU1P18NP340L5 XUB1ANBNL5 + XUZC50 XU2P18PP340 XUB2APBNL2R + XUB2AKSNL2T XU5P18NP340D XUB4ANBNM12 XU1P18NP340W XUB1ANAWL2 + XUZC50 XU2P18PP340D XUB2APANM12R + XUB2AKSNM12T 18 mm Tubular XU1P18NP340W XUB 1ANBWL2 + XUZ C50 XU2P18PP340D XUB2APBNM12R + XUB2AKSNM12T XU5P18NP340L5 XUB4ANANL5 XU1P18NP340WD XUB1ANAWM12 + XUZC50 XU2P18PP340L10 XUB2APANL10R + XUB2AKSNL10T XU5P18NP340L5 XUB4ANBNL5 XU1P18NP340WD XUB1ANBWM12 + XUZC50 XU2P18PP340L10 XUB2APBNL10R + XUB2AKSNL10T XU5P18NP340W XUB4ANAWL2 XU1P18PP340 XUB1APANL2 + XUZC50 XU2P18PP340L5 XUB2APANL5R + XUB2AKSNL5T XU5P18NP340W XUB4ANBWL2 XU1P18PP340 XUB1APBNL2 + XUZC50 XU2P18PP340L5 XUB2APBNL5R + XUB2AKSNL5T XU5P18NP340WD XUB4ANAWM12 XU1P18PP340D XUB1APANM12 + XUZC50 XU2P18PP340W XUB2APAWL2R + XUB2AKSWL2T XU5P18NP340WD XUB4ANBWM12 XU1P18PP340D XUB1APBNM12 + XUZC50 XU2P18PP340W XUB2APBWL2R + XUB2AKSWL2T XU5P18PP340 XUB4APANL2 XU1P18PP340L5 XUB1APANL5 + XUZC50 XU2P18PP340WD XUB2APAWM12R + XUB2AKAWM12T XU5P18PP340 XUB4APBNL2 XU1P18PP340L5 XUB1APBNL5 + XUZC50 XU2P18PP340WD XUB2APBWM12R + XUB2AKAWM12T XU5P18PP340D XUB4APANM12 XU1P18PP340W XUB1APAWL2 + XUZC50 XU5B18NP340 XUB0ANSNL2 XU5P18PP340D XUB4APBNM12 XU1P18PP340W XUB1APBWL2 + XUZC50 XU5B18NP340D XUB0ANSNM12 XU5P18PP340L10 XUB4APANL10 XU1P18PP340WD XUB1APAWM12 + XUZC50 XU5B18PP340 XUB0APSNL2 XU5P18PP340L10 XUB4APBNL10 XU1P18PP340WD XUB1APBWM12 + XUZC50 XU5B18PP340D XUB0APSNM12 XU5P18PP340L5 XUB4APANL5 XU1P18PP340WL5 XUB1APAWL5 + XUZC50 XU5B18PP340L5 XUB0APSNL5 XU5P18PP340L5 XUB4APBNL5 XU1P18PP340WL5 XUB1APBWL5 + XUZC50 XU5M18NP340 XUB0BNSNL2 XU5P18PP340W XUB4APAWL2 XU2B18NP340 XUB0ANSNL2 + XUB0AKSNL2T XU5M18NP340D XUB0BNSNM12 XU5P18PP340W XUB4APBWL2 XU2B18NP340D XUB0ANSNM12 + XUB0AKSNM12T XU5M18NP340L5 XUB0BNSNL5 XU5P18PP340WD XUB4APAWM12 XU2B18PP340 XUB0APSNL2 + XUB0AKSNL2T XU5M18NP340W XUB0BNSWL2 XU5P18PP340WD XUB4APBWM12 XU2B18PP340D XUB0APSNM12 + XUB0AKSNM12T XU5M18NP340WL5 XUB0BNSWL5 XU5P18PP340WL5 XUB4APAWL5 XU2M18NP340 XUB0BNSNL2 + XUB0BKSNL2T XU5M18PP340 XUB0BPSNL2 XU5P18PP340WL5 XUB4APBWL5 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 30 2/03 Substitution guide Photoelectric Sensors Osiconcept Photoelectric Sensors_ Substitution Guide cont. Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors XU8B18NP340 XUB0ANSNL2 XU9P18NP340W XUB9ANAWL2 + XUZC50 XUJK06353D2 XUX0AKSAM12 + XUZX2000 XU8B18NP340D XUB0ANSNM12 XU9P18NP340W XUB9ANBWL2 + XUZC50 XUJK06353H7 XUX0AKSAT16 + XUZX2000 + XUZX2001 XU8B18PP340 XUB0APSNL2 XU9P18NP340WD XUB9ANAWM12 + XUZC50 XUJK06353P9 XUX0AKSAT16 + XUZX2000 XU8B18PP340D XUB0APSNM12 XU9P18NP340WD XUB9ANBWM12 + XUZC50 XUJK103534 XUX0AKSAT16 + XUZX2000 XU8B18PP340L10 XUB0APSNL10 XU9P18PP340 XUB9APANL2 + XUZC50 XUJK103534D1 XUX0AKSAM12 + XUZX2000 XU8M18NP340 XUB0BNSNL2 XU9P18PP340 XUB9APBNL2 + XUZC50 XUJK103534D2 XUX0AKSAM12 + XUZX2000 XU8M18NP340D XUB0BNSNM12 XU9P18PP340D XUB9APANM12 + XUZC50 XUJK103534P9 XUX0AKSAT16 + XUZX2000 XU8M18NP340L5 XUB0BNSNL5 XU9P18PP340D XUB9APBNM12 + XUZC50 XUJK123538 XUX0AKSAT16 + XUZX2000 XU8M18NP340W XUB0BNSWL2 XU9P18PP340W XUB9APAWL2 + XUZC50 XUJK123538D1 XUX0AKSAM12 + XUZX2000 XU8M18NP340WD XUB0BNSWM12 XU9P18PP340W XUB9APBWL2 + XUZC50 XUJK123538D2 XUX0AKSAM12 + XUZX2000 XU8M18PP340 XUB0BPSNL2 XU9P18PP340WD XUB9APAWM12 + XUZC50 XUJK123538P9 XUX0AKSAT16 + XUZX2000 XU8M18PP340D XUB0BPSNM12 XU9P18PP340WD XUB9APBWM12 + XUZC50 XUJK703538 XUX0AKSAT16 + XUZX2000 XU8M18PP340L5 XUB0BPSNL5 XU9P18PP340WL5 XUB9APANL5 + XUZC50 XUJK703538D1 XUX0AKSAM12 + XUZX2000 XU8M18PP340W XUB0BPSWL2 XU9P18PP340WL5 XUB9APBNL5 + XUZC50 XUJK703538D2 XUX0AKSAM12 + XUZX2000 XU8M18PP340WD XUB0BPSWM12 XUD Amplifier XUJK703538H7 XUX0AKSAT16 + XUZX2000 + XUZX2001 XU9B18NP340 XUB0ANSNL2 + XUZC50 XUDH003537 XUDA1PSML2 XUJK703538P9 XUX0AKSAT16 + XUZX2000 XU9B18NP340D XUB0ANSNM12 + XUZC50 XUDH003537S XUDA1PSMM8 Compact XU9B18PP340 XUB0APSNL2 + XUZC50 XUDH003537T10 XUDA1PSML2T10 XUJLM0811 XUX1ARCNT16 + XUZX2000 XU9B18PP340D XUB0APSNM12 + XUZC50 XUDH003937 XUDA2PSML2 XUJLM0811H7 XUX1ARCNT16 + XUZX2000 + XUZX2001 XU9B18PP340L5 XUB0APSNL5 + XUZC50 XUDH003937S XUDA2PSMM8 XUJLM0811P9 XUX1ARCNT16 + XUZX2000 XU9M18NP340 XUB0BNSNL2 + XUZC50 XUDJ003537 XUDA1NSML2 XUJLM0811T10 XUX1ARCNT16T10 + XUZX2000 XU9M18NP340D XUB0BNSNM12 + XUZC50 XUDJ003537S XUDA1NSMM8 XUJLM1503 XUX0ARCTT16T + XUZX2000 XU9M18NP340L5 XUB0BNSNL5 + XUZC50 XUDJ003937 XUDA2NSML2 XUJLM1503H7 XUX0ARCTT16T + XUZX2000 + XUZX2001 XU9M18NP340W XUB0BNSWL2 + XUZC50 XUDJ003937S XUDA2NSMM8 XUJLM1503P9 XUX0ARCTT16T + XUZX2000 XU9M18PP340 XUB0BPSNL2 + XUZC50 Compact Rectangular XUJLM1514 XUX2ARCNT16R + XUZX2000 XU9M18PP340D XUB0BPSNM12 + XUZC50 XUEF010315 XUX0ARCTT16 + XUZX2000 XUJLM1514H7 XUX2ARCNT16R + XUZX2000 + XUZ X2001 XU9M18PP340L5 XUB0BPSNL5 + XUZC50 XUEF010315H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJLM1514P9 XUX2ARCNT16R + XUZ X2000 XU9M18PP340W XUB0BPSWL2 + XUZC50 XUEF080319 XUX0ARCTT16 + XUZX2000 XUJM06031 XUX0ARCTT16 + XUZX2000 XU9M18PP340WD XUB0BPSWM12 + XUZC50 XUEF080319H4 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJM060319 XUX0ARCTT16 + XUZX2000 XU9M18PP340WL5 XUB0BPSWL5 + XUZC50 XUEF10031 XUX0ARCTT16 + XUZX2000 XUJM060319D1 XUX0ARCTT16 + XUZX2000 XU9N18NP340 XUB9BNANL2 + XUZC50 XUEF10031H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJM060319D2 XUX0ARCTT16 + XUZX2000 XU9N18NP340 XUB9BNBNL2 + XUZC50 XUEF300314 XUX0ARCTT16 + XUZX2000 XUJM060319H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XU9N18NP340D XUB9BNANM12 + XUZC50 XUEF300314H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJM060319P9 XUX0ARCTT16 + XUZX2000 XU9N18NP340D XUB9BNBNM12 + XUZC50 XUEH017535 XUX0AKSAT16 + XUZX2000 XUJM06031D1 XUX0ARCTT16 + XUZX2000 XU9N18NP340L5 XUB9BNANL5 + XUZC50 XUEH017535H7 XUX0AKSAT16 + XUZX2000 + XUZX2001 XUJM06031D2 XUX0ARCTT16 + XUZX2000 XU9N18NP340L5 XUB9BNBNL5 + XUZC50 XUEH10753 XUX0AKSAT16 + XUZX2000 XUJM06031H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XU9N18NP340W XUB9BNAWL2 + XUZC50 XUEH10753H7 XUX0AKSAT16 + XUZX2000 + XUZX2001 XUJM06031P9 XUX0ARCTT16 + XUZX2000 XU9N18NP340W XUB9BNBWL2 + XUZC50 XUEH3000 XUX0AKSAT16T + XUZX2000 XUJM1000 XUX0AKSAT16T + XUZX2000 XU9N18NP340WD XUB9BNAWM12 + XUZC50 XUEH3000H7 XUX0AKSAT16T + XUZX2000 + XUZX2001 XUJM1000 XUX0ARCTT16T + XUZX2000 XU9N18NP340WD XUB9BNBWM12 + XUZC50 XUEH307534 XUX0AKSAT16 + XUZX2000 XUJM1000D1 XUX0AKSAM12T + XUZX2000 XU9N18PP340 XUB9BPANL2 + XUZC50 XUEH307534H7 XUX0AKSAT16 + XUZX2000 + XUZX2001 XUJM1000D1 XUX0ARCTT16T + XUZX2000 XU9N18PP340 XUB9BPBNL2 + XUZC50 XUEH753538 XUX0AKSAT16 + XUZX2000 XUJM1000D2 XUX0AKSAM12T + XUZX2000 XU9N18PP340D XUB9BPANM12 + XUZC50 XUEH753538H4 XUX0AKSAT16 + XUZX2000 + XUZX2001 XUJM1000D2 XUX0ARCTT16T + XUZX2000 XU9N18PP340D XUB9BPBNM12 + XUZC50 XUET010315 XUX0ARCTT16 + XUZX2000 XUJM1000H7 XUX0AKSAT16T + XUZX2000 + XUZX2001 XU9N18PP340L5 XUB9BPANL5 + XUZC50 XUET010315H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJM1000H7 XUX0ARCTT16T + XUZX2000 + XUZX2001 XU9N18PP340L5 XUB9BPBNL5 + XUZC50 XUET080319 XUX0ARCTT16 + XUZX2000 XUJM1000P9 XUX0AKSAT16T + XUZX2000 XU9N18PP340W XUB9BPAWL2 + XUZC50 XUET080319H4 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJM1000P9 XUX0ARCTT16T + XUZX2000 XU9N18PP340W XUB9BPBWL2 + XUZC50 XUET10031 XUX0ARCTT16 + XUZX2000 XUJM100314 XUX0ARCTT16 + XUZX2000 XU9N18PP340WD XUB9BPAWM12 + XUZC50 XUET10031H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJM100314D1 XUX0ARCTT16 + XUZX2000 XU9N18PP340WD XUB9BPBWM12 + XUZC50 XUET300314 XUX0ARCTT16 + XUZX2000 XUJM100314D2 XUX0ARCTT16 + XUZX2000 XU9N18PP340WL5 XUB9BPAWL5 + XUZC50 XUET300314H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XUJM100314H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XU9N18PP340WL5 XUB9BPBWL5 + XUZC50 XUJK06353 XUX0AKSAT16 + XUZX2000 XUJM100314P9 XUX0ARCTT16 + XUZX2000 XU9P18NP340 XUB9ANANL2 + XUZC50 XUJK063539 XUX0AKSAT16 + XUZX2000 XUJM120318 XUX0ARCTT16 + XUZX2000 XU9P18NP340 XUB9ANBNL2 + XUZC50 XUJK063539D1 XUX0AKSAM12 + XUZX2000 XUJM120318D1 XUX0ARCTT16 + XUZX2000 XU9P18NP340D XUB9ANANM12 + XUZC50 XUJK063539D2 XUX0AKSAM12 + XUZX2000 XUJM120318D2 XUX0ARCTT16 + XUZX2000 XU9P18NP340D XUB9ANBNM12 + XUZC50 XUJK063539H7 XUX0AKSAT16 + XUZX2000 + XUZX2001 XUJM120318H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XU9P18NP340L5 XUB9ANANL5 + XUZC50 XUJK063539P9 XUX0AKSAT16 + XUZX2000 XUJM120318P9 XUX0ARCTT16 + XUZX2000 XU9P18NP340L5 XUB9ANBNL5 + XUZC50 XUJK06353D1 XUX0AKSAM12 + XUZX2000 XUJM700318 XUX0ARCTT16 + XUZX2000 The Essential Guide to Sensor Selection 31 2/03 © 2003 Schneider Electric All Rights Reserved Substitution guide Photoelectric Sensors Osiconcept Photoelectric Sensors_ Substitution Guide cont. Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors XUJM700318D1 XUX0ARCTT16 + XUZX2000 XULH043539D XUK9APANM12 + XUZK2003 XULJ06353 XUK1ANBNL2 + XUZK2003 XUJM700318D2 XUX0ARCTT16 + XUZX2000 XULH043539D XUK9APBNM12 + XUZK2003 XULJ06353D XUK1ANANM12 + XUZK2003 XUJM700318H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XULH043539DH7 XUK9APANM12 + XUZK2003 XULJ06353D XUK1ANBNM12 + XUZK2003 XUJM700318P9 XUX0ARCTT16 + XUZX2000 XULH043539DH7 XUK9APBNM12 + XUZK2003 XULJ06353L10 XUK1ANANL10 + XUZK2003 XUJT06031 XUX0ARCTT16 + XUZX2000 XULH043539H7 XUK9APANL2 + XUZK2003 XULJ06353L10 XUK1ANBNL10 + XUZK2003 XUJT060319 XUX0ARCTT16 + XUZX2000 XULH043539H7 XUK9APBNL2 + XUZK2003 XULJ083534 XUK2ANANL2R + XUZK2003 XUJT060319D1 XUX0ARCTT16 + XUZX2000 XULH043539L05 XUK9APANL5 + XUZK2003 XULJ083534D XUK2ANANM12R + XUZK2003 XUJT060319D2 XUX0ARCTT16 + XUZX2000 XULH043539L05 XUK9APBNL5 + XUZK2003 XULJ153538 XUK0AKSAL2 + XUZK2003 XUJT060319H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XULH043539L10 XUK9APANL10 + XUZK2003 XULJ153538D XUK0AKSAM12 + XUZK2003 XUJT060319P9 XUX0ARCTT16 + XUZX2000 XULH043539L10 XUK9APBNL10 + XUZK2003 XULJ153538H7 XUK0AKSAL2 + XUZK2003 XUJT06031D1 XUX0ARCTT16 + XUZX2000 XUJLM0619 XUK9ARCNL2 + XUZX2000 XULJ153538L05 XUK0AKSAL5 + XUZK2003 XUJT06031D2 XUX0ARCTT16 + XUZX2000 XUJLM0619H7 XUK9ARCNL2 + XUZX2000 XULJ303538 XUK0AKSAL2 + XUZK2003 XUJT06031P9 XUX0ARCTT16 + XUZX2000 XUJLM0619P9 XUK9ARCNL2 + XUZX2000 XULJ303538D XUK0AKSAM12 + XUZK2003 XUJT100314 XUX0ARCTT16 + XUZX2000 XULH06353 XUK1APANL2 + XUZK2003 XULJ303538L05 XUK0AKSAL5 + XUZK2003 XUJT100314D1 XUX0ARCTT16 + XUZX2000 XULH06353 XUK1APBNL2 + XUZK2003 XULJ703535 XUK5ANANL2 + XUZK2003 XUJT100314D2 XUX0ARCTT16 + XUZX2000 XULH06353D XUK1APANM12 + XUZK2003 XULJ703535 XUK5ANBNL2 + XUZK2003 XUJT100314H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XULH06353D XUK1APBNM12 + XUZK2003 XULJ703535D XUK5ANANM12 + XUZK2003 XUJT100314P9 XUX0ARCTT16 + XUZX2000 XULH06353H7 XUK1APANL2 + XUZK2003 XULJ703535D XUK5ANBNM12 + XUZK2003 XUJT120318 XUX0ARCTT16 + XUZX2000 XULH06353H7 XUK1APBNL2 + XUZK2003 XULK0830 XUK2AKSNL2T + XUZK2003 XUJT120318D1 XUX0ARCTT16 + XUZX2000 XULH06353L05 XUK1APANL5 + XUZK2003 XULK0830D XUK2AKSNM12T + XUZK2003 XUJT120318D2 XUX0ARCTT16 + XUZX2000 XULH06353L05 XUK1APBNL5 + XUZK2003 XULK0830L05 XUK2AKSNL5T + XUZK2003 XUJT120318H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XULH06353L10 XUK1APANL10 + XUZK2003 XULK0830L10 XUK2AKSNL10T + XUZK2003 XUJT120318P9 XUX0ARCTT16 + XUZX2000 XULH06353L10 XUK1APBNL10 + XUZK2003 XULM040319 XUK9ARCNL2 + XUZK2003 XUJT700318 XUX0ARCTT16 + XUZX2000 XULH083534 XUK2APANL2R + XUZK2003 XULM040319H7 XUK9ARCNL2 + XUZK2003 XUJT700318D1 XUX0ARCTT16 + XUZX2000 XULH083534 XUK2APBNL2R + XUZK2003 XULM040319L05 XUK9ARCNL5 + XUZK2003 XUJT700318D2 XUX0ARCTT16 + XUZX2000 XULH083534D XUK2APANM12R + XUZK2003 XULM040319L10 XUK9ARCNL10 + XUZK2003 XUJT700318H7 XUX0ARCTT16 + XUZX2000 + XUZX2001 XULH083534D XUK2APBNM12R + XUZK2003 XULM0600 XUK2ARCNL2T + XUZK2003 XUJT700318P9 XUX0ARCTT16 + XUZX2000 XULH083534DH7 XUK2APANM12R + XUZK2003 XULM0600H7 XUK2ARCNL2T + XUZK2003 Compact 50 x 50 XULH083534DH7 XUK 2APBNM12R + XUZK2003 XULM0600L05 XUK2ARCNL5T + XUZK2003 XUK1ARCTL10 XUK0ARCTL10 + XUZK2003 + XUZA50 XULH083534L05 XUK2APANL5R + XUZK2003 XULM0600L10 XUK2ARCNL10T + XUZK2003 XUK1ARCTL2 XUK0ARCTL2 + XUZK2003 + XUZA50 XULH083534L05 XUK2APBNL5R + XUZK2003 XULM06031 XUK1ARCNL2 + XUZK2003 XUK2AKSAL10 XUK0AKSAL10 + XUZK2003 + XUK0AKSAL10T + XUZK2003 XULH083534L10 XUK2APANL10R + XUZK2003 XULM06031H7 XUK1ARCNL2 + XUZK2003 XUK2AKSAL10R XUK0AKSAL10 + XUZK2003 XULH083534L10 XUK2APBNL10R + XUZK2003 XULM06031H7L10 XUK1ARCNL10 + XUZK2003 XUK2AKSAL10T XUK0AKSAL10T + XUZK2003 XULH153538 XUK0AKSAL2 + XUZK2003 XULM06031L05 XUK1ARCNL5 + XUZK2003 XUK2AKSAL2 XUK0AKSAL2 + XUZK2003 + XUK0AKSAL2T + XUZK2003 XULH153538D XUK0AKSAM12 + XUZK2003 XULM06031L10 XUK1ARCNL10 + XUZK2003 XUK2AKSAL2R XUK0AKSAL2 + XUZK2003 XULH153538H7 XUK0AKSAL2 + XUZK2003 XULM080314 XUK2ARCNL2R + XUZK2003 XUK2AKSAL2T XUK0AKSAL2T + XUZK2003 XULH153538L05 XUK0AKSAL5 + XUZK2003 XULM080314H7 XUK2ARCNL2R + XUZK2003 XUK2AKSAM12 XUK0AKSAM12 + XUZK2003 + XUK0AKSAM12T + XUZK2003 XULH303538 XUK0AKSAL2 + XUZK2003 XULM080314L05 XUK2ARCNL5R + XUZK2003 XUK2AKSAM12R XUK0AKSAM12 + XUZK2003 XULH303538D XUK0AKSAM12 + XUZK2003 XULM080314L10 XUK2ARCNL10R + XUZK2003 XUK2AKSAM12T XUK0AKSAM12T + XUZK2003 XULH303538DH7 XUK0AKSAM12 + XUZK2003 XULM300318 XUK0ARCTL2 + XUZK2003 XUK2ARCTL10 XUK0ARCTL10 + XUZK2003 + XUK2ARCTL10T + XUZK2003 XULH303538L05 XUK0AKSAL5 + XUZK2003 XULM300318H7 XUK0ARCTL2 + XUZK2003 XUK2ARCTL10R XUK0ARCTL10 + XUZK2003 XULH303538L10 XUK0AKSAL10 + XUZK2003 XULM300318H7L10 XUK0ARCTL10 + XUZK2003 XUK2ARCTL10T XUK2ARCTL10T + XUZK2003 XULH703535 XUK5APANL2 + XUZK2003 XULM300318L05 XUK0ARCTL5 + XUZK2003 XUK2ARCTL2 XUK0ARCTL2 + XUZK2003 + XUK2ARCTL2T + XUZK2003 XULH703535 XUK5APBNL2 + XUZK2003 XULM300318L10 XUK0ARCTL10 + XUZK2003 XUK2ARCTL2R XUK0ARCTL2 + XUZK2003 XULH703535D XUK5APANM12 + XUZK2003 Miniature XUK2ARCTL2T XUK2ARCTL2T + XUZK2003 XULH703535D XUK5APBNM12 + XUZK2003 XUMH023539 XUM0APSAL2 + XUZM2003 XUK5AKSAL10 XUK0AKSAL10 + XUZK2003 XULH703535H7 XUK5APANL2 + XUZK2003 XUMH023539L10 XUM0APSAL10 + XUZM2003 XUK5AKSAL2 XUK0AKSAL2 + XUZK2003 XULH703535H7 XUK5APBNL2 + XUZK2003 XUMH03353 XUM0APSAL2 + XUZM2003 XUK5AKSAM12 XUK0AKSAM12 + XUZK2003 XULH703535L05 XUK5APANL5 + XUZK2003 XUMH03353L10 XUM0APSAL10 + XUZM2003 XUK5ARCTL10 XUK0ARCTL10 + XUZK2003 XULH703535L05 XUK5APBNL5 + XUZK2003 XUMH07301 XUM2AKSNL2T + XUZM2003 XUK5ARCTL2 XUK0ARCTL2 + XUZK2003 XULH703535L10 XUK5APANL10 + XUZK2003 XUMH07301L10 XUM2AKSNL10T + XUZM2003 XUK9AKSAL10 XUK0AKSAL10 + XUZK2003 + XUZA50 XULH703535L10 XUK5APBNL10 + XUZK2003 XUMH073534 XUM0APSAL2 + XUZM2003 XUK9AKSAL2 XUK0AKSAL2 + XUZK2003 + XUZA50 XULJ043539 XUK9ANANL2 + XUZK2003 XUMH073534L10 XUM0APSAL10 + XUZM2003 XUK9AKSAM12 XUK0AKSAM12 + XUZK2003 + XUZA50 Compact 50 x 50 XUMH103535 XUM0APSAL2 + XUZM2003 XUK9ARCTL10 XUK0ARCTL10 + XUZK2003 + XUZA50 XULJ043539 XUK9ANBNL2 + XUZK2003 XUMH15353R XUM0APSAL2 + XUZM2003 XUK9ARCTL2 XUK0ARCTL2 + XUZK2003 + XUZA50 XULJ043539D XUK9ANANM12 + XUZK2003 XUMH703535 XUM0APSAL2 + XUZM2003 XULH043539 XUK9APANL2 + XUZK2003 XULJ043539D XUK9ANBNM12 + XUZK2003 XUMJ023539 XUM0ANSAL2 + XUZM2003 XULH043539 XUK9APBNL2 + XUZK2003 XULJ06353 XUK1ANANL2 + XUZK2003 XUMJ03353 XUM0ANSAL2 + XUZM2003 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 32 2/03 Substitution guidePhotoelectric Sensorrs Osiconcept Photoelectric Sensors_ Substitution Guide cont. Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors XUMJ073534 XUM0ANSAL2 + XUZM2003 XUMLH0854 XUM2APANL2R + XUZM2003 XUMLJ0451 XUM1ANANL2 + XUZM2003 XUMJ103535 XUM0ANSAL2 + XUZM2003 XUMLH0854 XUM2APBNL2R + XUZM2003 XUMLJ0451 XUM1ANBNL2 + XUZM2003 XUMJ15353R XUM0ANSAL2 + XUZM2003 XUMLH0854S XUM2APANM8R + XUZM2003 XUMLJ0451S XUM1ANANM8 + XUZM2003 XUMJ703535 XUM0ANSAL2 + XUZM2003 XUMLH0854S XUM2APBNM8R + XUZM2003 XUMLJ0451S XUM1ANBM8 + XUZM2003 XUMLH0259 XUM9APANL2 + XUZM2003 XUMLH1055 XUM6APANL2 + XUZM2003 XUMLJ0854 XUM2ANANL2R + XUZM2003 XUMLH0259 XUM9APBNL2 + XUZM2003 XUMLH1055 XUM6APBNL2 + XUZM2003 XUMLJ0854 XUM2ANBNL2R + XUZM2003 XUMLH0259S XUM9APANM8 + XUZM2003 XUMLH1055S XUM6APANM8 + XUZM2003 XUMLJ0854S XUM2ANANM8R + XUZM2003 XUMLH0259S XUM9APBNM8 + XUZM2003 XUMLH1055S XUM6APBNM8 + XUZM2003 XUMLJ0854S XUM2ANBNM8R + XUZM2003 XUMLH0451 XUM1APANL2 + XUZM2003 XUMLH4055 XUM5APANL2 + XUZM2003 XUMLJ1055 XUM6ANANL2 + XUZM2003 XUMLH0451 XUM1APBNL2 + XUZM2003 XUMLH4055 XUM5APBNL2 + XUZM2003 XUMLJ1055 XUM6ANBNL2 + XUZM2003 XUMLH0451L10 XUM1APANL10 + XUZM2003 XUMLH4055S XUM5APANM8 + XUZM2003 XUMLJ1055S XUM6ANANM8 + XUZM2003 XUMLH0451L10 XUM1APBNL10 + XUZM2003 XUMLH4055S XUM5APBNM8 + XUZM2003 XUMLJ1055S XUM6ANBNM8 + XUZM2003 XUMLH0451S XUM1APANM8 + XUZM2003 XUMLH4055T10 XUM5APANL2T10 + XUZM2003 XUMLJ4055 XUM5ANANL2 + XUZM2003 XUMLH0451S XUM1APBNM8 + XUZM2003 XUMLH4055T10 XUM5APBNL2T10 + XUZM2003 XUMLJ4055 XUM5ANBNL2 + XUZM2003 XUMLH0451T10 XUM1APANL2T10 + XUZM2003 XUMLJ0259 XUM9ANANL2 + XUZM2003 XUMLJ4055S XUM5ANANM8 + XUZM2003 XUMLH0451T10 XUM1APBNL2T10 + XUZM2003 XUMLJ0259 XUM9ANBNL2 + XUZM2003 XUMLJ4055S XUM5ANBNM8 + XUZM2003 XUMLH0803 XUM2AKSNL2T + XUZM2003 XUMLJ0259S XUM9ANANM8 + XUZM2003 XUMLH0803S XUM2AKSNM8T + XUZM2003 XUMLJ0259S XUM9ANBNM8 + XUZM2003 Osiconcept Proximity Sensors_ Substitution Guide Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors 8 mm Tubular c XS1N08NA340L2 XS508B1NAL10 XS2M08NC410 XS608B1NBL2 XS1M12DB210L1 XS512B1DBL5 XS1M08DA210 XS508B1DAL2 XS1N08NA340S XS508B1NAM8 XS2M08NC410D XS608B1NAM12 XS1M12KP340 XS512B1PAL2 XS1M08DA210D XS508B1DAM12 XS1N08NA349 XS608B1NAL2 XS2M08NC410D XS608B1NBM12 XS1M12KP340 XS512B1PBL2 XS1M08DA210L1 XS508B1DAL5 XS1N08NA349D XS608B1NAM12 XS2M08PC410 XS608B1PAL2 XS1M12KP340 XS512B1NAL2 XS1M08DA210L2 XS508B1DAL10 XS1N08NA349L1 XS608B1NAL5 XS2M08PC410 XS608B1PBL2 XS1M12KP340 XS512B1NBL2 XS1M08DA210LD XS508B1DAL08M12 XS1N08NA349S XS608B1NAM12 XS2M08PC410D XS608B1PAM12 XS1M12KP340D XS512B1PAM8 XS1M08DB210 XS508B1DBL2 XS1N08NB340 XS508B1NBL2 XS2M08PC410D XS608B1PBM12 XS1M12KP340D XS512B1PBM8 XS1M08DB210D XS508B1DBM12 XS1N08NB340D XS508B1NBM8 XS2N08NA340 XS608B1NAL2 XS1M12KP340D XS512B1NAM8 XS1M08DB210L1 XS508B1DBL5 XS1N08NB340S XS508B1NBM8 XS2N08NA340D XS608B1NAM8 XS1M12KP340D XS512B1NBM8 XS1M08NA370 XS608B1NAL2 XS1N08NB349 XS608B1NBL2 XS2N08NA340L1 XS608B1NAL5 XS1M12KP340L1 XS512B1PAL5 XS1M08NA370D XS608B1NAM12 XS1N08NB349D XS608B1NBM12 XS2N08NA340S XS608B1NAM8 XS1M12KP340L1 XS512B1PBL5 XS1M08NA370L1 XS608B1NAL5 XS1N08NB349S XS608B1NBM12 XS2N08NB340 XS608B1NBL2 XS1M12KP340L1 XS512B1NAL5 XS1M08NB370 XS608B1NBL2 XS1N08PA340 XS508B1PAL2 XS2N08PA340 XS608B1PAL2 XS1M12KP340L1 XS512B1NBL5 XS1M08NB370D XS608B1NBM12 XS1N08PA340D XS508B1PAM8 XS2N08PA340D XS608B1PAM8 XS1M12KP340L2 XS512B1PAL10 XS1M08NC410 XS508B1NAL2 XS1N08PA340L1 XS508B1PAL5 XS2N08PA340L1 XS608B1PAL5 XS1M12KP340L2 XS512B1PBL10 XS1M08NC410 XS508B1NBL2 XS1N08PA340L2 XS508B1PAL10 XS2N08PA340L2 XS608B1PAL10 XS1M12KP340L2 XS512B1NAL10 XS1M08NC410D XS508B1NAM8 XS1N08PA340LD XS508B1PAL08M12 XS2N08PA340S XS608B1PAM8 XS1M12KP340L2 XS512B1NBL10 XS1M08NC410D XS508B1NBM8 XS1N08PA340S XS508B1PAM8 XS2N08PB340 XS608B1PBL2 XS1M12NA370 XS612B1NAL2 XS1M08PA370 XS608B1PAL2 XS1N08PA349 XS608B1PAL2 XS2N08PB340D XS608B1PBM8 XS1M12NA370D XS612B1NAM12 XS1M08PA370D XS608B1PAM12 XS1N08PA349D XS608B1PAM12 XS2N08PB340S XS608B1PBM8 XS1M12NA370L1 XS612B1NAL5 XS1M08PA370L1 XS608B1PAL5 XS1N08PA349L1 XS608B1PAL5 XS3P08NA340 XS508B1NAL2 XS1M12NA370L2 XS612B1NAL10 XS1M08PA370L2 XS608B1PAL10 XS1N08PA349L2 XS608B1PAL10 XS3P08NA340D XS508B1NAM8 XS1M12NA370S XS612B1NAM12 XS1M08PA370LD XS608B1PAL08M12 XS1N08PA349S XS608B1PAM12 XS3P08NA370 XS608B1NAL2 XS1M12NB370 XS612B1NBL2 XS1M08PA370S XS608B1PAM12 XS1N08PB340 XS508B1PBL2 XS3P08PA340 XS508B1PAL2 XS1M12NB370D XS612B1NBM12 XS1M08PB370 XS608B1PBL2 XS1N08PB340D XS508B1PBM8 XS3P08PA340D XS508B1PAM12 XS1M12PA370 XS612B1PAL2 XS1M08PB370D XS608B1PBM12 XS1N08PB340L1 XS508B1PBL5 XS3P08PA340L1 XS508B1PAL5 XS1M12PA370D XS612B1PAM12 XS1M08PB370L1 XS608B1PBL5 XS1N08PB340S XS508B1PBM8 XS3P08PA370 XS608B1PAL2 XS1M12PA370L1 XS612B1PAL5 XS1M08PB370L2 XS608B1PBL10 XS1N08PB349 XS608B1PBL2 12 mm Tubular c XS1M12PA370L2 XS612B1PAL10 XS1M08PC410 XS508B1PAL2 XS1N08PB349D XS608B1PBM12 XS1M12DA210 XS512B1DAL2 XS1M12PB370 XS612B1PBL2 XS1M08PC410 XS508B1PBL2 XS1N08PB349L1 XS608B1PBL5 XS1M12DA210D XS512B1DAM12 XS1M12PB370D XS612B1PBM12 XS1M08PC410D XS508B1PAM8 XS1N08PB349L2 XS608B1PBL10 XS1M12DA210L1 XS512B1DAL5 XS1M12PB370L1 XS612B1PBL5 XS1M08PC410D XS508B1PBM8 XS1N08PB349S XS608B1PBM12 XS1M12DA210L2 XS512B1DAL10 XS1N12NA340 XS512B1NAL2 XS1N08NA340D XS508B1NAM8 XS2M08NA340 XS608B1NAL2 XS1M12DB210 XS512B1DBL2 XS1N12NA340D XS512B1NAM12 XS1N08NA340L1 XS508B1NAL5 XS2M08NC410 XS608B1NAL2 XS1M12DB210D XS512B1DBM12 XS1N12NA340L1 XS512B1NAL5 The Essential Guide to Sensor Selection 33 2/03 © 2003 Schneider Electric All Rights Reserved Substitution guide Proximity Sensors Osiconcept Proximity Sensors_ Substitution Guide cont. Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors XS1N12NA349 XS612B1NAL2 XS2M12KP340L2 XS612B1NBL10 XS1M18DA214LD XS518B1CAL08M12 XS1N18NB340D XS518B1NBM12 XS1N12NA349D XS612B1NAM12 XS2M12NA370 XS612B1NAL2 XS1M18DB210 XS518B1DBL2 XS1N18NB349 XS618B1NBL2 XS1N12NA349L1 XS612B1NAL5 XS2M12NA370D XS612B1NAM12 XS1M18DB210B XS518B1DBM12 XS1N18NB349D XS618B1NBM12 XS1N12NA349L2 XS612B1NAL10 XS2M12NA370L1 XS612B1NAL5 XS1M18DB210D XS518B1DBM12 XS1N18NC410 XS518B1NAL2 XS1N12NB340 XS512B1NBL2 XS2M12NB370 XS612B1NBL2 XS1M18KP340 XS518B1PAL2 XS1N18NC410 XS518B1NBL2 XS1N12NB340D XS512B1NBM12 XS2M12NB370D XS612B1NBM12 XS1M18KP340 XS518B1PBL2 XS1N18NC410D XS518B1NAM12 XS1N12NB349 XS612B1NBL2 XS2M12PA370 XS612B1PAL2 XS1M18KP340 XS518B1NAL2 XS1N18NC410D XS518B1NBM12 XS1N12NB349D XS612B1NBM12 XS2M12PA370D XS612B1PAM12 XS1M18KP340 XS518B1NBL2 XS1N18NC410L1 XS518B1NAL5 XS1N12NA349 XS612B1NAL2 XS2M12PA370L1 XS612B1PAL5 XS1M18KP340D XS518B1PAM12 XS1N18NC410L1 XS518B1NBL5 XS1N12NB349L2 XS612B1NBL10 XS2M12PA370L2 XS612B1PAL10 XS1M18KP340D XS518B1PBM12 XS1N18PA340 XS518B1PAL2 XS1N12NC410 XS512B1NAL2 XS2M12PB370 XS612B1PBL2 XS1M18KP340D XS518B1NAM12 XS1N18PA340D XS518B1PAM12 XS1N12NC410 XS512B1NBL2 XS2M12PB370D XS612B1PBM12 XS1M18KP340D XS518B1NBM12 XS1N18PA340L1 XS518B1PAL5 XS1N12NC410D XS512B1NBM12 XS2M12PB370S XS612B1PBM12 XS1M18KP340L1 XS518B1PAL5 XS1N18PA340L2 XS518B1PAL10 XS1N12NC410D XS512B1NAM12 XS2M12PC410D XS612B1PAM12 XS1M18KP340L1 XS518B1PBL5 XS1N18PA349 XS618B1PAL2 XS1N12NC410L1 XS512B1NAL5 XS2M12PC410D XS612B1PBM12 XS1M18KP340L1 XS518B1NAL5 XS1N18PA349D XS618B1PAM12 XS1N12NC410L1 XS512B1NBL5 XS2N12NA340 XS612B1NAL2 XS1M18KP340L1 XS518B1NBL5 XS1N18PA349L1 XS618B1PAL5 XS1N12PA340 XS512B1PAL2 XS2N12NA340D XS612B1NAM12 XS1M18KP340L2 XS518B1PAL10 XS1N18PA349L2 XS618B1PAL10 XS1N12PA340D XS512B1PAM12 XS2N12NA340L1 XS612B1NAL5 XS1M18KP340L2 XS518B1PBL10 XS1N18PA349S XS618B1PAM12 XS1N12PA340L1 XS512B1PAL5 XS2N12NA340L2 XS612B1NAL10 XS1M18KP340L2 XS518B1NAL10 XS1N18PB340 XS518B1PBL2 XS1N12PA340L2 XS512B1PAL10 XS2N12NB340 XS612B1NBL2 XS1M18KP340L2 XS518B1NBL10 XS1N18PB340D XS518B1PBM12 XS1N12PA340S XS512B1PAM12 XS2N12NB340D XS612B1NBM12 XS1M18NA370 XS618B1NAL2 XS1N18PB340L2 XS518B1PBL10 XS1N12PA349 XS612B1PAL2 XS2N12NC410 XS612B1NAL2 XS1M18NA370A XS618B1NAM12 XS1N18PB349 XS618B1PBL2 XS1N12PA349D XS612B1PAM12 XS2N12NC410 XS612B1NBL2 XS1M18NA370B XS618B1NAM12 XS1N18PB349D XS618B1PBM12 XS1N12PA349L1 XS612B1PAL5 XS2N12NC410D XS612B1NAM12 XS1M18NA370C XS618B1NAM12 XS1N18PB349L1 XS618B1PBL5 XS1N12PA349L2 XS612B1PAL10 XS2N12NC410D XS612B1NBM12 XS1M18NA370D XS618B1NAM12 XS1N18PB349L2 XS618B1PBL10 XS1N12PA349S XS612B1PAM12 XS2N12NC410L1 XS612B1NAL5 XS1M18NA370L1 XS618B1NAL5 XS1N18PB349S XS618B1PBM12 XS1N12PB340 XS512B1PBL2 XS2N12NC410L1 XS612B1NBL5 XS1M18NA370L2 XS618B1NAL10 XS1N18PC410 XS518B1PAL2 XS1N12PB340D XS512B1PBM12 XS2N12PA340 XS612B1PAL2 XS1M18NB370 XS618B1NBL2 XS1N18PC410 XS518B1PBL2 XS1N12PB349 XS612B1PBL2 XS2N12PA340D XS612B1PAM12 XS1M18NB370C XS618B1NBM12 XS1N18PC410D XS518B1PAM12 XS1N12PB349D XS612B1PBM12 XS2N12PA340L1 XS612B1PAL5 XS1M18NB370D XS618B1NBM12 XS1N18PC410D XS518B1PBM12 XS1N12PB349L1 XS612B1PBL5 XS2N12PA340L2 XS612B1PAL10 XS1M18NB370L1 XS618B1NBL5 XS1N18PC410L1 XS518B1PAL5 XS1N12PB349L2 XS612B1PBL10 XS2N12PB340 XS612B1PBL2 XS1M18NB370L2 XS618B1NBL10 XS1N18PC410L1 XS518B1PBL5 XS1N12PB349S XS612B1PBM12 XS2N12PB340D XS612B1PBM12 XS1M18PA370 XS618B1PAL2 XS1N18PC410P XS518B1PAL10 XS1N12PC410 XS512B1PAL2 XS2N12PC410 XS612B1PAL2 XS1M18PA370A XS618B1PAM12 XS1N18PC410P XS518B1PBL10 XS1N12PC410 XS512B1PBL2 XS2N12PC410 XS612B1PBL2 XS1M18PA370B XS618B1PAM12 XS2M18KP340 XS618B1PAL2 XS1N12PC410D XS512B1PAM12 XS2N12PC410D XS612B1PAM12 XS1M18PA370C XS618B1PAM12 XS2M18KP340 XS618B1PBL2 XS1N12PC410D XS512B1PBM12 XS2N12PC410D XS612B1PBM12 XS1M18PA370D XS618B1PAM12 XS2M18KP340 XS618B1NAL2 XS1N12PC410L1 XS512B1PAL5 XS2N12PC410L1 XS612B1PAL5 XS1M18PA370E XS618B1PAM12 XS2M18KP340 XS618B1NBL2 XS1N12PC410L1 XS512B1PBL5 XS2N12PC410L1 XS612B1PBL5 XS1M18PA370G XS618B1PAM12 XS2M18KP340D XS618B1PAM12 XS1N12PC410L2 XS512B1PAL10 XS2N12PC410L2 XS612B1PAL10 XS1M18PA370L1 XS618B1PAL5 XS2M18KP340D XS618B1PBM12 XS1N12PC410L2 XS512B1PBL10 XS2N12PC410L2 XS612B1PBL10 XS1M18PA370L2 XS618B1PAL10 XS2M18KP340D XS618B1NAM12 XS1N12PC419D XS612B1PAM12 XS3P12NA340 XS512B1NAL2 XS1M18PA370T XS618B1PAL2T XS2M18KP340D XS618B1NBM12 XS1N12PC419D XS612B1PBM12 XS3P12NA340D XS512B1NAM12 XS1M18PB370 XS618B1PBL2 XS2M18KP340L1 XS618B1PAL5 XS2M12KP340 XS612B1PAL2 XS3P12NA370 XS612B1NAL2 XS1M18PB370A XS618B1PBM12 XS2M18KP340L1 XS618B1PBL5 XS2M12KP340 XS612B1PBL2 XS3P12PA340 XS512B1PAL2 XS1M18PB370B XS618B1PBM12 XS2M18KP340L1 XS618B1NAL5 XS2M12KP340 XS612B1NAL2 XS3P12PA340D XS512B1PAM12 XS1M18PB370C XS618B1PBM12 XS2M18KP340L1 XS618B1NBL5 XS2M12KP340 XS612B1NBL2 XS3P12PA340L1 XS512B1PAL5 XS1M18PB370D XS618B1PBM12 XS2M18KP340L2 XS618B1PAL10 XS2M12KP340D XS612B1PAM12 XS3P12PA370 XS612B1PAL2 XS1M18PB370G XS618B1PBM12 XS2M18KP340L2 XS618B1PBL10 XS2M12KP340D XS612B1PBM12 XS3P12PA370L1 XS612B1PAL5 XS1M18PB370L1 XS618B1PAL5 XS2M18KP340L2 XS618B1NAL10 XS2M12KP340D XS612B1NAM12 18 mm Tubular c XS1M18PB370L2 XS618B1PAL10 XS2M18KP340L2 XS618B1NBL10 XS2M12KP340D XS612B1NBM12 XS1M18DA210 XS518B1DAL2 XS1N18NA340 XS518B1NAL2 XS2M18NA370 XS618B1NAL2 XS2M12KP340L1 XS612B1PAL5 XS1M18DA210B XS518B1DAM12 XS1N18NA340D XS518B1NAM12 XS2M18NA370C XS618B1NAM12 XS2M12KP340L1 XS612B1PBL5 XS1M18DA210C XS518B1DAM12 XS1N18NA340L1 XS518B1NAL5 XS2M18NA370D XS618B1NAM12 XS2M12KP340L1 XS612B1NAL5 XS1M18DA210D XS518B1DAM12 XS1N18NA340L2 XS618B1NAL10 XS2M18NA370L1 XS618B1NAL5 XS2M12KP340L1 XS612B1NBL5 XS1M18DA210G XS518B1DAM12 XS1N18NA349 XS618B1NAL2 XS2M18NA370L2 XS618B1NAL10 XS2M12KP340L2 XS612B1PAL10 XS1M18DA210L1 XS518B1DAL5 XS1N18NA349D XS618B1NAM12 XS2M18NA370T XS618B1NAM12T XS2M12KP340L2 XS612B1PBL10 XS1M18DA210L2 XS518B1DAL10 XS1N18NA349L1 XS618B1NAL5 XS2M18NB370 XS618B1NBL2 XS2M12KP340L2 XS612B1NAL10 XS1M18DA210LD XS518B1DAL08M12 XS1N18NB340 XS518B1NBL2 XS2M18NB370D XS618B1NBM12 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 34 2/03 Substitution guide Proximity Sensors Osiconcept Proximity Sensors_ Substitution Guide cont. Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors XS2M18PA370 XS618B1PAL2 XS1M30KP340D XS530B1NAM12 XS1N30PA340L1 XS530B1PAL5 XS2N30NC410 XS630B1NBL2 XS2M18PA370C XS618B1PAM12 XS1M30KP340D XS530B1NBM12 XS1N30PA340L2 XS530B1PAL10 XS2N30NC410D XS630B1NAM12 XS2M18PA370D XS618B1PAM12 XS1M30KP340L1 XS530B1PAL5 XS1N30PA349 XS630B1PAL2 XS2N30NC410D XS630B1NBM12 XS2M18PA370G XS618B1PAM12 XS1M30KP340L1 XS530B1PBL5 XS1N30PA349D XS630B1PAM12 XS2N30PA340 XS630B1PAL2 XS2M18PA370L1 XS618B1PAL5 XS1M30KP340L1 XS530B1NAL5 XS1N30PA349L1 XS630B1PAL5 XS2N30PA340D XS630B1PAM12 XS2M18PA370L2 XS618B1PAL10 XS1M30KP340L1 XS530B1NBL6 XS1N30PA349L2 XS630B1PAL10 XS2N30PA340L1 XS630B1PAL5 XS2M18PA370T XS618B1PAL2T XS1M30KP340L2 XS530B1PAL10 XS1N30PA349S XS630B1PAM12 XS2N30PA340L2 XS630B1PAL10 XS2M18PB370 XS618B1PBL2 XS1M30KP340L2 XS530B1PBL10 XS1N30PB340 XS530B1PBL2 XS2N30PB340 XS630B1PBL2 XS2M18PB370C XS618B1PBM12 XS1M30KP340L2 XS530B1NAL10 XS1N30PB340D XS530B1PBM12 XS2N30PB340D XS630B1PBM12 XS2M18PB370D XS618B1PBM12 XS1M30KP340L2 XS530B1NBL10 XS1N30PB349 XS630B1PBL2 XS2N30PC410 XS630B1PAL2 XS2M18PB370G XS618B1PBM12 XS1M30KP370 XS630B1PAL2 XS1N30PB349D XS630B1PBM12 XS2N30PC410 XS630B1PBL2 XS2M18PB370L1 XS618B1PBL5 XS1M30KP370 XS630B1PBL2 XS1N30PB349L1 XS630B1PBL5 XS2N30PC410D XS630B1PAM12 XS2M18PB370L2 XS618B1PBL10 XS1M30KP370 XS630B1NAL2 XS1N30PB349L2 XS630B1PBL10 XS2N30PC410D XS630B1PBM12 XS2N18NA340 XS618B1NAL2 XS1M30KP370 XS630B1NBL2 XS1N30PC410 XS530B1PAL2 XS2N30PC410L1 XS630B1PAL5 XS2N18NA340D XS618B1NAM12 XS1M30NA370 XS630B1NAL2 XS1N30PC410 XS530B1PBL2 XS2N30PC410L1 XS630B1PBL5 XS2N18NA340L1 XS618B1NAL5 XS1M30NA370B XS630B1NAM12 XS1N30PC410D XS530B1PAM12 XS3P30NA340 XS530B1NAL2 XS2N18NC410 XS618B1NAL2 XS1M30NA370C XS630B1NAM12 XS1N30PC410D XS530B1PBM12 XS3P30NA340D XS530B1NAM12 XS2N18NC410 XS618B1NBL2 XS1M30NA370D XS630B1NAM12 XS1N30PC410L1 XS530B1PAL5 XS3P30NA370 XS630B1NAL2 XS2N18NC410D XS618B1NAM12 XS1M30NA370G XS630B1NAM12 XS1N30PC410L1 XS530B1PBL5 XS3P30PA340 XS530B1PAL2 XS2N18NC410D XS618B1NBM12 XS1M30NA370L1 XS630B1NAL5 XS1N30PC410L2 XS530B1PAL10 XS3P30PA340D XS530B1PAM12 XS2N18PA340 XS618B1PAL2 XS1M30NA370L2 XS630B1NAL10 XS1N30PC410L2 XS530B1PBL10 XS3P30PA340L1 XS530B1PAL5 XS2N18PA340D XS618B1PAM12 XS1M30NA370T XS630B1NAL2T XS2M30KP340 XS630B1PAL2 XS3P30PA340L2 XS530B1PAL10 XS2N18PA340L1 XS618B1PAL5 XS1M30NB370 XS630B1NBL2 XS2M30KP340 XS630B1PAL2 XS3P30PA370 XS630B1PAL2 XS2N18PA340L2 XS618B1PAL10 XS1M30NB370B XS630B1NBM12 XS2M30KP340 XS630B1PAL2 XS3P30PA370L1 XS630B1PAL5 XS2N18PB340 XS618B1PBL2 XS1M30NB370D XS630B1NBM12 XS2M30KP340 XS630B1PAL2 XS3P30PA370L2 XS630B1PAL10 XS2N18PB340D XS618B1PBM12 XS1M30PA349C XS630B1PAM12 XS2M30KP340D XS630B1PAM12 12 mm Tubular a XS2N18PC410 XS618B1PAL2 XS1M30PA349D XS630B1PAM12 XS2M30KP340D XS630B1PAM12 XS1M12MA230 XS612B1MAL2 XS2N18PC410 XS618B1PBL2 XS1M30PA370 XS630B1PAL2 XS2M30KP340D XS630B1PAM12 XS1M12MA230K XS612B1MAU20 XS2N18PC410D XS618B1PAM12 XS1M30PA370A XS630B1PAM12 XS2M30KP340D XS630B1PAM12 XS1M12MA230L1 XS612B1MAL5 XS2N18PC410D XS618B1PBM12 XS1M30PA370B XS630B1PAM12 XS2M30KP340L1 XS630B1PAL5 XS1M12MA230L2 XS612B1MAL10 XS2N18PC410L1 XS618B1PAL5 XS1M30PA370C XS630B1PAM12 XS2M30KP340L1 XS630B1PAL5 XS1M12MA239 XS612B1MAL2 XS2N18PC410L1 XS618B1PBL5 XS1M30PA370D XS630B1PAM12 XS2M30KP340L1 XS630B1PAL5 XS1M12MA239K XS612B1MAU20 XS3P18NA340 XS518B1NAL2 XS1M30PA370G XS630B1PAM12 XS2M30KP340L1 XS630B1PAL5 XS1M12MA250 XS612B1MAL2 XS3P18NA340D XS518B1NAM12 XS1M30PA370L1 XS630B1PAL5 XS2M30KP340L2 XS630B1PAL10 XS1M12MA250K XS612B1MAU20 XS3P18NA370 XS618B1NAL2 XS1M30PA370L2 XS630B1PAL10 XS2M30KP340L2 XS630B1PAL10 XS1M12MA250L1 XS612B1MAL5 XS3P18PA340 XS518B1PAL2 XS1M30PA370T XS630B1PAL2T XS2M30KP340L2 XS630B1PAL10 XS1M12MA250L2 XS612B1MAL10 XS3P18PA340D XS518B1PAM12 XS1M30PB370 XS630B1PBL2 XS2M30KP340L2 XS630B1PAL10 XS1M12MB230 XS612B1MBL2 XS3P18PA340L1 XS518B1PAL5 XS1M30PB370B XS630B1PBM12 XS2M30NA370 XS630B1NAL2 XS1M12MB230K XS612B1MBU20 XS3P18PA370 XS618B1PAL2 XS1M30PB370C XS630B1PBM12 XS2M30NA370D XS630B1NAM12 XS1M12MB230L1 XS612B1MBL5 30 mm Tubular c XS1M30PB370D XS630B1PBM12 XS2M30NA370L1 XS630B1NAL5 XS1M12MB230L2 XS612B1MBL10 XS1M30DA210 XS530B1DAL2 XS1M30PB370G XS630B1PBM12 XS2M30NB370 XS630B1NBL2 XS1M12MB250 XS612B1MBL2 XS1M30DA210B XS530B1DAM12 XS1M30PB370L1 XS630B1PBL5 XS2M30NB370D XS630B1NBM12 XS2M12MA230 XS612B1MAL2 XS1M30DA210C XS530B1DAM12 XS1M30PB370L2 XS630B1PBL10 XS2M30PA370 XS630B1PAL2 XS2M12MA230K XS612B1MAU20 XS1M30DA210D XS530B1DAM12 XS1N30NA340 XS530B1NAL2 XS2M30PA370C XS630B1PAM12 XS2M12MA230L1 XS612B1MAL5 XS1M30DA210G XS530B1DAM12 XS1N30NA340D XS530B1NAM12 XS2M30PA370D XS630B1PAM12 XS2M12MA230L2 XS612B1MAL10 XS1M30DA210L1 XS530B1DAL5 XS1N30NA349 XS630B1NAL2 XS2M30PA370G XS630B1PAM12 XS2M12MA250 XS612B1MAL2 XS1M30DA210L2 XS530B1DAL10 XS1N30NA349D XS630B1NAM12 XS2M30PA370L1 XS630B1PAL5 XS2M12MA250K XS612B1MAU20 XS1M30DA210LA XS530B1DAM12 XS1N30NA349L1 XS630B1NAL5 XS2M30PA370L2 XS630B1PAL10 XS2M12MA250L1 XS612B1MAL5 XS1M30DA210LD XS530B1DAM12 XS1N30NA349L2 XS630B1NAL10 XS2M30PA370T XS630B1PAL2T XS2M12MA250L2 XS612B1MAL10 XS1M30DB210 XS530B1DBL2 XS1N30NB340 XS530B1NBL2 XS2M30PB370 XS630B1PBL2 XS2M12MB230 XS612B1MBL2 XS1M30DB210B XS530B1DBM12 XS1N30NB349 XS630B1NBL2 XS2M30PB370C XS630B1PBM12 XS2M12MB230K XS612B1MBU20 XS1M30DB210D XS530B1DBM12 XS1N30NB349D XS630B1NBM12 XS2M30PB370D XS630B1PBM12 XS2M12MB230L1 XS612B1MBL5 XS1M30KP340 XS530B1PAL2 XS1N30NC410 XS530B1NAL2 XS2M30PB370L1 XS630B1PBL5 XS2M12MB230L2 XS612B1MBL10 XS1M30KP340 XS530B1PBL2 XS1N30NC410 XS530B1NBL2 XS2M30PB370L2 XS630B1PBL10 XS2M12MB250 XS612B1MBL2 XS1M30KP340 XS530B1NAL2 XS1N30NC410D XS530B1NAM12 XS2N30NA340 XS630B1NAL2 XS2M12MB250L1 XS612B1MBL5 XS1M30KP340 XS530B1NBL2 XS1N30NC410D XS530B1NBM12 XS2N30NA340D XS630B1NAM12 XS2M12MB250L2 XS612B1MBL10 XS1M30KP340D XS530B1PAM12 XS1N30PA340 XS530B1PAL2 XS2N30NB340 XS630B1NBL2 XS3P12MA230 XS612B1MAL2 XS1M30KP340D XS308B1PBM12 XS1N30PA340D XS530B1PAM12 XS2N30NC410 XS630B1NAL2 XS3P12MA230K XS612B1MAU20 The Essential Guide to Sensor Selection 35 2/03 © 2003 Schneider Electric All Rights Reserved Substitution guide Proximity Sensors Osiconcept Proximity Sensors_ Substitution Guide cont. Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors XS3P12MA230L1 XS612B1MAL5 XS2M18MB250K XS618B1MBU20 XS2M30MB230A XS630B1MBU20 XS7C40KPM40 XS9C11MNAM8 + XSZBC10 XS3P12MB230 XS612B1MBL2 XS2M18MB250L1 XS618B1MBL5 XS2M30MB230C XS630B1MBU20 XS7C40KPM40 XS9C11MPBM8 + XSZBC10 18 mm Tubular a XS2M18MB250L2 XS618B1MBL10 XS2M30MB230G XS630B1MBU20 XS7C40KPM40H29 XS9C11MPAM8 + XSZBC10 XS1M18MA230 XS618B1MAL2 XS3P18MA230 XS618B1MAL2 XS2M30MB230K XS630B1MBU20 XS7C40KPM40H29 XS9C11MPBM8 + XSZBC10 XS1M18MA230A XS618B1MAU20 XS3P18MA230A XS618B1MAU20 XS2M30MB230L1 XS630B1MBL5 XS7C40KPM40H29 XS9C11MNAM8 + XSZBC10 XS1M18MA230B XS618B1MAU20 XS3P18MA230K XS618B1MAU20 XS2M30MB230L2 XS630B1MBL10 XS7C40KPM40H29 XS9C11MPBM8 + XSZBC10 XS1M18MA230C XS618B1MAU20 XS3P18MA230L1 XS618B1MAL5 XS2M30MB250 XS630B1MBL2 XS7C40KPM40H7 XS9C11MPAM8 + XSZBC10 XS1M18MA230G XS618B1MAU20 XS3P18MA230L2 XS618B1MAL10 XS2M30MB250K XS630B1MBU20 XS7C40KPM40H7 XS9C11MPBM8 + XSZBC10 XS1M18MA230K XS618B1MAU20 XS3P18MB230 XS618B1MBL2 XS2M30MB250L1 XS630B1MBL5 XS7C40KPM40H7 XS9C11MNAM8 + XSZBC10 XS1M18MA230L1 XS618B1MAL5 XS3P18MB230A XS618B1MBU20 XS3P30MA230 XS630B1MAL2 XS7C40KPM40H7 XS9C11MPBM8 + XSZBC10 XS1M18MA230L2 XS618B1MAL10 XS3P18MB230K XS618B1MBU20 XS3P30MA230A XS630B1MAU20 XS7C40NC440 XS7C1A1NAM8 + XSZBC10 XS1M18MA230T XS618B1MAL2T XS3P18MB230L1 XS618B1MBL5 XS3P30MA230K XS630B1MAU20 XS7C40NC440 XS7C1A1NBM8 + XSZBC10 XS1M18MA239 XS618B1MAL2 30 mm Tubular a XS3P30MA230L1 XS630B1MAL5 XS7C40NC440D XS7C1A1NAM8 + XSZBC10 XS1M18MA239A XS618B1MAU20 XS1M30MA230 XS630B1MAL2 XS3P30MA230L2 XS630B1MAL10 XS7C40NC440D XS7C1A1NBM8 + XSZBC10 XS1M18MA239K XS618B1MAU20 XS1M30MA230A XS630B1MAU20 XS3P30MB230 XS630B1MBL2 XS7C40NC440H29 XS7C1A1NAM8 + XSZBC10 XS1M18MA250 XS618B1MAL2 XS1M30MA230B XS630B1MAU20 XS3P30MB230A XS630B1MBU20 XS7C40NC440H29 XS7C1A1NBM8 + XSZBC10 XS1M18MA250A XS618B1MAU20 XS1M30MA230C XS630B1MAU20 XS3P30MB230K XS630B1MBU20 XS7C40NC449 XS8C1A1NAM8 + XSZBC10 XS1M18MA250H4 XS618B1MAL2 XS1M30MA230G XS630B1MAU20 XS3P30MB230L1 XS630B1MBL5 XS7C40NC449 XS8C1A1NBM8 + XSZBC10 XS1M18MA250K XS618B1MAU20 XS1M30MA230K XS630B1MAU20 XSC Rectangular a XS7C40NC449H29 XS8C1A1NAM8 + XSZBC10 XS1M18MA250KH4 XS618B1MAU20 XS1M30MA230L1 XS630B1MAL5 XSCA150549 XS8C1A1MAL01U20 + XSZBC10 XS7C40NC449H29 XS8C1A1NBM8 + XSZBC10 XS1M18MA250L1 XS618B1MAL5 XS1M30MA230L2 XS630B1MAL10 XSCA150549 XS8C1A1MBL01U20 + XSZBC10 XS7C40PC440 XS7C1A1PAM8 + XSZBC10 XS1M18MA250L2 XS618B1MAL10 XS1M30MA230T XS630B1MAL2T XSD Rectangular a XS7C40PC440 XS7C1A1PBM8 + XSZBC10 XS1M18MB230 XS618B1MBL2 XS1M30MA239 XS630B1MAL2 XSDA400519 XS8D1A1MAU20 + XSZBD10 XS7C40PC440D XS7C1A1PAM8 + XSZBC10 XS1M18MB230A XS618B1MBU20 XS1M30MA239A XS630B1MAU20 XSDA400519 XS8D1A1MBU20 + XSZBD10 XS7C40PC440D XS7C1A1PBM8 + XSZBC10 XS1M18MB230B XS618B1MBU20 XS1M30MA250 XS630B1MAL2 XSDA400519H7 XS8D1A1MAU20 + XSZBD10 XS7C40PC440H29 XS7C1A1PAM8 + XSZBC10 XS1M18MB230C XS618B1MBU20 XS1M30MA250A XS630B1MAU20 XSDA400519H7 XS8D1A1MBU20 + XSZBD10 XS7C40PC440H29 XS7C1A1PBM8 + XSZBC10 XS1M18MB230G XS618B1MBU20 XS1M30MA250AH4 XS630B1MAU20 XSDA500519 XS8D1A1MAU20 + XSZBD10 XS7C40PC440H7 XS7C1A1PAM8 + XSZBC10 XS1M18MB230K XS618B1MBU20 XS1M30MA250H4 XS630B1MAL2 XSDA500519 XS8D1A1MBU20 + XSZBD10 XS7C40PC440H7 XS7C1A1PBM8 + XSZBC10 XS1M18MB230L1 XS618B1MBL5 XS1M30MA250K XS630B1MAU20 XSDA500519H7 XS8D1A1MAU20 + XSZBD10 XS7C40PC449 XS8C1A1PAM8 + XSZBC10 XS1M18MB230L2 XS618B1MBL10 XS1M30MA250KH4 XS630B1MAU20 XSDA500519H7 XS8D1A1MBU20 + XSZBD10 XS7C40PC449 XS8C1A1PBM8 + XSZBC10 XS1M18MB250 XS618B1MBL2 XS1M30MA250L1 XS630B1MAL5 XSDA505539H4 XS8D1A1MAU20 + XSZBD10 XS7C40PC449H29 XS8C1A1PAM8 + XSZBC10 XS1M18MB250A XS618B1MBU20 XS1M30MA250L2 XS630B1MAL10 XSDA505539H4 XS8D1A1MBU20 + XSZBD10 XS7C40PC449H29 XS8C1A1PBM8 + XSZBC10 XS1M18MB250K XS618B1MBU20 XS1M30MB230 XS630B1MBL2 XSDA600519 XS8D1A1MAU20 + XSZBD10 XS7C40PC449H7 XS8C1A1PAM8 + XSZBC10 XS1M18MB250L1 XS618B1MBL5 XS1M30MB230A XS630B1MBU20 XSDA600519 XS8D1A1MBU20 + XSZBD10 XS7C40PC449H7 XS8C1A1PBM8 + XSZBC10 XS1M18MB250L2 XS618B1MBL10 XS1M30MB230B XS630B1MBU20 XSDA600519H7 XS8D1A1MAU20 + XSZBD10 XS7T2DA210 XS7E1A1DAL2 + XSZBE10 XS2M18DA210L2 XS612B1MAL10 XS1M30MB230C XS630B1MBU20 XSDA600519H7 XS8D1A1MBU20 + XSZBD10 XS7T2DA214LD XS7E1A1CAL08M12 + XSZBE10 XS2M18MA230 XS618B1MAL2 XS1M30MB230G XS630B1MBU20 XSDM500538 XS8D1A1MAU20 + XSZBD10 XS7T2DA214LD01 XS7E1A1CAL01M12 + XSZBE10 XS2M18MA230A XS618B1MAU20 XS1M30MB230K XS630B1MBU20 XSDM500538 XS8D1A1MBU20 + XSZBD10 XS7T2NC440 XS7E1A1NAL2 + XSZBE10 XS2M18MA230C XS618B1MAU20 XS1M30MB230L1 XS630B1MBL5 XSDM600539 XS8D1A1MAU20 + XSZBD10 XS7T2NC440 XS7E1A1NBL2 + XSZBE10 XS2M18MA230G XS618B1MAU20 XS1M30MB230L2 XS630B1MBL10 XSDM600539 XS8D1A1MBU20 + XSZBD10 XS7T2NC440LD XS7E1A1NAL01M12 + XSZBE10 XS2M18MA230K XS618B1MAU20 XS1M30MB250 XS630B1MBL2 XSDM600539H7 XS8D1A1MAU20 + XSZBD10 XS7T2NC440LD XS7E1A1NBL01M12 + XSZBE10 XS2M18MA230L1 XS618B1MAL5 XS1M30MB250A XS630B1MBU20 XSDM600539H7 XS8D1A1MBU20 + XSZBD10 XS7T2PC440 XS7E1A1PAL2 + XSZBE10 XS2M18MA230L2 XS618B1MAL10 XS1M30MB250K XS630B1MBU20 XS7 Rectangular c XS7T2PC440 XS7E1A1PBL2 + XSZBE10 XS2M18MA230T XS618B1MAL2T XS1M30MB250L1 XS630B1MBL5 XS7C40DA210 XS7C1A1DAM8 + XSZBC10 XS7T2PC440LD XS7E1A1PAL08M12 + XSZBE10 XS2M18MA250 XS618B1MAL2 XS1M30MB250L2 XS630B1MBL10 XS7C40DA210A XS7C1A1DAM8 + XSZBC10 XS7T2PC440LD XS7E1A1PBL08M12 + XSZBE10 XS2M18MA250A XS618B1MAU20 XS2M30MA230 XS630B1MAL2 XS7C40DA214D XS7C1A1CAL08M12 + XSZBC10 XS7T4DA210 XS7C1A1DAL2 + XSZBC10 XS2M18MA250K XS618B1MAU20 XS2M30MA230A XS630B1MAU20 XS7C40DP210 XS7C1A1DAM8 + XSZBC10 XS7T4DA214LD XS7C1A1CAL08M12 + XSZBC10 XS2M18MA250L1 XS618B1MAL5 XS2M30MA230C XS630B1MAU20 XS7C40DP210 XS7C1A1DBM8 + XSZBC10 XS7T4DA214LD01 XS7C1A1CAL01M12 + XSZBC10 XS2M18MA250L2 XS618B1MAL10 XS2M30MA230G XS630B1MAU20 XS7C40DP210H29 XS7C1A1DAM8 + XSZBC10 XS7T4NC440 XS7C1A1NAL2 + XSZBC10 XS2M18MB230 XS618B1MBL2 XS2M30MA230K XS630B1MAU20 XS7C40DP210H29 XS7C1A1DBM8 + XSZBC10 XS7T4NC440 XS7C1A1NBL2 + XSZBC10 XS2M18MB230A XS618B1MBU20 XS2M30MA230L1 XS630B1MAL5 XS7C40DP210H7 XS7C1A1DAM8 + XSZBC10 XS7T4NC440LD XS7C1A1NAL01M12 + XSZBC10 XS2M18MB230C XS618B1MBU20 XS2M30MA230L2 XS630B1MAL10 XS7C40DP210H7 XS7C1A1DBM8 + XSZBC10 XS7T4NC440LD XS7C1A1NBL01M12 + XSZBC10 XS2M18MB230G XS618B1MBU20 XS2M30MA230T XS630B1MAL2T XS7C40DP210TT XS7C1A1DAM8 + XSZBC10 XS7T4PC440 XS7C1A1PAL2 + XSZBC10 XS2M18MB230K XS618B1MBU20 XS2M30MA250 XS630B1MAL2 XS7C40DP210TT XS7C1A1DBM8 + XSZBC10 XS7T4PC440 XS7C1A1PBL2 + XSZBC10 XS2M18MB230L1 XS618B1MBL5 XS2M30MA250K XS630B1MAU20 XS7C40DP210TF XS7C1A1DAM8 + XSZBC10 XS7T4PC440LD XS7C1A1PAL01M12 + XSZBC10 XS2M18MB230L2 XS618B1MBL10 XS2M30MA250L1 XS630B1MAL5 XS7C40DP210TF XS7C1A1DBM8 + XSZBC10 XS7T4PC440LD XS7C1A1PBL01M12 + XSZBC10 XS2M18MB250 XS618B1MBL2 XS2M30MA250L2 XS630B1MAL10 XS7C40KPM40 XS9C11MPAM8 + XSZBC10 XS8 Rectangular c XS2M18MB250A XS618B1MBU20 XS2M30MB230 XS630B1MBL2 XS7C40KPM40 XS9C11MPBM8 + XSZBC10 XS8C40DA210 XS7C1A1DAL01M12 + XSZBC10 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 36 2/03 Substitution guide Proximity Sensors Osiconcept Proximity Sensors_ Substitution Guide cont. Current Offer Osi Sensors Current Offer Osi Sensors Current Offer Osi Sensors XS8C40DP210 XS8C1A1DAM8 + XSZBC10 XS7C40FP260 XS8C1A1MAL01U20 + XSZBC10 XSDH407339H7 XS8D1A1PBM12 + XSZBD10 XS8C40DP210 XS8C1A1DBM8 + XSZBC10 XS7C40FP260 XS8C1A1MBL01U20 + XSZBC10 XSDH607339 XS8D1A1PAM12 + XSZBD10 XS8C40DP210H29 XS8C1A1DAM8 + XSZBC10 XS7C40FP260A XS8C1A1MAL01U20 + XSZBC10 XSDH607339 XS8D1A1PBM12 + XSZBD10 XS8C40DP210H29 XS8C1A1DBM8 + XSZBC10 XS7C40FP260A XS8C1A1MBL01U20 + XSZBC10 XSDH607339H7 XS8D1A1PAM12 + XSZBD10 XS8C40DP210H7 XS8C1A1DAM8 + XSZBC10 XS7C40FP260H29 XS8C1A1MAL01U20 + XSZBC10 XSDH607339H7 XS8D1A1PBM12 + XSZBD10 XS8C40DP210H7 XS8C1A1DBM8 + XSZBC10 XS7C40FP260H29 XS8C1A1MBL01U20 + XSZBC10 XSDH607339TF XS8D1A1PAM12 + XSZBD10 XS8C40NC440 XS8C1A1NAM8 + XSZBC10 XS7C40FP260H7 XS8C1A1MAL01U20 + XSZBC10 XSDH607339TF XS8D1A1PBM12 + XSZBD10 XS8C40NC440 XS8C1A1NBM8 + XSZBC10 XS7C40FP260H7 XS8C1A1MBL01U20 + XSZBC10 XSDJ407339 XS8D1A1NAM12 + XSZBD10 XS8C40NC440H29 XS8C1A1NAM8 + XSZBC10 XS7C40FP260TF XS8C1A1MAL01U20 + XSZBC10 XSDJ407339 XS8D1A1NBM12 + XSZBD10 XS8C40NC440H29 XS8C1A1NBM8 + XSZBC10 XS7C40FP260TF XS8C1A1MBL01U20 + XSZBC10 XSDJ407339H7 XS8D1A1NAM12 + XSZBD10 XS8C40NC449 XS8C1A1NAM8 + XSZBC10 XS7C40FP260TT XS8C1A1MAL01U20 + XSZBC10 XSDJ407339H7 XS8D1A1NBM12 + XSZBD10 XS8C40NC449 XS8C1A1NBM8 + XSZBC10 XS7C40FP260TT XS8C1A1MBL01U20 + XSZBC10 XSDJ607339 XS8D1A1NAM12 + XSZBD10 XS8C40NC449H29 XS8C1A1NAM8 + XSZBC10 XS7C40MP230 XS8C1A1MAL01U20 + XSZBC10 XSDJ607339 XS8D1A1NBM12 + XSZBD10 XS8C40NC449H29 XS8C1A1NBM8 + XSZBC10 XS7C40MP230 XS8C1A1MBL01U20 + XSZBC10 XSDJ607339H7 XS8D1A1NAM12 + XSZBD10 XS8C40NC449H7 XS8C1A1NAM8 + XSZBC10 XS7C40MP230A XS8C1A1MAL01U20 + XSZBC10 XSDJ607339H7 XS8D1A1NBM12 + XSZBD10 XS8C40NC449H7 XS8C1A1NBM8 + XSZBC10 XS7C40MP230A XS8C1A1MBL01U20 + XSZBC10 XSE Rectangular c XS8C40PC440 XS8C1A1PAM8 + XSZBC10 XS7C40MP230H29 XS8C1A1MAL01U20 + XSZBC10 XSEC107130 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC440 XS8C1A1PBM8 + XSZBC10 XS7C40MP230H29 XS8C1A1MBL01U20 + XSZBC10 XSEC1071300 XS7E1A1DAL2 + XSZBE10 XS8C40PC440D XS8C1A1PAL01M12 + XSZBC10 XS7C40MP230H7 XS8C1A1MAL01U20 + XSZBC10 XSEC1071300L05 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC440D XS8C1A1PAL01M12 + XSZBC10 XS7C40MP230H7 XS8C1A1MBL01U20 + XSZBC10 XSEC1071301 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC440H29 XS8C1A1PAM8 + XSZBC10 XS7C40MP230TF XS8C1A1MAL01U20 + XSZBC10 XSEC1071302 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC440H29 XS8C1A1PBM8 + XSZBC10 XS7C40MP230TF XS8C1A1MBL01U20 + XSZBC10 XSEC1071304 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC440H7 XS8C1A1PAM8 + XSZBC10 XS7C40MP230TT XS8C1A1MAL01U20 + XSZBC10 XSEC107130D4 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC440H7 XS8C1A1PBM8 + XSZBC10 XS7C40MP230TT XS8C1A1MBL01U20 + XSZBC10 XSEC107130H7 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC449 XS8C1A1PAM8 + XSZBC10 XS8 Rectangular a XSEC107133 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC449 XS8C1A1PBM8 + XSZBC10 XS8C40DA210 XS8C1A1MAL01U20 + XSZBC10 XSEC1071330 XS7E1A1DAL2 + XSZBE10 XS8C40PC449D XS8C1A1PAL01M12 + XSZBC10 XS8C40DP210 XS8C1A1MAL01U20 + XSZBC10 XSEC1071331 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC449D XS8C1A1PAL01M12 + XSZBC10 XS8C40DP210 XS8C1A1MBL01U20 + XSZBC10 XSEC1071332 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC449H29 XS8C1A1PAM8 + XSZBC10 XS8C40DP210H29 XS8C1A1MAL01U20 + XSZBC10 XSEC1071334 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC449H29 XS8C1A1PBM8 + XSZBC10 XS8C40DP210H29 XS8C1A1MBL01U20 + XSZBC10 XSEC107133D4 XS7E1A1DAL01M12 + XSZBE10 XS8C40PC449H7 XS8C1A1PAM8 + XSZBC10 XS8C40DP210H7 XS8C1A1MAL01U20 + XSZBC10 XSEC107230 XS7E1A1DBM12 + XSZBE10 XS8C40PC449H7 XS8C1A1PBM8 + XSZBC10 XS8C40DP210H7 XS8C1A1MBL01U20 + XSZBC10 XSEC1072301 XS7E1A1DBL01M12 + XSZBE10 XS8T2NC440 XS8E1A1NAL2 + XSZBE10 XS8C40FP260 XS8C1A1MAL01U20 + XSZBC10 XSEC107233 XS7E1A1DBM12 + XSZBE10 XS8T2NC440 XS8E1A1NBL2 + XSZBE10 XS8C40FP260 XS8C1A1MBL01U20 + XSZBC10 XSEC1072331 XS7E1A1DBL08M12 + XSZBE10 XS8T2NC440LD XS8E1A1NAL01M12 + XSZBE10 XS8C40FP260H29 XS8C1A1MAL01U20 + XSZBC10 XSEC1571300 XS7E1A1DAL2 + XSZBE10 XS8T2NC440LD XS8E1A1NBL01M12 + XSZBE10 XS8C40FP260H29 XS8C1A1MBL01U20 + XSZBC10 XSEC1571330 XS7E1A1DAL2 + XSZBE10 XS8T2PC440 XS8E1A1PAL2 + XSZBE10 XS8C40MP230 XS8C1A1MAL01U20 + XSZBC10 XSC Rectangular a XS8T2PC440 XS8E1A1PBL2 + XSZBE10 XS8C40MP230 XS8C1A1MBL01U20 + XSZBC10 XSCA150549 XS8C1A1MAL01U20 + XSZBC10 XS8T2PC440LD XS8E1A1PAL01M12 + XSZBE10 XS8C40MP230 XS8C1A1MAL01U20 + XSZBC10 XSCA150549 XS8C1A1MBL01U20 + XSZBC10 XS8T2PC440LD XS8E1A1PBL01M12 + XSZBE10 XS8C40MP230 XS8C1A1MAL01U20 + XSZBC10 XSD Rectangular a XS8T4NC440 XS8C1A1NAL2 + XSZBC10 XS8C40MP230H29 XS8C1A1MAL01U20 + XSZBC10 XSDA400519 XS8D1A1MAU20 + XSZBD10 XS8T4NC440 XS8C1A1NBL2 + XSZBC10 XS8C40MP230H29 XS8C1A1MBL01U20 + XSZBC10 XSDA400519 XS8D1A1MBU20 + XSZBD10 XS8T4NC440LD XS8C1A1NAL01M12 + XSZBC10 XS8C40MP230H7 XS8C1A1MAL01U20 + XSZBC10 XSDA400519H7 XS8D1A1MAU20 + XSZBD10 XS8T4NC440LD XS8C1A1NBL01M12 + XSZBC10 XS8C40MP230H7 XS8C1A1MBL01U20 + XSZBC10 XSDA400519H7 XS8D1A1MBU20 + XSZBD10 XS8T4PC440 XS8C1A1PAL2 + XSZBC10 XSD Rectangular c XSDA500519 XS8D1A1MAU20 + XSZBD10 XS8T4PC440 XS8C1A1PBL2 + XSZBC10 XSDC407138 XS7D1A1DAM12 + XSZBD10 XSDA500519 XS8D1A1MBU20 + XSZBD10 XS8T4PC440LD XS8C1A1PAL01M12 + XSZBC10 XSDC407139 XS7D1A1DAM12 + XSZBD10 XSDA500519H7 XS8D1A1MAU20 + XSZBD10 XS8T4PC440LD XS8C1A1PBL01M12 + XSZBC10 XSDC407139D4 XS7D1A1DAM12 + XSZBD10 XSDA500519H7 XS8D1A1MBU20 + XSZBD10 XS7 Rectangular a XSDC407139H7 XS7D1A1DAM12 + XSZBD10 XSDA505539H4 XS8D1A1MAU20 + XSZBD10 XS7C40DA210 XS8C1A1MAL01U20 + XSZBC10 XSDC407139LD XS7D1A1DAM12 + XSZBD10 XSDA505539H4 XS8D1A1MBU20 + XSZBD10 XS7C40DA210A XS8C1A1MAL01U20 + XSZBC10 XSDC407139LD01 XS7D1A1DAM12 + XSZBD10 XSDA600519 XS8D1A1MAU20 + XSZBD10 XS7C40DP210 XS8C1A1MAL01U20 + XSZBC10 XSDC507139 XS7D1A1DAM12 + XSZBD10 XSDA600519 XS8D1A1MBU20 + XSZBD10 XS7C40DP210 XS8C1A1MBL01U20 + XSZBC10 XSDC607139 XS7D1A1DAM12 + XSZBD10 XSDA600519H7 XS8D1A1MAU20 + XSZBD10 XS7C40DP210H29 XS8C1A1MAL01U20 + XSZBC10 XSDC607139H7 XS7D1A1DAM12 + XSZBD10 XSDA600519H7 XS8D1A1MBU20 + XSZBD10 XS7C40DP210H29 XS8C1A1MBL01U20 + XSZBC10 XSDC607139LD XS7D1A1DAM12 + XSZBD10 XSDM500538 XS8D1A1MAU20 + XSZBD10 XS7C40DP210H7 XS8C1A1MAL01U20 + XSZBC10 XSDC607139LD01 XS7D1A1DAM12 + XSZBD10 XSDM500538 XS8D1A1MBU20 + XSZBD10 XS7C40DP210H7 XS8C1A1MBL01U20 + XSZBC10 XSDC607319 XS7D1A1DAM12 + XSZBD10 XSDM600539 XS8D1A1MAU20 + XSZBD10 XS7C40DP210TT XS8C1A1MAL01U20 + XSZBC10 XSDC607319 XS7D1A1DBM12 + XSZBD10 XSDM600539 XS8D1A1MBU20 + XSZBD10 XS7C40DP210TT XS8C1A1MBL01U20 + XSZBC10 XSDH407339 XS8D1A1PAM12 + XSZBD10 XSDM600539H7 XS8D1A1MAU20 + XSZBD10 XS7C40DP210TF XS8C1A1MAL01U20 + XSZBC10 XSDH407339 XS8D1A1PBM12 + XSZBD10 XSDM600539H7 XS8D1A1MBU20 + XSZBD10 XS7C40DP210TF XS8C1A1MBL01U20 + XSZBC10 XSDH407339H7 XS8D1A1PAM12 + XSZBD10 The Essential Guide to Sensor Selection 37 2/03 © 2003 Schneider Electric All Rights Reserved Substitution guide Limit Switches q XCMD2103Lk is not a catalog item. Use the standard XCMD2102Lk and rotate the head to the cross roller position. Osiconcept Limit Switches_ XCMD Modular Miniature Cross Reference from Previous XCMA/B to New XCMD Old XCMA/B New XCMD Old XCMA/B New XCMD Old XCMA/B New XCMD Old XCMA/B New XCMD XCMA102 XCMD2102L1 XCMA110 XCMD2110L1 XCMA117 XCMD2117L1 XCMB515 XCMD2515L1 XCMA1022 XCMD2102L2 XCMA1102 XCMD2110L2 XCMA125 XCMD2125L1 XCMB516 XCMD2516L1 XCMA1023 XCMD2102L3 XCMA1103 XCMD2110L3 XCMB502 XCMD2502L1 XCMF102 XCMD21F2L1 XCMA1025 XCMD2102L5 XCMA1105 XCMD2110L5 XCMB5022 XCMD2502L2 XCMF1032 XCMD21F2L2 XCMA1026 XCMD2102L7 XCMA111 XCMD2111L1 XCMB5023 XCMD2502L3 XCMF110 XCMD21F0L1 XCMA1027 XCMD2102L7 XCMA115 XCMD2115L1 XCMB5024 XCMB2502L5 XCMF1102 XCMD21F0L2 XCMA1028 XCMD2102L10 XCMA1152 XCMD2115L2 XCMB5025 XCMD2502L5 XCMF1105 XCMD21F0L5 XCMA103 XCMD2103L1 q XCMA1155 XCMD2115L5 XCMB503 XCMD2503L1 XCMG502 XCMD25F2L1 XCMA1032 XCMD2103L2 XCMA115 XCMD2115L1 XCMB510 XCMD2510L1 XCMG503 XCMD25F3L1 XCMA1033 XCMD2103L3 XCMA116 XCMD2116L1 XCMB5105 XCMD2510L5 XCMA1037 XCMD2103L7 XCMA1163 XCMD2116L3 XCMB511 XCMD2511L1 XCMD Components – Catalog Number Selection XCMD Components XCMD Components XCMD Miniature Switch Body with Contacts Head Lever Corded Plug-in Base Only XCMD Miniature Switch Body with Contacts Head Lever Corded Plug-in Base Only XCMD2102L1 ZCMD21 ZCE02 ZCMC21L1 XCMD2117L1 ZCMD21 ZCE01 ZCY17 ZCMC21L1 XCMD2102L10 ZCMD21 ZCE02 ZCMC21L10 XCMD2125L1 ZCMD21 ZCE01 ZCY25 ZCMC21L1 XCMD2102L2 ZCMD21 ZCE02 ZCMC21L2 XCMD21F0L1 ZCMD21 ZCEF0 ZCMC21L1 XCMD2102L3 ZCMD21 ZCE02 ZCMC21L3 XCMD21F0L2 ZCMD21 ZCEF0 ZCMC21L2 XCMD2102L5 ZCMD21 ZCE02 ZCMC21L5 XCMD21F0L5 ZCMD21 ZCEF0 ZCMC21L5 XCMD2102L6 ZCMD21 ZCE02 ZCMC21L5 XCMD21F2L1 ZCMD21 ZCEF2 ZCMC21L1 XCMD2102L7 ZCMD21 ZCE02 ZCMC21L7 XCMD21F2L2 ZCMD21 ZCEF2 ZCMC21L2 XCMD2103L1 q ZCMD21 ZCE02 ZCMC21L1 XCMD2502L1 ZCMD25 ZCE02 ZCMC25L1 XCMD2103L2 ZCMD21 ZCE02 ZCMC21L2 XCMD2502L1 ZCMD25 ZCE02 ZCMC25L1 XCMD2103L3 ZCMD21 ZCE02 ZCMC21L3 XCMD2502L2 ZCMD25 ZCE02 ZCMC25L2 XCMD2103L7 ZCMD21 ZCE02 ZCMC21L7 XCMD2502L3 ZCMD25 ZCE02 ZCMC25L3 XCMD2110L1 ZCMD21 ZCE10 ZCMC21L1 XCMD2502L5 ZCMD25 ZCE02 ZCMC25L5 XCMD2110L2 ZCMD21 ZCE10 ZCMC21L2 XCMD2503L1 ZCMD25 ZCE02 ZCMC25L1 XCMD2110L3 ZCMD21 ZCE10 ZCMC21L3 XCMD2510L1 ZCMD25 ZCE10 ZCMC25L1 XCMD2110L5 ZCMD21 ZCE10 ZCMC21L5 XCMD2510L5 ZCMD25 ZCE10 ZCMC25L5 XCMD2111L1 ZCMD21 ZCE11 ZCMC21L1 XCMD2511L1 ZCMD25 ZCE11 ZCMC25L1 XCMD2115L1 ZCMD21 ZCE01 ZCY15 ZCMC21L1 XCMD2515L1 ZCMD25 ZCE01 ZCY15 ZCMC25L1 XCMD2115L2 ZCMD21 ZCE01 ZCY15 ZCMC21L2 XCMD2516L1 ZCMD25 ZCE05 ZCY16 ZCMC25L1 XCMD2115L5 ZCMD21 ZCE01 ZCY15 ZCMC21L5 XCMD25F2L1 ZCMD25 ZCEF2 ZCMC25L1 XCMD2116L3 ZCMD21 ZCE01 ZCY16 ZCMC21L3 XCMD25F2L1 ZCMD25 ZCEF2 ZCMC25L1 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 38 2/03 Substitution guide Limit switches Osiconcept Limit Switches_ XCKP, XCKD and XCKT Compact Modular XCKP, XCKD and XCKT Cross Reference from Old to New Old Plastic New Plastic New Metal Old Plastic New Plastic New Metal Old Plastic New Plastic XCKP101 XCKP2101N12 XCKD2101N12 XCKP154 XCKP2154N12 XCKD2154N12 XCKT102 XCKT2102N12 XCKP102 XCKP2102N12 XCKD2102N12 XCKP155 XCKP2155N12 XCKD2155N12 XCKT106 XCKT2106N12 XCKP102CM XCKP2102G11 XCKD2102G11 XCKP502 XCKP2502N12 XCKD2502N12 XCKT110 XCKT2110N12 XCKP106 XCKP2106N12 XCKD2106N12 XCKP506 XCKP2506N12 XCKD2506N12 XCKT111 XCKT2111N12 XCKP110 XCKP2110N12 XCKD2110N12 XCKP510 XCKP2510N12 XCKD2510N12 XCKT118 XCKT2118N12 XCKP110CM XCKP2110G11 XCKD2110G11 XCKP518 XCKP2518N12 XCKD2518N12 XCKT121 XCKT2121N12 XCKP111 XCKP2111N12 XCKD2111N12 XCKP521 XCKP2521N12 XCKD2521N12 XCKT145 XCKT2145N12 XCKP118 XCKP2118N12 XCKD2118N12 XCKP527 XCKP2527N12 XCKD2527N12 XCKT501 XCKT2501N12 XCKP118CM XCKP2118G11 XCKD2118G11 XCKP628 XCKP2628N12 XCKD2628N12 XCKT502 XCKT2502N12 XCKP121 XCKP2121N12 XCKD2121N12 XCKP721 XCKP2721N12 XCKD2721N12 XCKT510 XCKT2510N12 XCKP121CM XCKP2121G11 XCKD2121G11 XCKP791 XCKP2791N12 XCKD2791N12 XCKT518 XCKT2518N12 XCKP127 XCKP2127N12 XCKD2127N12 XCKP802 XCKP2802N12 XCKD2802N12 XCKT521 XCKT2521N12 XCKP128 XCKP2128N12 XCKD2128N12 XCKP810H7 XCKP2810N12 XCKD2810N12 XCKP1305979 XCKP2191N12 XCKD2191N12 XCKP902 XCKP2902N12 XCKD2902N12 XCKP145 XCKP2145N12 XCKD2145N12 XCKP910H7 XCKP2910N12 XCKD2910N12 XCKP145CM XCKP2145G11 XCKD2145G11 XCKPMEQ3412 XCKP2145N12 XCKD2145N12 XCKP, XCKD and XCKT Component and Catalog Number Selection XCKD Components XCKP Components XCKT Components Metal Body Consists of: Conduit Plastic Body Consists of: Conduit Plastic Body Consists of: Cat Number Body Head Lever Adapter Cat Number Body Head Lever Adapter Cat Number Body Head Lever XCKD2118G11 ZCD21 ZCE01 ZCY18 ZCDEG11 XCKP2101N12 ZCP21 ZCE01 N/A ZCPEN12 XCKT2102N12 ZCT21N12 ZCE02 XCKD2102N12 ZCD21 ZCE02 ZCDEN12 XCKP2102G11 ZCP21 ZCE02 ZCPEG11 XCKT2106N12 ZCT21N12 ZCE06 XCKD2121G11 ZCD21 ZCE21 ZCDEG11 XCKP2102N12 ZCP21 ZCE02 ZCPEN12 XCKT2110N12 ZCT21N12 ZCE10 XCKD2118N12 ZCD21 ZCE01 ZCY18 ZCDEN12 XCKP2106N12 ZCP21 ZCE06 ZCPEN12 XCKT2111N12 ZCT21N12 ZCE11 XCKD2145N12 ZCD21 ZCE01 ZCY45 ZCDEN12 XCKP2110G11 ZCP21 ZCE10 ZCPEG11 XCKT2118N12 ZCT21N12 ZCE01 ZCY18 XCKD2121N12 ZCD21 ZCE21 ZCDEN12 XCKP2110N12 ZCP21 ZCE10 ZCPEN12 XCKT2121N12 ZCT21N12 ZCE21 XCKD2145N12 ZCD21 ZCE01 ZCY45 ZCDEN12 XCKP2111N12 ZCP21 ZCE11 ZCPEN12 XCKT2145N12 ZCT21N12 ZCE01 ZCY45 XCKD2191N12 ZCD21 ZCE01 ZCY91 ZCDEN12 XCKP2118G11 ZCP21 ZCE01 ZCY18 ZCPEG11 XCKT2501N12 ZCT25N12 ZCE01 N/A XCKD2106N12 ZCD21 ZCE06 ZCDEN12 XCKP2118N12 ZCP21 ZCE01 ZCY18 ZCPEN12 XCKT2502N12 ZCT25N12 ZCE02 XCKD2102G11 ZCD21 ZCE02 ZCDEG11 XCKP2121G11 ZCP21 ZCE21 ZCPEG11 XCKT2510N12 ZCT25N12 ZCE10 XCKD2110N12 ZCD21 ZCE10 ZCDEN12 XCKP2121N12 ZCP21 ZCE21 ZCPEN12 XCKT2518N12 ZCT25N12 ZCE01 ZCY18 XCKD2145G11 ZCD21 ZCE01 ZCY45 ZCDEG11 XCKP2127N12 ZCP21 ZCE27 ZCPEN12 XCKT2521N12 ZCT25N12 ZCE21 XCKD2127N12 ZCD21 ZCE27 ZCDEN12 XCKP2128N12 ZCP21 ZCE28 ZCPEN12 XCKT2528N12 ZCT25N12 ZCE28 XCKD2191N12 ZCD21 ZCE01 ZCY91 ZCDEN12 XCKP2145G11 ZCP21 ZCE01 ZCY45 ZCPEG11 • XCKD2502N12 ZCD25 ZCE02 ZCDEN12 XCKP2145N12 ZCP21 ZCE01 ZCY45 ZCPEN12 XCKD2910N12 ZCD29 ZCE10 ZCDEN12 XCKP2154N12 ZCP21 ZCE01 ZCY54 ZCPEN12 XCKD2721N12 ZCD27 ZCE21 ZCDEN12 XCKP2155N12 ZCP21 ZCE01 ZCY55 ZCPEN12 XCKD2518N12 ZCD25 ZCE01 ZCY18 ZCDEN12 XCKP2191N12 ZCP21 ZCE01 ZCY91 ZCPEN12 XCKD2791N12 ZCD27 ZCE01 ZCY91 ZCDEN12 XCKP2502N12 ZCP25 ZCE02 ZCPEN12 XCKD2902N12 ZCD29 ZCE02 ZCDEN12 XCKP2506N12 ZCP25 ZCE06 ZCPEN12 XCKD2111N12 ZCD21 ZCE11 ZCDEN12 XCKP2510N12 ZCP25 ZCE10 ZCPEN12 XCKD2106N12 ZCD21 ZCE06 ZCDEN12 XCKP2518N12 ZCP25 ZCE01 ZCY18 ZCPEN12 XCKD2521N12 ZCD25 ZCE21 ZCDEN12 XCKP2521N12 ZCP25 ZCE21 ZCPEN12 XCKD2791N12 ZCD27 ZCE01 ZCY91 ZCDEN12 XCKP2527N12 ZCP25 ZCE27 ZCPEN12 XCKD2128N12 ZCD21 ZCE28 ZCDEN12 XCKP2628N12 ZCP26 ZCE28 ZCPEN12 XCKD2810N12 ZCD28 ZCE10 ZCDEN12 XCKP2721N12 ZCP27 ZCE21 ZCPEN12 XCKD2101N12 ZCD21 ZCE01 N/A ZCDEN12 XCKP2791N12 ZCP27 ZCE01 ZCY91 ZCPEN12 XCKD2510N12 ZCD25 ZCE10 ZCDEN12 XCKP2802N12 ZCP28 ZCE02 ZCPEN12 XCKD2155N12 ZCD21 ZCE01 ZCY55 ZCDEN12 XCKP2810N12 ZCP28 ZCE10 ZCPEN12 XCKD2110G11 ZCD21 ZCE10 ZCDEG11 XCKP2902N12 ZCP29 ZCE02 ZCPEN12 XCKD2102D16 ZCD21 ZCE02 ZCDED16 XCKP2910N12 ZCP29 ZCE10 ZCPEN12 XCKD2506N12 ZCD25 ZCE06 ZCDEN12 XCKD2802N12 ZCD28 ZCE02 ZCDEN12 XCKD2502N12 ZCD25 ZCE02 ZCDEN12 XCKD2527N12 ZCD25 ZCE27 ZCDEN12 XCKD2154N12 ZCD21 ZCE01 ZCY54 ZCDEN12 XCKD2127N12 ZCD21 ZCE27 ZCDEN12 XCKD2628N12 ZCD26 ZCE28 ZCDEN12 The Essential Guide to Sensor Selection 39 2/03 © 2003 Schneider Electric All Rights Reserved catalog number index Catalog Number Index Catalog Number Page(s) Catalog Number Page(s) Catalog Number Page(s) Catalog Number Page(s) XCDR2102N12 25 XCMD2115L1 24 XS4P18AB120 19 XS530B1DBL2 17 XCDR2110N12 25 XCMD2145L1 24 XS4P18MA230 18 XS530B1DBM12 17 XCDR2118N12 25 XCMD21F0L1 24 XS4P18MA230K 18 XS530B1NAL2 17 XCDR2121N12 25 XCMD21F2L1 25 XS4P18MB230 18 XS530B1NAM12 17 XCDR2127N12 25 XCMD2502L1 24 XS4P18MB230K 18 XS530B1NBL2 17 XCDR2502N12 25 XCMD2506L1 25 XS4P18NA340 18 XS530B1NBM12 17 XCDR2510N12 25 XCMD2510L1 24 XS4P18NA340D 18 XS530B1PAL2 17 XCDR2518N12 25 XCMD2515L1 24 XS4P18NB340 18 XS530B1PAM12 17 XCDR2521N12 25 XCMD2545L1 24 XS4P18NB340D 18 XS530B1PBL2 17 XCDR2527N12 25 XCMD25F0L1 24 XS4P18PA340 18 XS530B1PBM12 17 XCKD2102N12 24 XCMD25F2L1 25 XS4P18PA340D 18 XS608B1NAL2 15 XCKD2106N12 25 XCMN2110L1 25 XS4P18PB340 18 XS608B1NAM12 15 XCKD2110N12 24 XCPR2102N12 25 XS4P18PB340D 18 XS608B1NBL2 15 XCKD2118N12 25 XCPR2110N12 25 XS4P30AB120 19 XS608B1NBM12 15 XCKD2121N12 24 XCPR2118N12 25 XS4P30MA230 18 XS608B1PAL2 15 XCKD2139N12 25 XCPR2121N12 25 XS4P30MA230K 18 XS608B1PAM12 15 XCKD2145N12 25 XCPR2127N12 25 XS4P30MB230 18 XS608B1PBL2 15 XCKD21H0N12 24 XCPR2502N12 25 XS4P30MB230K 18 XS608B1PBM12 15 XCKD21H2N12 24 XCPR2510N12 25 XS4P30NA340 18 XS612B1MAL2 15 XCKD2502N12 24 XCPR2518N12 25 XS4P30NA340D 18 XS612B1MAU20 15 XCKD2506N12 25 XCPR2521N12 25 XS4P30NB340 18 XS612B1MBL2 15 XCKD2510N12 24 XCPR2527N12 25 XS4P30NB340D 18 XS612B1MBU20 15 XCKD2518N12 25 XS1L04NA310 20 XS4P30PA340 18 XS612B1NAL2 15 XCKD2521N12 24 XS1L04NA310S 20 XS4P30PA340D 18 XS612B1NAM12 15 XCKD2539N12 25 XS1L04PA310 20 XS4P30PB340 18 XS612B1NBL2 15 XCKD2545N12 25 XS1L04PA310S 20 XS4P30PB340D 18 XS612B1NBM12 15 XCKD25H0N12 24 XS1L06NA340 20 XS508B1DAL2 17 XS612B1PAL2 15 XCKD25H2N12 24 XS1L06NA340S 20 XS508B1DAM12 17 XS612B1PAM12 15 XCKJ10511 28 XS1L06PA340 20 XS508B1DBL2 17 XS612B1PBL2 15 XCKJ10541 28 XS1L06PA340S 20 XS508B1DBM12 17 XS612B1PBM12 15 XCKJ10559 28 XS1M12AB120 19 XS508B1NAL2 17 XS612B2NAL01M12 14 XCKJ161 28 XS1M18AB120 19 XS508B1NAM8 17 XS612B2NBL01M12 14 XCKJ167 28 XS1M18KPM40D 21 XS508B1NBL2 17 XS612B2PAL01M12 14 XCKJ50511 28 XS1M30AB120 19 XS508B1NBM8 17 XS612B2PBL01M12 14 XCKJ50541 28 XS1M30KPM40LD 21 XS508B1PAL2 17 XS618B1MAL2 15 XCKJ50559 28 XS1N05NA310 20 XS508B1PAM8 17 XS618B1MAU20 15 XCKJ561 28 XS1N05NA311S 20 XS508B1PBL2 17 XS618B1MBL2 15 XCKJ567 28 XS1N05PA310 20 XS508B1PBM8 17 XS618B1MBU20 15 XCKP2102N12 24 XS1N05PA311S 20 XS512B1DAL2 17 XS618B1NAL2 15 XCKP2106N12 25 XS4P08MA230 18 XS512B1DAM12 17 XS618B1NAM12 15 XCKP2110N12 24 XS4P08MA230K 18 XS512B1DBL2 17 XS618B1NBL2 15 XCKP2118N12 25 XS4P08MB230 18 XS512B1DBM12 17 XS618B1NBM12 15 XCKP2121N12 24 XS4P08MB230K 18 XS512B1NAL2 17 XS618B1PAL2 15 XCKP2139N12 25 XS4P08NA340 18 XS512B1NAM12 17 XS618B1PAM12 15 XCKP2145N12 25 XS4P08NA340S 18 XS512B1NBL2 17 XS618B1PBL2 15 XCKP21H0N12 24 XS4P08NB340 18 XS512B1NBM12 17 XS618B1PBM12 15 XCKP21H2N12 24 XS4P08NB340S 18 XS512B1PAL2 17 XS618B2NAL01M12 15 XCKP2502N12 24 XS4P08PA340 18 XS512B1PAM12 17 XS618B2NBL01M12 15 XCKP2506N12 25 XS4P08PA340S 18 XS512B1PBL2 17 XS618B2PAL01M12 15 XCKP2510N12 24 XS4P08PB340 18 XS512B1PBM12 17 XS618B2PBL01M12 15 XCKP2518N12 25 XS4P08PB340S 18 XS518B1DAL2 17 XS630B1MAL2 15 XCKP2521N12 24 XS4P12AB120 19 XS518B1DAM12 17 XS630B1MAU20 15 XCKP2539N12 25 XS4P12MA230 18 XS518B1DBL2 17 XS630B1MBL2 15 XCKP2545N12 25 XS4P12MA230K 18 XS518B1DBM12 17 XS630B1MBU20 15 XCKP25H0N12 24 XS4P12MB230 18 XS518B1NAL2 17 XS630B1NAL2 15 XCKP25H2N12 24 XS4P12MB230K 18 XS518B1NAM12 17 XS630B1NAM12 15 XCKT2102N12 25 XS4P12NA340 18 XS518B1NBL2 17 XS630B1NBL2 15 XCKT2106N12 25 XS4P12NA340D 18 XS518B1NBM12 17 XS630B1NBM12 15 XCKT2110N12 25 XS4P12NB340 18 XS518B1PAL2 17 XS630B1PAL2 15 XCKT2118N12 25 XS4P12NB340D 18 XS518B1PAM12 17 XS630B1PAM12 15 XCKT2121N12 25 XS4P12PA340 18 XS518B1PBL2 17 XS630B1PBL2 15 XCMD2102L1 24 XS4P12PA340D 18 XS518B1PBM12 17 XS630B1PBM12 15 XCMD2106L1 25 XS4P12PB340 18 XS530B1DAL2 17 XS630B2NAL01M12 15 XCMD2110L1 24 XS4P12PB340D 18 XS530B1DAM12 17 XS630B2NBL01M12 15 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 40 2/03 catalog number index Catalog Number Index continued Catalog Number Page(s) Catalog Number Page(s) Catalog Number Page(s) Catalog Number Page(s) XS630B2PAL01M12 15 XS8C1A1MBL01U20 14 XSZBC90 14, 16, 18, 20 XUAJ0515S 12 XS630B2PBL01M12 15 XS8C1A1MBL2 14 XSZBD00 14, 16, 18 XUAJ0525 12 XS7C1A1DAL2 16 XS8C1A1NAL2 14 XSZBD10 14, 16, 18 XUAJ0525S 12 XS7C1A1DAM8 16 XS8C1A1NAM8 14 XSZBE00 14, 16, 18, 20 XUB0AKSNL2T 4 XS7C1A1DBL2 16 XS8C1A1NBL2 14 XSZBE10 14, 16, 18 XUB0AKSNM12T 4 XS7C1A1DBM8 16 XS8C1A1NBM8 14 XSZBE90 14, 16, 18, 20 XUB0ANSNL2 4 XS7C1A1NAL2 16 XS8C1A1PAL2 14 XSZBF00 16, 18 XUB0ANSNM12 4 XS7C1A1NAM8 16 XS8C1A1PAM8 14 XSZBF90 16, 18 XUB0APSNL2 4 XS7C1A1NBL2 16 XS8C1A1PBL2 14 XSZBJ00 16, 18 XUB0APSNM12 4 XS7C1A1NBM8 16 XS8C1A1PBM8 14 XSZBJ90 16, 18 XUB0BKSNL2T 4 XS7C1A1PAL2 16 XS8D1A1MAL2 14 XSZBPM12 15, 21 XUB0BKSNM12T 4 XS7C1A1PAM8 16 XS8D1A1MAU20 14 XSZCA101Y 15, 17, 19, 21 XUB0BNSNL2 4 XS7C1A1PBL2 16 XS8D1A1MBL2 14 XSZCA111Y 15, 17, 19, 21 XUB0BNSNM12 4 XS7C1A1PBM8 16 XS8D1A1MBU20 14 XSZCD101Y 26, 27 XUB0BPSNL2 4 XS7D1A1DAL2 17 XS8D1A1NAL2 14 XSZCD102Y 5, 7, 10, 15, 17, 19, 21 XUB0BPSNM12 4 XS7D1A1DAM12 17 XS8D1A1NAM12 14 XSZCD112Y 5, 7, 10, 15, 17, 19, 21 XUB1APANL2 6 XS7D1A1DBL2 17 XS8D1A1NBL2 14 XSZCD1501Y 26, 27 XUB1APANM12 6 XS7D1A1DBM12 17 XS8D1A1NBM12 14 XSZCS101 15, 17, 19, 21 XUB1APBNL2 6 XS7D1A1NAL2 17 XS8D1A1PAL2 14 XSZCS112 15, 17, 19, 21 XUB1APBNM12 6 XS7D1A1NAM12 17 XS8D1A1PAM12 14 XSZCS142 5, 7, 8, 10 XUB1BPANL2 6 XS7D1A1NBL2 17 XS8D1A1PBL2 14 XSZCS152 5, 7, 8, 10 XUB1BPANM12 6 XS7D1A1NBM12 17 XS8D1A1PBM12 14 XT1L32FA262 23 XUB1BPBNL2 6 XS7D1A1PAL2 17 XS8E1A1MAL01U20 14 XT1L32FB262 23 XUB1BPBNM12 6 XS7D1A1PAM12 17 XS8E1A1MAL2 14 XT1M12NA372 22 XUB2AKSNL2T 6 XS7D1A1PBL2 17 XS8E1A1MBL01U20 14 XT1M12PA372 22 XUB2AKSNM12T 6 XS7D1A1PBM12 17 XS8E1A1MBL2 14 XT1M12PB372 22 XUB2APANL2R 6 XS7E1A1DAL2 16 XS8E1A1NAL2 14 XT1M18FA262 22 XUB2APANM12R 6 XS7E1A1DAM8 16 XS8E1A1NAM8 14 XT1M18FB262 22 XUB2APBNL2R 6 XS7E1A1DBL2 16 XS8E1A1NBL2 14 XT1M18NA372 22 XUB2APBNM12R 6 XS7E1A1DBM8 16 XS8E1A1NBM8 14 XT1M18PA372 22 XUB2BKSNL2T 6 XS7E1A1NAL2 16 XS8E1A1PAL2 14 XT1M18PB372 22 XUB2BKSNM12T 6 XS7E1A1NAM8 16 XS8E1A1PAM8 14 XT1M30FA262 22 XUB2BPANL2R 6 XS7E1A1NBL2 16 XS8E1A1PBL2 14 XT1M30FB262 22 XUB2BPANM12R 6 XS7E1A1NBM8 16 XS8E1A1PBM8 14 XT1M30NA372 22 XUB2BPBNL2R 6 XS7E1A1PAL2 16 XS9C111A1L01M12 19 XT1M30PA372 22 XUB2BPBNM12R 6 XS7E1A1PAM8 16 XS9C111A2L01M12 19 XT1M30PB372 22 XUB5APANL2 6 XS7E1A1PBL2 16 XS9C111A2L2 19 XT4L32FA262 23 XUB5APANM12 6 XS7E1A1PBM8 16 XS9C11RMBL01U20 21 XT4L32FB262 23 XUB5APBNL2 6 XS7F1A1DAL01M8 16 XS9C11RPBL01M12 21 XT4P18FA262 23 XUB5APBNM12 6 XS7F1A1DAL2 16 XS9D111A1M12 19 XT4P18NA372 23 XUB5BPANL2 6 XS7F1A1DBL01M8 16 XS9D111A2L2 19 XT4P18PA372 23 XUB5BPANM12 6 XS7F1A1DBL2 16 XS9D111A2M12 19 XT4P30FA262 23 XUB5BPBNL2 6 XS7F1A1NAL01M8 16 XS9E111A1L01M12 19 XT4P30FB262 23 XUB5BPBNM12 6 XS7F1A1NAL2 16 XS9E111A2L01M12 19 XT4P30NA372 23 XUB9APANL2 6 XS7F1A1NBL01M8 16 XS9E111A2L2 19 XT4P30PA372 23 XUB9APANM12 6 XS7F1A1NBL2 16 XS9E11RMBL01U20 20 XT7C40NC440 23 XUB9APBNL2 6 XS7F1A1PAL01M8 16 XS9E11RPBL01M12 20 XT7C40PC440 23 XUB9APBNM12 6 XS7F1A1PAL2 16 XS9F111A1L01M8 19 XU2M18AP20D 13 XUB9BPANL2 6 XS7F1A1PBL01M8 16 XS9F111A2L01M8 19 XU2P18NP340DL 13 XUB9BPANM12 6 XS7F1A1PBL2 16 XS9F111A2L2 19 XU2P18PP340DL 13 XUB9BPBNL2 6 XS7J1A1DAL01M8 16 XSAV11373 21 XU5M18U1D 10 XUB9BPBNM12 6 XS7J1A1DAL2 16 XSAV11801 21 XU5N18NP341 13 XUBH01353 10 XS7J1A1DBL01M8 16 XSAV12373 21 XU5N18NP341D 13 XUBH01353D 10 XS7J1A1DBL2 16 XSAV12801 21 XU5N18PP341 13 XUBJ01353 10 XS7J1A1NAL01M8 16 XSCC12FDM40V 15, 17, 19, 21 XU5N18PP341D 13 XUBJ01353D 10 XS7J1A1NAL2 16 XSZB104 20 XU9N18NP341 13 XUC2AKSAL2 7 XS7J1A1NBL01M8 16 XSZB105 20 XU9N18NP341D 13 XUC2ARCTL2 7 XS7J1A1NBL2 16 XSZB108 14, 16, 18, 20 XU9N18PP341 13 XUC8AKSAM12 7 XS7J1A1PAL01M8 16 XSZB112 14, 16, 18, 20, 22 XU9N18PP341D 13 XUC8AKSNL2 7 XS7J1A1PAL2 16 XSZB118 14, 16, 18, 20, 22 XUAH0515 12 XUC8ARCTL2 7 XS7J1A1PBL01M8 16 XSZB130 14, 16, 18, 20, 22 XUAH0515S 12 XUC8ARCTU78 7 XS7J1A1PBL2 16 XSZB165 20 XUAH0525 12 XUC9AKSAL2 7 XS8C1A1MAL01U20 14 XSZBC00 14, 16, 18, 20 XUAH0525S 12 XUC9AKSAM12 7 XS8C1A1MAL2 14 XSZBC10 14, 16, 18 XUAJ0515 12 XUC9ARCTL2 7 The Essential Guide to Sensor Selection 41 2/03 © 2003 Schneider Electric All Rights Reserved catalog number indes Catalog Number Index continued Catalog Number Page(s) Catalog Number Page(s) Catalog Number Page(s) Catalog Number Page(s) XUC9ARCTU78 7 XUK8AKSNL2 11 XUX2ARCNT16R 7 ZCKE61 28 XUCZAKSAM12 7 XUK8AKSNM12 11 XUX5APANM12 7 ZCKE67 28 XUCZARCTU78 7 XUK9APANL2 7 XUX5APANT16 7 ZCKJ1 28 XUDA1NSML2 8 XUK9APANM12 7 XUX5APBNM12 7 ZCKJ5 28 XUDA1NSMM8 8 XUK9APBNL2 7 XUX5APBNT16 7 ZCKJD39 28 XUDA1PSML2 8 XUK9APBNM12 7 XUX5ARCNT16 7 ZCKY11 28 XUDA1PSMM8 8 XUK9ARCNL2 7 XUX9APANM12 7 ZCKY41 28 XUDA2NSML2 8 XUKT1KSML2 10 XUX9APANT16 7 ZCKY59 28 XUDA2NSMM8 8 XUKT1KSMM12 10 XUX9APBNM12 7 ZCMC21L1 26 XUDA2PSML2 8 XUM0AKSAL2T 5 XUX9APBNT16 7 ZCMC21L2 26 XUDA2PSMM8 8 XUM0AKSAM8T 5 XUX9ARCNT16 7 ZCMC21L5 26 XUFN01321 9 XUM0ANSAL2 5 XUZ2001 5, 7 ZCMC25L1 26 XUFN01331 9 XUM0ANSAM8 5 XUZ2003 5, 7 ZCMC25L2 26 XUFN02323 9 XUM0APSAL2 5 XUZA118 4, 6 ZCMC25L5 26 XUFN04331 9 XUM0APSAM8 5 XUZA218 4, 6 ZCMC37L1 26 XUFN05321 9, 11 XUM1APANL2 6 XUZA50 4, 6 ZCMC37L2 26 XUFN05323 9 XUM1APANM8 6 XUZA51 4, 6 ZCMC37L5 26 XUFN05331 9 XUM1APBNL2 6 XUZB2003 4, 6 ZCMC39L1 26 XUFN12301 9, 11 XUM1APBNM8 6 XUZB32 22 ZCMC39L2 26 XUFN12311 9 XUM2AKSNL2T 6 XUZC16 4, 6, 10 ZCMC39L5 26 XUFN2L01L2 9 XUM2AKSNM8T 6 XUZC21 4, 6, 10 ZCMD21 26 XUFN2P01L2 9 XUM2APANL2R 6 XUZC24 4, 6, 10 ZCMD21C12 26 XUFN2S01L2 9 XUM2APANM8R 6 XUZC31 4, 6, 10 ZCMD21M12 26 XUFN2T01L2 9 XUM2APBNL2R 6 XUZC39 4, 6, 10 ZCMD25 26 XUFN35301 9 XUM2APBNM8R 6 XUZC50 4, 6, 10 ZCMD37 26 XUFN35311 9 XUM5APANL2 6 XUZC80 4, 6, 10 ZCMD39 26 XUFN5L01L2 9, 11 XUM5APANM8 6 XUZK2003 4, 6 ZCP21 27 XUFN5L02L2 9, 11 XUM5APBNL2 6 XUZK2004 5, 7 ZCP21M12 27 XUFN5L03L2 9, 11 XUM5APBNM8 6 XUZM2003 4, 6 ZCP25 27 XUFN5P01L2 9 XUM9APANL2 6 XUZM2004 5, 7 ZCP37 27 XUFN5S01L2 9 XUM9APANM8 6 XUZX2000 4, 6 ZCP39 27 XUFN5T01L2 9 XUM9APBNL2 6 XUZX2003 4, 6 ZCPEF12 27 XUFZ01 8 XUM9APBNM8 6 XUZX2004 5, 7 ZCPEG11 27 XUFZ02 8 XUMW1KSNL2 11 XX512A1KAM8 21 ZCPEG13 27 XUFZ04 8 XURC3NPML2 11 XX518A1KAM12 21 ZCPEN12 27 XUFZ11 8 XURC3PPML2 11 XX630A1KAM12 21 ZCPEP16 27 XUFZ210 8 XURC4NPML2 11 XZCC12FDM40V 5, 7 ZCPEP20 27 XUFZ310 8 XURC4PPML2 11 ZCD21 27 ZCT21P16 27 XUFZ920 9 XURK0955D 10 ZCD21M12 27 ZCT25P16 27 XUJK803538 13 XURK1KSMM12 10 ZCD25 27 ZCY15 26 XUK0AKSAL2 5 XURU1KSMM12 11 ZCD37 27 ZCY16 26 XUK0AKSAL2T 5 XURZ01 10 ZCD39 27 ZCY18 26 XUK0AKSAM12 5 XURZ02 10 ZCDEF12 27 ZCY19 27 XUK0AKSAM12T 5 XUVF120M12 12 ZCDEG11 27 ZCY22 27 XUK0ARCTL2 5 XUVF180M12 12 ZCDEG13 27 ZCY25 26 XUK0ARCTL2T 5 XUVF250M12 12 ZCDEN12 27 ZCY26 26 XUK1APANL2 7 XUVH0312 12 ZCDEP16 27 ZCY39 27 XUK1APANM12 7 XUVJ0312 12 ZCDEP20 27 ZCY45 27 XUK1APBNL2 7 XUVK0252S 11 ZCE01 26 ZCY49 27 XUK1APBNM12 7 XUX0AKSAM12 5 ZCE02 26 ZCY55 27 XUK1ARCNL2 7 XUX0AKSAM12T 5 ZCE06 27 ZCY91 27 XUK2AKSNL2T 7 XUX0AKSAT16 5 ZCE07 27 XUK2AKSNM12T 7 XUX0AKSAT16T 5 ZCE08 27 XUK2APANL2R 7 XUX0ARCTT16 5 ZCE10 26 XUK2APANM12R 7 XUX0ARCTT16T 5 ZCE11 26 XUK2APBNL2R 7 XUX1APANM12 7 ZCE21 26 XUK2APBNM12R 7 XUX1APANT16 7 ZCE24 26 XUK2ARCNL2R 7 XUX1APBNM12 7 ZCE27 26 XUK2ARCNL2T 7 XUX1APBNT16 7 ZCEF0 27 XUK5APANL2 7 XUX1ARCNT16 7 ZCEF2 27 XUK5APANM12 7 XUX2APANM12R 7 ZCEH0 27 XUK5APBNL2 7 XUX2APANT16R 7 ZCEH2 27 XUK5APBNM12 7 XUX2APBNM12R 7 ZCK05 28 XUK5ARCNL2 7 XUX2APBNT16R 7 ZCKE05 28 The Essential Guide to Sensor Selection © 2003 Schneider Electric All Rights Reserved 42 2/03 The commitment of Schneider Electric services "A single partner, worldwide presence: globalization for improved simplicity" With over 5,000 sales outlets distributed throughout 130 countries, you are assured that our range of products can be found everywhere. Whatever your local standard requirements, products are immediately at hand that conform perfectly to the standards pertaining to the country in which they will be used. Logistical performance Indispensable products available anywhere in the world, plus express delivery service Advice Service available for selection guidance related to your application. The plus points of the Schneider Electric network Globalization A single name, a global supplier in industrial control, innovative, customer service orientated. … and tailor made with products specifically designed for your profession and specialised application needs. The Essential Guide to Sensor Selection 43 2/03 © 2003 Schneider Electric All Rights Reserved Catalog No. 9006CT0201 February 2003 © 2003 Schneider Electric All Rights Reserved Square D Company 8001 Highway 64 East Knightdale, NC 27545 1-888-SquareD (1-888-778-2733) www.SquareD.com Schneider Canada Inc. 19 Waterman Avenue, M4B 1 Y2 Toronto, Ontario 1-800-565-6699 www.schneiderelectric.ca 19-0175; Rev 7; 1/15 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers EVALUATION KIT AVAILABLE General Description The MAX202E-MAX213E, MAX232E, and MAX241E are a family of RS-232 and V.28 transceivers with high ±15kV ESD HBM protection and integrated charge pump circuitry for single +5V supply operation. The various combinations of features are outlined in the Selector Guide. The drivers and receivers for all ten devices meet all EIA/TIA- 232E and CCITT V.28 specifications at data rates up to 120kbps when loaded. The MAX211E/MAX213E/MAX241E are available in 28- pin SO and SSOP packages. The MAX202E/MAX232E come in 16-pin TSSOP, narrow SO, wide SO, and DIP packages. The MAX203E comes in a 20-pin DIP/SO package, and needs no external charge-pump capacitors. The MAX205E comes in a 24-pin wide DIP package, and also eliminates external charge-pump capacitors. Applications • Battery-Powered Equipment • Hand-Held Equipment • Portable Diagnostics Equipment Benefits and Features • Saves Board Space • Integrated High ±15kV HBM ESD Protection • Integrated Charge Pump Circuitry Eliminates the Need for a Bipolar ±12V Supply Enables Single Supply Operation From +5V Supply • Integrated 0.1µF Capacitors (MAX203E, MAX205E) • 24 pin SSOP Package Saves up to 40% Versus SO Package • Saves Power for Reduced Power Requirements • 1µA Shutdown Mode • 15µA Shutdown Mode for MAX213E Pin Configurations and Typical Operating Circuits appear at end of data sheet. Yes PART NO. OF RS-232 DRIVERS NO. OF RS-232 RECEIVERS RECEIVERS ACTIVE IN SHUTDOWN NO. OF EXTERNAL CAPACITORS (µF) LOW-POWER SHUTDOWN TTL TRISTATE MAX202E 2 2 0 4 (0.1) No No MAX203E 2 2 0 None No No MAX205E 5 5 0 None Yes Yes MAX206E 4 3 0 4 (0.1) Yes Yes MAX207E 5 3 0 4 (0.1) No No MAX208E 4 4 0 4 (0.1) No No MAX211E 4 5 0 4 (0.1) Yes Yes MAX213E 4 5 2 4 (0.1) Yes Yes MAX232E 2 2 0 4 (1) No No MAX241E 4 5 0 4 (1) Yes AutoShutdown and UCSP are trademarks of Maxim Integrated Products, Inc. Ordering Information MAX202ECSE 0°C to +70°C 16 Narrow SO MAX202ECPE 0°C to +70°C PART TEMP RANGE PIN-PACKAGE 16 Plastic DIP Ordering Information continued at end of data sheet. www.maximintegrated.com Maxim Integrated | 2 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Absolute Maximum Ratings VCC..........................................................................-0.3V to +6V V+................................................................(VCC - 0.3V) to +14V V- ............................................................................-14V to +0.3V Input Voltages T_IN ............................................................-0.3V to (V+ + 0.3V) R_IN ...................................................................................±30V Output Voltages T_OUT.................................................(V- - 0.3V) to (V+ + 0.3V) R_OUT......................................................-0.3V to (VCC + 0.3V) Short-Circuit Duration, T_OUT....................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)....842mW 16-Pin Narrow SO (derate 8.70mW/°C above +70°C) .....696mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C) ......762mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C) ...........755mW 20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)...889mW 20-Pin SO (derate 10.00mW/°C above +70°C).............800mW 24-Pin Narrow Plastic DIP (derate 13.33mW/°C above +70°C) ...............................1.07W 24-Pin Wide Plastic DIP (derate 14.29mW/°C above +70°C)................................1.14W 24-Pin SO (derate 11.76mW/°C above +70°C).............941mW 24-Pin SSOP (derate 8.00mW/°C above +70°C) ..........640mW 28-Pin SO (derate 12.50mW/°C above +70°C)....................1W 28-Pin SSOP (derate 9.52mW/°C above +70°C) ..........762mW Operating Temperature Ranges MAX2_ _EC_ _ .....................................................0°C to +70°C MAX2_ _EE_ _...................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +165°C Lead Temperature (soldering, 10s) .................................+300°C Electrical Characteristics (VCC = +5V ±10% for MAX202E/206E/208E/211E/213E/232E/241E; VCC = +5V ±5% for MAX203E/205E/207E; C1–C4 = 0.1µF for MAX202E/206E/207E/208E/211E/213E; C1–C4 = 1µF for MAX232E/241E; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Output-Voltage High VOH R_OUT; IOUT = -1.0mA 3.5 VCC - 0.4 V EN = VCC, EN = 0V, 0V ≤ ROUT ≤ VCC, MAX205E–208E/211E/213E/241E outputs disabled Output Leakage Current ±0.05 ±10 µA R_OUT; IOUT = 3.2mA (MAX202E/203E/232E) or IOUT = 1.6mA (MAX205E/208E/211E/213E/241E) Output-Voltage Low VOL 0.4 V T_IN; EN, SHDN (MAX213E) or EN, SHDN (MAX205E–208E/211E/241E) Input Threshold Low VIL 0.8 V 8 15 Input Pullup Current T_IN = 0V (MAX205E–208E/211E/213E/241E) 15 200 µA PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VCC Supply Current ICC mA 11 20 No load, TA = +25°C 14 20 5 10 MAX211E/213E MAX232E MAX241E 7 15 MAX205E–208E EN, SHDN (MAX213E) or EN, SHDN (MAX205E–208E/211E/241E) 2.4 T_IN V 2.0 Input Threshold High VIH MAX205E/206E 1 10 MAX211E/241E 1 10 Input Leakage Current T_IN = 0V to VCC (MAX202E/203E/232E) ±10 µA MAX202E/203E MAX213E 15 50 DC CHARACTERISTICS LOGIC Shutdown Supply Current TA = +25°C, Figure 1 µA www.maximintegrated.com Maxim Integrated | 3 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Electrical Characteristics (continued) (VCC = +5V ±10% for MAX202E/206E/208E/211E/213E/232E/241E; VCC = +5V ±5% for MAX203E/205E/207E; C1–C4 = 0.1µF for MAX202E/206E/207E/208E/211E/213E; C1–C4 = 1µF for MAX232E/241E; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.) Note 1: MAX211EE_ _ and MAX213EE_ _ tested with VCC = +5V ±5%. MAX205E/206E/211E/213E/241E normal operation, Figure 2 MAX205E/206E/211E/213E/241E normal operation, Figure 2 CL = 150pF RL = 3kΩ to 7kΩ, CL = 50pF to 1000pF, one transmitter switching All drivers loaded with 3kΩ to ground (Note 1) TA = +25°C, VCC = 5V VCC = 5V, no hysteresis in shutdown TA = +25°C, VCC = 5V TA = +25°C, VCC = 5V VCC = V+ = V- = 0V, VOUT = ±2V CONDITIONS Receiver Output Disable Time 200 ns Receiver Output Enable Time 600 ns µs 4 40 tPLHR, tPHLR Receiver Propagation Delay 0.5 10 Maximum Data Rate 120 kbps Output Short-Circuit Current ±10 ±60 mA Output Resistance 300 Ω Input Voltage Range -30 30 V Output Voltage Swing ±5 ±9 V Input Resistance 357 kΩ Input Hysteresis 0.2 0.5 1.0 V Input Threshold Low V 1.7 2.4 V 1.5 2.4 Input Threshold High PARAMETER SYMBOL MIN TYP MAX UNITS All parts, normal operation All parts, normal operation MAX213E (R4, R5), SHDN = 0V, EN = VCC RL = 3kΩ, CL = 2500pF, all transmitters loaded 2 µs tPLHT, tPHLT Transmitter Propagation Delay TA = +25°C, VCC = 5V, RL = 3kΩ to 7kΩ, CL = 50pF to 1000pF, measured from -3V to +3V or +3V to -3V, Figure 3 Transition-Region Slew Rate 3 6 30 V/µs Human Body Model ±15 IEC1000-4-2, Air-Gap Discharge kV ±15 ESD-Protection Voltage IEC1000-4-2, Contact Discharge ±8 All parts, normal operation MAX213E (R4, R5), SHDN = 0V, EN = VCC 0.8 1.2 ESD PERFORMANCE: TRANSMITTER OUTPUTS, RECEIVER INPUTS TIMING CHARACTERISTICS EIA/TIA-232E TRANSMITTER OUTPUTS EIA/TIA-232E RECEIVER INPUTS MAX213E, SHDN = 0V, EN = VCC 0.6 1.5 Note 1: MAX211EE_ _ tested with VCC = +5V ±5%. www.maximintegrated.com Maxim Integrated | 4 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Typical Operating Characteristics 5.0 0 MAX232E TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX202E-TOC1 LOAD CAPACITANCE (pF) VOH, -VOL (V) 5.5 6.0 6.5 7.0 7.5 8.0 1000 2000 3000 4000 5000 VCC = 5.5V ALL TRANSMITTERS LOADED DATA RATE = 120kbps RL = 3kΩ VCC = 4.5V VCC = 5.0V 5.0 0 MAX202E/MAX203E TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX202E-TOC2 LOAD CAPACITANCE (pF) VOH, -VOL (V) 5.5 6.0 6.5 7.0 7.5 8.0 1000 2000 3000 4000 5000 VCC = 5.5V VCC = 4.5V VCC = 5.0V ALL TRANSMITTERS LOADED DATA RATE = 120kbps RL = 3kΩ 5.0 0 MAX241E TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX202E-TOC3 LOAD CAPACITANCE (pF) VOH, -VOL (V) 5.5 6.0 6.5 7.0 7.5 8.0 1000 2000 3000 4000 5000 VCC = 4.5V VCC = 5.5V VCC = 5.0V ALL TRANSMITTERS LOADED DATA RATE = 120kbps RL = 3kΩ 5.0 0 MAX211E/MAX213E TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX202E-TOC4 LOAD CAPACITANCE (pF) VOH, -VOL (V) 5.5 6.0 6.5 7.0 7.5 8.0 1000 2000 3000 4000 5000 VCC = 4.5V VCC = 5.5V VCC = 5.0V ALL TRANSMITTERS LOADED DATA RATE = 120kbps RL = 3kΩ 0 0 MAX211E/MAX213E/MAX241E TRANSMITTER SLEW RATE vs. LOAD CAPACITANCE MAX202E-TOC5 LOAD CAPACITANCE (pF) SLEW RATE ( V/μs) 5 10 15 20 25 30 1000 2000 3000 4000 5000 +SLEW RATE -SLEW RATE ALL TRANSMITTERS LOADED DATA RATE = 120kbps RL = 3kΩ www.maximintegrated.com Maxim Integrated | 5 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Typical Operating Characteristics (continued) 2 0 MAX202E/MAX203E/MAX232E TRANSMITTER SLEW RATE vs. LOAD CAPACITANCE MAX202E-TOC6 LOAD CAPACITANCE (pF) SLEW RATE ( V/μs) 4 6 8 10 12 14 1000 2000 3000 4000 5000 +SLEW RATE -SLEW RATE ALL TRANSMITTERS LOADED DATA RATE = 120kbps RL = 3kΩ 5.0 7.5 -7.5 0 3000 MAX205E–MAX208E TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE -5.0 2.5 MAX202E TOC-07 LOAD CAPACITANCE (pF) OUTPUT VOLTAGE (V) 1000 2000 4000 5000 0 -2.5 VCC = +4.5V, RL = 3kΩ 1 TRANSMITTER AT FULL DATA RATE 4 TRANSMITTERS AT 1/8 DATA RATE 240kbps 240kbps 120kbps 120kbps 20kbps 20kbps 45 50 20 0 3000 MAX205E–MAX208E SUPPLY CURRENT vs. LOAD CAPACITANCE 25 40 MAX202E TOC-09 LOAD CAPACITANCE (pF) SUPPLY CURRENT (mA) 1000 2000 4000 5000 35 30 VCC = +4.5V, RL = 3kΩ 1 TRANSMITTER AT FULL DATA RATE 4 TRANSMITTERS AT 1/8 DATA RATE 240kbps 120kbps 20kbps 10 12 0 0 3000 MAX205E–MAX208E TRANSMITTER SLEW RATE vs. LOAD CAPACITANCE 2 8 MAX202E TOC-08 LOAD CAPACITANCE (pF) SLEW RATE (V/μs) 1000 2000 4000 5000 6 4 20 18 16 14 VCC = +4.5V, RL = 3kΩ 1 TRANSMITTER AT FULL DATA RATE 4 TRANSMITTERS AT 1/8 DATA RATE FALL RISE 2.5 5.0 -10.0 0 180 MAX205E–MAX208E OUTPUT VOLTAGE vs. DATA RATE -7.5 0 MAX202E TOC-10 DATA RATE (kbps) OUTPUT VOLTAGE (V) 30 90 210 60 120 240 150 -2.5 -5.0 10.0 7.5 VCC = +4.5V, RL = 3kΩ 1 TRANSMITTER AT FULL DATA RATE 4 TRANSMITTERS AT 1/8 DATA RATE V+ V- VOUT+ VOUT- www.maximintegrated.com Maxim Integrated | 6 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers MAX203E MAX205E Pin Descriptions MAX202E/MAX232E 15 10, 11 9, 12 8, 13 19 Ground 13, 14 RS-232 Driver Inputs 7, 14 6 4, 5 12, 15 RS-232 Receiver Outputs 10, 17 RS-232 Receiver Inputs 9, 18 RS-232 Driver Outputs 8 -2VCC Voltage Generated by the Charge Pump 2 1, 3 5, 7 Terminals for Negative Charge-Pump Capacitor 3 +2VCC Voltage Generated by the Charge Pump +4.5V to +5.5V Supply-Voltage Input 2, 4 Terminals for Positive Charge-Pump Capacitor 16 20 GND T_IN R_OUT R_IN T_OUT V- C2+, C2- V+ C1+, C1- VCC __ 1, 6, 11, 16 N.C. No Connection—Not Internally Connected NAME FUNCTION PIN DIP/SO/TSSOP LCC 11, 15 12, 15 C2+ Connect pins together. NAME 14 8 V+ +2VCC Voltage Generated by the Charge Pump SO C1- T_IN R_OUT R_IN T_OUT GND VCC C1+ C2- V- 13 FUNCTION 14 1, 2 RS-232 Driver Inputs Make no connection to this pin. 3, 20 RS-232 Receiver Outputs 4, 19 RS-232 Receiver Inputs 1, 2 3, 20 5, 18 RS-232 Transmitter Outputs 6, 9 Ground 7 +4.5V to +5.5V Supply-Voltage Input 13 Make no connection to this pin. 4,19 5,18 6, 9 11, 16 Connect pins together. 10, 17 -2VCC Voltage Generated by the Charge Pump. Connect pins together. 7 8 10, 16 12, 17 DIP PIN NAME FUNCTION T_OUT RS-232 Driver Outputs R_IN RS-232 Receiver Inputs R_OUT TTL/CMOS Receiver Outputs. All receivers are inactive in shutdown. PIN 1–4, 19 5, 10, 13, 18, 24 T_IN TTL/CMOS Driver Inputs. Internal pullups to VCC. GND Ground VCC +4.75V to +5.25V Supply Voltage EN Receiver Enable—Active Low 6, 9, 14, 17, 23 7, 8, 15, 16, 22 11 12 20 21 SHDN Shutdown Control—Active High www.maximintegrated.com Maxim Integrated | 7 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers MAX208E Pin Descriptions (continued) MAX206E MAX207E V+ NAME FUNCTION +2VCC Generated by the Charge Pump T_OUT RS-232 Driver Outputs 11 R_IN RS-232 Receiver Inputs R_OUT TTL/CMOS Receiver Outputs. All receivers are inactive in shutdown. PIN 1, 2, 3, 24 4, 16, 23 T_IN TTL/CMOS Driver Inputs. Internal pullups to VCC. GND Ground VCC +4.5V to +5.5V Supply Voltage C1+, C1- Terminals for Positive Charge-Pump Capacitor 5, 17, 22 6, 7, 18, 19 8 9 10, 12 20 EN Receiver Enable—Active Low C2+, C2- Terminals for Negative Charge-Pump Capacitor V- -2VCC Generated by the Charge Pump 13, 14 15 21 SHDN Shutdown Control—Active High V+ NAME FUNCTION +2VCC Generated by the Charge Pump T_OUT RS-232 Driver Outputs 11 R_IN RS-232 Receiver Inputs R_OUT TTL/CMOS Receiver Outputs. All receivers are inactive in shutdown. PIN 1, 2, 3, 20, 24 4, 16, 23 T_IN TTL/CMOS Driver Inputs. Internal pullups to VCC. GND Ground C2+, C2- VCC +4.75V to +5.25V Supply Voltage Terminals for Negative Charge-Pump Capacitor C1+, C1- Terminals for Positive Charge-Pump Capacitor 5, 17, 22 6, 7, 18, 19, 21 8 V- -2VCC Generated by the Charge Pump 13, 14 15 9 10, 12 V+ NAME FUNCTION +2VCC Generated by the Charge Pump T_OUT RS-232 Driver Outputs 11 R_IN RS-232 Receiver Inputs R_OUT TTL/CMOS Receiver Outputs. All receivers are inactive in shutdown. PIN 1, 2, 20, 24 3, 7, 16, 23 T_IN TTL/CMOS Driver Inputs. Internal pullups to VCC. GND Ground C2+, C2- VCC +4.5V to +5.5V Supply Voltage Terminals for Negative Charge-Pump Capacitor C1+, C1- Terminals for Positive Charge-Pump Capacitor 4, 6, 17, 22 5, 18, 19, 21 8 V- -2VCC Generated by the Charge Pump 13, 14 15 9 10, 12 www.maximintegrated.com Maxim Integrated | 8 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers V+ GND MAX206E MAX211E MAX213E MAX241E 0.1μF* VCC 0.1μF* R1 TO R5 T1 TO T5 0.1μF* C1+ C1- C2+ C2- VCC +5.5V T_OUT R_OUT 400kΩ 5kΩ ISHDN 0V OR +5.5V DRIVE 0.1μF* 0.1μF* 3kΩ +5.5V R_IN T_IN CAPACITORS MAY BE POLARIZED OR UNPOLARIZED ( ) ARE FOR MAX213E * 1μF FOR MAX241E EN (EN) +5.5V (0V) SHDN (SHDN) V- +5.5V Figure 1. Shutdown-Current Test Circuit (MAX206E, MAX211E/MAX213E/MAX241E) +3.5V EN INPUT OUTPUT ENABLE TIME +2.5V RECEIVER OUTPUT CL = 150pF RECEIVER OUTPUTS OUTPUT DISABLE TIME V VOH - 0.1V OH VOL VOL + 0.1V RL = 1kΩ NOTE: POLARITY OF EN IS REVERSED FOR THE MAX213E +0.8V 0V +3V +3V EN INPUT 0V Figure 2. Receiver Output Enable and Disable Timing (MAX205E/MAX206E/MAX211E/MAX213E/MAX241E) 17 NAME FUNCTION V- T_OUT RS-232 Driver Outputs -2VCC Voltage Generated by the Charge Pump R_IN RS-232 Receiver Inputs 24 R_OUT TTL/CMOS Receiver Outputs. For the MAX213E, receivers R4 and R5 are active in shutdown mode when EN = 1. For the MAX211E and MAX241E, all receivers are inactive in shutdown. PIN 1, 2, 3, 28 4, 9, 18, 23, 27 EN T_IN TTL/CMOS Driver Inputs. Only the MAX211E, MAX213E, and MAX241E have internal pullups to VCC. Receiver Enable—Active High (MAX213E) GND Ground 25 VCC +4.5V to +5.5V Supply Voltage SHDN C1+, C1- Terminals for Positive Charge-Pump Capacitor 5, 8, 19, 22, 26 6, 7, 20, 21 10 Shutdown Control—Active Low (MAX213E) V+ +2VCC Voltage Generated by the Charge Pump C2+, C2- Terminals for Negative Charge-Pump Capacitor 11 12, 14 13 15, 16 EN Receiver Enable—Active Low (MAX211E, MAX241E) SHDN Shutdown Control—Active High (MAX211E, MAX241E) Pin Descriptions (continued) MAX211E/MAX213E/MAX241E www.maximintegrated.com Maxim Integrated | 9 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers V+ MAX2_ _E 0.1μF* VCC 0.1μF* T_ R_ 0.1μF* C1+ C1- C2+ C2- VCC T_OUT R_OUT EN (EN) SHDN (SHDN) 400kΩ 5kΩ 0.1μF* 0.1μF* 3kΩ +5V R_IN T_IN MINIMUM SLEW-RATE TEST CIRCUIT 0V (+5V) 0V (+5V) 2500pF V- V+ 0.1μF* VCC 0.1μF* R_ T_ 0.1μF* C1+ C1- C2+ C2- VCC T_OUT R_OUT EN (EN) SHDN (SHDN) 400kΩ 5kΩ 0.1μF* 0.1μF* 7kΩ +5V R_IN T_IN MAXIMUM SLEW-RATE TEST CIRCUIT 0V (+5V) 0V (+5V) 50pF V- ( ) ARE FOR MAX213E * 1μF FOR MAX232E/MAX241E MAX2_ _E TRANSMITTER INPUT PULL-UP RESISTORS, ENABLE, AND SHUTDOWN ARE NOT PROVIDED ON THE MAX202E, MAX203E, AND MAX232E. ENABLE AND SHUTDOWN ARE NOT PROVIDED ON THE MAX207E AND MAX208E. Figure 3. Transition Slew-Rate Circuit Detailed Description The MAX202E–MAX213E, MAX232E/MAX241E consist of three sections: charge-pump voltage converters, drivers (transmitters), and receivers. These E versions provide extra protection against ESD. They survive ±15kV discharges to the RS-232 inputs and outputs, tested using the Human Body Model. When tested according to IEC1000-4-2, they survive ±8kV contactdischarges and ±15kV air-gap discharges. The rugged E versions are intended for use in harsh environments or applications where the RS-232 connection is frequently changed (such as notebook computers). The standard (non-“E”) MAX202, MAX203, MAX205– MAX208, MAX211, MAX213, MAX232, and MAX241 are recommended for applications where cost is critical. +5V to ±10V Dual Charge-Pump Voltage Converter The +5V to ±10V conversion is performed by dual charge-pump voltage converters (Figure 4). The first charge-pump converter uses capacitor C1 to double the +5V into +10V, storing the +10V on the output filter capacitor, C3. The second uses C2 to invert the +10V into -10V, storing the -10V on the V- output filter capacitor, C4. In shutdown mode, V+ is internally connected to VCC by a 1kΩ pull-down resistor, and V- is internally connected to ground by a 1kΩ pull up resistor. RS-232 Drivers With VCC = 5V, the typical driver output voltage swing is ±8V when loaded with a nominal 5kΩ RS-232 receiver. The output swing is guaranteed to meet EIA/TIA- 232E and V.28 specifications that call for ±5V minimum output levels under worst-case conditions. These include a 3kΩ load, minimum VCC, and maximum operating temperature. The open-circuit output voltage swings from (V+ - 0.6V) to V-. Input thresholds are CMOS/TTL compatible. The unused drivers’ inputs on the MAX205E–MAX208E, MAX211E, MAX213E, and MAX241E can be left unconnected because 400kΩ pull up resistors to VCC are included on-chip. Since all drivers invert, the pull up resistors force the unused drivers’ outputs low. The MAX202E, MAX203E, and MAX232E do not have pull up resistors on the transmitter inputs. www.maximintegrated.com Maxim Integrated | 10 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers When in low-power shutdown mode, the MAX205E/ MAX206E/MAX211E/MAX213E/MAX241E driver outputs are turned off and draw only leakage currents—even if they are back-driven with voltages between 0V and 12V. Below -0.5V in shutdown, the transmitter output is diode-clamped to ground with a 1kΩ series impedance. RS-232 Receivers The receivers convert the RS-232 signals to CMOS-logic output levels. The guaranteed 0.8V and 2.4V receiver input thresholds are significantly tighter than the ±3V thresholds required by the EIA/TIA-232E specification. This allows the receiver inputs to respond to TTL/CMOSlogic levels, as well as RS-232 levels. The guaranteed 0.8V input low threshold ensures that receivers shorted to ground have a logic 1 output. The 5kΩ input resistance to ground ensures that a receiver with its input left open will also have a logic 1 output. Receiver inputs have approximately 0.5V hysteresis. This provides clean output transitions, even with slow rise/fall-time signals with moderate amounts of noise and ringing. In shutdown, the MAX213E’s R4 and R5 receivers have no hysteresis. Shutdown and Enable Control (MAX205E/MAX206E/MAX211E/ MAX213E/MAX241E) In shutdown mode, the charge pumps are turned off, V+ is pulled down to VCC, V- is pulled to ground, and the transmitter outputs are disabled. This reduces supply current typically to 1µA (15µA for the MAX213E). The time required to exit shutdown is under 1ms, as shown in Figure 5. Receivers All MAX213E receivers, except R4 and R5, are put into a high-impedance state in shutdown mode (see Tables 1a and 1b). The MAX213E’s R4 and R5 receivers still function in shutdown mode. These two awake-in-shutdown receivers can monitor external activity while maintaining minimal power consumption. The enable control is used to put the receiver outputs into a high-impedance state, to allow wire-OR connection of two EIA/TIA-232E ports (or ports of different types) at the UART. It has no effect on the RS-232 drivers or the charge pumps. Note: The enable control pin is active low for the MAX211E/MAX241E (EN), but is active high for the MAX213E (EN). The shutdown control pin is active high C1- IL- RLV+ S1 V - fCLK S2 S5 S6 C1 C3 C2 IL + RL + S3 S4 S7 S8 C4 C1+ GND GND VCC VCC C2- C2+ PART fCLK (kHz) MAX202E MAX211E/213E MAX232E MAX203E 230 MAX205E–208E 200 200 140 MAX241E 30 230 Figure 4. Charge-Pump Diagram www.maximintegrated.com Maxim Integrated | 11 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers V+ V- 200μs/div 3V 0V 10V 5V 0V -5V -10V SHDN MAX211E Figure 5. MAX211E V+ and V- when Exiting Shutdown (0.1µF capacitors) X = Don't care. *Active = active with reduced performance SHDN EN OPERATION STATUS Tx Rx 0 0 Normal Operation All Active All Active 0 1 Normal Operation All Active All High-Z 1 X Shutdown All High-Z All High-Z Table 1a. MAX205E/MAX206E/MAX211E/ MAX241E Control Pin Configurations Table 1b. MAX213E Control Pin Configurations for the MAX205E/MAX206E/MAX211E/MAX241E (SHDN), but is active low for the MAX213E (SHDN). The MAX213E’s receiver propagation delay is typically 0.5µs in normal operation. In shutdown mode, propagation delay increases to 4µs for both rising and falling transitions. The MAX213E’s receiver inputs have approximately 0.5V hysteresis, except in shutdown, when receivers R4 and R5 have no hysteresis. When entering shutdown with receivers active, R4 and R5 are not valid until 80µs after SHDN is driven low. When coming out of shutdown, all receiver outputs are invalid until the charge pumps reach nominal voltage levels (less than 2ms when using 0.1µF capacitors). ±15kV ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs have extra protection against static electricity. Maxim’s engineers developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, Maxim’s E versions keep working without latchup, whereas competing RS-232 products can latch and must be powered down to remove latchup. ESD protection can be tested in various ways; the transmitter outputs and receiver inputs of this product family are characterized for protection to the following limits: 1) ±15kV using the Human Body Model 2) ±8kV using the contact-discharge method specified in IEC1000-4-2 3) ±15kV using IEC1000-4-2’s air-gap method. ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test set-up, test methodology, and test results. Human Body Model Figure 6a shows the Human Body Model, and Figure 6b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interSHDN EN OPERATION STATUS Tx 1–4 0 0 Shutdown All High-Z 0 1 Shutdown All High-Z 1 0 Normal Operation 1 1 Normal Operation All Active All Active Active 1–3 4, 5 High-Z Active High-Z High-Z High-Z Active* High-Z Rx www.maximintegrated.com Maxim Integrated | 12 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers est, which is then discharged into the test device through a 1.5kΩ resistor. IEC1000-4-2 The IEC1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX202E/MAX203E–MAX213E, MAX232E/MAX241E help you design equipment that meets level 4 (the highest level) of IEC1000-4-2, without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC1000-4-2 is higher peak current in IEC1000-4-2, because series resistance is lower in the IEC1000-4-2 model. Hence, the ESD withstand voltage measured to IEC1000-4-2 is generally lower than that measured using the Human Body Model. Figure 7b shows the current waveform for the 8kV IEC1000-4-2 level-four ESD contact-discharge test. The air-gap test involves approaching the device with a charged probe. The contact-discharge method connects the probe to the device before the probe is energized. Machine Model The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protection during manufacturing, not just RS-232 inputs and CHARGE-CURRENTLIMIT RESISTOR DISCHARGE RESISTANCE STORAGE CAPACITOR Cs 150pF RC 50MΩ to 100MΩ RD 330Ω HIGHVOLTAGE DC SOURCE DEVICE UNDER TEST Figure 7a. IEC1000-4-2 ESD Test Model tr = 0.7ns to 1ns 30ns 60ns t 100% 90% 10% IPEAK I Figure 7b. IEC1000-4-2 ESD Generator Current Waveform CHARGE-CURRENTLIMIT RESISTOR DISCHARGE RESISTANCE STORAGE CAPACITOR Cs 100pF RC 1MΩ RD 1500Ω HIGHVOLTAGE DC SOURCE DEVICE UNDER TEST Figure 6a. Human Body ESD Test Model IP 100% 90% 36.8% tRL TIME tDL CURRENT WAVEFORM PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) Ir 10% 0 0 AMPERES Figure 6b. Human Body Model Current Waveform www.maximintegrated.com Maxim Integrated | 13 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers outputs. Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports. Applications Information Capacitor Selection The capacitor type used for C1–C4 is not critical for proper operation. The MAX202E, MAX206–MAX208E, MAX211E, and MAX213E require 0.1µF capacitors, and the MAX232E and MAX241E require 1µF capacitors, although in all cases capacitors up to 10µF can be used without harm. Ceramic, aluminum-electrolytic, or tantalum capacitors are suggested for the 1µF capacitors, and ceramic dielectrics are suggested for the 0.1µF capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2x) nominal value. The capacitors’ effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V-. Use larger capacitors (up to 10µF) to reduce the output impedance at V+ and V-. This can be useful when “stealing” power from V+ or from V-. The MAX203E and MAX205E have internal charge-pump capacitors. Bypass VCC to ground with at least 0.1µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1–C4). V+ and V- as Power Supplies A small amount of power can be drawn from V+ and V-, although this will reduce both driver output swing and noise margins. Increasing the value of the charge-pump capacitors (up to 10µF) helps maintain performance when power is drawn from V+ or V-. Driving Multiple Receivers Each transmitter is designed to drive a single receiver. Transmitters can be paralleled to drive multiple receivers. Driver Outputs when Exiting Shutdown The driver outputs display no ringing or undesirable transients as they come out of shutdown. High Data Rates These transceivers maintain the RS-232 ±5.0V minimum driver output voltages at data rates of over 120kbps. For data rates above 120kbps, refer to the Transmitter Output Voltage vs. Load Capacitance graphs in the Typical Operating Characteristics. Communication at these high rates is easier if the capacitive loads on the transmitters are small; i.e., short cables are best. Table 2. Summary of EIA/TIA-232E, V.28 Specifications PARAMETER CONDITIONS EIA/TIA-232E, V.28 SPECIFICATIONS 0 Level 3kΩ to 7kΩ load +5V to +15V Data Rate 3kΩ ≤ RL ≤ 7kΩ, CL ≤ 2500pF Up to 20kbps +3V to +15V Instantaneous Slew Rate, Max 3kΩ ≤ RL ≤ 7kΩ, CL ≤ 2500pF 30V/µs Driver Output Short-Circuit Current, Max 100mA Transition Rate on Driver Output V.28 1ms or 3% of the period Driver Output Resistance -2V < VOUT < +2V 300Ω EIA/TIA-232E 4% of the period Driver Output Level, Max No load ±25V Driver Output Voltage 3kΩ to 7kΩ load -5V to -15V 0 Level 1 Level 1 Level Receiver Input Level ±25V Receiver Input Voltage -3V to -15V www.maximintegrated.com Maxim Integrated | 14 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Pin Configurations and Typical Operating Circuits (continued) TOP VIEW 1 4 5 TTL/CMOS INPUTS TTL/CMOS OUTPUTS 11 10 12 9 3 GND C1- C2+ 5kΩ 5kΩ C2- T1IN T2IN R2OUT R1OUT VCC +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER 16 2 6 14 7 13 8 0.1μF 0.1μF* 16V 0.1μF* 6.3V 0.1μF* 16V 0.1μF* 6.3V C1+ RS-232 OUTPUTS RS-232 INPUTS -10V +10V V+ +5V INPUT V- T1OUT R1IN R2IN T2OUT T1 15 T2 R1 R2 PIN NUMBERS ON TYPICAL OPERATING CIRCUIT REFER TO DIP/SO/TSSOP PACKAGE, NOT LCC. * 1.0μF CAPACITORS, MAX232E ONLY. 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 VCC GND T1OUT C2+ R1IN C1- V+ C1+ MAX202E MAX232E R1OUT T1IN T2IN R2IN R2OUT T2OUT V- C2- DIP/SO/TSSOP Table 3. DB9 Cable Connections Commonly Used for EIA/TIA-232E and V.24 Asynchronous Interfaces PIN CONNECTION 2 Receive Data (RD) Data from DCE 3 Transmit Data (TD) Data from DTE 4 Data Terminal Ready Handshake from DTE 5 Signal Ground Reference point for signals 6 Data Set Ready (DSR) Handshake from DCE 7 Request to Send (RTS) Handshake from DTE 8 Clear to Send (CTS) Handshake from DCE 9 Ring Indicator Handshake from DCE 1 Received Line Signal Detector (sometimes called Carrier Detect, DCD) Handshake from DCE www.maximintegrated.com Maxim Integrated | 15 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Pin Configurations and Typical Operating Circuits (continued) 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 R2OUT R2IN T2OUT R1IN VR1OUT T1IN T2IN C2- C2+ V+ (C1-) C1+ (V+) C1- (C1+) VCC GND T1OUT 12 11 9 10 V- (C2+) C2- (V-) C2+ (C2-) GND DIP/SO MAX203E TOP VIEW TTL/CMOS INPUTS TTL/CMOS OUTPUTS 2 1 3 20 GND GND 400kΩ 5kΩ 5kΩ T1IN T2IN R2OUT R1OUT VCC 7 5 18 4 19 0.1μF RS-232 OUTPUTS RS-232 INPUTS +5V 400kΩ +5V +5V INPUT T1OUT R1IN R2IN T2OUT T1 6 9 T2 R1 R2 V- V- C1- C1+ 8(13) 13(14) 12(10) 17 14(8) DO NOT MAKE CONNECTION TO THESE PINS INTERNAL -10V POWER SUPPLY INTERNAL +10V POWER SUPPLY V+ C2- C2- C2+ C2+ 11 15 16 10 (11) PIN NUMBERS IN () ARE FOR SO PACKAGE. (12) www.maximintegrated.com Maxim Integrated | 16 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Pin Configurations and Typical Operating Circuits (continued) T4OUT T3OUT T1OUT T2OUT R2IN R2OUT T2IN T1IN R1OUT R1IN GND VCC DIP TOP VIEW MAX205E 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 R3IN R3OUT T5IN SHDN EN T5OUT R4IN R4OUT T4IN T3IN R5OUT R5IN VCC TTL/CMOS INPUTS GND SHDN +5V INPUT +5V T2OUT 400kΩ T2IN T2 4 +5V T3OUT 400kΩ T3IN T3 2 +5V T4OUT 400kΩ T4IN T4 1 +5V T5OUT 400kΩ T5IN T5 19 5kΩ R1 R1OUT R1IN 5kΩ R2 R2OUT R2IN 5kΩ R3 R3OUT R3IN 8 7 15 16 22 9 6 23 10 5 24 5kΩ 17 18 R4OUT R4IN 5kΩ R5 14 13 R5OUT R5IN 20 EN 21 11 12 TTL/CMOS OUTPUTS +5V T1OUT 400kΩ T1IN T1 3 RS-232 OUTPUTS RS-232 INPUTS R4 0.1μF www.maximintegrated.com Maxim Integrated | 17 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Pin Configurations and Typical Operating Circuits (continued) T3OUT T1OUT T2OUT R1IN R1OUT T2IN T1IN GND VCC C1+ V+ C1- DIP/SO/SSOP TOP VIEW MAX206E 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 T4OUT R2IN R2OUT SHDN EN T4IN T3IN R3OUT R3IN V- C2- C2+ VCC TTL/CMOS INPUTS GND SHDN +5V INPUT +5V T1OUT 400kΩ T1IN T1 2 +5V T2OUT 400kΩ T2IN T2 3 +5V T3OUT 400kΩ T3IN T3 1 +5V T4OUT 400kΩ T4IN T4 24 5kΩ R1 R1OUT R1IN 5kΩ R2 R2OUT R2IN 5kΩ R3 R3OUT R3IN 7 6 18 19 5 22 17 4 23 16 20 EN 21 8 9 TTL/CMOS OUTPUTS RS-232 OUTPUTS RS-232 INPUTS 0.1μF V+ 0.1μF 6.3V 0.1μF 16V C1+ C1- 0.1μF 6.3V 0.1μF 16V V- 10 12 13 14 C2+ C2- 11 15 +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER www.maximintegrated.com Maxim Integrated | 18 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Pin Configurations and Typical Operating Circuits (continued) T3OUT T1OUT T2OUT R1IN R1OUT T2IN T1IN GND VCC C1+ V+ C1- DIP/SO/SSOP TOP VIEW MAX207E 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 T4OUT R2IN R2OUT T5IN T5OUT T4IN T3IN R3OUT R3IN V- C2- C2+ VCC TTL/CMOS INPUTS GND +5V INPUT +5V T2OUT 400kΩ T2IN T2 +5V T1OUT 400kΩ T1IN T1 3 +5V T3OUT 400kΩ T3IN T3 1 +5V T4OUT 400kΩ T4IN T4 24 +5V T5OUT 400kΩ T5IN T5 20 5kΩ R1 R1OUT R1IN 5kΩ R2 R2OUT R2IN 5kΩ R3 R3OUT R3IN 7 6 18 19 21 5 22 17 4 23 16 8 9 TTL/CMOS OUTPUTS RS-232 OUTPUTS RS-232 INPUTS 0.1μF V+ 0.1μF 6.3V 0.1μF 16V C1+ C1- 0.1μF 6.3V 0.1μF 16V V- 10 12 13 14 C2+ C2- 11 15 +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER 2 www.maximintegrated.com Maxim Integrated | 19 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Pin Configurations and Typical Operating Circuits (continued) T2OUT T1OUT R2IN R2OUT T1IN R1OUT R1IN GND VCC C1+ V+ C1- DIP/SO/SSOP TOP VIEW MAX208E 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 T3OUT R3IN R3OUT T4IN T4OUT T3IN T2IN R4OUT R4IN V- C2- C2+ VCC TTL/CMOS INPUTS GND +5V INPUT +5V T1OUT 400kΩ T1IN T1 2 +5V T2OUT 400kΩ T2IN T2 1 +5V T3OUT 400kΩ T3IN T3 24 +5V T4OUT 400kΩ T4IN T4 20 5kΩ R1 R1OUT R1IN 5kΩ R2 R2OUT R2IN 5kΩ 5kΩ R3 R3OUT R3IN 5 18 19 21 6 4 22 7 3 23 8 9 TTL/CMOS OUTPUTS RS-232 OUTPUTS RS-232 INPUTS R4 17 16 R4OUT R4IN 0.1μF V+ 0.1μF 6.3V 0.1μF 16V C1+ C1- 0.1μF 6.3V 0.1μF 16V V- 10 12 13 14 C2+ C2- 11 15 +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER Ω www.maximintegrated.com Maxim Integrated | 20 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Pin Configurations and Typical Operating Circuits (continued) T3OUT T1OUT T2OUT R2IN R2OUT T2IN T1IN R1OUT R1IN GND VCC C1+ V+ C1- SO/SSOP TOP VIEW MAX211E MAX213E MAX241E 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 T4OUT R3IN R3OUT SHDN (SHDN) EN (EN) R4IN R4OUT T4IN T3IN R5OUT R5IN V- C2- C2+ V+ 0.1μF* 6.3V VCC 0.1μF 0.1μF* 16V C1+ C1- 0.1μF* 6.3V 0.1μF* 16V TTL/CMOS INPUTS GND SHDN (SHDN) V- 12 14 15 16 +5V INPUT C2+ C2- 13 17 +5V T1OUT 400kΩ T1IN T1 2 +5V T2OUT 400kΩ T2IN T2 3 +5V T3OUT 400kΩ T3IN T3 1 +5V T4OUT 400kΩ T4IN T4 28 5kΩ R1 R1OUT R1IN 5kΩ R2 R2OUT R2IN 5kΩ R3 R3OUT R3IN 7 6 20 21 8 5 26 9 4 27 5kΩ 22 23 R4OUT R4IN 5kΩ R5 19 18 R5OUT R5IN 24 EN (EN) 25 10 +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER 11 ( ) ARE FOR MAX213E ONLY * 1.0μF CAPACITORS, MAX241E ONLY TTL/CMOS OUTPUTS RS-232 OUTPUTS RS-232 INPUTS R4 www.maximintegrated.com Maxim Integrated | 21 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers Ordering Information (continued) *Dice are specified at TA = +25°C. MAX241EEAI -40°C to +85°C 28 SSOP 28 SO PART TEMP RANGE PIN-PACKAGE MAX213ECWI 0°C to +70°C MAX213ECAI 0°C to +70°C 28 SSOP MAX241EEWI -40°C to +85°C 28 SO MAX232ECWE 0°C to +70°C 16 Wide SO MAX232EC/D 0°C to +70°C Dice* MAX232EESE -40°C to +85°C 16 Narrow SO MAX241ECAI 0°C to +70°C 28 SSOP MAX241ECWI 0°C to +70°C 28 SO MAX232EEWE -40°C to +85°C 16 Wide SO MAX232EEPE -40°C to +85°C 16 Plastic DIP MAX213EEAI -40°C to +85°C 28 SSOP MAX232ECSE 0°C to +70°C 16 Narrow SO MAX232ECPE 0°C to +70°C 16 Plastic DIP MAX213EEWI -40°C to +85°C 28 SO MAX202ECWE 0°C to +70°C 16 Wide SO MAX202EEPE -40°C to +85°C 16 Plastic DIP MAX202EESE -40°C to +85°C 16 Narrow SO MAX202EEWE -40°C to +85°C 16 Wide SO MAX202EC/D 0°C to +70°C Dice* MAX203EEPP -40°C to +85°C 20 Plastic DIP MAX205ECPG 0°C to +70°C 24 Wide Plastic DIP MAX205EEPG -40°C to +85°C 24 Wide Plastic DIP MAX206ECNG 0°C to +70°C 24 Narrow Plastic DIP MAX203EEWP -40°C to +85°C 20 SO MAX203ECWP 0°C to +70°C 20 SO MAX203ECPP 0°C to +70°C 20 Plastic DIP MAX206ECWG 0°C to +70°C 24 SO PART TEMP RANGE PIN-PACKAGE MAX206ECAG 0°C to +70°C 24 SSOP MAX206EENG -40°C to +85°C 24 Narrow Plastic DIP MAX206EEWG -40°C to +85°C 24 SO MAX206EEAG -40°C to +85°C 24 SSOP MAX207ECNG 0°C to +70°C 24 Narrow Plastic DIP MAX207ECWG 0°C to +70°C 24 SO MAX207ECAG 0°C to +70°C 24 SSOP MAX207EENG -40°C to +85°C 24 Narrow Plastic DIP MAX207EEWG -40°C to +85°C 24 SO MAX207EEAG -40°C to +85°C 24 SSOP MAX208ECNG 0°C to +70°C 24 Narrow Plastic DIP MAX211ECWI 0°C to +70°C 28 SO MAX211ECAI 0°C to +70°C 28 SSOP MAX208EEAG -40°C to +85°C 24 SSOP MAX208EEWG -40°C to +85°C 24 SO MAX208ECWG 0°C to +70°C 24 SO MAX208ECAG 0°C to +70°C 24 SSOP MAX208EENG -40°C to +85°C 24 Narrow Plastic DIP MAX211EEWI -40°C to +85°C 28 SO MAX211EEAI -40°C to +85°C 28 SSOP MAX202ECUE 0°C to +70°C 16 TSSOP MAX202EEUE -40°C to +85°C 16 TSSOP www.maximintegrated.com Maxim Integrated | 22 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers PDIPN.EPS PROPRIETARY INFORMATION 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the www.maximintegrated.com Maxim Integrated | 23 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers SSOP.EPS PACKAGE OUTLINE, SSOP, 5.3 MM 1 1 21-0056 C APPROVAL DOCUMENT CONTROL NO. REV. PROPRIETARY INFORMATION TITLE: NOTES: 1. D&E DO NOT INCLUDE MOLD FLASH. 2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006"). 3. CONTROLLING DIMENSION: MILLIMETERS. 4. MEETS JEDEC MO150. 5. LEADS TO BE COPLANAR WITHIN 0.10 MM. H 7.90 L 0∞ 0.301 0.025 8∞ 0.311 0.037 0∞ 7.65 0.63 8∞ 0.95 MAX 5.38 MILLIMETERS B C D E e A1 DIM A SEE VARIATIONS 0.0256 BSC 0.010 0.004 0.205 0.002 0.015 0.008 0.212 0.008 INCHES MIN MAX 0.078 0.65 BSC 0.25 0.09 5.20 0.05 0.38 0.20 0.21 MIN 1.73 1.99 MILLIMETERS 6.07 6.07 10.07 8.07 7.07 INCHES D D D D D 0.239 0.239 0.397 0.317 0.278 MIN 0.249 0.249 0.407 0.328 0.289 MAX MIN 6.33 6.33 10.33 8.33 7.33 14L 16L 28L 24L 20L MAX N A D e A1 L C E H N 2 1 B 0.068 Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the www.maximintegrated.com Maxim Integrated | 24 MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers SOICW.EPS PACKAGE OUTLINE, .300" SOIC 1 1 21-0042 B APPROVAL DOCUMENT CONTROL NO. REV. PROPRIETARY INFORMATION TITLE: TOP VIEW FRONT VIEW MAX 0.012 0.104 0.019 0.299 0.013 INCHES 0.291 0.009 E C DIM 0.014 0.004 B A1 MIN A 0.093 0.23 7.40 7.60 0.32 MILLIMETERS 0.10 0.35 2.35 MIN 0.49 0.30 MAX 2.65 L 0.016 0.050 0.40 1.27 D 0.496 0.512 D DIM MIN D INCHES MAX 12.60 13.00 MILLIMETERS MIN MAX 20 AC 0.447 0.463 AB 11.35 18 11.75 0.398 0.413 AA 10.10 16 10.50 N MS013 SIDE VIEW H 0.419 0.394 10.00 10.65 e 0.050 1.27 D 0.614 0.598 15.20 24 15.60 AD D 0.713 0.697 17.70 28 18.10 AE E H N D A1 e B A 0∞-8∞ C L 1 VARIATIONS: Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2015 Maxim Integrated Products, Inc. | 25 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. MAX202E–MAX213E, MAX232E/MAX241E ±15kV ESD-Protected, 5V RS-232 Transceivers TSSOP4.40mm.EPS Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the AVAILABLE EVALUATION KIT AVAILABLE Functional Diagrams Pin Configurations appear at end of data sheet. Functional Diagrams continued at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters _______________General Description The MAX756/MAX757 are CMOS step-up DC-DC switching regulators for small, low input voltage or battery-powered systems. The MAX756 accepts a positive input voltage down to 0.7V and converts it to a higher pinselectable output voltage of 3.3V or 5V. The MAX757 is an adjustable version that accepts an input voltage down to 0.7V and generates a higher adjustable output voltage in the range from 2.7V to 5.5V. Typical full-load efficiencies for the MAX756/MAX757 are greater than 87%. The MAX756/MAX757 provide three improvements over previous devices. Physical size is reduced—the high switching frequencies (up to 0.5MHz) made possible by MOSFET power transistors allow for tiny (<5mm diameter) surface-mount magnetics. Efficiency is improved to 87% (10% better than with low-voltage regulators fabricated in bipolar technology). Supply current is reduced to 60µA by CMOS construction and a unique constant-off-time pulse-frequency modulation control scheme. ________________________Applications 3.3V to 5V Step-Up Conversion Palmtop Computers Portable Data-Collection Equipment Personal Data Communicators/Computers Medical Instrumentation 2-Cell & 3-Cell Battery-Operated Equipment Glucose Meters ____________________________Features ♦ Operates Down to 0.7V Input Supply Voltage ♦ 87% Efficiency at 200mA ♦ 60µA Quiescent Current ♦ 20µA Shutdown Mode with Active Reference and LBI Detector ♦ 500kHz Maximum Switching Frequency ♦ ±1.5% Reference Tolerance Over Temperature ♦ Low-Battery Detector (LBI/LBO) ♦ 8-Pin DIP and SO Packages ______________Ordering Information * Dice are tested at TA = +25°C only. 1 2 3 4 8 7 6 5 LX GND OUT LBO LBI REF 3/5 SHDN MAX756 DIP/SO TOP VIEW 1 2 3 4 8 7 6 5 LX GND OUT LBO LBI REF FB SHDN MAX757 DIP/SO _________________Pin Configurations MAX756 SHDN 1 3/5 2 REF 3 LBI 5 LX 7 150μF GND OUT 6 INPUT 2V to VOUT 1N5817 OUTPUT 5V at 200mA or 3.3V at 300mA 100μF LBO 4 8 0.1μF 22μH LOW-BATTERY DETECTOR OUTPUT __________Typical Operating Circuit PART TEMP. RANGE PIN-PACKAGE MAX756CPA 0°C to +70°C 8 Plastic DIP MAX756CSA 0°C to +70°C 8 SO MAX756C/D 0°C to +70°C Dice* MAX756EPA -40°C to +85°C 8 Plastic DIP MAX756ESA -40°C to +85°C 8 SO MAX757CPA 0°C to +70°C 8 Plastic DIP MAX757CSA 0°C to +70°C 8 SO MAX757C/D 0°C to +70°C Dice* MAX757EPA -40°C to +85°C 8 Plastic DIP MAX757ESA -40°C to +85°C 8 SO 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters 19-0113; Rev. 2; 1/95 _______________General Description The MAX756/MAX757 are CMOS step-up DC-DC switching regulators for small, low input voltage or battery-powered systems. The MAX756 accepts a positive input voltage down to 0.7V and converts it to a higher pinselectable output voltage of 3.3V or 5V. The MAX757 is an adjustable version that accepts an input voltage down to 0.7V and generates a higher adjustable output voltage in the range from 2.7V to 5.5V. Typical full-load efficiencies for the MAX756/MAX757 are greater than 87%. The MAX756/MAX757 provide three improvements over previous devices. Physical size is reduced—the high switching frequencies (up to 0.5MHz) made possible by MOSFET power transistors allow for tiny (<5mm diameter) surface-mount magnetics. Efficiency is improved to 87% (10% better than with low-voltage regulators fabricated in bipolar technology). Supply current is reduced to 60µA by CMOS construction and a unique constant-off-time pulse-frequency modulation control scheme. ________________________Applications 3.3V to 5V Step-Up Conversion Palmtop Computers Portable Data-Collection Equipment Personal Data Communicators/Computers Medical Instrumentation 2-Cell & 3-Cell Battery-Operated Equipment Glucose Meters ____________________________Features ♦ Operates Down to 0.7V Input Supply Voltage ♦ 87% Efficiency at 200mA ♦ 60µA Quiescent Current ♦ 20µA Shutdown Mode with Active Reference and LBI Detector ♦ 500kHz Maximum Switching Frequency ♦ ±1.5% Reference Tolerance Over Temperature ♦ Low-Battery Detector (LBI/LBO) ♦ 8-Pin DIP and SO Packages ______________Ordering Information * Dice are tested at TA = +25°C only. MAX756/MAX757 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters Supply Voltage (OUT to GND) ....................................-0.3V, +7V Switch Voltage (LX to GND) ........................................-0.3V, +7V Auxiliary Pin Voltages (SHDN, LBI, LBO, REF, 3/5, FB to GND) ........................................-0.3V, (VOUT + 0.3V) Reference Current (IREF) ....................................................2.5mA Continuous Power Dissipation (TA = +70°C) Plastic DIP (derate 9.09mW/°C above +70°C) .............727mW SO (derate 5.88mW/°C above +70°C)..........................471mW Operating Temperature Ranges: MAX75_C_ _ ........................................................0°C to +70°C MAX75_E_ _......................................................-40°C to +85°C Junction Temperature......................................................+150°C Storage Temperature Range............................... -65°to +160°C Lead Temperature (soldering, 10sec) ........................... +300°C ELECTRICAL CHARACTERISTICS (Circuits of Figure 1 and Typical Operating Circuit, VIN = 2.5V, ILOAD = 0mA, TA = TMIN to TMAX, unless otherwise noted.) Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ABSOLUTE MAXIMUM RATINGS Note 1: Supply current from the 3.3V output is measured with an ammeter between the 3.3V output and OUT pin. This current correlates directly with actual battery supply current, but is reduced in value according to the step-up ratio and efficiency. Note 2: Minimum value is production tested. Maximum value is guaranteed by design and is not production tested. LBO Output Leakage Current SHDN, 3/5, FB, LBI Input Current Output Voltage Range MAX757, ILOAD = 0mA (Note 2) 2.7 5.5 V FB Voltage MAX757 1.22 1.25 1.28 V ±100 nA LBI = 1.25V, FB = 1.25V, SHDN = 0V or 3V, 3/5 = 0V or 3V SHDN, 3/5 Input Voltage High 1.6 V SHDN, 3/5 Input Voltage Low 0.4 V Shutdown Quiescent Current (Note 1) Battery Quiescent Current Measured at VIN in Figure 1 LBI Input Threshold With falling edge 1.22 1.25 1.28 V LBI Input Hysteresis 25 mV LBO Output Voltage Low ISINK = 2mA 0.4 V LBO = 5V 1 µA 20 40 µA SHDN = 0V, LBI = 1.25V, 3/5 = 3V, VOUT = 3.47V, FB = 1.3V (MAX757 only) µA Quiescent Supply Current in 3.3V Mode (Note 1) MAX757, VOUT = 5V, 0mA < ILOAD < 200mA MAX756, 3/5 = 0V, 0mA < ILOAD < 200mA MAX756, 3/5 = 3V, 0mA < ILOAD < 300mA Reference-Voltage Regulation 3/5 = 3V, -20µA < REF load < 250µA, CREF = 0.22µF 0.8 2.0 % No REF load, CREF = 0.1µF 1.23 1.25 1.27 V 60 ILOAD = 0mA, 3/5 = 3V, LBI = 1.25V, VOUT = 3.47V, FB = 1.3V (MAX757 only) µA V Output set for 3.3V 60 Minimum Start-Up Supply Voltage ILOAD = 10mA 1.1 1.8 4.8 5.0 5.2 2V < VIN < 3V Reference Voltage 3.17 3.30 3.43 V 4.8 5.0 5.2 Output Voltage PARAMETER CONDITIONS MIN TYP MAX UNITS ILOAD = 20mA 0.7 V Minimum Operating Supply Voltage (once started) MAX756/MAX757 2 Maxim Integrated 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters MINIMUM START-UP INPUT VOLTAGE vs. LOAD CURRENT MAX756-7 LOAD CURRENT (mA) START-UP INPUT VOLTAGE (V) 1 10 100 1000 1.8 1.6 1.4 1.2 1.0 0.8 3.3V MODE 40 0.1 10 1000 EFFICIENCY vs. LOAD CURRENT 3.3V OUTPUT MODE MAX756-1 LOAD CURRENT (mA) EFFICIENCY (%) 60 80 90 50 70 1 100 VIN = 2.0V VIN = 1.2V 40 0.1 10 1000 EFFICIENCY vs. LOAD CURRENT 5V OUTPUT MODE MAX756-2 LOAD CURRENT (mA) EFFICIENCY (%) 60 80 90 50 70 1 100 VIN = 3.3V VIN = 2.5V VIN = 1.25V 800 0 0 2 MAXIMUM OUTPUT CURRENT vs. INPUT VOLTAGE 200 600 MAX756-3 INPUT VOLTAGE (V) MAXIMUM OUTPUT CURRENT (mA) 4 400 100 300 500 700 1 3 5 3.3V MODE 5V MODE 1M 10 10μ 10m 1 SWITCHING FREQUENCY vs. LOAD CURRENT 100 MAX756-4 LOAD CURRENT (A) SWITCHING FREQUENCY (Hz) 1k 10k 100k 100μ 1m 100m 5V MODE 3.3V MODE VIN = 2.5V 0 2 QUIESCENT CURRENT vs. INPUT VOLTAGE MAX756-5 INPUT VOLTAGE (V) QUIESCENT CURRENT (μA) 4 100 200 300 400 500 1 3 5 VOUT = 3.3V VOUT = 5V CURRENT MEASURED AT VIN 50 0 1 2 5 SHUTDOWN QUIESCENT CURRENT vs. INPUT VOLTAGE 20 MAX756-6 INPUT VOLTAGE (V) SHUTDOWN QUIESCENT CURRENT (μA) 4 40 10 30 3 CURRENT MEASURED AT VIN 10 0 0 REFERENCE VOLTAGE LOAD REGULATION 2 8 MAX756-8 LOAD CURRENT (μA) VREF LOAD REGULATION (mV) 6 4 50 100 150 200 250 VOUT = 3.3V __________________________________________Typical Operating Characteristics (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) MAX756/MAX757 Maxim Integrated 3 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters ______________________________________________________________Pin Description NAME FUNCTION 1 SHDN 2 3/5 Selects the main output voltage setting; 5V when low, 3.3V when high. – FB 3 REF 4 LBO 5 LBI 6 OUT 7 GND Power Ground. Must be low impedance; solder directly to ground plane. 8 LX 1A, 0.5Ω N-Channel Power MOSFET Drain 1 – 2 3 4 5 6 7 8 PIN MAX756 MAX757 Shutdown Input disables SMPS when low, but the voltage reference and low-battery comparator remain active. Feedback Input for adjustable output operation. Connect to an external voltage divider between OUT and GND. 1.25V Reference Voltage Output. Bypass with 0.22µF to GND (0.1µF if there is no external reference load). Maximum load capability is 250µA source, 20µA sink. Low-Battery Output. An open-drain N-channel MOSFET sinks current when the voltage at LBI drops below +1.25V. Low-Battery Input. When the voltage on LBI drops below +1.25V, LBO sinks current. Connect to VIN if not used. Connect OUT to the regulator output. It provides bootstrapped power to both devices, and also senses the output voltage for the MAX756. OUTPUT VOLTAGE 50mV/div VIN = 2.5V HORIZONTAL = 50μs/div 5V Mode LOAD-TRANSIENT RESPONSE OUTPUT CURRENT 0mA to 200mA _____________________________Typical Operating Characteristics (continued) (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) VSHDN 2V/div VIN = 2.5V HORIZONTAL = 5ms/div 5V Mode START-UP DELAY VOUT 2V/div 3V 0V 5V 0V MAX756/MAX757 4 Maxim Integrated 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters _______________Detailed Description Operating Principle The MAX756/MAX757 combine a switch-mode regulator with an N-channel MOSFET, precision voltage reference, and power-fail detector in a single monolithic device. The MOSFET is a “sense-FET” type for best efficiency, and has a very low gate threshold voltage to ensure start-up under low-battery voltage conditions (1.1V typ). Pulse-Frequency Modulation Control Scheme A unique minimum off time, current-limited, pulse-frequency modulation (PFM) control scheme is a key feature of the MAX756/MAX757. This PFM scheme combines the advantages of pulse-width modulation (PWM) (high output power and efficiency) with those of a traditional PFM pulse-skipper (ultra-low quiescent currents). There is no oscillator; at heavy loads, switching is accomplished through a constant peak-current limit in the switch, which allows the inductor current to self-oscillate between this peak limit and some lesser value. At light loads, switching frequency is governed by a pair of one-shots, which set a minimum off-time (1µs) and a maximum on-time (4µs). The switching frequency depends on the load and the input voltage, and can range as high as 500kHz. The peak switch current of the internal MOSFET power switch is fixed at 1A ±0.2A. The switch's on resistance is typically 0.5Ω, resulting in a switch voltage drop (VSW) of about 500mV under high output loads. The value of VSW decreases with light current loads. Conventional PWM converters generate constant-frequency switching noise, whereas this architecture produces variable-frequency switching noise. However, the noise does not exceed the switch current limit times the filter-capacitor equivalent series resistance (ESR), unlike conventional pulse-skippers. Voltage Reference The precision voltage reference is suitable for driving external loads such as an analog-to-digital converter. It has guaranteed 250µA source-current and 20µA sink-current capability. The reference is kept alive even in shutdown mode. If the reference drives an external load, bypass it with 0.22µF to GND. If the reference is unloaded, bypass it with at least 0.1µF. Control-Logic Inputs The control inputs (3/5, SHDN) are high-impedance MOS gates protected against ESD damage by normally reverse-biased clamp diodes. If these inputs are driven from signal sources that exceed the main supply voltage, the diode current should be limited by a series resistor (1MΩ suggested). The logic input threshold level is the same (approximately 1V) in both 3.3V and 5V modes. Do not leave the control inputs floating. __________________Design Procedure Output Voltage Selection The MAX756 output voltage can be selected to 3.3V or 5V under logic control, or it can be left in one mode or the other by tying 3/5 to GND or OUT. Efficiency varies depending upon the battery and the load, and is typically better than 80% over a 2mA to 200mA load range. The device is internally bootstrapped, with power derived from the output voltage (via OUT). When the output is set at 5V instead of 3.3V, the higher internal supply voltage results in lower switch-transistor on resistance and slightly greater output power. Bootstrapping allows the battery voltage to sag to less than 1V once the system is started. Therefore, the battery voltage range is from VOUT + VD to less than 1V (where VD is the forward drop of the Schottky rectifier). If the battery voltage exceeds the programmed output voltage, the output will follow the battery voltage. In many systems this is acceptable; however, the output voltage must not be forced above 7V. The output voltage of the MAX757 is set by two resistors, R1 and R2 (Figure 1), which form a voltage divider between the output and the FB pin. The output voltage is set by the equation: VOUT = (VREF) [(R2 + R1) / R2] where VREF = 1.25V. To simplify resistor selection: R1 = (R2) [(VOUT / VREF) - 1] Since the input bias current at FB has a maximum value of 100nA, large values (10kΩ to 200kΩ) can be used for R1 and R2 with no significant loss of accuracy. For 1% error, the current through R1 should be at least 100 times FB’s bias current. Low-Battery Detection The MAX756/MAX757 contain on-chip circuitry for lowbattery detection. If the voltage at LBI falls below the regulator’s internal reference voltage (1.25V), LBO (an opendrain output) sinks current to GND. The low-battery monitor's threshold is set by two resistors, R3 and R4 (Figure 1), which forms a voltage divider between the input voltage and the LBI pin. The threshold voltage is set by R3 and R4 using the following equation: R3 = [(VIN / VREF) - 1] (R4) MAX756/MAX757 Maxim Integrated 5 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters where VIN is the desired threshold of the low-battery detector, R3 and R4 are the input divider resistors at LBI, and VREF is the internal 1.25V reference. Since the LBI current is less than 100nA, large resistor values (typically 10kΩ to 200kΩ) can be used for R3 and R4 to minimize loading of the input supply. When the voltage at LBI is below the internal threshold, LBO sinks current to GND. A pull-up resistor of 10kΩ or more connected from LBO to VOUT can be used when driving CMOS circuits. Any pull-up resistor connected to LBO should not be returned to a voltage source greater than VOUT. When LBI is above the threshold, the LBO output is off. The low-battery comparator and reference voltage remain active when the MAX756/MAX757 is in shutdown mode. If the low-battery comparator is not used, connect LBI to VIN and leave LBO open. Inductor Selection The inductors should have a saturation (incremental) current rating equal to or greater than the peak switchcurrent limit, which is 1.2A worst-case. However, it’s generally acceptable to bias the inductor into saturation by 20%, although this will reduce the efficiency. The 22µH inductor shown in the typical applications circuit is sufficient for most MAX756/MAX757 application circuits. Higher input voltages increase the energy transferred with each cycle, due to the reduced input/output differential. Minimize excess ripple due to increased energy transfer by reducing the inductor value (10µH suggested). The inductor’s DC resistance significantly affects efficiency. For highest efficiency, limit L1’s DC resistance to 0.03Ω or less. See Table 1 for a list of suggested inductor suppliers. Table 1. Component Suppliers AVX USA: (207) 282-5111, FAX (207) 283-1941 (800) 282-9975 CoilCraft USA: (708) 639-6400, FAX (708) 639-1969 Coiltronics USA: (407) 241-7876, FAX (407) 241-9339 Collmer Semiconductor USA: (214) 233-1589 Motorola USA: (602) 244-3576, FAX (602) 244-4015 Nichicon USA: (708) 843-7500, FAX (708) 843-2798 Japan: +81-7-5231-8461, FAX (+81-) 7-5256-4158 Nihon USA: (805) 867-2555, FAX (805) 867-2556 Japan: +81-3-3494-7411, FAX (+81-) 3-3494-7414 Sanyo OS-CON USA: (619) 661-6835 Japan: +81-720-70-1005, FAX (+81-720-) 70-1174 Sprague USA: (603) 224-1961, FAX (603) 224-1430 Sumida USA: (708) 956-0666 Japan: +81-3-3607-5111, FAX (+81-3-) 3607-5428 United Chemi-Con USA: (708) 696-2000, FAX (708) 640-6311 Capacitor Selection A 100µF, 10V surface-mount (SMT) tantalum capacitor typically provides 50mV output ripple when stepping up from 2V to 5V at 200mA. Smaller capacitors, down to 10µF, are acceptable for light loads or in applications that can tolerate higher output ripple. MAX757 REF 3 LX 7 C1 150μF GND OUT 6 VIN D1 1N5817 VOUT LBO 4 8 C3 0.1μF L1 22μH LBI 5 C2 100μF SHDN 1 FB 2 R1 R2 R3 R4 Figure 1. Standard Application Circuit PRODUCTION METHOD INDUCTORS CAPACITORS Surface-Mount AVX TPS series Sprague 595D series Miniature Through-Hole Sumida RCH654-220 Low-Cost Through-Hole Sumida CD54-220 (22µH) CoilCraft DT3316-223 Coiltronics CTX20-1 Sanyo OS-CON OS-CON series low-ESR organic semiconductor CoilCraft PCH-27-223 Nichicon PL series low-ESR electrolyic United Chemi-Con LXF series MAX756/MAX757 6 Maxim Integrated 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters N N MAX756 GND VOUT VIN Q TRIG ONE-SHOT MINIMUM OFF-TIME ONE-SHOT Q F/F S R MAXIMUM ON-TIME ONE-SHOT TRIG Q ONE-SHOT LX OUT REFERENCE REF LBI LBO 3/5 SHDN Figure 2. MAX756 Block Diagram The ESR of both bypass and filter capacitors affects efficiency. Best performance is obtained by using specialized low-ESR capacitors, or connecting two or more filter capacitors in parallel. The smallest low-ESR SMT tantalum capacitors currently available are Sprague 595D series, which are about half the size of competing products. Sanyo OS-CON organic semiconductor through-hole capacitors also exhibit very low ESR, and are especially useful for operation at cold temperatures. Table 1 lists suggested capacitor suppliers. Rectifier Diode For optimum performance, a switching Schottky diode, such as the 1N5817, is recommended. 1N5817 equivalent diodes are also available in surface-mount packages from Collmer Semiconductor in Dallas, TX, phone (214) 233-1589. The part numbers are SE014 or SE024. For low output power applications, a pn junction switching diode, such as the 1N4148, will also work well, although efficiency will suffer due to the greater forward voltage drop of the pn junction diode. MAX756/MAX757 Maxim Integrated 7 3.3V/5V/Adjustable-Output Step-Up DC-DC Converters 3.3V/5V/Adjustable-Output, GND GND LBI OUT 3/5 (MAX756) FB (MAX757) REF SHDN LX LBO 0.122" (3.10mm) 0.080" (2.03mm) ___________________Chip Topography ________________________________________________________Package Information L DIM A A1 B C D E e H h L α MIN 0.053 0.004 0.014 0.007 0.189 0.150 0.228 0.010 0.016 0° MAX 0.069 0.010 0.019 0.010 0.197 0.157 0.244 0.020 0.050 8° MIN 1.35 0.10 0.35 0.19 4.80 3.80 5.80 0.25 0.40 0° MAX 1.75 0.25 0.49 0.25 5.00 4.00 6.20 0.50 1.27 8° INCHES MILLIMETERS α 8-PIN PLASTIC SMALL-OUTLINE PACKAGE E H D e A A1 C h x 45˚ 0.127mm 0.004in. B 0.050 BSC 1.27 BSC 21-325A PC Layout and Grounding The MAX756/MAX757 high peak currents and high-frequency operation make PC layout important for minimizing ground bounce and noise. The distance between the MAX756/MAX757’s GND pin and the ground leads of C1 and C2 in Figure 1 must be kept to less than 0.2" (5mm). All connections to the FB and LX pins should also be kept as short as possible. To obtain maximum output power and efficiency and minimum output ripple voltage, use a ground plane and solder the MAX756/MAX757 GND (pin 7) directly to the ground plane. TRANSISTOR COUNT: 758 SUBSTRATE CONNECTED TO OUT MAX756/MAX757 8 Maxim Integrated 3.3V/5V/Adjustable-Output, Step-Up DC-DC Converters MAX756/MAX757 Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 9 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. ©   Maxim Integrated The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc. General Description MAX200-MAX209, MAX211, and MAX213 are a family of RS-232 and V.28 transceivers with integrated charge pump circuitry for single +5V supply operation. The drivers maintain the ±5V EIA/TIA-232E output signal levels at data rates in excess of 120kbps when loaded in accordance with the EIA/TIA-232E specification. The MAX211 and MAX213 are available in a 28-pin, wide small-outline (SO) package and a 28-pin shrink smalloutline (SSOP) package, which occupies only 40% of the area of the SO. The MAX207 is available in a 24-pin SO package and a 24-pin SSOP. The MAX203 and MAX205 use no external components and are recommended for applications with limited circuit board space. Benefits and Features ● Saves Board Space • Integrated Charge Pump Circuitry Eliminates the Need for a Bipolar ±12V Supply Enables Single Supply Operation From Either +5V or 9V to +12V • Integrated 0.1μF Capacitors (MAX203, MAX205) • 24 pin SSOP Package Saves Up to 40% Versus SO Package ● Saves Power for Longer Battery Operation • 5μW Shutdown Mode (MAX200, MAX205, MAX206, MAX211) • 75μW Ring Indicator Monitoring with Two Active Receivers (MAX213) Applications ● Battery-Powered Equipment ● Handheld Equipment ● Portable Diagnostics Equipment Selector Guide continued at end of data sheet. 19-0065; Rev 8; 1/15 PART POWER-SUPPLY VOLTAGE (V) NUMBER OF RS-232 DRIVERS NUMBER OF RS-232 RECEIVERS NUMBER OF RECEIVERS ACTIVE IN SHUTDOWN NUMBER OF EXTERNAL CAPACITORS (0.1μF) LOW-POWER SHUTDOWN/TTL THREE-STATE MAX200 +5 5 0 0 4 Yes/No MAX201 +5 and +9.0 to +13.2 2 2 0 2 No/No MAX202 +5 2 2 0 4 No/No MAX203 +5 2 2 0 None No/No MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors +5V INPUT +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER GND C1+ C1- C2+ C2- 0.1µF 7 9 8 0.1µF +6.3V 0.1µF +16V 0.1µF +16V 0.1µF +6.3V V+ V- 10 11 12 18 N.C. SHDN TTL/CMOS INPUTS RS-232 OUTPUTS 17 6 13 MAX200 T1OUT +5V T1IN 400kΩ 5 2 T1 T2OUT +5V 400kΩ 4 T2IN 3 T2 T3OUT +5V 400kΩ 14 T3IN 1 T3 T4OUT +5V 400kΩ 15 T4IN 20 T4 T5OUT +5V 400kΩ 19 T5IN 16 T5 VCC Selector Guide Typical Operating Circuit VCC..........................................................................-0.3V to +6V V+..............................................................(VCC - 0.3V) to +14V V- ...........................................................................+0.3V to -14V Input Voltages TIN ........................................................-0.3V to (VCC + 0.3V) RIN...................................................................................±30V Output Voltages TOUT................................................(V+ + 0.3V) to (V- - 0.3V) ROUT ....................................................-0.3V to (VCC + 0.3V) Short-Circuit Duration TOUT......................................................................Continuous Continuous Power Dissipation (TA = +70°C) 14-Pin Plastic DIP (derate 10.00mW/°C above +70°C)...800mW 16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)...842mW 16-Pin SO (derate 8.70mW/°C above +70°C).............696mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C) ...762mW 16-Pin CERDIP (derate 10.00mW/°C above +70°C).....800mW 20-Pin Plastic DIP (derate 11.11mW/°C above +70°C) ...889mW 20-Pin Wide SO (derate 10.00mW/°C above +70°C) ..800mW 20-Pin CERDIP (derate 11.11mW/°C above +70°C)...889mW 24-Pin Narrow Plastic DIP (derate 13.33mW/°C above +70°C).......................1067mW 24-Pin Wide Plastic DIP (derate 9.09mW/°C above +70°C) ...........................727mW 24-Pin Wide SO (derate 11.76mW/°C above +70°C)..941mW 24-Pin SSOP (derate 8.00mW/°C above +70°C)........640mW 24-Pin CERDIP (derate 12.50mW/°C above +70°C) ...1000mW 28-Pin Wide SO (derate 12.50mW/°C above +70°C) ..1000mW 28-Pin SSOP (derate 9.52mW/°C above +70°C)........762mW Operating Temperature Ranges MAX2_ _C_ _ .....................................................0°C to +70°C MAX2_ _E_ _ ................................................. -40°C to +85°C MAX2_ _ M_ _.............................................. -55°C to +125°C Storage Temperature Range............................ -65°C to +160°C Lead Temperature (soldering, 10s) (Note 1)...................+300°C (MAX202/MAX204/MAX206/MAX208/MAX211/MAX213: VCC = +5V ±10%; MAX200/MAX203/MAX205/MAX207: VCC = +5V ±5%, C1–C4 = 0.1µF; MAX201/MAX209: VCC = +5V ±10%, V+ = +9.0V to +13.2V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS Output-Voltage Swing All transmitter outputs loaded with 3kΩ to ground ±5 ±8 V VCC Power-Supply Current No load, TA = +25°C MAX202, MAX203 8 15 mA MAX200, MAX204–MAX208, MAX211, MAX213 11 20 MAX201, MAX209 0.4 1 V+ Power-Supply Current No load MAX201 5 10 mA MAX209 7 15 Shutdown Supply Current Figure 1, TA = +25°C MAX200, MAX205, MAX206, MAX211 1 10 µA MAX213 15 50 Input Logic Threshold Low TIN, EN, SHDN, EN, SHDN 0.8 V Input Logic Threshold High TIN 2.0 V EN, SHDN, EN, SHDN 2.4 Logic Pullup Current TIN = 0V 15 200 µA RS-232 Input-Voltage Operating Range -30 +30 V MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 2 Note 1: Maximum reflow temperature for the MAX203 and MAX205 is +225°C. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (MAX202/MAX204/MAX206/MAX208/MAX211/MAX213: VCC = +5V ±10%; MAX200/MAX203/MAX205/MAX207: VCC = +5V ±5%, C1–C4 = 0.1µF; MAX201/MAX209: VCC = +5V ±10%, V+ = +9.0V to +13.2V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS Receiver Input Threshold Low VCC = +5V, TA = +25°C Active mode 0.8 1.2 V Shutdown mode, MAX213, R4, R5 0.6 1.5 Receiver Input Threshold High VCC = +5V, TA = +25°C Active mode 1.7 2.4 V Shutdown mode, MAX213, R4, R5 1.5 2.4 RS-232 Input Hysteresis VCC = +5V, no hysteresis in shutdown 0.2 0.5 1.0 V RS-232 Input Resistance VCC = +5V, TA = +25°C 3 5 7 kΩ TTL/CMOS Output-Voltage Low IOUT = 3.2mA MAX201, MAX202, MAX203 0.4 V IOUT = 1.6mA All others TTL/CMOS Output-Voltage High IOUT = 1.0mA 3.5 V TTL/CMOS Output Leakage Current EN = VCC, EN = 0V, 0 ≤ ROUT ≤ VCC 0.05 ±10 µA Output Enable Time Figure 2 MAX205, MAX206, MAX209, MAX211, MAX213 600 ns Output Disable Time Figure 2 MAX205, MAX206, MAX209, MAX211, MAX213 200 ns Receiver Propagation Delay SHDN = 0V, R4, R5 MAX213 4 40 SHDN = VCC 0.5 10 µs MAX200–MAX211 0.5 10 Transmitter Output Resistance VCC = V+ = V- = 0V, VOUT = ±2V 300 Ω Transition Region Slew Rate CL = 50pF to 2500pF, RL = 3kΩ to 7kΩ, VCC = 5V, TA = +25°C measured from +3V to -3V or -3V to +3V MAX200, MAX202–MAX211, MAX213 3 5.5 30 V/µs MAX201 4 30 RS-232 Output ShortCircuit Current ±10 ±60 mA Maximum Data Rate RL = 3kΩ to 7kΩ, CL = 50pF to 1000pF, one transmitter 120 kbps MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 3 Electrical Characteristics (continued) MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 4 MAX200/204/205/206/207/208/211/213 TRANSMITTER SKEW RATE vs. LOAD CAPACITANCE MAX200-MAX213 toc02 LOAD CAPACITANCE (pF) Tx SLEW RATE (V/µs) 1000 2000 3000 4000 4 6 8 10 12 14 16 18 20 22 2 0 5000 -SLEW RATE +SLEW RATE VCC = +5V ALL Tx OUTPUTS LOADED 3kΩIICL TA = +25°C LOAD CAPACITANCE (pF) 0 1000 2000 3000 4000 5000 MAX209 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX200-MAX213 toc03 Tx OUTPUT VOLTAGE (IVI) 8.6 8.8 9.0 9.2 9.4 9.6 9.8 10.0 8.4 VCC = +5V ALL Tx OUTPUTS LOADED 3kΩIICL TA = +25°C V+ = 12V 20kbps 60kbps 116kbps MAX201 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX200-MAX213 toc04 LOAD CAPACITANCE (pF) 0 1000 2000 3000 4000 5000 Tx OUTPUT VOLTAGE (IVI) 7.5 8.0 8.5 9.0 9.5 10.0 7.0 VCC = +5V ALL Tx OUTPUTS LOADED 3kΩIICL TA = +25°C V+ = 12V 20kbps 60kbps 112kbps Tx SLEW RATE (V/µs) 5 10 15 20 25 0 LOAD CAPACITANCE (pF) 0 1000 2000 3000 4000 5000 MAX201/MAX209 TRANSMITTER SLEW RATE vs. LOAD CAPACITANCE MAX200-MAX213 toc05 -SLEW RATE +SLEW RATE MAX209 MAX201 VCC = +5V ALL Tx OUTPUTS LOADED 3kΩIICL TA = +25°C V+ = 12V MAX202/203 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX200-MAX213 toc06 LOAD CAPACITANCE (pF) 0 1000 2000 3000 4000 5000 Tx OUTPUT VOLTAGE (V) -5.0 -2.5 0 2.5 5.0 7.5 -7.0 20kbps 120kbps 120kbps VCC = +4.5V, TA = +25°C BOTH Tx OUTPUTS, LOADED 3kΩIICL ONE TRANSMITTER AT FULL DATA RATE ONE TRANSMITTER AT 1/8 DATA RATE 20kbps 240kbps 240kbps MAX200/204/205/206/207/208/211/213 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX200-MAX213 toc01 LOAD CAPACITANCE (pF) Tx OUTPUT VOLTAGE (IVI) 1000 2000 3000 4000 5.2 5.4 5.6 5.8 6.0 6.2 6.4 6.6 6.8 7.0 5.0 0 5000 20kbps 116kbps 60kbps VCC = +5V ALL Tx OUTPUTS LOADED 3kΩIICL TA = +25°C Tx SLEW RATE (V/µs) 2 4 6 8 10 12 14 0 MAX202/203 TRANSMITTER SLEW RATE vs. LOAD CAPACITANCE MAX200-MAX213 toc07 LOAD CAPACITANCE (pF) 0 1000 2000 3000 4000 5000 VCC = +4.5V, TA = +25°C BOTH Tx OUTPUTS, LOADED 3kΩIICL ONE TRANSMITTER AT FULL DATA RATE ONE TRANSMITTER AT 1/8 DATA RATE -SLEW RATE +SLEW RATE 240kbps 20kbps 120kbps 240kbps 20kbps 120kbps SUPPLY CURRENT (mA) 15 20 25 30 35 10 MAX202/203 SUPPLY CURRENT vs. LOAD CAPACITANCE MAX200-MAX213 toc08 LOAD CAPACITANCE (pF) 0 1000 2000 3000 4000 5000 VCC = +4.5V, TA = +25°C, BOTH Tx OUTPUTS, LOADED 3kΩIICL ONE TRANSMITTER AT FULL DATA RATE ONE TRANSMITTER AT 1/8 DATA RATE 240kbps 20kbps 120kbps Typical Operating Characteristics Detailed Description The MAX200–MAX209/MAX211/MAX213 consist of three sections: charge-pump voltage converters, drivers (transmitters), and receivers. Each section is described in detail. +5V to ±10V Dual Charge-Pump Voltage Converter The +5V to ±10V conversion is performed by two chargepump voltage converters (Figure 4). The first uses capacitor C1 to double +5V to +10V, storing +10V on the V+ output filter capacitor, C3. The second chargepump voltage converter uses capacitor C2 to invert +10V to -10V, storing -10V on the V- output filter capacitor, C4. The MAX201 and MAX209 include only the V+ to Vcharge pump, and are intended for applications that have a VCC = +5V supply and a V+ supply in the +9V to +13.2V range. In shutdown mode, V+ is internally connected to VCC by a 1kΩ pulldown resistor and V- is internally connected to ground by a 1kΩ pullup resistor. RS-232 Drivers When VCC = +5V, the typical driver output-voltage swing is ±8V when loaded with a nominal 5kΩ RS-232 receiver. The output swing is guaranteed to meet the EIA/TIA-232E and V.28 specifications, which call for ±5V minimum output levels under worst-case conditions. These include a minimum 3kΩ load, VCC = +4.5V, and the maximum operating temperature. The open-circuit output-voltage swing ranges from (V+ - 0.6V) to V-. Input thresholds are both CMOS and TTL compatible. The inputs of unused drivers can be left unconnected since 400kΩ pullup resistors to VCC are included onchip. Since all drivers invert, the pullup resistors force the outputs of unused drivers low. The input pullup resistors typically source 15μA; therefore, the driver inputs should be driven high or open circuited to minimize power-supply current in shutdown mode. When in low-power shutdown mode, the driver outputs are turned off and their leakage current is less than 1mA, even if the transmitter output is backdriven between 0V and (VCC + 6V). Below -0.5V, the transmitter output is diode clamped to ground with a 1kΩ series impedance. The transmitter output is also zener clamped to approximately (VCC + 6V), with a 1kΩ series impedance. Figure 1. Shutdown Current Test Circuit Figure 2. Receiver Output Enable and Disable Timing MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 5 ISHDN +5.5V +5.5V +5.5V (0) +5.5V 0V OR +5.5V DRIVE 0.1µF 0.1µF 0.1µF 0.1µF C1+ C1- C2+ C2- 400kΩ 3kΩ 5kΩ GND VCC V+ V- TIN +5.5V T1 T0 T5 R1 T0 R5 TOUT RIN 0.1µF SHDN ROUT (SHDN) EN (EN) MAX200 MAX205 MAX206 MAX211 MAX213 NOTE 1: ( ) ARE FOR MAX213. NOTE 2: CAPACITORS CAN BE POLARIZED OR UNPOLARIZED. +3.5V RECEIVER OUTPUT CL = 150pF +0.8V VOH - 0.1V + 2.5V VOH VOL RL = 1kΩ VOL + 0.1V OUTPUT ENABLE TIME RECEIVER OUTPUTS +3V EN 0V INPUT OUTPUT ENABLE TIME +3V 0V EN INPUT NOTE: POLARITY OF EN IS REVERSED FOR THE MAX213. RS-232 Receivers The receivers convert RS-232 signals to CMOS logic output levels. Receiver outputs are inverting, maintaining compatibility with driver outputs. The guaranteed receiver input thresholds of +0.8V and +2.4V are significantly tighter than the ±3.0V threshold required by the EIA/TIA- 232E specification. This allows receiver inputs to respond to TTL/CMOS logic levels and improves noise margin for RS-232 levels. The MAX200–MAX209/MAX211/MAX213 guaranteed +0.8V threshold (+0.6V in shutdown for the MAX213) ensures that receivers shorted to ground have a logic 1 output. Also, the 5kΩ input resistance to ground ensures that a receiver with its input left open also has a logic 1 output. Receiver inputs have approximately +0.5V hysteresis. This provides clean output transitions, even with slow rise and fall time input signals with moderate amounts of noise and ringing. In shutdown, the MAX213 receivers R4 and R5 have no hysteresis. Figure 3. Transition Slew-Rate Test Circuit Figure 4. Dual Charge-Pump Diagram MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 6 +5V 0V (+5V) 0V (+5V) 0.1µF 0.1µF 0.1µF C1+ C1- C2+ C2- 400kΩ 3kΩ 2500pF 5kΩ VCC V+ V- TIN +5V T1 T0 T5 R1 T0 R5 TOUT RIN 0.1µF ROUT SHDN (SHDN) EN (EN) MAX200-MAX209 MAX211 MAX213 +5V 0V (+5V) MAXIMUM SLEW-RATE TEST CIRCUIT MINIMUM SLEW-RATE TEST CIRCUIT NOTE: ( ) ARE FOR MAX213. 0V (+5V) 0.1µF 0.1µF 0.1µF C1+ C1- C2+ C2- 400kΩ 7kΩ 50pF 5kΩ VCC V+ V- TIN +5V T1 T0 T5 R1 T0 R5 TOUT RIN 0.1µF ROUT SHDN (SHDN) EN (EN) MAX200-MAX209 MAX211 MAX213 0.1µF 0.1µF V+ V+ S1 C1+ S2 S5 C2+ S6 IL+ C3 C2 C4 GND RLVS7 S8 VCC GND IL- RL+ C2- C1 VCC 200kHz S3 S4 C1- GND Shutdown and Enable Control In shutdown mode, the MAX200/MAX205/MAX206/ MAX211/MAX213 charge pumps are turned off, V+ is pulled down to VCC, V- is pulled to ground, and the transmitter outputs are disabled. This reduces supply current typically to 1μA (15μA for the MAX213). The time required to exit shutdown is 1ms, as shown in Figure 5. All receivers except R4 and R5 on the MAX213 are put into a high-impedance state in shutdown mode. The MAX213’s R4 and R5 receivers still function in shutdown mode. These two receivers are useful for monitoring external activity while maintaining minimal power consumption. The enable control is used to put the receiver outputs into a high-impedance state, so that the receivers can be connected directly to a three-state bus. It has no effect on the RS-232 drivers or on the charge pumps. MAX213 Receiver Operation in Shutdown During normal operation, the MAX213’s receiver propagation delay is typically 1µs. When entering shutdown with receivers active, R4 and R5 are not valid until 80µs after SHDN is driven low. In shutdown mode, propagation delays increase to 4µs for a high-to-low or a low-to-high transition. When exiting shutdown, all receiver outputs are invalid until the charge pumps reach nominal values (< 2ms when using 0.1µF capacitors). Table 1a. MAX200 Control Pin Configurations *Active = active with reduced performance. Table 1b. MAX205/MAX206/MAX211 Control Pin Configurations Table 1c. MAX213 Control Pin Configurations Figure 5. Transmitter Outputs When Exiting Shutdown SHDN OPERATION STATUS TRANSMITTERS T1–T5 0 Normal Operation All Active 1 Shutdown All High-Z SHDN EN OPERATION STATUS TRANSMITTERS T1–T5 RECEIVERS R1–R5 0 0 Normal Operation All Active All Active 0 1 Normal Operation All Active All High-Z 1 0 Shutdown All High-Z All High-Z SHDN EN OPERATION STATUS TRANSMITTERS T1–T4 RECEIVERS R1, R2, R3 R4, R5 0 0 Shutdown All High-Z High-Z High-Z 0 1 Shutdown All High-Z High-Z Active* 1 0 Normal Operation All Active High-Z High-Z 1 1 Normal Operation All Active Active Active MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 7 TWO TRANSMITTER OUTPUTS: ONE HIGH, ONE LOW SHDN* THREE TRANSMITTERS LOADED WITH 3kΩ||2500pF. *SHUTDOWN POLARITY REVERSED FOR MAX213. SHUTDOWN TRANSMITTERS ON Applications Information Capacitor Selection The type of capacitor used is not critical for proper operation. Ceramic capacitors are suggested. To ensure proper RS-232 signal levels over temperature when using 0.1µF capacitors, make sure the capacitance value does not degrade excessively as the temperature varies. If in doubt, use capacitors with a larger nominal value. Also observe the capacitors’ ESR value over temperature, since it influences the amount of ripple on V+ and V-. To reduce the output impedance at V+ and V-, use larger capacitors (up to 10µF). If polarized capacitors are used, obey the polarities shown in Figure 1 and the pin configurations. Driving Multiple Receivers Each transmitter is designed to drive a single receiver. Transmitters can be paralleled to drive multiple receivers. Driver Outputs When Exiting Shutdown Figure 5 shows two driver outputs exiting shutdown. As they become active, the two driver outputs go to opposite RS-232 levels (one driver input is high, the other is low). Each driver is loaded with 3kΩ in parallel with 2500pF. The driver outputs display no ringing or undesirable transients as they come out of shutdown. Power-Supply Decoupling In applications that are sensitive to power-supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitors. V+ and V- as Power Supplies A small amount of power can be drawn from V+ and V-, although this reduces noise margins. Power Supplies for MAX201/MAX209 If at power-up the V+ supply rises after the VCC supply, place a diode (e.g., 1N914) in series with the V+ supply. Table 2. Summary of EIA/TIA-232E, V.28 Specifications Table 3. DB9 Cable Connections Commonly Used for EIA/TIA-232E and V.24 Asynchronous Interfaces PARAMETER CONDITION EIA/TIA-232E, V.28 SPECIFICATION Driver Output Voltage: 0 Level 3kΩ to 7kΩ load +5.0V to +15V Driver Output Voltage: 1 Level 3kΩ to 7kΩ load -5.0V to -15V Output Level, Maximum No load ±25V Data Rate 3kΩ ≤ RL ≤ 7kΩ, CL ≤ 2500pF Up to 20kbps Receiver Input Voltage: 0 Level — +3.0V to +15V Receiver Input Voltage: 1 Level — -3.0V to -15V Input Level, Maximum — ±25V Instantaneous Slew Rate, Maximum 3kΩ ≤ RL ≤ 7kΩ, CL ≤ 2500pF 30V/µs Driver Output Short-Circuit Current, Maximum — 100mA Transition Rate on Driver Output V.28 1ms or 3% of the period EIA/TIA-232E 4% of the period Driver Output Resistance -2V < VOUT < +2V 300Ω PIN NAME CONNECTION 1 Received Line Signal Detector, sometimes called Carrier Detect (DCD) Handshake from DCE 2 Receive Data (RD) Data from DCE 3 Transmit Data (TD) Data from DTE 4 Data Terminal Ready Handshake from DTE 5 Signal Ground Reference point for signals 6 Data Set Ready (DSR) Handshake from DCE 7 Request to Send (RTS) Handshake from DTE 8 Clear to Send (CTS) Handshake from DCE 9 Ring Indicator Handshake from DCE MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 8 MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 9 DIP/SO 20 19 18 17 16 15 14 1 2 3 4 5 6 7 T4OUT +5V INPUT +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER GND C1+ C1- C2+ C2- 0.1µF 7 9 8 0.1µF +6.3V 0.1µF +16V 0.1µF +16V 0.1µF +6.3V V+ V- 10 11 12 18 N.C. SHDN TTL/CMOS INPUTS RS-232 OUTPUTS 17 6 13 T5IN N.C. T2IN SHND T2OUT T1OUT T3OUT MAX200 MAX200 T5OUT T4IN VCC T3IN GND C1+ 8 13 VV+ 9 12 C2- C1- 10 11 C2+ T1IN T1OUT +5V T1IN 400kΩ 5 2 T1 T2OUT +5V 400kΩ 4 T2IN 3 T2 T3OUT +5V 400kΩ 14 T3IN 1 T3 T4OUT +5V 400kΩ 15 T4IN 20 T4 T5OUT +5V 400kΩ 19 T5IN 16 T5 VCC TOP VIEW MAX200 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 10 +5V INPUT +9V TO +12V +12V TO -12V VOLTAGE CONVERTER GND C+ C- 13 (15) 14 (16) 1 0.1µF +16V C2 0.1µF +16V V+ V- T1OUT R2IN T2OUT 2 +5V +5V 5kΩ 5kΩ T1IN 400kΩ 400kΩ T2IN R2OUT (10) 8 7 6 (11) 9 R1OUT TTL/CMOS INPUTS TTL/CMOS OUTPUTS RS-232 OUTPUTS RS-232 INPUTS 12 (14) 5 R1IN 10 (12) 4 11 (13) 3 T1 T2 R1 R2 14 13 12 11 10 9 8 1 2 3 4 5 6 7 V+ VCC GND T2OUT T1OUT V- C- C+ MAX201 MAX201 R1IN R1OUT T2IN T1IN R2OUT R2IN DIP 16 15 14 13 12 11 9 1 2 3 4 5 6 8 V+ VCC GND T2OUT T1OUT V- C- C+ MAX201 R1IN R1OUT N.C. N.C. R2OUT T2IN 7 10 T1IN R2IN SO VCC TOP VIEW 0.1µF NOTE: PIN NUMBERS IN ( ) ARE FOR SO PACKAGE MAX201 Pin Configurations/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 11 TOP VIEW +5V INPUT +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER GND C1+ C1- 0.1µF 0.1µF +6.3V 16 2 1 0.1µF +6.3V 0.1µF +16V +10V -10V V+ V- T1OUT R2IN T2OUT 3 +5V +5V 5kΩ 5kΩ T1IN 400kΩ 400kΩ T2IN R2OUT 11 10 9 12 R1OUT TTL/CMOS INPUTS TTL/CMOS OUTPUTS RS-232 OUTPUTS RS-232 INPUTS 15 8 R1IN 13 7 14 6 C2+ C2- 4 0.1µF +16V 5 T1 T2 R1 R2 16 15 14 13 12 11 9 1 2 3 4 5 6 8 VCC GND T1OUT C2+ R1IN C1- V+ C1+ MAX202 R1OUT T1IN R2IN R2OUT V- T2OUT 7 10 T2IN C2- DIP/SO/WIDE SO VCC MAX202 MAX202 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 12 TOP VIEW +5V INPUT GND GND T1OUT R2IN T2OUT +5V +5V 5kΩ 5kΩ T1IN 400kΩ 400kΩ T2IN R2OUT C1+ C2+ C2+ C2- C2- 6 9 7 C1- V- V- V+ 2 1 20 DO NOT MAKE 8 (13) CONNECTION TO THESE PINS INTERNAL -10V POWER SUPPLY INTERNAL +10V POWER SUPPLY 13 (14) 12 (10) 14 (8) 17 3 R1OUT TTL/CMOS INPUTS TTL/CMOS OUTPUTS RS-232 OUTPUTS RS-232 INPUTS 19 11 (12) 15 16 10 (11) R1IN 4 18 5 T1 T2 R1 R2 VCC DIP 20 19 18 17 16 15 14 1 2 3 4 5 6 7 R2OUT R2IN T2OUT R1 V- IN R1OUT T1IN T2IN MAX203 MAX203 C2- C2+ VCC V+ GND C1+ 8 13 C1- GND 9 12 VC2- 10 11 C2+ T1OUT SO 20 19 18 17 16 15 14 1 2 3 4 5 6 7 R2OUT R2IN T2OUT R1 V- IN R1OUT T1IN T2IN MAX203 C2- C2+ VCC C1- GND V+ 8 13 C1+ GND 9 12 C2+ V- 10 11 C2- T1OUT 0.1µF NOTE: PIN NUMBERS IN ( ) ARE FOR SO PACKAGE. MAX203 Pin Configurations/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 13 +5V INPUT +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER GND C1+ C1- C2+ C2- 6 8 7 0.1µF +6.3V 0.1µF +16V 0.1µF +16V 0.1µF +6.3V V+ V- T1OUT T3OUT T4OUT T2OUT 9 10 +5V +5V +5V +5V T1IN 400kΩ 400kΩ 400kΩ 400kΩ T2IN T3IN T4IN 11 4 3 13 14 TTL/CMOS INPUTS RS-232 OUTPUTS 5 15 16 2 1 12 0.1µF T1 T2 T3 T4 VCC TOP VIEW 16 15 14 13 12 11 9 1 2 3 4 5 6 8 T3OUT T4OUT T4IN T1IN T3IN T2IN T2OUT T1OUT V- C2- V+ C1- VCC C1+ 7 10 C2+ GND DIP/SO MAX204 MAX204 MAX204 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 14 +5V INPUT GND 12 T1OUT T3OUT T4OUT T2OUT +5V +5V +5V +5V T1IN 400kΩ 400kΩ 400kΩ 400kΩ T2IN T3IN T4IN T5IN 8 7 15 16 TTL/CMOS INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS RS-232 INPUTS 11 1 2 4 3 T1 T2 T3 T4 T5OUT +5V 400kΩ R1OUT R1IN R2IN R3IN R4IN R5IN SHDN R2OUT R3OUT R4OUT R5OUT EN 22 9 6 23 17 14 20 21 10 5 24 18 13 19 T5 R1 R2 R3 R4 R5 VCC TOP VIEW 24 23 22 21 20 19 17 1 2 3 4 5 6 8 R3IN R3OUT T5IN T2OUT SHDN T1OUT T3OUT T4OUT EN T5OUT T1IN R4OUT R2OUT T2IN 7 18 R4IN R1IN 10 15 T3IN R1OUT 9 16 T4IN VCC 12 13 R5IN GND 11 14 R5OUT R2IN DIP 5kΩ 5kΩ 5kΩ 5kΩ 5kΩ MAX205 MAX205 0.1µF MAX205 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 15 +5V INPUT +5V T1IN T1OUT 2 400kΩ +5V T2IN T2OUT 3 400kΩ +5V T3IN T3OUT 1 400kΩ +5V T4IN T4OUT 24 400kΩ 8 19 18 6 7 14 13 12 10 V- V+ C2+ C2- C1- C1+ 11 9 15 0.1µF +16V 0.1µF +6.3V 0.1µF 0.1µF +16V RS-232 INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS GND T4 T3 T1 T2 0.1µF +6.3V VCC +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER TTL/CMOS INPUTS 24 23 22 21 20 19 18 1 2 3 4 5 6 7 T4OUT R2IN R2OUT R1IN SHDN R1OUT T2OUT T1OUT T3OUT TOP VIEW MAX206 MAX206 EN T4IN T3IN VCC GND 8 17 R3OUT 9 16 R3IN C1+ 10 15 VV+ 11 14 C2- C1- 12 13 C2+ T2IN T1IN DIP/SO 5kΩ R1OUT R1IN 4 R1 5 5kΩ R2OUT R2IN 23 R2 22 5kΩ R3OUT R3IN SHDN 16 21 R3 17 20 EN MAX206 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 16 +5V T1IN T1OUT 2 400kΩ +5V T2IN T2OUT 3 400kΩ +5V T3IN T3OUT 1 400kΩ +5V T4IN T4OUT 24 400kΩ +5V T5IN T5OUT 20 8 400kΩ 19 18 6 7 14 13 12 10 C2- V- V+ C1- C1+ C2+ 11 9 15 0.1µF +16V 0.1µF +6.3V 0.1µF 0.1µF +16V RS-232 INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS GND T5 T4 T3 T1 T2 0.1µF +6.3V +5V INPUT VCC +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER 21 TTL/CMOS INPUTS 24 23 22 21 20 19 18 1 2 3 4 5 6 7 T4OUT R2IN R2OUT R1IN T5IN R1OUT T2OUT T1OUT T3OUT TOP VIEW MAX207 MAX207 T5OUT T4IN T3IN VCC GND 8 17 R3OUT 9 16 R3IN C1+ 10 15 VV+ 11 14 C2- C1- 12 13 C2+ T2IN T1IN DIP/SO/SSOP 5kΩ R1OUT R1IN 4 R1 5 5kΩ R2OUT R2IN 23 R2 22 5kΩ R3OUT R3IN 16 R3 17 MAX207 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 17 +5V T1IN T1OUT 2 400kΩ +5V T2IN T2OUT 1 400kΩ +5V T3IN T3OUT 24 400kΩ 8 C2- C2+ C1- C1+ V+ V- 11 9 15 0.1µF +16V 0.1µF +6.3V 0.1µF 0.1µF +16V RS-232 INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS GND T3 +5V T4IN T4OUT 20 400kΩ T4 T1 T2 0.1µF +6.3V +5V INPUT VCC +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER TTL/CMOS INPUTS 24 23 22 21 20 19 18 1 2 3 4 5 6 7 T3OUT R3IN R3OUT R2OUT T4IN T1IN R2IN T1OUT T2OUT TOP VIEW MAX208 MAX208 T4OUT T3IN T2IN VCC GND 8 17 R4OUT 9 16 R4IN C1+ 10 15 VV+ 11 14 C2- C1- 12 13 C2+ R1OUT R1IN DIP/SO 5kΩ R2OUT R2IN 3 R2 5kΩ R1OUT R1IN 7 R1 5kΩ R3OUT R3IN 23 R3 5kΩ R4OUT R4IN 16 R4 19 18 5 14 13 12 10 21 6 4 22 17 MAX208 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 18 0.1µF +5V INPUT +5V T1IN T1OUT 19 400kΩ +5V T2IN T2OUT 20 400kΩ +5V T3IN T3OUT 13 400kΩ 3 16 23 24 7 6 C- C+ 4 5 8 0.1µF +16V 0.1µF +16V RS-232 INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS GND T3 T1 T2 9V - 13.2V INPUT VCC V+ +10V TO +10V VOLTAGE INVERTER TTL/CMOS INPUTS 24 23 22 21 20 19 18 1 2 3 4 5 6 7 T1IN T2IN R2OUT VCC R2IN V+ GND R1IN R1OUT TOP VIEW MAX209 MAX209 T2OUT T1OUT R3IN R5IN V- 8 17 R3OUT 9 16 T3IN R5OUT 10 15 N.C. R4OUT 11 14 EN R4IN 12 13 T3OUT C+ C- DIP/SO 5kΩ R2OUT R2IN 21 R2 22 1 5kΩ R1OUT R1IN 2 R1 5kΩ R3OUT R3IN 18 R3 17 5kΩ R4OUT R4IN N.C. 12 15 R4 11 5kΩ R5OUT R5IN 9 R5 10 14 EN MAX209 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 19 GND T1OUT T3OUT T4OUT T2OUT +5V +5V +5V +5V T1IN T2IN T3IN T4IN 7 6 20 21 TTL/CMOS INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS RS-232 INPUTS 10 28 1 3 2 T1 T2 T3 T4 R1OUT R1IN R2IN R3IN R4IN R5IN SHDN R2OUT R3OUT R4OUT R5OUT EN 8 5 26 22 19 24 25 9 4 27 23 18 R1 R2 R3 R4 R5 TOP VIEW 5kΩ 5kΩ 5kΩ 5kΩ 5kΩ 28 27 26 25 24 23 21 1 2 3 4 5 6 8 T4OUT R3IN R3OUT R2IN SHDN T2OUT T1OUT T3OUT R4IN R1OUT T4IN T2IN T1IN 7 22 R4OUT GND 10 19 R5OUT R1IN 9 20 T3IN C1+ 12 17 VVCC 11 18 R5IN C1- 14 15 C2+ V+ 13 16 C2- R2OUT SO/SSOP +5V INPUT +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER C1+ C1- C2+ C2- 11 13 12 0.1µF +6.3V 0.1µF +16V 0.1µF +16V 0.1µF +6.3V V+ V- 14 15 16 17 VCC EN 400kΩ 400kΩ 400kΩ 400kΩ 0.1µF MAX211 MAX211 MAX211 Pin Configuration/Typical Operating Circuit MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 20 TOP VIEW 28 27 26 25 24 23 21 1 2 3 4 5 6 8 T4OUT R3IN R3OUT R2IN SHDN T2OUT T1OUT T3OUT MAX213 R4IN* R1OUT T4IN T2IN T1 7 22 R4OUT* IN GND 10 19 R5OUT* R1IN 9 20 T3IN C1+ 12 17 VVCC 11 18 R5IN* C1- 14 15 C2+ V+ 13 16 C2- R2OUT SO/SSOP EN GND T1OUT T3OUT T4OUT T2OUT +5V +5V +5V +5V T1IN T2IN T3IN T4IN 7 6 20 21 TTL/CMOS INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS RS-232 INPUTS 10 28 1 3 2 T1 T2 T3 T4 R1OUT R1IN R2IN R3IN R4IN* R5IN* SHDN R2OUT R3OUT R4OUT* R5OUT* EN 8 5 26 22 19 24 25 9 4 27 23 18 R1 R2 R3 R4 R5 5kΩ 5kΩ 5kΩ 5kΩ 5kΩ +5V INPUT +5V TO +10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER C1+ C1- C2+ C2- 11 13 12 0.1µF +6.3V 0.1µF +16V 0.1µF +16V 0.1µF +6.3V V+ V- 14 15 16 17 VCC 400kΩ 400kΩ 400kΩ 400kΩ 0.1µF MAX213 *ACTIVE IN SHUTDOWN MAX213 Pin Configuration/Typical Operating Circuit *Contact factory for dice specifications. PART TEMP RANGE PIN-PACKAGE MAX200CPP 0°C to +70°C 20 Plastic DIP MAX200CWP 0°C to +70°C 20 Wide SO MAX200EPP -40°C to +85°C 20 Plastic DIP MAX200EWP -40°C to +85°C 20 Wide SO MAX201CPD 0°C to +70°C 14 Plastic DIP MAX201CWE 0°C to +70°C 16 Wide SO MAX201C/D 0°C to +70°C Dice* MAX201EPD -40°C to +85°C 14 Plastic DIP MAX201EWE -40°C to +85°C 16 Wide SO MAX202CPE 0°C to +70°C 16 Plastic DIP MAX202CSE 0°C to +70°C 16 Narrow SO MAX202CWE 0°C to +70°C 16 Wide SO MAX202C/D 0°C to +70°C Dice* MAX202EPE -40°C to +85°C 16 Plastic DIP MAX202ESE -40°C to +85°C 16 Narrow SO MAX202EWE -40°C to +85°C 16 Wide SO MAX203CPP 0°C to +70°C 20 Plastic DIP MAX203CWP 0°C to +70°C 20 Wide SO MAX203EPP -40°C to +85°C 20 Plastic DIP MAX203EWP -40°C to +85°C 20 Wide SO MAX204CPE 0°C to +70°C 16 Plastic DIP MAX204CWE 0°C to +70°C 16 Wide SO MAX204C/D 0°C to +70°C Dice* MAX204EPE -40°C to +85°C 16 Plastic DIP MAX204EWE -40°C to +85°C 16 Wide SO MAX205CPG 0°C to +70°C 24 Wide Plastic DIP MAX205EPG -40°C to +85°C 24 Wide Plastic DIP MAX206CNG 0°C to +70°C 24 Narrow Plastic DIP MAX206CWG 0°C to +70°C 24 Wide SO MAX206CAG 0°C to +70°C 24 SSOP MAX206ENG -40°C to +85°C 24 Narrow Plastic DIP PART TEMP RANGE PIN-PACKAGE MAX206EWG -40°C to +85°C 24 Wide SO MAX206EAG -40°C to +85°C 24 SSOP MAX207CNG 0°C to +70°C 24 Narrow Plastic DIP MAX207CWG 0°C to +70°C 24 Wide SO MAX207CAG 0°C to +70°C 24 SSOP MAX207ENG -40°C to +85°C 24 Narrow Plastic DIP MAX207EWG -40°C to +85°C 24 Wide SO MAX207EAG -40°C to +85°C 24 SSOP MAX208CNG 0°C to +70°C 24 Narrow Plastic DIP MAX208CWG 0°C to +70°C 24 Wide SO MAX208CAG 0°C to +70°C 24 SSOP MAX208C/D 0°C to +70°C Dice* MAX208ENG -40°C to +85°C 24 Narrow Plastic DIP MAX208EWG -40°C to +85°C 24 Wide SO MAX208EAG -40°C to +85°C 24 SSOP MAX209CNG 0°C to +70°C 24 Narrow Plastic DIP MAX209CWG 0°C to +70°C 24 Wide SO MAX209C/D 0°C to +70°C Dice* MAX209ENG -40°C to +85°C 24 Narrow Plastic DIP MAX209EWG -40°C to +85°C 24 Wide SO MAX211CWI 0°C to +70°C 28 Wide SO MAX211CAI 0°C to +70°C 28 SSOP MAX211C/D 0°C to +70°C Dice* MAX211EWI -40°C to +85°C 28 Wide SO MAX211EAI -40°C to +85°C 28 SSOP MAX213CWI 0°C to +70°C 28 Wide SO MAX213CAI 0°C to +70°C 28 SSOP MAX213C/D 0°C to +70°C Dice* MAX213EWI -40°C to +85°C 28 Wide SO MAX213EAI -40°C to +85°C 28 SSOP MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 21 Ordering Information PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 14 CDIP J14-3 21-0045 16 CDIP J16-3 21-0045 20 CDIP J20-2 21-0045 24 CDIP R24-4 21-0045 14 PDIP P14-3 21-0043 16 PDIP P16-1 21-0043 20 PDIP P20-3 21-0043 24 PDIP N24-2 21-0043 24 PDIP N24-3 21-0043 24 PDIP P24-1 21-0044 24 PDIP P24M-1 21-0044 16 SO S16-3 21-0041 16 SO W16-3 21-0042 16 SO W16-1 21-0042 20 SO W20M-1 21-0042 20 SO W20-3 21-0042 24 SO W24-2 21-0042 28 SO W28-1 21-0042 28 SO W28-2 21-0042 24 SSOP A24-3 21-0056 24 SSOP A24-2 21-0056 28 SSOP A28-1 21-0056 16 TSSOP U16-1 21-0066 PART POWER-SUPPLY VOLTAGE (V) NUMBER OF RS-232 DRIVERS NUMBER OF RS-232 RECEIVERS NUMBER OF RECEIVERS ACTIVE IN SHUTDOWN NUMBER OF EXTERNAL CAPACITORS (0.1μF) LOW-POWER SHUTDOWN/TTL THREE-STATE MAX204 +5 4 0 0 4 No/No MAX205 +5 5 5 0 None Yes/Yes MAX206 +5 4 3 0 4 Yes/Yes MAX207 +5 5 3 0 4 No/No MAX208 +5 4 4 0 4 No/No MAX209 +5 and +9.0 to +13.2 3 5 0 2 No/Yes MAX211 +5 4 5 0 4 Yes/Yes MAX213 +5 4 5 2 4 Yes/Yes MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors www.maximintegrated.com Maxim Integrated │ 22 Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Selector Guide (continued) REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 6 10/03 Changed the Features section and section information to the Next-Generation Device Features section. 1 7 12/05 Added Note 1 to the Absolute Maximum Ratings section. 2 8 1/15 Updated page 1 content 1 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. MAX200–MAX209/ MAX211/MAX213 +5V, RS-232 Transceivers with 0.1μF External Capacitors © 2015 Maxim Integrated Products, Inc. │ 23 Revision History For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. General Description The MAX481, MAX483, MAX485, MAX487–MAX491, and MAX1487 are low-power transceivers for RS-485 and RS- 422 communication. Each part contains one driver and one receiver. The MAX483, MAX487, MAX488, and MAX489 feature reduced slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, thus allowing error-free data transmission up to 250kbps. The driver slew rates of the MAX481, MAX485, MAX490, MAX491, and MAX1487 are not limited, allowing them to transmit up to 2.5Mbps. These transceivers draw between 120µA and 500µA of supply current when unloaded or fully loaded with disabled drivers. Additionally, the MAX481, MAX483, and MAX487 have a low-current shutdown mode in which they consume only 0.1µA. All parts operate from a single 5V supply. Drivers are short-circuit current limited and are protected against excessive power dissipation by thermal shutdown circuitry that places the driver outputs into a high-impedance state. The receiver input has a fail-safe feature that guarantees a logic-high output if the input is open circuit. The MAX487 and MAX1487 feature quarter-unit-load receiver input impedance, allowing up to 128 MAX487/ MAX1487 transceivers on the bus. Full-duplex communications are obtained using the MAX488–MAX491, while the MAX481, MAX483, MAX485, MAX487, and MAX1487 are designed for half-duplex applications. ________________________Applications Low-Power RS-485 Transceivers Low-Power RS-422 Transceivers Level Translators Transceivers for EMI-Sensitive Applications Industrial-Control Local Area Networks __Next Generation Device Features ♦ For Fault-Tolerant Applications MAX3430: ±80V Fault-Protected, Fail-Safe, 1/4 Unit Load, +3.3V, RS-485 Transceiver MAX3440E–MAX3444E: ±15kV ESD-Protected, ±60V Fault-Protected, 10Mbps, Fail-Safe, RS-485/J1708 Transceivers ♦ For Space-Constrained Applications MAX3460–MAX3464: +5V, Fail-Safe, 20Mbps, Profibus RS-485/RS-422 Transceivers MAX3362: +3.3V, High-Speed, RS-485/RS-422 Transceiver in a SOT23 Package MAX3280E–MAX3284E: ±15kV ESD-Protected, 52Mbps, +3V to +5.5V, SOT23, RS-485/RS-422, True Fail-Safe Receivers MAX3293/MAX3294/MAX3295: 20Mbps, +3.3V, SOT23, RS-485/RS-422 Transmitters ♦ For Multiple Transceiver Applications MAX3030E–MAX3033E: ±15kV ESD-Protected, +3.3V, Quad RS-422 Transmitters ♦ For Fail-Safe Applications MAX3080–MAX3089: Fail-Safe, High-Speed (10Mbps), Slew-Rate-Limited RS-485/RS-422 Transceivers ♦ For Low-Voltage Applications MAX3483E/MAX3485E/MAX3486E/MAX3488E/ MAX3490E/MAX3491E: +3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited, True RS-485/RS-422 Transceivers MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. ______________________________________________________________Selection Table 19-0122; Rev 10; 9/14 PART NUMBER HALF/FULL DUPLEX DATA RATE (Mbps) SLEW-RATE LIMITED LOWPOWER SHUTDOWN RECEIVER/ DRIVER ENABLE QUIESCENT CURRENT (μA) NUMBER OF RECEIVERS ON BUS PIN COUNT MAX481 Half 2.5 No Yes Yes 300 32 8 MAX483 Half 0.25 Yes Yes Yes 120 32 8 MAX485 Half 2.5 No No Yes 300 32 8 MAX487 Half 0.25 Yes Yes Yes 120 128 8 MAX488 Full 0.25 Yes No No 120 32 8 MAX489 Full 0.25 Yes No Yes 120 32 14 MAX490 Full 2.5 No No No 300 32 8 MAX491 Full 2.5 No No Yes 300 32 14 MAX1487 Half 2.5 No No Yes 230 128 8 Ordering Information appears at end of data sheet. Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 2 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 ABSOLUTE MAXIMUM RATINGS Supply Voltage (VCC).............................................................12V Control Input Voltage (RE, DE)...................-0.5V to (VCC + 0.5V) Driver Input Voltage (DI).............................-0.5V to (VCC + 0.5V) Driver Output Voltage (A, B)...................................-8V to +12.5V Receiver Input Voltage (A, B).................................-8V to +12.5V Receiver Output Voltage (RO)....................-0.5V to (VCC + 0.5V) Continuous Power Dissipation (TA = +70°C) 8-Pin Plastic DIP (derate 9.09mW/°C above +70°C) ....727mW 14-Pin Plastic DIP (derate 10.00mW/°C above +70°C) ..800mW 8-Pin SO (derate 5.88mW/°C above +70°C).................471mW 14-Pin SO (derate 8.33mW/°C above +70°C)...............667mW 8-Pin µMAX (derate 4.1mW/°C above +70°C) ..............830mW 8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW 14-Pin CERDIP (derate 9.09mW/°C above +70°C).......727mW Operating Temperature Ranges MAX4_ _C_ _/MAX1487C_ A ...............................0°C to +70°C MAX4_ _E_ _/MAX1487E_ A.............................-40°C to +85°C MAX4_ _M_/MAX1487MJA .............................-55°C to +125°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C DC ELECTRICAL CHARACTERISTICS (VCC = 5V ±5%, TA = TMIN to TMAX, unless otherwise noted.) (Notes 1, 2) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. V VIN = -7V VIN = 12V VIN = -7V VIN = 12V Input Current (A, B) IIN2 VTH -7V ≤ VCM ≤ 12V, MAX487/MAX1487 48 kΩ Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V, all devices except MAX487/MAX1487 R = 27Ω (RS-485), Figure 4 0.4V ≤ VO ≤ 2.4V R = 50Ω (RS-422) IO = 4mA, VID = -200mV IO = -4mA, VID = 200mV VCM = 0V -7V ≤ VCM ≤ 12V DE, DI, RE DE, DI, RE MAX487/MAX1487, DE = 0V, VCC = 0V or 5.25V DE, DI, RE R = 27Ω or 50Ω, Figure 4 R = 27Ω or 50Ω, Figure 4 R = 27Ω or 50Ω, Figure 4 DE = 0V; VCC = 0V or 5.25V, all devices except MAX487/MAX1487 CONDITIONS 12 kΩ IOZR ±1 µA Three-State (high impedance) Output Current at Receiver V Receiver Output Low Voltage VOL 0.4 Receiver Output High Voltage VOH 3.5 Receiver Input Hysteresis ΔVTH 70 mV -0.2 0.2 V Receiver Differential Threshold Voltage -0.2 mA 0.25 mA -0.8 1.0 1.5 5 VOD2 Differential Driver Output (with load) V 2 Differential Driver Output (no load) VOD1 5 V Input Current IIN1 ±2 µA Input Low Voltage VIL 0.8 V Input High Voltage VIH 2.0 V ΔVOD 0.2 V Change in Magnitude of Driver Common-Mode Output Voltage for Complementary Output States ΔVOD 0.2 V Change in Magnitude of Driver Differential Output Voltage for Complementary Output States VOC 3 V Driver Common-Mode Output Voltage PARAMETER SYMBOL MIN TYP MAX UNITS Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers Maxim Integrated 3 MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 SWITCHING CHARACTERISTICS—MAX481/MAX485, MAX490/MAX491, MAX1487 (VCC = 5V ±5%, TA = TMIN to TMAX, unless otherwise noted.) (Notes 1, 2) DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 5V ±5%, TA = TMIN to TMAX, unless otherwise noted.) (Notes 1, 2) Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC 7 95 mA IOSD2 -7V ≤ VO ≤12V (Note 4) 35 250 mA Driver Short-Circuit Current, VO = Low IOSD1 -7V ≤ VO ≤12V (Note 4) 35 250 mA Driver Short-Circuit Current, VO = High MAX1487, RE = 0V or VCC 250 400 350 650 ns tPHL 10 30 60 Driver Rise or Fall Time Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF ns MAX490M, MAX491M MAX490C/E, MAX491C/E 20 90 150 MAX481, MAX485, MAX1487 MAX490M, MAX491M MAX490C/E, MAX491C/E MAX481, MAX485, MAX1487 Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF MAX481 (Note 5) Figures 5 and 11, CRL = 15pF, S2 closed Figures 5 and 11, CRL = 15pF, S1 closed Figures 5 and 11, CRL = 15pF, S2 closed Figures 5 and 11, CRL = 15pF, S1 closed Figures 6 and 10, RDIFF = 54Ω, CL1 = CL2 = 100pF Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF Figures 6 and 10, RDIFF = 54Ω, CL1 = CL2 = 100pF CONDITIONS ns tSKEW 5 10 Time to Shutdown tSHDN 50 200 600 ns Maximum Data Rate fMAX 2.5 Mbps Receiver Disable Time from High tHZ 20 50 ns ns tPLH 10 30 60 Receiver Disable Time from Low tLZ 20 50 tZH 20 50 ns Driver Input to Output Receiver Enable to Output High Receiver Enable to Output Low tZL 20 50 ns 20 90 200 ns ns 13 tHZ 40 70 tSKD Driver Disable Time from High | tPLH - tPHL | Differential Receiver Skew Driver Disable Time from Low tLZ 40 70 ns ns Driver Enable to Output Low tZL 40 70 3 15 40 ns 5 15 25 ns 3 15 40 tR, tF 20 90 200 Driver Output Skew to Output Receiver Input to Output tPLH, tPHL Driver Enable to Output High tZH 40 70 PARAMETER SYMBOL MIN TYP MAX UNITS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 230 400 300 500 MAX481/MAX485, RE = 0V or VCC 500 900 MAX490/MAX491, DE, DI, RE = 0V or VCC 300 500 MAX488/MAX489, DE, DI, RE = 0V or VCC 120 250 DE = VCC DE = 0V 300 500 DE = VCC DE = 0V Supply Current in Shutdown ISHDN MAX481/483/487, DE = 0V, RE = VCC 0.1 10 µA 120 250 ICC No-Load Supply Current (Note 3) DE = 5V DE = 0V MAX483 MAX487 MAX483/MAX487, RE = 0V or VCC Figures 7 and 9, CL = 100pF, S2 closed Figures 7 and 9, CL = 100pF, S1 closed Figures 7 and 9, CL = 15pF, S1 closed Figures 7 and 9, CL = 15pF, S2 closed µA Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 4 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 SWITCHING CHARACTERISTICS—MAX483, MAX487/MAX488/MAX489 (VCC = 5V ±5%, TA = TMIN to TMAX, unless otherwise noted.) (Notes 1, 2) SWITCHING CHARACTERISTICS—MAX481/MAX485, MAX490/MAX491, MAX1487 (continued) (VCC = 5V ±5%, TA = TMIN to TMAX, unless otherwise noted.) (Notes 1, 2) 300 1000 Figures 7 and 9, CL = 100pF, S2 closed Figures 7 and 9, CL = 100pF, S1 closed Figures 5 and 11, CL = 15pF, S2 closed, A - B = 2V CONDITIONS tZH(SHDN) 40 100 ns Driver Enable from Shutdown to Output High (MAX481) ns Figures 5 and 11, CL = 15pF, S1 closed, B - A = 2V tZL(SHDN) Receiver Enable from Shutdown to Output Low (MAX481) tZL(SHDN) 40 100 ns Driver Enable from Shutdown to Output Low (MAX481) tZH(SHDN) 300 1000 ns Receiver Enable from Shutdown to Output High (MAX481) PARAMETER SYMBOL MIN TYP MAX UNITS tPLH tSKEW Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF tPHL Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF Driver Input to Output Driver Output Skew to Output 100 800 ns ns 2000 ns MAX483/MAX487, Figures 7 and 9, CL = 100pF, S2 closed tZH(SHDN) Driver Enable from Shutdown to Output High 250 2000 2500 ns MAX483/MAX487, Figures 5 and 11, CL = 15pF, S1 closed tZL(SHDN) Receiver Enable from Shutdown to Output Low 2500 ns MAX483/MAX487, Figures 5 and 11, CL = 15pF, S2 closed tZH(SHDN) Receiver Enable from Shutdown to Output High 2000 ns MAX483/MAX487, Figures 7 and 9, CL = 100pF, S1 closed tZL(SHDN) Driver Enable from Shutdown to Output Low Time to Shutdown tSHDN MAX483/MAX487 (Note 5) 50 200 600 ns tPHL tPLH, tPHL < 50% of data period Figures 5 and 11, CRL = 15pF, S2 closed Figures 5 and 11, CRL = 15pF, S1 closed Figures 5 and 11, CRL = 15pF, S2 closed Figures 5 and 11, CRL = 15pF, S1 closed Figures 7 and 9, CL = 15pF, S2 closed Figures 6 and 10, RDIFF = 54Ω, CL1 = CL2 = 100pF Figures 7 and 9, CL = 15pF, S1 closed Figures 7 and 9, CL = 100pF, S1 closed Figures 7 and 9, CL = 100pF, S2 closed CONDITIONS fMAX 250 kbps 250 800 2000 Maximum Data Rate Receiver Disable Time from High tHZ 20 50 ns ns 250 800 2000 Receiver Disable Time from Low tLZ 20 50 Receiver Enable to Output High tZH 20 50 ns Receiver Enable to Output Low tZL 20 50 ns ns ns 100 tHZ 300 3000 tSKD Driver Disable Time from High I tPLH - tPHL I Differential Receiver Skew Figures 6 and 10, RDIFF = 54Ω, CL1 = CL2 = 100pF Driver Disable Time from Low tLZ 300 3000 ns Driver Enable to Output Low tZL 250 2000 ns ns Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF tR, tF 250 2000 ns 250 2000 Driver Rise or Fall Time ns tPLH Receiver Input to Output Driver Enable to Output High tZH 250 2000 PARAMETER SYMBOL MIN TYP MAX UNITS MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487 30 0 0 2.5 OUTPUT CURRENT vs. RECEIVER OUTPUT LOW VOLTAGE 5 25 MAX481-01 OUTPUT LOW VOLTAGE (V) OUTPUT CURRENT (mA) 1.5 15 10 0.5 1.0 2.0 20 35 40 45 0.9 0.1 -50 -25 25 75 RECEIVER OUTPUT LOW VOLTAGE vs. TEMPERATURE 0.3 0.7 TEMPERATURE (°C) OUTPUT LOW VOLTAGE (V) 0 50 0.5 0.8 0.2 0.6 0.4 0 100 125 IRO = 8mA MAX481-04 -20 -4 1.5 2.0 3.0 5.0 OUTPUT CURRENT vs. RECEIVER OUTPUT HIGH VOLTAGE -8 -16 MAX481-02 OUTPUT HIGH VOLTAGE (V) OUTPUT CURRENT (mA) 2.5 4.0 -12 -18 -6 -14 -10 -2 0 3.5 4.5 4.8 3.2 -50 -25 25 75 RECEIVER OUTPUT HIGH VOLTAGE vs. TEMPERATURE 3.6 4.4 TEMPERATURE (°C) OUTPUT HIGH VOLTAGE (V) 0 50 4.0 4.6 3.4 4.2 3.8 3.0 100 125 IRO = 8mA MAX481-03 90 0 0 1.0 3.0 4.5 DRIVER OUTPUT CURRENT vs. DIFFERENTIAL OUTPUT VOLTAGE 10 70 MAX481-05 DIFFERENTIAL OUTPUT VOLTAGE (V) OUTPUT CURRENT (mA) 2.0 4.0 50 30 80 60 40 20 0.5 1.5 2.5 3.5 2.3 1.5 -50 -25 25 125 DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs. TEMPERATURE 1.7 2.1 MAX481-06 TEMPERATURE (°C) DIFFERENTIAL OUTPUT VOLTAGE (V) 0 75 1.9 2.2 1.6 2.0 1.8 50 100 2.4 R = 54Ω __________________________________________Typical Operating Characteristics (VCC = 5V, TA = +25°C, unless otherwise noted.) Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers Maxim Integrated 5 MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 NOTES FOR ELECTRICAL/SWITCHING CHARACTERISTICS Note 1: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. Note 2: All typical specifications are given for VCC = 5V and TA = +25°C. Note 3: Supply current specification is valid for loaded transmitters when DE = 0V. Note 4: Applies to peak current. See Typical Operating Characteristics. Note 5: The MAX481/MAX483/MAX487 are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See Low-Power Shutdown Mode (MAX481/MAX483/MAX487) section. MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487 ____________________________Typical Operating Characteristics (continued) (VCC = 5V, TA = +25°C, unless otherwise noted.) 120 0 0 8 OUTPUT CURRENT vs. DRIVER OUTPUT LOW VOLTAGE 20 100 MAX481-07 OUTPUT LOW VOLTAGE (V) OUTPUT CURRENT (mA) 6 60 40 2 4 80 10 12 140 -120 0 -7 -5 -1 5 OUTPUT CURRENT vs. DRIVER OUTPUT HIGH VOLTAGE -20 -80 MAX481-08 OUTPUT HIGH VOLTAGE (V) OUTPUT CURRENT (mA) -3 1 -60 -6 -4 -2 0 2 4 3 -100 -40 100 -60 -20 40 100 120 -40 MAX1487 SUPPLY CURRENT vs. TEMPERATURE 300 MAX481-13 TEMPERATURE (°C) SUPPLY CURRENT (μA) 20 60 80 500 200 600 400 0 0 140 MAX1487; DE = VCC, RE = X MAX1487; DE = 0V, RE = X 100 -50 -25 50 100 MAX481/MAX485/MAX490/MAX491 SUPPLY CURRENT vs. TEMPERATURE 300 MAX481-11 TEMPERATURE (°C) SUPPLY CURRENT (μA) 25 75 500 200 600 400 0 0 125 MAX481/MAX485; DE = VCC, RE = X MAX481; DE = 0, RE = VCC MAX485; DE = 0, RE = X, MAX481; DE = RE = 0 MAX490/MAX491; DE = RE = X 100 -50 -25 50 100 MAX483/MAX487–MAX489 SUPPLY CURRENT vs. TEMPERATURE 300 MAX481-12 TEMPERATURE (°C) SUPPLY CURRENT (μA) 25 75 500 200 600 400 0 0 125 MAX483; DE = VCC, RE = X MAX487; DE = VCC, RE = X MAX483/MAX487; DE = 0, RE = VCC MAX483/MAX487; DE = RE = 0, MAX488/MAX489; DE = RE = X Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 6 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers Maxim Integrated 7 MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 ______________________________________________________________Pin Description MAX481 MAX483 MAX485 MAX487 MAX1487 TOP VIEW NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TO PINS A AND B WHEN DE IS HIGH. TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE. 1 2 3 4 8 5 VCC DI GND DE RE RO R D Rt Rt 7 6 D R DE RE DI RO A B 1 2 3 4 8 7 6 5 VCC B A DI GND DE RE RO DIP/SO R D 1 2 3 4 8 7 6 5 VCC A GND RE DE B RO μMAX B A DI MAX481 MAX483 MAX485 MAX487 MAX1487 Figure 1. MAX481/MAX483/MAX485/MAX487/MAX1487 Pin Configuration and Typical Operating Circuit µMAX — — 5 6 7 8 — 2 — 1 3 — µMAX 4 5 6 7 — — 8 — 1 — 2 — DIP/SO DIP/SO 2 3 Receiver Output Enable. RO is enabled when RE is low; RO is high impedance when RE is high. 3 4 Driver Output Enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. If the driver outputs are enabled, the parts function as line drivers. While they are high impedance, they function as line receivers if RE is low. DIP/SO — 4 5 Driver Input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. 5 6, 7 Ground — 9 Noninverting Driver Output — 10 Inverting Driver Output — 3 4 6 — Noninverting Receiver Input and Noninverting Driver Output — 12 Noninverting Receiver Input 5 6 — 8 RE DE DI GND Y Z A A 7 — — B Inverting Receiver Input and Inverting Driver Output — 7 11 B Inverting Receiver Input 8 1 14 VCC Positive Supply: 4.75V ≤ VCC ≤ 5.25V — — 1, 8, 13 N.C. No Connect—not internally connected NAME FUNCTION 1 3 4 2 Receiver Output: If A > B by 200mV, RO will be high; If A < B by 200mV, RO will be low. 2 RO PIN NAME FUNCTION MAX481/MAX483/ MAX485/MAX487/ MAX1487 MAX488/ MAX490 MAX489/ MAX491 Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 8 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 __________Applications Information The MAX481/MAX483/MAX485/MAX487–MAX491 and MAX1487 are low-power transceivers for RS-485 and RS- 422 communications. The MAX481, MAX485, MAX490, MAX491, and MAX1487 can transmit and receive at data rates up to 2.5Mbps, while the MAX483, MAX487, MAX488, and MAX489 are specified for data rates up to 250kbps. The MAX488–MAX491 are full-duplex transceivers while the MAX481, MAX483, MAX485, MAX487, and MAX1487 are half-duplex. In addition, Driver Enable (DE) and Receiver Enable (RE) pins are included on the MAX481, MAX483, MAX485, MAX487, MAX489, MAX491, and MAX1487. When disabled, the driver and receiver outputs are high impedance. MAX487/MAX1487: 128 Transceivers on the Bus The 48kΩ, 1/ 4-unit-load receiver input impedance of the MAX487 and MAX1487 allows up to 128 transceivers on a bus, compared to the 1-unit load (12kΩ input impedance) of standard RS-485 drivers (32 transceivers maximum). Any combination of MAX487/ MAX1487 and other RS-485 transceivers with a total of 32 unit loads or less can be put on the bus. The MAX481/MAX483/MAX485 and MAX488–MAX491 have standard 12kΩ Receiver Input impedance. MAX488 MAX490 TOP VIEW 1 2 3 4 RO DI GND 8 7 6 5 A B Z Y VCC DIP/SO R D Rt Rt VCC 5 6 7 8 RO DI GND 4 GND DI RO 3 2 A B Y Z VCC D R R D 1 VCC 3 RO 4 A 2 1 6 5 7 8 GND DI Y B Z μMAX MAX488 MAX490 NOTE: TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE. MAX489 MAX491 DIP/SO TOP VIEW Rt Rt DE VCC RE GND VCC RE GND DE RO DI 9 10 12 11 B A Z Y 5 RO NC DI 2 1, 8, 13 3 6, 7 4 14 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC N.C. N.C. A B Z Y N.C. RO RE DE DI GND GND R D D R D R Figure 2. MAX488/MAX490 Pin Configuration and Typical Operating Circuit Figure 3. MAX489/MAX491 Pin Configuration and Typical Operating Circuit Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers Maxim Integrated 9 MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 MAX483/MAX487/MAX488/MAX489: Reduced EMI and Reflections The MAX483 and MAX487–MAX489 are slew-rate limited, minimizing EMI and reducing reflections caused by improperly terminated cables. Figure 12 shows the driver output waveform and its Fourier analysis of a 150kHz signal transmitted by a MAX481, MAX485, MAX490, MAX491, or MAX1487. High-frequency harmonics with large amplitudes are evident. Figure 13 shows the same information displayed for a MAX483, MAX487, MAX488, or MAX489 transmitting under the same conditions. Figure 13’s high-frequency harmonics have much lower amplitudes, and the potential for EMI is significantly reduced. R R Y Z VOD VOC RECEIVER OUTPUT TEST POINT 1kΩ 1kΩ S1 S2 VCC CRL 15pF DI DE 3V Y Z CL1 CL2 A B RO RE RDIFF VID OUTPUT UNDER TEST 500Ω S1 S2 VCC CL _________________________________________________________________Test Circuits Figure 4. Driver DC Test Load Figure 5. Receiver Timing Test Load Figure 6. Driver/Receiver Timing Test Circuit Figure 7. Driver Timing Test Load Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 10 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 _______________________________________________________Switching Waveforms DI 3V 0V Z Y VO 0V -VO VO 1.5V tPLH 1/2 VO 10% tR 90% 90% tPHL 1.5V 1/2 VO 10% tF VDIFF = V (Y) - V (Z) VDIFF tSKEW = | tPLH - tPHL | OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH 3V 0V Y, Z VOL Y, Z 0V 1.5V 1.5V VOL + 0.5V 2.3V VOH - 0.5V 2.3V tZL(SHDN), tZL tLZ tZH(SHDN), tZH tHZ DE VOH VOL VID -VID 1.5V 0V 1.5V OUTPUT INPUT 0V RO A-B tPHL tPLH OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH 3V 0V VCC RO RO 0V 1.5V 1.5V VOL + 0.5V 1.5V VOH - 0.5V 1.5V tZL(SHDN), tZL tLZ tZH(SHDN), tZH tHZ RE _________________Function Tables (MAX481/MAX483/MAX485/MAX487/MAX1487) Figure 8. Driver Propagation Delays Figure 9. Driver Enable and Disable Times (except MAX488 and MAX490) Figure 10. Receiver Propagation Delays Figure 11. Receiver Enable and Disable Times (except MAX488 and MAX490) Table 1. Transmitting Table 2. Receiving INPUTS OUTPUT RE DE A-B RO 0 0 0 1 0 0 0 0 > +0.2V < -0.2V Inputs open X 1 0 1 High-Z* INPUTS OUTPUTS RE DE DI Z Y X X 0 1 1 1 0 0 1 0 X X 0 1 High-Z High-Z* 1 0 High-Z High-Z* X = Don’t care High-Z = High impedance *Shutdown mode for MAX481/MAX483/MAX487 X = Don’t care High-Z = High impedance *Shutdown mode for MAX481/MAX483/MAX487 Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers Maxim Integrated 11 MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 Low-Power Shutdown Mode (MAX481/MAX483/MAX487) A low-power shutdown mode is initiated by bringing both RE high and DE low. The devices will not shut down unless both the driver and receiver are disabled. In shutdown, the devices typically draw only 0.1µA of supply current. RE and DE may be driven simultaneously; the parts are guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns. If the inputs are in this state for at least 600ns, the parts are guaranteed to enter shutdown. For the MAX481, MAX483, and MAX487, the tZH and tZL enable times assume the part was not in the lowpower shutdown state (the MAX485/MAX488–MAX491 and MAX1487 can not be shut down). The tZH(SHDN) and tZL(SHDN) enable times assume the parts were shut down (see Electrical Characteristics). It takes the drivers and receivers longer to become enabled from the low-power shutdown state (tZH(SHDN), tZL(SHDN)) than from the operating mode (tZH, tZL). (The parts are in operating mode if the – R —E – , DE inputs equal a logical 0,1 or 1,1 or 0, 0.) Driver Output Protection Excessive output current and power dissipation caused by faults or by bus contention are prevented by two mechanisms. A foldback current limit on the output stage provides immediate protection against short circuits over the whole common-mode voltage range (see Typical Operating Characteristics). In addition, a thermal shutdown circuit forces the driver outputs into a high-impedance state if the die temperature rises excessively. Propagation Delay Many digital encoding schemes depend on the difference between the driver and receiver propagation delay times. Typical propagation delays are shown in Figures 15–18 using Figure 14’s test circuit. The difference in receiver delay times, | tPLH - tPHL |, is typically under 13ns for the MAX481, MAX485, MAX490, MAX491, and MAX1487 and is typically less than 100ns for the MAX483 and MAX487–MAX489. The driver skew times are typically 5ns (10ns max) for the MAX481, MAX485, MAX490, MAX491, and MAX1487, and are typically 100ns (800ns max) for the MAX483 and MAX487–MAX489. 10dB/div 0Hz 5MHz 500kHz/div 10dB/div 0Hz 5MHz 500kHz/div Figure 12. Driver Output Waveform and FFT Plot of MAX481/ MAX485/MAX490/MAX491/MAX1487 Transmitting a 150kHz Signal Figure 13. Driver Output Waveform and FFT Plot of MAX483/ MAX487–MAX489 Transmitting a 150kHz Signal Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 12 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 TTL IN tR, tF < 6ns D R 100pF B 100pF A RECEIVER OUT R = 54Ω Z Y 500mV/div 20ns/div A B RO 2V/div VCC = 5V TA = +25°C 500mV/div 20ns/div A B RO 2V/div VCC = 5V TA = +25°C 500mV/div 400ns/div A B RO 2V/div VCC = 5V TA = +25°C 500mV/div 400ns/div A B RO 2V/div VCC = 5V TA = +25°C Figure 14. Receiver Propagation Delay Test Circuit Figure 15. MAX481/MAX485/MAX490/MAX491/MAX1487 Receiver tPHL Figure 16. MAX481/MAX485/MAX490/MAX491/MAX1487 Receiver tPLH Figure 17. MAX483, MAX487–MAX489 Receiver tPHL Figure 18. MAX483, MAX487–MAX489 Receiver tPLH Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers Maxim Integrated 13 MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 Line Length vs. Data Rate The RS-485/RS-422 standard covers line lengths up to 4000 feet. For line lengths greater than 4000 feet, see Figure 23. Figures 19 and 20 show the system differential voltage for the parts driving 4000 feet of 26AWG twisted-pair wire at 110kHz into 120Ω loads. Typical Applications The MAX481, MAX483, MAX485, MAX487–MAX491, and MAX1487 transceivers are designed for bidirectional data communications on multipoint bus transmission lines. Figures 21 and 22 show typical network applications circuits. These parts can also be used as line repeaters, with cable lengths longer than 4000 feet, as shown in Figure 23. To minimize reflections, the line should be terminated at both ends in its characteristic impedance, and stub lengths off the main line should be kept as short as possible. The slew-rate-limited MAX483 and MAX487–MAX489 are more tolerant of imperfect termination. DI VY-VZ RO 5V 0V 1V 0V -1V 5V 0V 2μs/div DI VY-VZ RO 5V 0V 1V 0V -1V 5V 0V 2μs/div DI RO DE RE A B RE RE RE RO RO RO DI DI DI DE DE DE D D D R R R B B B A A A 120Ω 120Ω D R MAX481 MAX483 MAX485 MAX487 MAX1487 Figure 19. MAX481/MAX485/MAX490/MAX491/MAX1487 System Differential Voltage at 110kHz Driving 4000ft of Cable Figure 20. MAX483, MAX487–MAX489 System Differential Voltage at 110kHz Driving 4000ft of Cable Figure 21. MAX481/MAX483/MAX485/MAX487/MAX1487 Typical Half-Duplex RS-485 Network Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 14 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 Figure 22. MAX488–MAX491 Full-Duplex RS-485 Network 120Ω 120Ω R D RO RE DE DI A B Y 120Ω 120Ω DI DI DI RO RO RO DE DE DE RE RE RE Z Z Z Z Y Y Y A A A B B B D D D R R R MAX488–MAX491 NOTE: RE AND DE ON MAX489/MAX491 ONLY. Figure 23. Line Repeater for MAX488–MAX491 120Ω 120Ω DATA IN DATA OUT R D RO RE DE DI A B Z Y MAX488–MAX491 NOTE: RE AND DE ON MAX489/MAX491 ONLY. Isolated RS-485 For isolated RS-485 applications, see the MAX253 and MAX1480 data sheets. Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers Maxim Integrated 15 MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 _______________Ordering Information *Contact factory for dice specifications. MAX489MJD -55°C to +125°C 14 CERDIP MAX489ESD -40°C to +85°C 14 SO MAX489EPD -40°C to +85°C 14 Plastic DIP MAX489C/D 0°C to +70°C Dice* MAX489CSD 0°C to +70°C 14 SO MAX489CPD 0°C to +70°C 14 Plastic DIP MAX488MJA -55°C to +125°C 8 CERDIP MAX488ESA -40°C to +85°C 8 SO MAX488EPA -40°C to +85°C 8 Plastic DIP MAX488C/D 0°C to +70°C Dice* MAX488CSA 0°C to +70°C 8 SO MAX488CPA 0°C to +70°C 8 Plastic DIP MAX487MJA -55°C to +125°C 8 CERDIP MAX487ESA -40°C to +85°C 8 SO MAX487EPA -40°C to +85°C 8 Plastic DIP MAX487C/D 0°C to +70°C Dice* MAX487CSA 0°C to +70°C 8 SO MAX487CPA 0°C to +70°C 8 Plastic DIP MAX485MJA -55°C to +125°C 8 CERDIP MAX485ESA -40°C to +85°C 8 SO MAX485EPA -40°C to +85°C 8 Plastic DIP MAX485C/D 0°C to +70°C Dice* MAX485CSA 0°C to +70°C 8 SO MAX485CPA 0°C to +70°C 8 Plastic DIP MAX483MJA -55°C to +125°C 8 CERDIP MAX483ESA -40°C to +85°C 8 SO MAX483EPA -40°C to +85°C 8 Plastic DIP MAX481MJA -55°C to +125°C 8 CERDIP MAX481CPA 0°C to +70°C 8 Plastic DIP PART TEMP RANGE PIN-PACKAGE MAX491MJD -55°C to +125°C 14 CERDIP MAX491ESD -40°C to +85°C 14 SO MAX491EPD -40°C to +85°C 14 Plastic DIP MAX491C/D 0°C to +70°C Dice* MAX491CSD 0°C to +70°C 14 SO MAX491CPD 0°C to +70°C 14 Plastic DIP MAX490MJA -55°C to +125°C 8 CERDIP MAX490ESA -40°C to +85°C 8 SO MAX490EPA -40°C to +85°C 8 Plastic DIP MAX490C/D 0°C to +70°C Dice* MAX490CPA 0°C to +70°C 8 Plastic DIP PART TEMP RANGE PIN-PACKAGE MAX481ESA -40°C to +85°C 8 SO MAX485CUA 0°C to +70°C 8 µMAX MAX487CUA 0°C to +70°C 8 µMAX MAX488CUA 0°C to +70°C 8 µMAX MAX490CSA 0°C to +70°C 8 SO MAX490CUA 0°C to +70°C 8 µMAX __Ordering Information (continued) MAX1487MJA -55°C to +125°C 8 CERDIP MAX1487ESA -40°C to +85°C 8 SO MAX1487EPA -40°C to +85°C 8 Plastic DIP MAX1487C/D 0°C to +70°C Dice* MAX1487CSA 0°C to +70°C 8 SO MAX1487CPA 0°C to +70°C 8 Plastic DIP MAX1487CUA 0°C to +70°C 8 µMAX MAX483CUA 0°C to +70°C 8 µMAX MAX483C/D 0°C to +70°C Dice* MAX483CSA 0°C to +70°C 8 SO MAX483CPA 0°C to +70°C 8 Plastic DIP MAX481EPA -40°C to +85°C 8 Plastic DIP MAX481C/D 0°C to +70°C Dice* MAX481CUA 0°C to +70°C 8 µMAX MAX481CSA 0°C to +70°C 8 SO MAX491MSD/PR-T -55°C to +125°C 14 CERDIP MAX491MSD/PR -55°C to +125°C 14 CERDIP Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 16 Maxim Integrated MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 Package Information For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 8 PDIP P8-1 21-0043 — 8 SO S8-2 21-0041 90-0096 8 MAX U8-1 21-0036 90-0092 8 CERDIP J8-2 21-0045 — 14 PDIP P14-3 21-0043 — 14 SO S14-1 21-0041 90-0112 14 CERDIP J14-3 21-0045 — Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers MAX481/MAX483/MAX485/ MAX487–MAX491/MAX1487 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 17 © 2014 Maxim Integrated Products, Inc. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 0 1/93 Initial release. — 9 9/09 Changed column name in Selection Table to “Number of Receivers on Bus.” 1 10 9/14 Added MAX491MSD/PR and MAX491MSD/PR-T to data sheet. Updated Absolute Maximum Ratings. 2, 15 MAX3222/MAX3232/ MAX3237/MAX3241* 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors EVALUATION KIT AVAILABLE For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. 19-0273; Rev 7; 1/07 ________________General Description The MAX3222/MAX3232/MAX3237/MAX3241 transceivers have a proprietary low-dropout transmitter output stage enabling true RS-232 performance from a 3.0V to 5.5V supply with a dual charge pump. The devices require only four small 0.1µF external chargepump capacitors. The MAX3222, MAX3232, and MAX3241 are guaranteed to run at data rates of 120kbps while maintaining RS-232 output levels. The MAX3237 is guaranteed to run at data rates of 250kbps in the normal operating mode and 1Mbps in the MegaBaud™ operating mode, while maintaining RS-232 output levels. The MAX3222/MAX3232 have 2 receivers and 2 drivers. The MAX3222 features a 1µA shutdown mode that reduces power consumption and extends battery life in portable systems. Its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1µA supply current. The MAX3222 and MAX3232 are pin, package, and functionally compatible with the industry-standard MAX242 and MAX232, respectively. The MAX3241 is a complete serial port (3 drivers/ 5 receivers) designed for notebook and subnotebook computers. The MAX3237 (5 drivers/3 receivers) is ideal for fast modem applications. Both these devices feature a shutdown mode in which all receivers can remain active while using only 1µA supply current. Receivers R1 (MAX3237/MAX3241) and R2 (MAX3241) have extra outputs in addition to their standard outputs. These extra outputs are always active, allowing external devices such as a modem to be monitored without forward biasing the protection diodes in circuitry that may have VCC completely removed. The MAX3222, MAX3232, and MAX3241 are available in space-saving TSSOP and SSOP packages. ________________________Applications Notebook, Subnotebook, and Palmtop Computers High-Speed Modems Battery-Powered Equipment Hand-Held Equipment Peripherals Printers __Next Generation Device Features ♦ For Smaller Packaging: MAX3228E/MAX3229E: +2.5V to +5.5V RS-232 Transceivers in UCSP™ ♦ For Integrated ESD Protection: MAX3222E/MAX3232E/MAX3237E/MAX3241E*/ MAX3246E: ±15kV ESD-Protected, Down to 10nA, 3.0V to 5.5V, Up to 1Mbps, True RS-232 Transceivers ♦ For Low-Voltage or Data Cable Applications: MAX3380E/MAX3381E: +2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic Pins 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 SHDN VCC GND C1- T1OUT V+ C1+ EN TOP VIEW R1IN R1OUT T1IN T2OUT T2IN V- C2- C2+ R2IN 9 10 R2OUT DIP/SO MAX3222 + _________________Pin Configurations _______________Ordering Information MegaBaud and UCSP are trademarks of Maxim Integrated Products, Inc. *Covered by U.S. Patent numbers 4,636,930; 4,679,134; 4,777,577; 4,797,899; 4,809,152; 4,897,774; 4,999,761; and other patents pending. Typical Operating Circuits appear at end of data sheet. Pin Configurations continued at end of data sheet. Ordering Information continued at end of data sheet. +Denotes lead-free package. PART TEMP RANGE PIN-PACKAGE PKG CODE MAX3222CUP+ 0°C to +70°C 20 TSSOP U20+2 MAX3222CAP+ 0°C to +70°C 20 SSOP A20+1 MAX3222CWN+ 0°C to +70°C 18 SO W18+1 MAX3222CPN+ 0°C to +70°C 18 Plastic Dip P18+5 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 2 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 VCC = 5.0V ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS (VCC = +3.0V to +5.5V, C1–C4 = 0.1µF (Note 2), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 1: V+ and V- can have a maximum magnitude of 7V, but their absolute difference cannot exceed 13V. VCC...........................................................................-0.3V to +6V V+ (Note 1)...............................................................-0.3V to +7V V- (Note 1) ................................................................+0.3V to -7V V+ + V- (Note 1)...................................................................+13V Input Voltages T_IN, SHDN, EN ...................................................-0.3V to +6V MBAUD...................................................-0.3V to (VCC + 0.3V) R_IN .................................................................................±25V Output Voltages T_OUT...........................................................................±13.2V R_OUT....................................................-0.3V to (VCC + 0.3V) Short-Circuit Duration T_OUT ....................................................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin TSSOP (derate 6.7mW/°C above +70°C).............533mW 16-Pin Narrow SO (derate 8.70mW/°C above +70°C) ....696mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C)........762mW 16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)...842mW 18-Pin SO (derate 9.52mW/°C above +70°C)..............762mW 18-Pin Plastic DIP (derate 11.11mW/°C above +70°C) ..889mW 20-Pin SSOP (derate 7.00mW/°C above +70°C) .........559mW 20-Pin TSSOP (derate 8.0mW/°C above +70°C).............640mW 28-Pin TSSOP (derate 8.7mW/°C above +70°C).............696mW 28-Pin SSOP (derate 9.52mW/°C above +70°C) .........762mW 28-Pin SO (derate 12.50mW/°C above +70°C).....................1W Operating Temperature Ranges MAX32_ _C_ _.....................................................0°C to +70°C MAX32_ _E_ _ .................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C IOUT = -1.0mA IOUT = 1.6mA Receivers disabled T_IN, EN, SHDN, MBAUD T_IN, EN, SHDN, MBAUD CONDITIONS V 0.8 1.5 Input Threshold Low 0.6 1.2 Input Voltage Range -25 25 V 0.5 2.0 VCC Power-Supply Current Output Voltage High VCC - 0.6 VCC - 0.1 V Output Voltage Low 0.4 V Output Leakage Current ±0.05 ±10 µA Input Leakage Current ±0.01 ±1.0 µA 0.8 V Input Logic Threshold Low (Note 3) PARAMETER MIN TYP MAX UNITS TA = +25°C TA = +25°C V 1.8 2.4 Input Threshold High 1.5 2.4 VCC = 3.3V VCC = 5.0V 2.0 V 2.4 Input Logic Threshold High (Note 3) No load, VCC = 3.3V or 5.0V, TA = +25°C mA 0.3 1.0 MAX3222/MAX3232/ MAX3241 MAX3237 Shutdown Supply Current SHDN = GND, TA = +25°C 1.0 10 µA VCC = 3.3V VCC = 5.0V VCC = 3.3V VCC = 5.0V DC CHARACTERISTICS LOGIC INPUTS AND RECEIVER OUTPUTS RECEIVER INPUTS 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors Maxim Integrated 3 MAX3222/MAX3232/MAX3237/MAX3241 TIMING CHARACTERISTICS—MAX3222/MAX3232/MAX3241 (VCC = +3.0V to +5.5V, C1–C4 = 0.1µF (Note 2), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) ELECTRICAL CHARACTERISTICS (continued) (VCC = +3.0V to +5.5V, C1–C4 = 0.1µF (Note 2), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) T1IN = T2IN = GND, T3IN = VCC, T3OUT loaded with 3kΩ to GND, T1OUT and T2OUT loaded with 2.5mA each CONDITIONS Transmitter Output Voltage ±5.0 V Input Hysteresis 0.3 V PARAMETER MIN TYP MAX UNITS Output Voltage Swing All transmitter outputs loaded with 3kΩ to ground ±5.0 ±5.4 V Output Short-Circuit Current ±35 ±60 mA Output Resistance VCC = V+ = V- = 0V, VOUT = ±2V 300 10M Ω VOUT = ±12V, VCC = 0V or 3V to 5.5V, transmitters disabled Output Leakage Current ±25 µA tPHL RL = 3kΩ, CL = 1000pF, one transmitter switching tPLH | tPHL - tPLH | | tPHL - tPLH | Normal operation Normal operation CONDITIONS 0.3 µs 0.3 Receiver Propagation Delay Maximum Data Rate 120 235 kbps Receiver Skew 300 ns Transmitter Skew 300 ns Receiver Output Disable Time 200 ns Receiver Output Enable Time 200 ns PARAMETER MIN TYP MAX UNITS VCC = 3.3V, RL = 3kΩ to 7kΩ, 6 30 +3V to -3V or -3V to +3V, TA = +25°C, one transmitter switching V/µs 4 30 Transition-Region Slew Rate R_IN to R_OUT, CL = 150pF CL = 150pF to 1000pF CL = 150pF to 2500pF Input Resistance TA = +25°C 357 kΩ MOUSE DRIVEABILITY (MAX3241) TRANSMITTER OUTPUTS 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 4 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 __________________________________________Typical Operating Characteristics (VCC = +3.3V, 235kbps data rate, 0.1µF capacitors, all transmitters loaded with 3kΩ, TA = +25°C, unless otherwise noted.) RL = 3kΩ, CL = 1000pF, one transmitter switching, MBAUD = GND Normal operation CONDITIONS Receiver Output Disable Time Normal operation 200 ns | tPHL - tPLH |, MBAUD = GND 100 ns 0.15 250 µs 0.15 Receiver Propagation Delay Receiver Output Enable Time 200 ns PARAMETER MIN TYP MAX UNITS TIMING CHARACTERISTICS—MAX3237 (VCC = +3.0V to +5.5V, C1–C4 = 0.1µF (Note 2), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) VCC = 3.0V to 4.5V, RL = 3kΩ, CL = 250pF, one transmitter switching, MBAUD = VCC 1000 VCC = 4.5V to 5.5V, RL = 3kΩ, CL = 1000pF, one transmitter switching, MBAUD = VCC kbps 1000 Maximum Data Rate R_IN to R_OUT, CL = 150pF | tPHL - tPLH |, MBAUD = VCC 25 ns Transmitter Skew Receiver Skew | tPHL - tPLH | 50 ns 6 30 V/µs 4 30 tPHL tPLH CL = 150pF to 2500pF, MBAUD = GND CL = 150pF to 1000pF MBAUD = GND VCC = 3.3V, RL = 3Ω to 7kΩ, +3V to -3V or -3V to +3V, TA = +25°C Transition-Region Slew Rate MBAUD = VCC 24 150 Note 2: MAX3222/MAX3232/MAX3241: C1–C4 = 0.1µF tested at 3.3V ±10%; C1 = 0.047µF, C2–C4 = 0.33µF tested at 5.0V ±10%. MAX3237: C1–C4 = 0.1µF tested at 3.3V ±5%; C1–C4 = 0.22µF tested at 3.3V ±10%; C1 = 0.047µF, C2–C4 = 0.33µF tested at 5.0V ±10%. Note 3: Transmitter input hysteresis is typically 250mV. -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 0 MAX3222/MAX3232 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX3222-01 LOAD CAPACITANCE (pF) TRANSMITTER OUTPUT VOLTAGE (V) 1000 4000 5000 2000 3000 VOUT+ VOUT- 0 2 4 6 8 10 12 14 16 18 20 22 150 MAX3222/MAX3232 SLEW RATE vs. LOAD CAPACITANCE MAX3222-02 LOAD CAPACITANCE (pF) SLEW RATE (V/μs) 1000 4000 5000 2000 3000 FOR DATA RATES UP TO 235kbps +SLEW -SLEW 0 5 10 15 20 25 30 35 40 0 MAX3222/MAX3232 SUPPLY CURRENT vs. LOAD CAPACITANCE WHEN TRANSMITTING DATA MAX3222-03 LOAD CAPACITANCE (pF) SUPPLY CURRENT (mA) 1000 4000 5000 2000 3000 235kbps 120kbps 20kbps 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors Maxim Integrated 5 MAX3222/MAX3232/MAX3237/MAX3241 -7.5 -5.0 -2.5 0 2.5 5.0 7.5 0 MAX3241 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX3222-04 LOAD CAPACITANCE (pF) TRANSMITTER OUTPUT VOLTAGE (V) 1000 4000 5000 2000 3000 VOUT+ 1 TRANSMITTER AT 235kbps 2 TRANSMITTERS AT 30kbps VOUT- ALL OUTPUTS LOADED WITH 3kΩ +CL 0.1μF CHARGE-PUMP CAPACITORS FOR ALL DATA RATES UP TO 235kbps 4 6 8 10 12 14 16 18 20 22 24 0 MAX3241 SLEW RATE vs. LOAD CAPACITANCE MAX3222-05 LOAD CAPACITANCE (pF) SLEW RATE (V/μs) 1000 4000 5000 2000 3000 +SLEW -SLEW 0 5 10 15 20 25 30 35 45 40 0 MAX3241 SUPPLY CURRENT vs. LOAD CAPACITANCE WHEN TRANSMITTING DATA MAX3222-06 LOAD CAPACITANCE (pF) SUPPLY CURRENT (mA) 1000 4000 5000 2000 3000 235kbps 120kbps 20kbps -7.5 -5.0 -2.5 0 2.5 5.0 7.5 0 MAX3237 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE (MBAUD = GND) MAX3222-07 LOAD CAPACITANCE (pF) TRANSMITTER OUTPUT VOLTAGE (V) 1000 4000 5000 2000 3000 1 TRANSMITTER AT 240kbps 4 TRANSMITTERS AT 15kbps 3kΩ + CL LOADS VCC = 3.3V 0 10 20 30 50 40 60 70 0 MAX3237 SLEW RATE vs. LOAD CAPACITANCE (MBAUD = VCC) MAX3222-10 LOAD CAPACITANCE (pF) SLEW RATE (V/μs) 500 1000 1500 2000 -SLEW, 1Mbps +SLEW, 1Mbps 1 TRANSMITTER AT FULL DATA RATE 4 TRANSMITTERS AT 1/16 DATA RATE 3kΩ + CL LOAD EACH OUTPUT VCC = 3.3V -SLEW, 2Mbps +SLEW, 2Mbps -7.5 -5.0 -2.5 0 2.5 5.0 7.5 0 MAX3237 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE (MBAUD = VCC) MAX3222-08 LOAD CAPACITANCE (pF) TRANSMITTER OUTPUT VOLTAGE (V) 500 1000 1500 2000 1 TRANSMITTER AT FULL DATA RATE 4 TRANSMITTERS AT 1/16 DATA RATE 3kΩ + CL LOAD, EACH OUTPUT VCC = 3.3V 2Mbps 1.5Mbps 1Mbps 2Mbps 1Mbps 1.5Mbps 0 10 20 30 40 50 60 0 MAX3237 SUPPLY CURRENT vs. LOAD CAPACITANCE (MBAUD = GND) MAX3222-11 LOAD CAPACITANCE (pF) SUPPLY CURRENT (mA) 1000 4000 5000 2000 3000 240kbps 120kbps 20kbps 1 TRANSMITTER AT FULL DATA RATE 4 TRANSMITTERS AT 1/16 DATA RATE 3kΩ + CL LOADS VCC = 3.3V 0 2 4 6 8 10 12 0 MAX3237 SLEW RATE vs. LOAD CAPACITANCE (MBAUD = GND) MAX3222-09 LOAD CAPACITANCE (pF) SLEW RATE (V/μs) 1000 4000 5000 2000 3000 +SLEW -SLEW 1 TRANSMITTER AT 240kbps 4 TRANSMITTERS AT 15kbps 3kΩ + CL LOADS VCC = 3.3V 0 10 30 20 40 50 60 70 0 MAX3237 SKEW vs. LOAD CAPACITANCE (tPLH - tPHL) MAX3222-12 LOAD CAPACITANCE (pF) 500 2000 2500 1000 1500 MAX MIN AVERAGE; 10 PARTS SKEW (ns)1 TRANSMITTER AT 512kbps 4 TRANSMITTERS AT 32kbps 3kΩ + CL LOADS VCC = 3.3V MBAUD = VCC _____________________________Typical Operating Characteristics (continued) (VCC = +3.3V, 235kbps data rate, 0.1µF capacitors, all transmitters loaded with 3kΩ, TA = +25°C, unless otherwise noted.) 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 6 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 — FUNCTION — MAX3222 Noninverting Complementary Receiver Outputs. Always active. DIP/SO SSOP — 11, 14 1 1 Receiver Enable. Active low. 2 2 Positive Terminal of Voltage-Doubler Charge-Pump Capacitor 6 6 Negative Terminal of Inverting Charge-Pump Capacitor 5 5 Positive Terminal of Inverting Charge-Pump Capacitor 4 4 Negative Terminal of Voltage-Doubler Charge-Pump Capacitor 3 3 +5.5V Generated by the Charge Pump 11, 12 12, 13 TTL/CMOS Transmitter Inputs 10, 13 10, 15 TTL/CMOS Receiver Outputs 9, 14 9, 16 RS-232 Receiver Inputs 8, 15 8, 17 RS-232 Transmitter Outputs 7 7 -5.5V Generated by the Charge Pump 18 20 Shutdown Control. Active low. 17 19 +3.0V to +5.5V Supply Voltage 16 18 Ground No Connection MAX3232 MAX3237 — 16 — 13 1 28 5 3 4 1 3 25 2 27 10, 11 17, 19, 22, 23, 24 9, 12 18, 20, 21 8, 13 8, 9, 11 7, 14 5, 6, 7, 10, 12 6 4 — 14 16 26 15 2 — — NAME EN C1+ C2- C2+ C1- V+ T_IN R_OUT R_IN T_OUT V- SHDN VCC GND R_OUTB N.C. MAX3241 20, 21 23 28 2 1 24 27 12, 13, 14 15–19 4–8 9, 10, 11 3 22 26 25 — PIN — — MegaBaud Control Input. Connect to GND for normal operation; connect to VCC for 1Mbps transmission rates. — 15 — MBAUD ______________________________________________________________Pin Description 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors Maxim Integrated 7 MAX3222/MAX3232/MAX3237/MAX3241 _______________Detailed Description Dual Charge-Pump Voltage Converter The MAX3222/MAX3232/MAX3237/MAX3241’s internal power supply consists of a regulated dual charge pump that provides output voltages of +5.5V (doubling charge pump) and -5.5V (inverting charge pump), regardless of the input voltage (VCC) over the 3.0V to 5.5V range. The charge pumps operate in a discontinuous mode; if the output voltages are less than 5.5V, the charge pumps are enabled, and if the output voltages exceed 5.5V, the charge pumps are disabled. Each charge pump requires a flying capacitor (C1, C2) and a reservoir capacitor (C3, C4) to generate the V+ and V- supplies. RS-232 Transmitters The transmitters are inverting level translators that convert CMOS-logic levels to 5.0V EIA/TIA-232 levels. The MAX3222/MAX3232/MAX3241 transmitters guarantee a 120kbps data rate with worst-case loads of 3kΩ in parallel with 1000pF, providing compatibility with PC-toPC communication software (such as LapLink™). Typically, these three devices can operate at data rates of 235kbps. Transmitters can be paralleled to drive multiple receivers or mice. The MAX3222/MAX3237/MAX3241’s output stage is turned off (high impedance) when the device is in shutdown mode. When the power is off, the MAX3222/ MAX3232/MAX3237/MAX3241 permit the outputs to be driven up to ±12V. The transmitter inputs do not have pullup resistors. Connect unused inputs to GND or VCC. MAX3237 MegaBaud Operation In normal operating mode (MBAUD = GND), the MAX3237 transmitters guarantee a 250kbps data rate with worst-case loads of 3kΩ in parallel with 1000pF. This provides compatibility with PC-to-PC communication software, such as LapLink. For higher speed serial communications, the MAX3237 features MegaBaud operation. In MegaBaud operating mode (MBAUD = VCC), the MAX3237 transmitters guarantee a 1Mbps data rate with worst-case loads of 3kΩ in parallel with 250pF for 3.0V < VCC < 4.5V. For 5V ±10% operation, the MAX3237 transmitters guarantee a 1Mbps data rate into worst-case loads of 3kΩ in parallel with 1000pF. MAX3222 MAX3232 MAX3237 MAX3241 5kΩ R_ OUT R_ IN EN* C2- C2+ C1- C1+ V- V+ VCC C4 C1 C3 C2 0.1μF VCC SHDN* T_ IN T_ OUT GND VCC 0V 7kΩ 150pF MAX3222 MAX3232 MAX3237 MAX3241 5kΩ R_ OUT R_ IN EN* C2- C2+ C1- C1+ V- V+ VCC C4 C1 C3 C2 0.1μF VCC SHDN* T_ IN T_ OUT GND VCC 0V 3kΩ 2500pF MINIMUM SLEW-RATE TEST CIRCUIT MAXIMUM SLEW-RATE TEST CIRCUIT *MAX3222/MAX3237/MAX3241 ONLY Figure 1. Slew-Rate Test Circuits LapLink is a trademark of Traveling Software, Inc. 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 8 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 RS-232 Receivers The receivers convert RS-232 signals to CMOS-logic output levels. The MAX3222/MAX3237/MAX3241 receivers have inverting three-state outputs. In shutdown, the receivers can be active or inactive (Table 1). The complementary outputs on the MAX3237 (R1OUTB) and the MAX3241 (R1OUTB, R2OUTB) are always active, regardless of the state of EN or SHDN. This allows for Ring Indicator applications without forward biasing other devices connected to the receiver outputs. This is ideal for systems where VCC is set to 0V in shutdown to accommodate peripherals, such as UARTs (Figure 2). MAX3222/MAX3237/MAX3241 Shutdown Mode Supply current falls to less than 1µA in shutdown mode (SHDN = low). When shut down, the device’s charge pumps are turned off, V+ is pulled down to VCC, V- is pulled to ground, and the transmitter outputs are disabled (high impedance). The time required to exit shutdown is typically 100µs, as shown in Figure 3. Connect SHDN to VCC if the shutdown mode is not used. SHDN has no effect on R_OUT or R_OUTB. MAX3222/MAX3237/MAX3241 Enable Control The inverting receiver outputs (R_OUT) are put into a high-impedance state when EN is high. The complementary outputs R1OUTB and R2OUTB are always active, regardless of the state of EN and SHDN (Table 1). EN has no effect on T_OUT. __________Applications Information Capacitor Selection The capacitor type used for C1–C4 is not critical for proper operation; polarized or nonpolarized capacitors can be used. The charge pump requires 0.1µF capacitors for 3.3V operation. For other supply voltages, refer to Table 2 for required capacitor values. Do not use values lower than those listed in Table 2. Increasing the capacitor values (e.g., by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without changing C1’s value. However, do not increase C1 without also increasing the values of C2, C3, and C4, to maintain the proper ratios (C1 to the other capacitors). When using the minimum required capacitor values, make sure the capacitor value does not degrade excessively with temperature. If in doubt, use capacitors with a higher nominal value. The capacitor’s equivalent series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V-. MAX3237 MAX3241 T1OUT R1OUTB Tx UART VCC T1IN LOGIC TRANSITION DETECTOR R1OUT R1IN EN = VCC SHDN = GND VCC TO μP Rx PREVIOUS RS-232 Tx UART PROTECTION DIODE PROTECTION DIODE SHDN = GND VCC VCC GND Rx 5kΩ a) OLDER RS-232: POWERED-DOWN UART DRAWS CURRENT FROM ACTIVE RECEIVER OUTPUT IN SHUTDOWN. b) NEW MAX3237/MAX3241: EN SHUTS DOWN RECEIVER OUTPUTS (EXCEPT FOR B OUTPUTS), SO NO CURRENT FLOWS TO UART IN SHUTDOWN. B OUTPUTS INDICATE RECEIVER ACTIVITY DURING SHUTDOWN WITH EN HIGH. GND 5kΩ Figure 2. Detection of RS-232 Activity when the UART and Interface are Shut Down; Comparison of MAX3237/MAX3241 (b) with Previous Transceivers (a). 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors Maxim Integrated 9 MAX3222/MAX3232/MAX3237/MAX3241 Power-Supply Decoupling In most circumstances, a 0.1µF bypass capacitor is adequate. In applications that are sensitive to powersupply noise, decouple VCC to ground with a capacitor of the same value as charge-pump capacitor C1. Connect bypass capacitors as close to the IC as possible. Operation Down to 2.7V Transmitter outputs will meet EIA/TIA-562 levels of ±3.7V with supply voltages as low as 2.7V. Transmitter Outputs when Exiting Shutdown Figure 3 shows two transmitter outputs when exiting shutdown mode. As they become active, the two transmitter outputs are shown going to opposite RS-232 levels (one transmitter input is high, the other is low). Each transmitter is loaded with 3kΩ in parallel with 2500pF. The transmitter outputs display no ringing or undesirable transients as they come out of shutdown. Note that the transmitters are enabled only when the magnitude of V- exceeds approximately 3V. Mouse Driveability The MAX3241 has been specifically designed to power serial mice while operating from low-voltage power supplies. It has been tested with leading mouse brands from manufacturers such as Microsoft and Logitech. The MAX3241 successfully drove all serial mice tested and met their respective current and voltage requirements. Figure 4a shows the transmitter output voltages under increasing load current at 3.0V. Figure 4b shows a typical mouse connection using the MAX3241. Table 1. MAX3222/MAX3237/MAX3241 Shutdown and Enable Control Truth Table Table 2. Required Minimum Capacitor Values 5V/div VCC = 3.3V C1–C4 = 0.1μF 2V/div T2 50μs/div T1 Figure 3. Transmitter Outputs when Exiting Shutdown or Powering Up VCC (V) C1 (µF) 4.5 to 5.5 0.047 3.0 to 5.5 0.1 C2, C3, C4 (µF) MAX3222/MAX3232/MAX3241 0.33 0.47 1 Active 0 1 1 Active SHDN 0 1 High-Z 0 0 High-Z EN T_OUT High-Z Active High-Z Active R_OUT R_OUTB (MAX3237/ MAX3241) Active Active Active Active 3.0 to 3.6 0.22 3.15 to 3.6 0.1 MAX3237 0.22 0.1 4.5 to 5.5 0.047 3.0 to 5.5 0.22 0.33 1.0 3.0 to 3.6 0.1 0.1 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 10 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 MAX3241 23 EN 15 R5OUT 16 R4OUT 17 R3OUT 18 R2OUT 19 R1OUT 20 R2OUTB 21 R1OUTB 5kΩ 5kΩ 5kΩ 5kΩ 5kΩ R5IN 8 R4IN 7 6 R2IN 5 R1IN 4 SHDN 22 GND 25 12 T3IN 13 T2IN 14 T1IN C2- 2 C2+ 1 C1- 24 C1+ 28 T3OUT 11 +V COMPUTER SERIAL PORT MOUSE +V -V GND Tx T2OUT 10 T1OUT 9 V- 3 V+ 27 VCC VCC C4 C1 C3 C2 0.1μF VCC = 3V to 5.5V 26 R3IN Figure 4b. Mouse Driver Test Circuit -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 01234567 MAX3222-04 LOAD CURRENT PER TRANSMITTER (mA) TRANSMITTER OUTPUT VOLTAGE (V) VOUT+ VCC = 3.0V VOUTVOUT+ VCC VOUTT1 T2 T3 Figure 4a. MAX3241 Transmitter Output Voltage vs. Load Current per Transmitter 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors Maxim Integrated 11 MAX3222/MAX3232/MAX3237/MAX3241 High Data Rates The MAX3222/MAX3232/MAX3241 maintain the RS-232 ±5.0V minimum transmitter output voltage even at high data rates. Figure 5 shows a transmitter loopback test circuit. Figure 6 shows a loopback test result at 120kbps, and Figure 7 shows the same test at 235kbps. For Figure 6, all transmitters were driven simultaneously at 120kbps into RS-232 loads in parallel with 1000pF. For Figure 7, a single transmitter was driven at 235kbps, and all transmitters were loaded with an RS-232 receiver in parallel with 1000pF. The MAX3237 maintains the RS-232 ±5.0V minimum transmitter output voltage at data rates up to 1Mbps. Figure 8 shows a loopback test result at 1Mbps with MBAUD = VCC. For Figure 8, all transmitters were loaded with an RS-232 receiver in parallel with 250pF. MAX3222 MAX3232 MAX3237 MAX3241 5kΩ R_ OUT R_ IN EN* C2- C2+ C1- C1+ V- V+ VCC C4 C3 C1 C2 0.1μF VCC SHDN* T_ IN T_ OUT GND VCC 0V 1000pF *MAX3222/MAX3237/MAX3241 ONLY T1IN R1OUT VCC = 3.3V T1OUT 5V/div 5V/div 5V/div 5μs/div Figure 5. Loopback Test Circuit Figure 6. MAX3241 Loopback Test Result at 120kbps T1IN R1OUT VCC = 3.3V T1OUT 5V/div 5V/div 2μs/div 5V/div Figure 7. MAX3241 Loopback Test Result at 235kbps +5V 0V +5V 0V -5V +5V 0V T_IN T_OUT = R_IN 5kΩ + 250pF R_OUT 150pF 200ns/div VCC = 3.3V Figure 8. MAX3237 Loopback Test Result at 1000kbps (MBAUD = VCC) 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 12 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 __________________________________________________Typical Operating Circuits MAX3222 10 R2OUT 1 13 R1OUT R2IN 9 18 GND 16 RS-232 OUTPUTS TTL/CMOS INPUTS 11 T2IN 12 T1IN C2- 6 C2+ 5 C1- 4 C1+ 2 R1IN 14 T2OUT 8 T1OUT 15 V- 7 V+ 3 VCC 17 C1 0.1μF C2 0.1μF 0.1μF +3.3V RS-232 INPUTS TTL/CMOS OUTPUTS EN SHDN C3* 0.1μF C4 0.1μF PIN NUMBERS REFER TO DIP/SO PACKAGES. * C3 CAN BE RETURNED TO EITHER VCC OR GROUND. MAX3232 9 R2OUT 12 R1OUT R2IN 8 GND 15 RS-232 OUTPUTS TTL/CMOS INPUTS 10 T2IN 11 T1IN C2- 5 C2+ 4 C1- 3 C1+ 1 R1IN 13 T2OUT 7 T1OUT 14 V- 6 V+ 2 VCC C4 0.1μF 16 0.1μF 0.1μF 0.1μF +3.3V RS-232 INPUTS TTL/CMOS OUTPUTS C3* 0.1μF * C3 CAN BE RETURNED TO EITHER VCC OR GROUND. SEE TABLE 2 FOR CAPACITOR SELECTION 5kΩ 5kΩ 5kΩ 5kΩ Interconnection with 3V and 5V Logic The MAX3222/MAX3232/MAX3237/MAX3241 can directly interface with various 5V logic families, including ACT and HCT CMOS. See Table 3 for more information on possible combinations of interconnections. Table 3. Logic-Family Compatibility with Various Supply Voltages Compatible with ACT and HCT CMOS, and with TTL. Incompatible with AC, HC, and CD4000 CMOS. 5 3.3 SYSTEM POWERSUPPLY VOLTAGE (V) Compatible with all TTL and CMOS-logic families. 5 5 Compatible with all CMOS families. 3.3 3.3 COMPATIBILITY MAX32_ _ VCC SUPPLY VOLTAGE (V) 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors Maxim Integrated 13 MAX3222/MAX3232/MAX3237/MAX3241 _____________________________________Typical Operating Circuits (continued) MAX3241 23 EN 15 R5OUT 16 R4OUT 17 R3OUT 18 R2OUT 19 R1OUT 20 R2OUTB 21 R1OUTB TTL/CMOS OUTPUTS 5kΩ 5kΩ 5kΩ 5kΩ 5kΩ R5IN 8 * C3 CAN BE RETURNED TO EITHER VCC OR GROUND. R4IN 7 R3IN 6 R2IN 5 R1IN 4 RS-232 INPUTS SHDN 22 GND 25 RS-232 OUTPUTS TTL/CMOS INPUTS 12 T3IN 13 T2IN T1IN 14 C2- 2 C2+ 1 C1- 24 C1+ 28 T3OUT 11 T2OUT 10 T1OUT 9 V- 3 V+ 27 VCC C4 0.1μF C3* 0.1μF 0.1μF 0.1μF 0.1μF +3.3V 26 MAX3237 13 EN 18 R3OUT 20 R2OUT 21 R1OUT 16 R1OUTB LOGIC OUTPUTS 5kΩ 5kΩ 5kΩ * C3 CAN BE RETURNED TO EITHER VCC OR GROUND. R3IN 11 R2IN 9 R1IN 8 RS-232 INPUTS GND 2 RS-232 OUTPUTS LOGIC INPUTS 22 T3IN 23 T2IN T1IN 24 C2- 3 C2+ 1 C1- 25 C1+ 28 T3OUT 7 T2OUT 6 T1OUT 5 T1 T2 T3 R1 R2 R3 V- 4 V+ 27 VCC 0.1μF 0.1μF 0.1μF 0.1μF 0.1μF 26 MBAUD 15 17 T5IN 19 T4IN T5OUT 12 T4OUT 10 SHDN 14 T4 T5 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 14 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 _____________________________________________Pin Configurations (continued) 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 VCC GND T1OUT C2+ R1IN C1- V+ C1+ MAX3232 R1OUT T1IN T2IN R2IN R2OUT T2OUT V- C2- DIP/SO/TSSOP + TOP VIEW 20 19 18 17 16 15 14 13 1 2 3 8 12 10 11 4 5 6 7 SHDN VCC GND C1- T1OUT V+ C1+ EN R1IN R1OUT T1IN T2IN T2OUT V- C2- C2+ R2IN 9 R2OUT SSOP/TSSOP + N.C. N.C. MAX3222 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 C1+ V+ VCC C1- T1IN T2IN MBAUD T3IN R1OUT R2OUT T4IN R3OUT T5IN R1OUTB SHDN EN T5OUT R3IN T4OUT R2IN R1IN T3OUT T2OUT T1OUT V- C2- GND C2+ SSOP MAX3237 + 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 C1+ V+ VCC GND C1- EN R5OUT SHDN R1OUTB R2OUTB R1OUT R2OUT R3OUT R4OUT T1IN T2IN T3IN T3OUT T2OUT T1OUT R5IN R4IN R3IN R2IN R1IN V- C2- C2+ SO/SSOP/TSSOP MAX3241 + 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors Maxim Integrated 15 MAX3222/MAX3232/MAX3237/MAX3241 ______3V-Powered EIA/TIA-232 and EIA/TIA-562 Transceivers from Maxim Ordering Information (continued) *Dice are tested at TA = +25°C, DC parameters only. +Denotes lead-free package. 0.1µF capacitors, 1 complementary receiver, MegaBaud operation MAX3237 3.0 to 5.5 5/3 3 250/1000 232 0.1µF capacitors, AutoShutdown, complementary receiver, drives mice MAX3243 3.0 to 5.5 3/5 1 120 232 MAX3232 3.0 to 5.5 2/2 N/A 120 232 0.1µF capacitors MAX3223 3.0 to 5.5 2/2 2 120 232 0.1µF capacitors, AutoShutdown MAX3222 3.0 to 5.5 2/2 2 120 232 0.1µF capacitors 232 562 232 562 232 EIA/ TIA-232 OR 562 2.7 to 3.6 AutoShutdown, complementary receiver, drives mice, transient detection MAX3212 3/5 5 235 MAX563 3.0 to 3.6 2/2 2 230 0.1µF capacitors Operates directly from batteries without a voltage regulator MAX218 1.8 to 4.25 2/2 2 120 No. OF RECEIVERS ACTIVE IN SHUTDOWN POWERSUPPLY VOLTAGE (V) MAX562 2.7 to 5.25 3/5 5 230 Wide supply range MAX212 3.0 to 3.6 3/5 5 120 Drives mice FEATURES GUARANTEED DATA RATE (kbps) No. OF TRANSMITTERS/ RECEIVERS PART 0.1µF capacitors, 2 complementary receivers, drives mice MAX3241 3.0 to 5.5 3/5 5 120 232 PART TEMP RANGE PIN-PACKAGE PKG CODE MAX3222EUP+ -40°C to +85°C 20 TSSOP U20+2 MAX3222EAP+ -40°C to +85°C 20 SSOP A20+1 MAX3222EWN+ -40°C to +85°C 18 SO W18+1 MAX3222EPN+ -40°C to +85°C 18 Plastic Dip P18+5 MAX3222C/D 0°C to +70°C Dice* — MAX3232CUE+ 0°C to +70°C 16 TSSOP U16+1 MAX3232CSE+ 0°C to +70°C 16 Narrow SO S16+1 MAX3232CWE+ 0°C to +70°C 16 Wide SO W16+1 MAX3232CPE+ 0°C to +70°C 16 Plastic DIP P16+1 MAX3232EUE+ -40°C to +85°C 16 TSSOP U16+1 MAX3232ESE+ -40°C to +85°C 16 Narrow SO S16+5 PART TEMP RANGE PIN-PACKAGE PKG CODE MAX3232EWE+ -40°C to +85°C 16 Wide SO W16+1 MAX3232EPE+ -40°C to +85°C 16 Plastic DIP P16+1 MAX3237CAI+ 0°C to +70°C 16 SSOP A28+2 MAX3237EAI+ 0°C to +70°C 28 SSOP A28+1 MAX3241CUI+ 0°C to +70°C 28 TSSOP U28+2 MAX3241CAI+ 0°C to +70°C 28 SSOP A28+1 MAX3241CWI+ 0°C to +70°C 28 SO W28+6 MAX3241EUI+ -40°C to +85°C 28 TSSOP U28+2 MAX3241EAI+ -40°C to +85°C 28 SSOP A28+1 MAX3241EWI+ -40°C to +85°C 28 SO W28+6 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors 16 Maxim Integrated MAX3222/MAX3232/MAX3237/MAX3241 ___________________Chip Topography ___________________Chip Information T2IN T1IN 0.127" (3.225mm) 0.087" (2.209mm) T2OUT R2IN R2OUT R1OUT R1IN T1OUT V+ C1+ VCC SHDN EN C1- C2+ C2- V- GND MAX3222 TRANSISTOR COUNT: 339 SUBSTRATE CONNECTED TO GND MAX3222 339 MAX3232 339 MAX3237 1212 MAX3241 894 PART TRANSISTOR COUNT Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 17 © 2007 Maxim Integrated Products, Inc. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1µF External Capacitors MAX3222/MAX3232/MAX3237/MAX3241 TSSOP4.40mm.EPS Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Revision History Pages changed at Rev 7: 1, 15, 16, 17 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown General Description The MAX3221/MAX3223/MAX3243 achieve 1µA supply current with Maxim’s revolutionary AutoShutdown™ feature. When the MAX3221/MAX3223/MAX3243 do not sense a valid signal level on their receiver inputs, the on-board power supply and drivers shut down. This occurs if the RS-232 cable is disconnected or if the transmitters of the connected peripheral are turned off. The system turns on again when a valid level is applied to any RS-232 receiver input. The MAX3221/MAX3223/MAX3243 require only 0.1µF capacitors in 3.3V operation, and can operate from input voltages ranging from +3.0V to +5.5V. A proprietary, high-efficiency, dual charge-pump power supply and a low-dropout transmitter combine to deliver true RS-232 performance from a single +3.0V to +5.5V supply. The MAX3221 is a 1-driver/1-receiver 16-pin SSOP version of the 20-pin 2-driver/2-receiver MAX3223. The MAX3243 is a 3-driver/5-receiver with a complementary always-active receiver for external monitoring in a variety of 28 pin packages. Please see order information table for package offerings. Applications • Battery-Powered Equipment • Hand-Held Equipment • Peripherals • Portable Diagnostics Equipment Benefits and Features • Integrated Charge Pump Circuitry Simplifies Power Requirements • Eliminates the Need for a ±12 Supply • Operation From a Single +3.3V or +5V Supply • 1µA Supply Current in Shutdown Mode Saves Power • AutoShutdown Feature is Enabled After No Activity on Receiver Inputs for 30µs • Software Control Option for Shutdown 19-0306; Rev 9; 1/15 PART MAX3221CAE MAX3221EUE† -40°C to +85°C 0°C to +70°C TEMP RANGE PIN-PACKAGE 16 SSOP 16 TSSOP †Future product—contact factory for availability. AutoShutdown and UCSP are trademarks of Maxim Integrated Products, Inc. Pin Configurations appear at end of data sheet. Typical Operating Circuits appear at end of data sheet. MAX3223EPP -40°C to +85°C 20 Plastic DIP MAX3223EAP -40°C to +85°C 20 SSOP MAX3243CWI 0°C to +70°C 28 Wide SO MAX3243CAI 0°C to +70°C 28 SSOP MAX3243EWI -40°C to +85°C 28 Wide SO MAX3243EAI -40°C to +85°C 28 SSOP MAX3223CPP MAX3223CAP 0°C to +70°C 0°C to +70°C 20 Plastic DIP 20 SSOP Ordering Information Selector Guide MAX3221 MAX3223 MAX3243 1 2 3 1 2 3.0 to 5.5 3.0 to 5.5 5 3.0 to 5.5 Yes Yes Yes PART Tx Rx VCC RANGE (V) AutoShutdown MAX3221CUE† 0°C to +70°C 16 TSSOP MAX3221EAE -40°C to +85°C 16 SSOP MAX3223CUP 0°C to +70°C 20 TSSOP MAX3223EUP -40°C to +85°C 20 TSSOP MAX3243CUI 0°C to +70°C 28 TSSOP MAX3243EUI -40°C to +85°C 28 TSSOP www.maximintegrated.com Maxim Integrated | 2 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown Absolute Maximum Ratings Electrical Characteristics (VCC = +3.0V to +5.5V, C1–C4 = 0.1µF (Note 2), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. VCC...........................................................................-0.3V to +6V V+ (Note 1)...............................................................-0.3V to +7V V- (Note 1) ...............................................................+0.3V to -7V V+ + |V-| (Note 1).................................................................+13V Input Voltages T_IN, FORCEOFF, FORCEON, EN (MAX3223) ......-0.3V to +6V R_IN ...................................................................................±25V Output Voltages T_OUT.............................................................................±13.2V R_OUT, INVALID ......................................-0.3V to (VCC + 0.3V) Short-Circuit Duration T_OUT ......................................................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin SSOP (derate 7.14mW/°C above +70°C) ...........571mW 16-Pin TSSOP (derate 6.70mW/°C above +70°C) .........533mW 20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)....889mW 20-Pin SSOP (derate 8.00mW/°C above +70°C) ...........640mW 20-Pin TSSOP DIP (derate 7.00mW/°C above +70°C).....559mW 28-Pin Wide SO (derate 12.50mW/°C above +70°C) ............1W 28-Pin SSOP (derate 9.52mW/°C above +70°C) ...........762mW 28-Pin TSSOP (derate 8.70mW/°C above +70°C) .........696mW Operating Temperature Ranges MAX32_ _C_ _.......................................................0°C to +70°C MAX32_ _E_ _....................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V. IOUT = 1.6mA Receivers disabled T_IN, EN, FORCEON, FORCEOFF T_IN, EN, FORCEON, FORCEOFF T_IN, FORCEON, FORCEOFF, EN (MAX3223) IOUT = -1.0mA CONDITIONS Output Voltage High VCC - 0.6 VCC - 0.1 V Output Voltage Low 0.4 V Output Leakage Current ±0.05 ±10 µA Input Leakage Current ±0.01 ±1.0 µA V 2.4 Input Logic Threshold High 1.0 10 µA Input Logic Threshold Low 0.8 V PARAMETER MIN TYP MAX UNITS VCC = 3.3V VCC = 5.0V 2.0 Supply Current, AutoShutdown Supply Current, Shutdown 1.0 10 µA Supply Current, AutoShutdown Disabled VCC = 3.3V or 5.0V, TA = +25°C 0.3 1.0 mA 2.7 Receiver Positive or Negative Threshold to INVALID High (tINVH) Figure 5 1 µs Receiver Threshold to Transmitters Enabled (tWU) Figure 5 250 µs Receiver Positive or Negative Threshold to INVALID Low (tINVL) Figure 5 30 µs Receiver Input Thresholds to Transmitters Enabled Figure 5 V -2.7 INVALID Output Voltage Low IOUT = 1.6mA 0.4 V Receiver Input Thresholds to Transmitters Disabled 1µA supply current, Figure 5 -0.3 0.3 V Positive threshold Negative threshold INVALID Output Voltage High IOUT = -1.0mA VCC - 0.6 V DC CHARACTERISTICS LOGIC INPUTS AND RECEIVER OUTPUTS AUTOSHUTDOWN (FORCEON = GND, FORCEOFF = VCC) All R_IN open, FORCEON = GND, FORCEOFF = VCC FORCEOFF = GND FORCEON = FORCEOFF = VCC, no load MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown www.maximintegrated.com Maxim Integrated | 3 Electrical Characteristics (continued) (VCC = +3.0V to +5.5V, C1–C4 = 0.1µF (Note 2), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) Note 2: C1–C4 = 0.1µF, tested at 3.3V ±10%. C1 = 0.047µF, C2–C4 = 0.33µF, tested at 5.0V ±10%. 200 Normal operation 200 Receiver Output Enable Time Normal operation ns tPLH Receiver input to receiver output, CL = 150pF 4 8.0 30 Transition-Region Slew Rate V/µs VCC = 3.3V, RL = 3kΩ to 7kΩ, TA = +25°C, measured from +3V to -3V or -3V to +3V Transmitter Skew 200 ⏐ tPHL - tPLH ⏐ ns PARAMETER MIN TYP MAX UNITS ±25 Output Short-Circuit Current ±35 ±60 mA Output Resistance 300 10M Ω Output Leakage Current µA Input Threshold Low 0.6 1.2 V Output Voltage Swing ±5.0 ±5.4 V Maximum Data Rate 120 235 kbps Receiver Propagation Delay 0.3 µs CONDITIONS VCC = V+ = V- = 0V, transmitter output = ±2V VOUT = ±12V, VCC = 0V or 3.0V to 5.5V, transmitters disabled RL = 3kΩ, CL = 1000pF, one transmitter switching All transmitter outputs loaded with 3kΩ to ground Receiver Output Disable Time ns tPHL 0.3 Input Voltage Range -25 25 V Input Hysteresis 0.3 V Input Threshold High V Input Resistance TA = +25°C 35 7 kΩ 0.8 1.5 1.8 2.4 1.5 2.4 TA = +25°C TA = +25°C VCC = 3.3V VCC = 3.3V VCC = 5.0V VCC = 5.0V CL = 200pF to 2500pF CL = 200pF to 1000pF 6 30 Transmitter Output Voltage ±5 V T1IN = T2IN = GND, T3IN = VCC, T3OUT loaded with 3kΩ to GND, T1OUT and T2OUT loaded with 2.5mA each MAX3221/MAX3223 MAX3243 200 1000 Receiver Skew 100 ⏐ tPHL - tPLH ⏐ ns MAX3221/MAX3223 MAX3243 100 500 RECEIVER INPUTS TIMING CHARACTERISTICS TRANSMITTER OUTPUTS MOUSE DRIVEABILITY (MAX3243) www.maximintegrated.com Maxim Integrated | 4 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown Typical Operating Characteristics (VCC = +3.3V, 235kbps data rate, 0.1µF capacitors, all transmitters loaded with 3kΩ, TA = +25°C, unless otherwise noted.) -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 0 MAX3221/MAX3223 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX3221/3223-01 LOAD CAPACITANCE (pF) TRANSMITTER OUTPUT VOLTAGE (V) 1000 4000 5000 2000 3000 VOUT+ VOUT- 0 2 4 6 8 10 12 14 16 18 20 22 150 500 MAX3221/MAX3223 SLEW RATE vs. LOAD CAPACITANCE MAX3221/3223-02 LOAD CAPACITANCE (pF) SLEW RATE (V/μs) 1000 4000 5000 2000 3000 FOR DATA RATES UP TO 235kbps +SLEW -SLEW 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 0 MAX3221/MAX3223 SUPPLY CURRENT vs. LOAD CAPACITANCE WHEN TRANSMITTING DATAMAX3221/3223-03 LOAD CAPACITANCE (pF) 3 3 SU CU ( ) MAX3221 SUPPLY CURRENT (mA) 1000 4000 5000 2000 3000 235kbps 120kbps 20kbps -7.5 -5.0 -2.5 0 2.5 5.0 7.5 0 MAX3243 TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE MAX3221/3223-04 LOAD CAPACITANCE (pF) TRANSMITTER OUTPUT VOLTAGE (V) 1000 4000 5000 2000 3000 VOUT+ 1 TRANSMITTER AT 235kbps 2 TRANSMITTERS AT 30kbps VOUT- ALL OUTPUTS LOADED WITH 3kΩ +CL 0.1μF CHARGE-PUMP CAPACITORS FOR ALL DATA RATES UP TO 235kbps 4 6 8 10 12 14 16 18 20 22 24 0 MAX3243 SLEW RATE vs. LOAD CAPACITANCE MAX3221/3223-05 LOAD CAPACITANCE (pF) SLEW RATE (V/μs) 1000 4000 5000 2000 3000 +SLEW -SLEW 0 5 10 15 20 25 30 35 45 40 0 MAX3243 SUPPLY CURRENT vs. LOAD CAPACITANCE WHEN TRANSMITTING DATA MAX3221/3223-06 LOAD CAPACITANCE (pF) SUPPLY CURRENT (mA) 1000 4000 5000 2000 3000 235kbps 120kbps 20kbps www.maximintegrated.com Maxim Integrated | 5 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown Pin Description R2OUTB Noninverting Receiver Output—active in shutdown Output of the valid signal detector. Indicates if a valid RS-232 level is present on receiver inputs logic “1”. INVALID Drive low to shut down transmitters and on-board power supply. This overrides all automatic circuitry and FORCEON (Table 1). FORCEOFF Drive high to override automatic circuitry keeping transmitters on (FORCEOFF must be high) (Table 1). FORCEON C1- Negative terminal of the voltage doubler charge-pump capacitor R_IN RS-232 Receiver Inputs T_OUT RS-232 Transmitter Outputs T_IN TTL/CMOS Transmitter Inputs R_OUT TTL/CMOS Receiver Outputs V- -5.5V generated by the charge pump C2- Negative terminal of inverting charge-pump capacitor C2+ Positive terminal of inverting charge-pump capacitor Receiver Enable Control. Drive low for normal operation. Drive high to force the receiver outputs into a high-Z state. EN FUNCTION GND Ground VCC +3.0V to +5.5V Supply Voltage LapLink is a trademark of Traveling Software. Detailed Description Dual Charge-Pump Voltage Converter The MAX3221/MAX3223/MAX3243’s internal power supply consists of a regulated dual charge pump that provides output voltages of +5.5V (doubling charge pump) and -5.5V (inverting charge pump), regardless of the input voltage (VCC) over the +3.0V to +5.5V range. The charge pumps operate in a discontinuous mode: if the output voltages are less than 5.5V, the charge pumps are enabled; if the output voltages exceed 5.5V, the charge pumps are disabled. Each charge pump requires a flying capacitor (C1, C2) and a reservoir capacitor (C3, C4) to generate the V+ and V- supplies. RS-232 Transmitters The transmitters are inverting level translators that convert CMOS-logic levels to 5.0V EIA/TIA-232 levels. They guarantee a 120kbps data rate with worst-case loads of 3kΩ in parallel with 1000pF, providing compatibility with PC-to-PC communication software (such as Laplink™). Typically, the MAX3221/MAX3223/MAX3243 can operate at data rates of 235kbps. Transmitters can be paralleled to drive multiple receivers or mice (MAX3243). Figure 1 shows a complete system connection. When FORCEOFF is driven to ground, or the AutoShutdown circuitry senses invalid voltage levels at all receiver inputs, the transmitters are disabled and the outputs are forced into a high-impedance state. — 10 16 12 4 8 13 11 9 7 6 5 1 14 15 NAME MAX3221 3 V+ +5.5V generated by the charge pump 2 C1+ Positive terminal of the voltage doubler charge-pump capacitor — 11 20 14 4 9, 16 8, 17 12, 13 10, 15 7 6 5 1 18 19 20 21 22 23 24 4–8 9, 10, 11 12, 13, 14 15–19 3 2 1 — 25 26 MAX3223 3 MAX3243 27 2 28 PIN www.maximintegrated.com Maxim Integrated | 6 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown RS-232 Receivers The MAX3221/MAX3223/MAX3243’s receivers convert RS-232 signals to CMOS-logic output levels. All receivers have one inverting three-state output. In shutdown (FORCEOFF = low) or in AutoShutdown, the MAX3221/MAX3223’s receivers are active (Table 1). Driving EN high places the receiver(s) in a high-impedance state. The MAX3243’s receivers are high impedance when the part is shut down. The MAX3243 has an always-active complementary output (R2OUTB). R2OUTB is an extra output that monitors receiver activity while the other receivers are high impedance. This allows Ring Indicator to be monitored without forward biasing other devices connected to the receiver outputs. This is ideal for systems where VCC is set to 0V in shutdown to accommodate peripherals, such as UARTs (Figure 2). MAX3243 I/O CHIP WITH UART CPU RS-232 POWER MANAGEMENT UNIT OR KEYBOARD CONTROLLER FORCEOFF FORCEON INVALID MAX3243 T1OUT R2OUTB Tx UART 5kΩ VCC T1IN THREE-STATED LOGIC TRANSITION DETECTOR R2IN PROTECTION DIODE R2OUT FORCEOFF = GND VCC TO μP Rx PREVIOUS RS-232 Tx UART SHDN = GND VCC VCC GND Rx 5kΩ (a) OLDER RS-232: POWERED-DOWN UART DRAWS CURRENT FROM ACTIVE RECEIVER OUTPUT IN SHUTDOWN. (b) NEW MAX3243: IN SHUTDOWN, R2OUTB IS USED TO MONITOR EXTERNAL DEVICES AND R2OUT IS THREE STATED, ELIMINATING A CURRENT PATH THROUGH THE UART'S PROTECTION DIODE. GND PROTECTION DIODE I I Figure 1. Interface Under Control of PMU Figure 2. The MAX3243 detects RS-232 activity when the UART and interface are shut down. MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown www.maximintegrated.com Maxim Integrated | 7 AutoShutdown A 1µA supply current is achieved with Maxim’s new AutoShutdown feature, which operates when FORCEON is low and FORCEOFF is high. When the MAX3221/MAX3223/MAX3243 sense no valid signal levels on all receiver inputs for 30µs, the on-board power supply and drivers are shut off, reducing supply current to 1µA. This occurs if the RS-232 cable is disconnected or the connected peripheral transmitters are turned off. The system turns on again when a valid level is applied to any RS-232 receiver input. As a result, the system saves power without changes to the existing BIOS or operating system. When using AutoShutdown, the INVALID output is high when the device is on and low when the device is shut down. Because INVALID indicates the receiver inputs’ condition, it can be used in any mode (Figure 3). Table 2 and Figure 3c summarize the MAX3221/ MAX3223/MAX3243 operating modes. FORCEON and FORCEOFF override the automatic circuitry and force the transceiver into its normal operating state or into its low-power standby state. When neither control is asserted, the IC selects between these states automatically based on receiver input levels. Figures 3a, 3b, and 5a depict valid and invalid RS-232 receiver levels. A mouse or other system with AutoShutdown may need time to wake up. Figure 4 shows a circuit that forces the transmitters on for 100ms, allowing enough time for the other system to realize that the MAX3221/MAX3223/ Table 1a. MAX3221/MAX3223 FORCEOFF and Enable Control Truth Table Table 1b. MAX3243 FORCEOFF Control Truth Table 1 1 Active* 1 0 Active* FORCEOFF 0 1 High-Z 0 0 High-Z EN T_OUT High-Z Active High-Z Active R_OUT +0.3V -0.3V INVALID TO MAX32_ _ POWER SUPPLY AND TRANSMITTERS R_IN * TRANSMITTERS ARE DISABLED, REDUCING SUPPLY CURRENT TO 1μA IF ALL RECEIVER INPUTS ARE BETWEEN +0.3V AND -0.3V FOR AT LEAST 30μs. 30µs COUNTER R 1 Active* 0 High-Z FORCEOFF T_OUT Active* High-Z R_OUT Active Active R2OUTB Figure 3a. MAX32_ _ Entering 1µA Supply Mode via AutoShutdown *Note: If the part is in AutoShutdown mode (FORCEOFF = VCC, FORCEON = GND), it is shut down if no valid RS-232 levels are present on all receiver inputs. FORCEON MASTER SHDN LINE 0.1μF 1MΩ FORCEOFF MAX3221 MAX3223 MAX3243 POWER MANAGEMENT UNIT Figure 4. AutoShutdown with Initial Turn-On to Wake Up a Mouse or Another System +2.7V -2.7V INVALID TO MAX32_ _ POWER SUPPLY R_IN * TRANSMITTERS ARE ENABLED IF: ANY RECEIVER INPUT IS GREATER THAN +2.7V OR LESS THAN -2.7V. ANY RECEIVER INPUT HAS BEEN BETWEEN +0.3V AND -0.3V FOR LESS THAN 30μs. 30µs COUNTER R Figure 3b. MAX32_ _ with Transmitters Enabled Using AutoShutdown FORCEOFF POWER DOWN INVALID FORCEON INVALID IS AN INTERNALLY GENERATED SIGNAL THAT IS USED BY THE AUTOSHUTDOWN LOGIC AND APPEARS AS AN OUTPUT OF THE DEVICE. POWER DOWN IS ONLY AN INTERNAL SIGNAL. IT CONTROLS THE OPERATIONAL STATUS OF THE TRANSMITTERS AND THE POWER SUPPLIES. Figure 3c. AutoShutdown Logic www.maximintegrated.com Maxim Integrated | 8 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown MAX3243 is awake. If the other system outputs valid RS-232 signals within that time, the RS-232 ports on both systems remain enabled. When shut down, the device’s charge pumps are turned off, V+ decays to VCC, V- decays to ground, and the transmitter outputs are disabled (high impedance). The time required to exit shutdown is typically 100µs (Figure 5b). Software-Controlled Shutdown If direct software control is desired, INVALID can be used to indicate DTR or Ring Indicator signal. Tie FORCEOFF and FORCEON together to bypass AutoShutdown so the line acts like a SHDN input. Applications Information Capacitor Selection The capacitor type used for C1–C4 is not critical for proper operation; either polarized or nonpolarized capacitors may be used. The charge pump requires 0.1µF capacitors for 3.3V operation. For other supply voltages, refer to Table 3 for required capacitor values. Do not use values smaller than those listed in Table 3. Increasing the capacitor values (e.g., by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without changing C1’s value. However, do not increase C1 without also increasing the values of C2, C3, and C4 to maintain the proper ratios (C1 to the other capacitors). When using the minimum required capacitor values, make sure the capacitor value does not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s equivalent series resistance (ESR) usually rises at low temperatures and influences the amount of ripple on V+ and V-. Table 2. AutoShutdown Logic RS-232 SIGNAL PRESENT AT RECEIVER INPUT FORCEOFF INPUT FORCEON INPUT INVALID OUTPUT TRANSCEIVER STATUS Yes H X H Normal Operation No H H L Normal Operation (Forced On) No H L L Shutdown (AutoShutdown) Yes L X H Shutdown (Forced Off) No L X L Shutdown (Forced Off) V- VCC 0 V+ 0 VCC tINVL tWU INVALID REGION RECEIVER INPUT VOLTAGE (V) INVALID OUTPUT (V) tINVH TRANSMITTERS ENABLED, INVALID HIGH RECEIVER INPUT LEVELS AUTOSHUTDOWN, TRANSMITTERS DISABLED, 1μA SUPPLY CURRENT, INVALID LOW TRANSMITTERS ENABLED, INVALID HIGH -2.7V -0.3V +2.7V +0.3V 0V INDETERMINATE INDETERMINATE (b) (a) Figure 5. AutoShutdown Trip Levels MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown www.maximintegrated.com Maxim Integrated | 9 Power-Supply Decoupling In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are sensitive to powersupply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect bypass capacitors as close to the IC as possible. Transmitter Outputs when Exiting Shutdown Figure 6 shows two transmitter outputs when exiting shutdown mode. As they become active, the two transmitter outputs are shown going to opposite RS-232 levels. Each transmitter is loaded with 3kΩ in parallel with 2500pF. The transmitter outputs display no ringing or undesirable transients as they come out of shutdown. Note that the transmitters are enabled only when the magnitude of V- exceeds approximately 3V. Figure 7a shows the MAX3243’s transmitter output voltage vs. current per transmitter. Figure 7b is a mouse driver test circuit. Mouse Driveability (MAX3243) The MAX3243 has been specifically designed to power serial mice while operating from low-voltage power supplies. It has been tested with samples of ten major mouse models from six manufacturers including the leading three: Logitech (5 models), Mouse Systems, and Microsoft. The MAX3243 successfully drove all serial mice and met their respective current and voltage requirements. Figure 7a shows the transmitter outputs under increasing load current. The MAX3243’s switching regulator ensures the transmitters will supply at least ±5V during worst-case conditions. The AutoShutdown feature does not work with a mouse, so FORCEOFF and FORCEON should be connected to VCC. High Data Rates The MAX3221/MAX3223/MAX3243 maintain the RS-232 ±5.0V minimum transmitter output voltage even at high data rates. Figure 8 shows a transmitter loopback test circuit. Figure 9 shows a loopback test result at 120kbps, and Figure 10 shows the same test at 235kbps. For Figure 9, all three transmitters were driven simultaneously at 120kbps into RS-232 loads in parallel with 1000pF. For Figure 10, a single transmitter was driven at 235kbps, but all three transmitters were loaded with an RS-232 receiver in parallel with 1000pF. Interconnection with 3V and 5V Logic The MAX3221/MAX3223/MAX3243 can directly interface with various 5V logic families, including ACT and HCT CMOS. See Table 4 for more information on possible combinations of interconnections. -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 01234567 MAX322 LOAD CURRENT PER TRANSMITTER (mA) TRANSMITTER OUTPUT VOLTAGE (V) VOUT+ VCC = 3.0V VOUTVOUT+ VCC VOUTT1 T2 T3 Figure 7a. MAX3243 Transmitter Output Voltage vs. Load Current per Transmitter 5V/div VCC = +3.3V C1–C4 = 0.1μF 2V/div T2 50μs/div T1 Figure 6. Transmitter Outputs when Exiting Shutdown or Powering Up www.maximintegrated.com Maxim Integrated | 10 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown +V COMPUTER SERIAL PORT +V -V GND Tx SERIAL MOUSE MAX3243 FORCEOFF 23 15 R5OUT 16 R4OUT 17 R3OUT 18 R2OUT 19 R1OUT 20 R2OUTB LOGIC OUTPUTS 5kΩ 5kΩ 5kΩ 5kΩ 5kΩ R5IN 8 R4IN 7 R3IN 6 R2IN 5 R1IN 4 RS-232 INPUTS GND 25 LOGIC INPUTS 12 T3IN 13 T2IN T1IN 14 C2- 2 C2+ 1 C1- 24 C1+ 28 T3OUT 11 T2OUT 10 T1OUT 9 V- 3 V+ 27 VCC VCC C4 0.1μF C3 0.1μF 0.1μF 26 C1 0.1μF C2 0.1μF FORCEON INVALID 22 21 TO POWER MANAGEMENT UNIT +3.3V Figure 7b. Mouse Driver Test Circuit MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown www.maximintegrated.com Maxim Integrated | 11 Figure 10. Loopback Test Result at 235kbps T1IN R1OUT VCC = +3.3V, 235kbps C1–C4 = 0.1μF T1OUT 5V/div 5V/div 2μs/div 5V/div MAX3221 MAX3223 MAX3243 5kΩ R_ OUT R_ IN EN (MAX3221/3) C2- C2+ C1- C1+ V- V+ VCC C4 C3 C1 C2 0.1μF VCC FORCEOFF T_ IN T_ OUT GND VCC 0V 1000pF Figure 8. Loopback Test Circuit Figure 9. Loopback Test Result at 120kbps T1IN R1OUT VCC = +3.3V, 120kbps C1–C4 = 0.1μF T1OUT 5V/div 5V/div 5V/div 5μs/div Table 4. Logic Family Compatibility with Various Supply Voltages Table 3. Required Capacitor Values VCC SUPPLY VOLTAGE (V) COMPATIBILITY 3.3 3.3 Compatible with all CMOS families. 5 5 Compatible with all TTL and CMOS-logic families. SYSTEM POWERSUPPLY VOLTAGE (V) 5 3.3 Compatible with ACT and HCT CMOS, and with TTL. Incompatible with AC, HC, or CD4000 CMOS. VCC (V) C1 (µF) C2, C3, C4 (µF) 3.0 to 3.6 0.1 0.1 4.5 to 5.5 0.047 0.33 3.0 to 5.5 0.1 0.47 www.maximintegrated.com Maxim Integrated | 12 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown Typical Operating Circuits MAX3221 FORCEON EN 12 1 9 R1OUT FORCEOFF 16 INVALID 10 GND 14 11 T1IN C2- 6 C2+ 5 C1- 4 C1+ 2 R1IN 8 T1OUT 13 V- 7 V+ 3 VCC VCC C4 0.1μF C3 0.1μF 0.1μF 15 C1 0.1μF C2 0.1μF C5 +3.3V TO POWER MANAGEMENT UNIT 5kΩ MAX3223 FORCEON EN 14 1 10 R2OUT 15 R1OUT FORCEOFF 20 INVALID 11 R2IN 9 GND 18 RS-232 OUTPUTS TTL/CMOS INPUTS 12 T2IN 13 T1IN C2- 6 C2+ 5 C1- 4 C1+ 2 R1IN 16 T2OUT 8 T1OUT 17 V- 7 V+ 3 VCC VCC C4 0.1μF C3 0.1μF 0.1μF 19 C1 0.1μF C2 0.1μF C5 +3.3V RS-232 INPUTS TO POWER MANAGEMENT UNIT TTL/CMOS OUTPUTS 5kΩ 5kΩ MAX3243 FORCEOFF 23 15 R5OUT 16 R4OUT 17 R3OUT 18 R2OUT 19 R1OUT 20 R2OUTB LOGIC OUTPUTS 5kΩ 5kΩ 5kΩ 5kΩ 5kΩ R5IN 8 R4IN 7 R3IN 6 R2IN 5 R1IN 4 RS-232 INPUTS GND 25 RS-232 OUTPUTS LOGIC INPUTS 12 T3IN 13 T2IN T1IN 14 C2- 2 C2+ 1 C1- 24 C1+ 28 T3OUT 11 T2OUT 10 T1OUT 9 V- 3 V+ 27 VCC VCC C4 0.1μF C3 0.1μF 0.1μF 26 C1 0.1μF C2 0.1μF FORCEON INVALID 22 21 TO POWER MANAGEMENT UNIT +3.3V MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown www.maximintegrated.com Maxim Integrated | 13 3V-Powered EIA/TIA-232 and EIA/TIA-562 Transceivers from Maxim MAX3222 3.0 to 5.5 2/2 2 120 232 0.1µF capacitors, MAX242 pinout MAX3223 3.0 to 5.5 2/2 2 120 232 0.1µF capacitors, AutoShutdown 0.1µF capacitors, AutoShutdown complementary receiver, drives mice MAX3243 3.0 to 5.5 3/5 1 120 232 MAX3232 3.0 to 5.5 2/2 N/A 120 232 0.1µF capacitors, MAX232 pinout MAX3221 3.0 to 5.5 1/1 1 120 232 0.1µF capacitors, 16-pin SSOP 232 562 232 562 232 EIA/TIA- 232 OR 562 2.7 to 3.6 AutoShutdown, complementary receiver, drives mice, transient detection MAX3212 3/5 5 235 MAX563 3.0 to 3.6 2/2 2 120 0.1µF capacitors Operates directly from batteries without a voltage regulator MAX218 1.8 to 4.25 2/2 2 120 No. OF RECEIVERS ACTIVE IN SHUTDOWN POWERSUPPLY VOLTAGE (V) MAX562 2.7 to 5.25 3/5 5 230 230kbps guaranteed data rate MAX212 3.0 to 3.6 3/5 5 120 Drives mice FEATURES GUARANTEED DATA RATE (kbps) No. OF TRANSMITTERS/ RECEIVERS PART 0.1µF capacitors, 2 complementary receivers, drives mice MAX3241 3.0 to 5.5 3/5 5 120 232 www.maximintegrated.com Maxim Integrated | 14 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown Pin Configurations 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 FORCEOFF VCC GND C1- T1OUT V+ C1+ EN R1IN R1OUT FORCEON T2OUT T1IN V- C2- C2+ 12 11 9 10 T2IN R2OUT INVALID R2IN DIP/SSOP/TSSOP MAX3223 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 C1+ V+ VCC GND C1- FORCEON FORCEOFF INVALID R2OUTB R1OUT R2OUT R3OUT R4OUT R5OUT C2+ C2- V- R1IN R2IN R3IN R4IN R5IN T1OUT T2OUT T3OUT T3IN T2IN T1IN SO/SSOP/TSSOP MAX3243 TOP VIEW 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 EN C1+ V+ C1- C2+ C2- V- R1IN FORCEOFF VCC GND T1OUT FORCEON T1IN INVALID R1OUT MAX3221 SSOP/TSSOP MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown www.maximintegrated.com Maxim Integrated | 15 SSOP.EPS PACKAGE OUTLINE, SSOP, 5.3 MM 1 1 21-0056 C APPROVAL DOCUMENT CONTROL NO. REV. PROPRIETARY INFORMATION TITLE: NOTES: 1. D&E DO NOT INCLUDE MOLD FLASH. 2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006"). 3. CONTROLLING DIMENSION: MILLIMETERS. 4. MEETS JEDEC MO150. 5. LEADS TO BE COPLANAR WITHIN 0.10 MM. H 7.90 L 0∞ 0.301 0.025 8∞ 0.311 0.037 0∞ 7.65 0.63 8∞ 0.95 MAX 5.38 MILLIMETERS B C D E e A1 DIM A SEE VARIATIONS 0.0256 BSC 0.010 0.004 0.205 0.002 0.015 0.008 0.212 0.008 INCHES MIN MAX 0.078 0.65 BSC 0.25 0.09 5.20 0.05 0.38 0.20 0.21 MIN 1.73 1.99 MILLIMETERS 6.07 6.07 10.07 8.07 7.07 INCHES D D D D D 0.239 0.239 0.397 0.317 0.278 MIN 0.249 0.249 0.407 0.328 0.289 MAX MIN 6.33 6.33 10.33 8.33 7.33 14L 16L 28L 24L 20L MAX N A D e A1 L C E H N 2 1 B 0.068 TSSOP4.40mm.EPS Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. www.maximintegrated.com Maxim Integrated | 16 MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown SOICW.EPS PACKAGE OUTLINE, .300" SOIC 1 1 21-0042 B APPROVAL DOCUMENT CONTROL NO. REV. PROPRIETARY INFORMATION TITLE: TOP VIEW FRONT VIEW MAX 0.012 0.104 0.019 0.299 0.013 INCHES 0.291 0.009 E C DIM 0.014 0.004 B A1 MIN A 0.093 0.23 7.40 7.60 0.32 MILLIMETERS 0.10 0.35 2.35 MIN 0.49 0.30 MAX 2.65 L 0.016 0.050 0.40 1.27 D 0.496 0.512 D DIM MIN D INCHES MAX 12.60 13.00 MILLIMETERS MIN MAX 20 AC 0.447 0.463 AB 11.35 18 11.75 0.398 0.413 AA 10.10 16 10.50 N MS013 SIDE VIEW H 0.419 0.394 10.00 10.65 e 0.050 1.27 D 0.614 0.598 15.20 24 15.60 AD D 0.713 0.697 17.70 28 18.10 AE E H N D A1 e B A 0∞-8∞ C L 1 VARIATIONS: PDIPN.EPS Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2015 Maxim Integrated Products, Inc. | 17 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. MAX3221/MAX3223/MAX3243 +3V to +5.5V RS-232 Transceivers with AutoShutdown Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 9 1/15 Updated General Description and Benefits and Features sections 1 1 of 8 FEATURES  Converts CMOS RAMs into Nonvolatile Memories  Unconditionally Write Protects when VCC is Out-of-Tolerance  Automatically Switches to Battery when Power-Fail Occurs  Space-Saving 8-Pin PDIP or 16-Pin SO Packages  Consumes <100nA of Battery Current  Tests Battery Condition on Power up  Provides for Redundant Batteries  Optional 5% or 10% Power-Fail Detection  Low Forward Voltage Drop on the VCC Switch  Optional Industrial (N) Temperature Range of -40°C to +85°C PIN ASSIGNMENT PIN DESCRIPTION VCCO - RAM Supply VBAT1 - + Battery 1 TOL - Power Supply Tolerance GND - Ground CE - Chip Enable Input CEO - Chip Enable Output VBAT2 - + Battery 2 VCCI - + Supply NC - No Connect DESCRIPTION The DS1210 Nonvolatile Controller Chip is a CMOS circuit which solves the application problem of converting CMOS RAM into nonvolatile memory. Incoming power is monitored for an out-of-tolerance condition. When such a condition is detected, chip enable is inhibited to accomplish write protection and the battery is switched on to supply the RAM with uninterrupted power. Special circuitry uses a lowleakage CMOS process which affords precise voltage detection at extremely low battery consumption. The 8-pin DIP package keeps PC board real estate requirements to a minimum. By combining the DS1210 Nonvolatile Controller Chip with a CMOS memory and batteries, nonvolatile RAM operation can be achieved. DS1210 Nonvolatile Controller Chip VCCO VBAT1 TOL GND 1 2 3 4 VCCI VBAT2 CEO CE 8 7 6 5 DS1210 8-pin PDIP (300 mils) NC VCCO NC VBAT1 NC TOL NC GND NC VCCI NC VBAT2 NC CEO NC CE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DS1210S 16-pin SO (300 mils) 19-6294; Rev 6/12 DS1210 2 of 8 OPERATION The DS1210 nonvolatile controller performs five circuit functions required to battery back up a RAM. First, a switch is provided to direct power from the battery or the incoming supply (VCCI) depending on which is greater. This switch has a voltage drop of less than 0.3V. The second function which the nonvolatile controller provides is power-fail detection. The DS1210 constantly monitors the incoming supply. When the supply goes out of tolerance, a precision comparator detects power-fail and inhibits chip enable ( CEO ). The third function of write protection is accomplished by holding the CEO output signal to within 0.2 volts of the VCCI or battery supply. If CE input is low at the time power-fail detection occurs, the CEO output is kept in its present state until CE is returned high. The delay of write protection until the current memory cycle is completed prevents the corruption of data. Power-fail detection occurs in the range of 4.75 volts to 4.5 volts with the tolerance (TOL) pin grounded. If TOL in connected to VCCO, then powerfail detection occurs in the range of 4.5 volts to 4.25 volts. During nominal supply conditions CEO will follow CE with a maximum propagation delay of 20ns. The fourth function the DS1210 performs is a battery status warning so that potential data loss is avoided. Each time that the circuit is powered up the battery voltage is checked with a precision comparator. If the battery voltage is less than 2.0 volts, the second memory cycle is inhibited. Battery status can, therefore, be determined by performing a read cycle after power-up to any location in memory, verifying that memory location content. A subsequent write cycle can then be executed to the same memory location altering the data. If the next read cycle fails to verify the written data, then the batteries are less than 2.0V and data is in danger of being corrupted. The fifth function of the nonvolatile controller provides for battery redundancy. In many applications, data integrity is paramount. In these applications it is often desirable to use two batteries to ensure reliability. The DS1210 controller provides an internal isolation switch which allows the connection of two batteries. During battery backup operation the battery with the highest voltage is selected for use. If one battery should fail, the other will take over the load. The switch to a redundant battery is transparent to circuit operation and to the user. A battery status warning will occur when the battery in use falls below 2.0 volts. A grounded VBAT2 pin will not activate a battery-fail warning. In applications where battery redundancy is not required, a single battery should be connected to the BAT1 pin, and the BAT2 battery pin must be grounded. The nonvolatile controller contains circuitry to turn off the battery backup. This is to maintain the battery(s) at its highest capacity until the equipment is powered up and valid data is written to the SRAM. While in the freshness seal mode the CEO and VCCO will be forced to VOL. When the batteries are first attached to one or both of the VBAT pins, VCCO will not provide battery back-up until VCCI exceeds VCCTP, as set by the TOL pin, and then falls below VBAT. Figure 1 shows a typical application incorporating the DS1210 in a microprocessor-based system. Section A shows the connections necessary to write protect the RAM when VCC is less than 4.75 volts and to back up the supply with batteries. Section B shows the use of the DS1210 to halt the processor when VCC is less than 4.75 volts and to delay its restart on power-up to prevent spurious writes. DS1210 3 of 8 SECTION A - BATTERY BACKUP Figure 1 BATTERY BACKUP CURRENT DRAIN EXAMPLE CONSUMPTION DS1210 IBAT 100 nA RAM ICC02 10 µA Total Drain 10.1 µA SECTION B - PROCESSOR RESET DS1210 4 of 8 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground -0.3V to +7.0V Operating Temperature Range 0°C to +70°C, -40°C to +85°C for N parts Storage Temperature Range -55°C to +125°C Soldering Temperature (reflow, SO) +260°C Lead Temperature (soldering, 10s) +300°C This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) PDIP Junction-to-Ambient Thermal Resistance (θJA).…………………...…………………………...….110°C/W Junction-to-Case Thermal Resistance (θJC)…………………………………………………………40°C/W SO Junction-to-Ambient Thermal Resistance (θJA).…………………………………………………….70°C/W Junction-to-Case Thermal Resistance (θJC)…………………………………………………………23°C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board for the SO. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. RECOMMENDED OPERATING CONDITIONS (Note 10) PARAMETER SYMBOL 4BMIN TYP MAX UNITS 0BNOTES TOL = GND Supply Voltage VCCI 4.75 5.0 5.5 V 2 TOL = VCCO Supply Voltage VCCI 4.5 5.0 5.5 V 2 Logic 1 Input VIH 2.2 VCC+0.3 V 2 Logic 0 Input VIL -0.3 +0.8 V 2 Battery Input VBAT1, VBAT2 2.0 4.0 V 2, 3 DC ELECTRICAL CHARACTERISTICS (Note 10; VCCI = 4.75 to 5.5V, TOL = GND) (VCCI = 4.5 to 5.5V, TOL = VCCO) PARAMETER SYMBOL MIN TYP MAX UNITS 1BNOTES Supply Current ICCI 5 mA 4 Supply Voltage VCCO VCC-0.2 V 2 Supply Current ICCO1 80 mA 5 Input Leakage IIL -1.0 +1.0 µA Output Leakage ILO -1.0 +1.0 µA CEO Output @ 2.4V IOH -1.0 mA 6 CEO Output @ 0.4V IOL 4.0 mA 6 VCC Trip Point (TOL=GND) VCCTP 4.50 4.62 4.74 V 2 VCC Trip Point (TOL=VCCO) VCCTP 4.25 4.37 4.49 V 2 CEO Output VOHL VBAT-0.2 V 8 VBAT1 or VBAT2 Battery Current IBAT 100 nA 3, 4 Battery Backup Current @ VCCO = VBAT – 0.3V ICCO2 50 µA 7, 8 DS1210 5 of 8 CAPACITANCE (TA = +25°C) PARAMETER SYMBOL MIN TYP MAX UNITS 2BNOTES Input Capacitance CIN 5 pF Output Capacitance COUT 7 pF AC ELECTRICAL CHARACTERISTICS (Note 10; VCCI = 4.75V to 5.5V, TOL = GND) (VCCI = 4.5V to 5.5V, TOL = VCCO) PARAMETER SYMBOL MIN TYP MAX UNITS 3BNOTES CE Propagation Delay tPD 5 10 20 ns 6 CE High to Power-Fail tPF 0 ns AC ELECTRICAL CHARACTERISTICS (Note 10; VCCI = 4.75V, TOL = GND) (VCCI < 4.5, TOL = VCCO) Recovery at Power Up tREC 2 80 125 ms VCC Slew Rate Power-Down tF 300 µs VCC Slew Rate Power-Down tFB 10 µs VCC Slew Rate Power-Up tR 0 µs CE Pulse Width tCE 1.5 µs 9 NOTES: 2. All voltages are referenced to ground. 3. Only one battery input is required. Unused battery inputs must be grounded. 4. Measured with VCCO and CEO open. 5. ICC01 is the maximum average load which the DS1210 can supply to the memories. 6. Measured with a load as shown in Figure 2. 7. ICC02 is the maximum average load current which the DS1210 can supply to the memories in the battery backup mode. 8. tCE max must be met to ensure data integrity on power loss. 9. CEO can only sustain leakage current in the battery backup mode. 10. All AC and DC electrical characteristics are valid for the full temperature range. For commercial products, this range is 0 to +70°C. For industrial products (N), this range is -40°C to +85°C. 11. DS1210 is recognized by Underwriters Laboratories (UL) under file E99151. DS1210 6 of 8 TIMING DIAGRAM: POWER-UP TIMING DIAGRAM: POWER-DOWN OUTPUT LOAD Figure 2 DS1210 7 of 8 ORDERING INFORMATION PART TEMP RANGE PINPACKAGE DS1210+ 0°C to +70°C 8 PDIP DS1210N+ -40°C to +85°C 8 PDIP DS1210S+ 0°C to +70°C 16 SO DS1210SN+ -40°C to +85°C 16 SO +Denotes a lead(Pb)-free/RoHS-compliant package. PACKAGE INFORMATION For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 8 PDIP P8+4 21-0043  16 SO W16+2 21-0042 90-0107 DS1210 8 of 8 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, Inc. 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 © 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. REVISION HISTORY REVISION DATE DESCRIPTION PAGES CHANGED 6/12 Added lead temperature and soldering temperature information to the Absolute Maximum Ratings section; changed “Pin 3” to “TOL” in multiple places; added the Package Thermal Characteristics section; added the Ordering Information and Package Information sections 1, 2, 4, 5, 8 1. General description The HEF4052B is a dual 4-channel analog multiplexer/demultiplexer with common channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs (nY0 to nY3) and a common input/output (nZ). The common channel select logic includes two select inputs (S1 and S2) and an active LOW enable input (E). Both multiplexers/demultiplexers contain four bidirectional analog switches, each with one side connected to an independent input/output (nY0 to nY3) and the other side connected to a common input/output (nZ). With E LOW, one of the four switches is selected (low-impedance ON-state) by S1 and S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 and S2. If break before make is needed, then it is necessary to use the enable input. VDD and VSS are the supply voltage connections for the digital control inputs (S1 and S2, and E). The VDD to VSS range is 3 V to 15 V. The analog inputs/outputs (nY0 to nY3, and nZ) can swing between VDD as a positive limit and VEE as a negative limit. VDD  VEE may not exceed 15 V. Unused inputs must be connected to VDD, VSS, or another input. For operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically ground). VEE and VSS are the supply voltage connections for the switches. 2. Features and benefits  Fully static operation  5 V, 10 V, and 15 V parametric ratings  Standardized symmetrical output characteristics  Specified from 40 C to +85 C and 40 C to +125 C  Complies with JEDEC standard JESD 13-B 3. Applications  Analog multiplexing and demultiplexing  Digital multiplexing and demultiplexing  Signal gating HEF4052B Dual 4-channel analog multiplexer/demultiplexer Rev. 9 — 11 September 2014 Product data sheet HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 2 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 4. Ordering information 5. Functional diagram Table 1. Ordering information All types operate from 40 C to +125 C. Type number Package Name Description Version HEF4052BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 HEF4052BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4052BTT TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 Fig 1. Functional diagram mnb042 1 - OF - 4 DECODER LOGIC LEVEL CONVERSION 8 7 VSS VEE VDD 12 13 16 3 14 15 11 10 9 6 S1 S2 E 1 5 2 1Y0 1Z 2Z 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 4 HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 3 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer Fig 2. Schematic diagram (one switch) 001aak604 nYn nZ VEE VDD VDD Fig 3. Logic symbol Fig 4. IEC logic symbol 001aak605 4 2 5 1 11 15 14 12 13 3 6 9 1Z S1 S2 E 2Z 2Y3 2Y2 2Y1 2Y0 1Y3 1Y2 1Y1 1Y0 10 mnb041 11 15 14 12 4 2 5 9 1 10 0 6 G4 MDX 0 3 4 × 1 3 2 1 0 13 3 HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 4 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer Fig 5. Logic diagram 001aak634 LEVEL CONVERTER LEVEL CONVERTER LEVEL CONVERTER S1 S2 E 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 2Z 1Z HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 5 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 6. Pin configuration SOT38-4 and SOT109-1 Fig 7. Pin configuration SOT338-1 and SOT403-1 001aag215 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 HEF4052B 2Y0 VDD 2Y2 1Y2 2Z 1Y1 2Y3 1Z 2Y1 1Y0 E 1Y3 VEE S1 VSS S2 HEF4052B 2Y0 VDD 2Y2 1Y2 2Z 1Y1 2Y3 1Z 2Y1 1Y0 E 1Y3 VEE S1 VSS S2 001aak606 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 Table 2. Pin description Symbol Pin Description E 6 enable input (active LOW) VEE 7 supply voltage VSS 8 ground supply voltage S1, S2 10, 9 select input 1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 12, 14, 15, 11, 1, 5, 2, 4 independent input or output 1Z, 2Z 13, 3 common output or input VDD 16 supply voltage HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 6 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 7. Functional description 7.1 Function table [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. 8. Limiting values [1] To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, and in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE. [2] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C. For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. For SSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 C. Table 3. Function table[1] Input Channel on E S2 S1 L L L nY0 to nZ L L H nY1 to nZ L H L nY2 to nZ L H H nY3 to nZ H X X switches off Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground). Symbol Parameter Conditions Min Max Unit VDD supply voltage 0.5 +18 V VEE supply voltage referenced to VDD [1] 18 +0.5 V IIK input clamping current pins Sn and E; VI < 0.5 V or VI > VDD + 0.5 V - 10 mA VI input voltage 0.5 VDD + 0.5 V II/O input/output current - 10 mA IDD supply current - 50 mA Tstg storage temperature 65 +150 C Tamb ambient temperature 40 +125 C Ptot total power dissipation Tamb = 40 C to +125 C [2] DIP16 package - 750 mW SO16 package - 500 mW TSSOP16 package - 500 mW P power dissipation per output - 100 mW HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 7 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 9. Recommended operating conditions 10. Static characteristics Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VDD supply voltage see Figure 8 3 - 15 V VI input voltage 0 - VDD V Tamb ambient temperature in free air 40 - +125 C t/V input transition rise and fall rate VDD = 5 V - - 3.75 s/V VDD = 10 V - - 0.5 s/V VDD = 15 V - - 0.08 s/V Fig 8. Operating area as a function of the supply voltages VDD − VEE (V) 0 15 5 10 001aac285 10 5 15 VDD − VSS (V) 0 operating area Table 6. Static characteristics VSS = VEE = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter Conditions VDD Tamb = 40 C Tamb = 25 C Tamb = 85 C Tamb = 125 C Unit Min Max Min Max Min Max Min Max VIH HIGH-level input voltage IO < 1 A 5 V 3.5 - 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - 11.0 - V VIL LOW-level input voltage IO < 1 A 5 V - 1.5 - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 - 4.0 V II input leakage current 15 V - 0.1 - 0.1 - 1.0 - 1.0 A HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 8 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 10.1 Test circuits IS(OFF) OFF-state leakage current Z port; all channels OFF; see Figure 9 15 V - - - 1000 - - - - nA Y port; per channel; see Figure 10 15 V - - - 200 - - - - nA IDD supply current IO = 0 A 5 V - 5 - 5 - 150 - 150 A 10 V - 10 - 10 - 300 - 300 A 15 V - 20 - 20 - 600 - 600 A CI input capacitance Sn, E inputs - - - - 7.5 - - - - pF Table 6. Static characteristics …continued VSS = VEE = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter Conditions VDD Tamb = 40 C Tamb = 25 C Tamb = 85 C Tamb = 125 C Unit Min Max Min Max Min Max Min Max Fig 9. Test circuit for measuring OFF-state leakage current Z port IS 001aak635 VDD VI VSS = VEE S1 and S2 E nZ VDD or VSS VDD nYn VO Fig 10. Test circuit for measuring OFF-state leakage current nYn port IS 001aak636 VSS VO switch VSS = VEE S1 and S2 E nZ nY0 VDD or VSS VDD nYn 1 2 VI HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 9 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 10.2 On resistance 10.2.1 On resistance waveform and test circuit Table 7. ON resistance Tamb = 25 C; ISW = 200 A; VSS = VEE = 0 V. Symbol Parameter Conditions VDD  VEE Typ Max Unit RON(peak) ON resistance (peak) VI = 0 V to VDD  VEE; see Figure 11 and Figure 12 5 V 350 2500  10 V 80 245  15 V 60 175  RON(rail) ON resistance (rail) VI = 0 V; see Figure 11 and Figure 12 5 V 115 340  10 V 50 160  15 V 40 115  VI = VDD  VEE; see Figure 11 and Figure 12 5 V 120 365  10 V 65 200  15 V 50 155  RON ON resistance mismatch between channels VI = 0 V to VDD  VEE; see Figure 11 5 V 25 -  10 V 10 -  15 V 5 -  RON = VSW / ISW. Fig 11. Test circuit for measuring RON V 001aak637 VSS VI VSW ISW VSS = VEE S1 and S2 E nZ VDD or VSS VDD nYn HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 10 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 11. Dynamic characteristics Fig 12. Typical RON as a function of input voltage 9, 9     DDH     521 ȍ  9'' 9 9 9 Table 8. Dynamic characteristics Tamb = 25 C; VSS = VEE = 0 V; for test circuit see Figure 16. Symbol Parameter Conditions VDD Typ Max Unit tPHL HIGH to LOW propagation delay nYn, nZ to nZ, nYn; see Figure 13 5 V 10 20 ns 10 V 5 10 ns 15 V 5 10 ns Sn to nYn, nZ; see Figure 14 5 V 150 305 ns 10 V 65 135 ns 15 V 50 100 ns tPLH LOW to HIGH propagation delay Yn, nZ to nZ, nYn; see Figure 13 5 V 10 20 ns 10 V 5 10 ns 15 V 5 10 ns Sn to nYn, nZ; see Figure 14 5 V 150 300 ns 10 V 75 150 ns 15 V 50 100 ns tPHZ HIGH to OFF-state propagation delay E to nYn, nZ; see Figure 15 5 V 95 190 ns 10 V 90 180 ns 15 V 85 180 ns tPZH OFF-state to HIGH propagation delay E to nYn, nZ; see Figure 15 5 V 130 260 ns 10 V 55 115 ns 15 V 45 85 ns tPLZ LOW to OFF-state propagation delay E to nYn, nZ; see Figure 15 5 V 100 205 ns 10 V 90 180 ns 15 V 90 180 ns HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 11 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 11.1 Waveforms and test circuit tPZL OFF-state to LOW propagation delay E to nYn, nZ; see Figure 15 5 V 120 240 ns 10 V 50 100 ns 15 V 35 75 ns Table 8. Dynamic characteristics …continued Tamb = 25 C; VSS = VEE = 0 V; for test circuit see Figure 16. Symbol Parameter Conditions VDD Typ Max Unit Measurement points are given in Table 9. Measurement points are given in Table 9. Fig 13. nYn, nZ to nZ, nYn propagation delays Fig 14. Sn to nYn, nZ propagation delays 001aac290 nYn or nZ input nZ or nYn output tPLH tPHL VDD VEE VM VM VO VEE 001aac291 switch ON tPLH tPHL switch OFF VDD VSS VO VEE nYn or nZ output Sn input switch OFF 10 % 90 % VM Measurement points are given in Table 9. Fig 15. Enable and disable times 001aac292 tPLZ tPHZ switch ON switch OFF switch ON nYn or nZ output LOW-to-OFF OFF-to-LOW nYn or nZ output HIGH-to-OFF OFF-to-HIGH E input VO VO VEE VEE VDD VSS VM tPZL tPZH 90 % 90 % 10 % 10 % Table 9. Measurement points Supply voltage Input Output VDD VM VM 5 V to 15 V 0.5VDD 0.5VDD HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 12 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer [1] For nYn to nZ propagation delays use VEE. For Sn to nYn or nZ propagation delays use VDD. Test data is given in Table 10. Definitions: DUT = Device Under Test. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including test jig and probe. RL = Load resistance. Fig 16. Test circuit for measuring switching times 001aaj903 VI VO RT CL RL S1 DUT PULSE GENERATOR tW VM VI VDD VI VDD VSS VEE open 0 V negative pulse VI 0 V positive pulse 10 % 90 % 90 % 10 % VM VM VM tW tf tf tr tr Table 10. Test data Input Load S1 position nYn, nZ Sn and E tr, tf VM CL RL tPHL[1] tPLH tPZH, tPHZ tPZL, tPLZ other VDD or VEE VDD or VSS  20 ns 0.5VDD 50 pF 10 k VDD or VEE VEE VEE VDD VEE HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 13 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 11.2 Additional dynamic parameters [1] fi is biased at 0.5 VDD; VI = 0.5VDD (p-p). 11.2.1 Test circuits Table 11. Additional dynamic characteristics VSS = VEE = 0 V; Tamb = 25 C. Symbol Parameter Conditions VDD Typ Max Unit THD total harmonic distortion see Figure 17; RL = 10 k; CL = 15 pF; channel ON; VI = 0.5VDD (p-p); fi = 1 kHz 5 V [1] 0.25 - % 10 V [1] 0.04 - % 15 V [1] 0.04 - % f(3dB) 3 dB frequency response see Figure 18; RL = 1 k; CL = 5 pF; channel ON; VI = 0.5VDD (p-p) 5 V [1] 13 - MHz 10 V [1] 40 - MHz 15 V [1] 70 - MHz iso isolation (OFF-state) see Figure 19; fi = 1 MHz; RL = 1 k; CL = 5 pF; channel OFF; VI = 0.5VDD (p-p) 10 V [1] 50 - dB Vct crosstalk voltage digital inputs to switch; see Figure 20; RL = 10 k; CL = 15 pF; E or Sn = VDD (square-wave) 10 V 50 - mV Xtalk crosstalk between switches; see Figure 21; fi = 1 MHz; RL = 1 k; VI = 0.5VDD (p-p) 10 V [1] 50 - dB Table 12. Dynamic power dissipation PD PD can be calculated from the formulas shown; VEE = VSS = 0 V; tr = tf  20 ns; Tamb = 25 C. Symbol Parameter VDD Typical formula for PD (W) where: PD dynamic power dissipation 5V PD = 1300  fi + (fo  CL)  VDD2 fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VDD = supply voltage in V; (CL  fo) = sum of the outputs. 10 V PD = 6100  fi + (fo  CL)  VDD2 15 V PD = 15600  fi + (fo  CL)  VDD2 Fig 17. Test circuit for measuring total harmonic distortion Fig 18. Test circuit for measuring frequency response D 001aak638 VSS fi RL CL VSS = VEE S1 and S2 E nZ VDD or VSS VDD nYn dB 001aak639 VSS fi RL CL VSS = VEE S1 and S2 E nZ VDD or VSS VDD nYn HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9 — 11 September 2014 14 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer Fig 19. Test circuit for measuring isolation (OFF-state) dB 001aak657 VSS fi RL CL switch VSS = VEE S1 and S2 E nZ nY0 VDD or VSS VDD nYn 1 2 a. Test circuit b. Input and output pulse definitions Fig 20. Test circuit for measuring crosstalk voltage between digital inputs and switch DDN 9''RU966 9'' VZLWFK 966 9(( 6DQG6 ( Q= Q< 9'' Q VCC + 0.5 V [1] - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] - 20 mA IO output current 0.5 V < VO < VCC + 0.5 V - 25 mA ICC supply current - 50 mA IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C DIP20 package [2] - 750 mW SO20, SSOP20, TSSOP20 and DHVQFN20 package [3] - 500 mW 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 6 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger 8. Recommended operating conditions 9. Static characteristics Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC273 74HCT273 Unit Min Typ Max Min Typ Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 -VCC V VO output voltage 0 - VCC 0 -VCC V Tamb ambient temperature 40 - +125 40 - +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74HC273 VIH HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VIL LOW-level input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V VOH HIGH-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 7 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger 10. Dynamic characteristics CI input capacitance - 3.5 - - - - - pF 74HCT273 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 5.2 mA; VCC = 5.5 V - 0.15 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current per input pin; VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V MR input - 100 360 - 450 - 490 A CP input - 175 630 - 787.5 - 857.5 A Dn input - 15 54 - 67.5 - 73.5 A CI input capacitance - 3.5 - - - - - pF Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max Table 7. Dynamic characteristics GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74HC273 tpd propagation delay CP to Qn; see Figure 7 [1] VCC = 2.0 V - 41 150 - 185 - 225 ns VCC = 4.5 V - 15 30 - 37 - 45 ns VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns VCC = 6.0 V - 13 26 - 31 - 38 ns 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 8 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger tPHL HIGH to LOW propagation delay MR to Qn; see Figure 8 VCC = 2.0 V - 44 150 - 185 - 225 ns VCC = 4.5 V - 16 30 - 37 - 45 ns VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns VCC = 6.0 V - 14 26 - 31 - 38 ns tt transition time Qn output; see Figure 7 [2] VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 15 - 19 ns tW pulse width CP input HIGH or LOW; see Figure 7 VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns MR input LOW; see Figure 8 VCC = 2.0 V 60 17 - 75 - 90 - ns VCC = 4.5 V 12 6 - 15 - 18 - ns VCC = 6.0 V 10 5 - 13 - 15 - ns trec recovery time MR to CP; see Figure 8 VCC = 2.0 V 50 6 - 65 - 75 - ns VCC = 4.5 V 10 2 - 13 - 15 - ns VCC = 6.0 V 9 2 - 11 - 13 - ns tsu set-up time Dn to CP; see Figure 9 VCC = 2.0 V 60 11 - 75 - 90 - ns VCC = 4.5 V 12 4 - 15 - 18 - ns VCC = 6.0 V 10 3 - 13 - 15 - ns th hold time Dn to CP; see Figure 9 VCC = 2.0 V 3 6 - 3 - 3 - ns VCC = 4.5 V 3 2 - 3 - 3 - ns VCC = 6.0 V 3 2 - 3 - 3 - ns fmax maximum frequency CP input; see Figure 7 VCC = 2.0 V 6 20.6 - 4.8 - 4 - MHz VCC = 4.5 V 30 103 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 66 - - - - - MHz VCC = 6.0 V 35 122 - 28 - 24 - MHz CPD power dissipation capacitance per package; VI = GND to VCC [3] - 20 - - - - - pF Table 7. Dynamic characteristics …continued GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 9 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger [1] tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz;  (CL  VCC2  fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in V. 74HCT273 tpd propagation delay CP to Qn; see Figure 7 [1] VCC = 4.5 V - 16 30 - 38 - 45 ns VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns tPHL HIGH to LOW propagation delay MR to Qn; see Figure 8 VCC = 4.5 V - 23 34 - 43 - 51 ns VCC = 5.0 V; CL = 15 pF - 20 - - - - - ns tt transition time Qn output; see Figure 7 [2] VCC = 4.5 V - 7 15 - 19 - 22 ns tW pulse width CP input; see Figure 7 VCC = 4.5 V 16 9 - 20 - 24 - ns MR input LOW; see Figure 8 VCC = 4.5 V 16 8 - 20 - 24 - ns trec recovery time MR to CP; see Figure 8 VCC = 4.5 V 10 2 - 13 - 15 - ns tsu set-up time Dn to CP; see Figure 9 VCC = 4.5 V 12 5 - 15 - 18 - ns th hold time Dn to CP; see Figure 9 VCC = 4.5 V 3 4 - 3 - 3 - ns fmax maximum frequency CP input; see Figure 7 VCC = 4.5 V 30 56 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 36 - - - - - MHz CPD power dissipation capacitance per package; VI = GND to VCC  1.5 V [3] - 23 - - - - - pF Table 7. Dynamic characteristics …continued GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 10 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger 11. Waveforms Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Propagation delay clock input (CP) to output (Qn), clock (CP) pulse width, output transition time and the maximum clock pulse frequency 001aae062 CP input Qn output tPHL tPLH tW tW VM 10% 90% VOH VI GND VOL VM VM 1/fmax tTHL tTLH Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 8. Propagation delay master reset (MR) to output (Qn), pulse width master reset (MR) and recovery time master reset (MR) to clock (CP) mna464 MR input CP input Qn output tPHL tW trec VM VI GND VI VOL GND VM VM VOH 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 11 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical voltage output levels that occur with the output load. Fig 9. Data set-up and hold times data input (Dn) mna767 GND GND th tsu th tsu VM VM VM VI VOH VOL VI Qn output CP input Dn input Table 8. Measurement points Type Input Output VI VM VM 74HC273 VCC 0.5VCC 0.5VCC 74HCT273 3 V 1.3 V 1.3 V 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 12 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Test data is given in Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch Fig 10. Test circuit for measuring switching times VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf 001aad983 DUT VCC VCC VI VO RT RL S1 CL open G Table 9. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH 74HC273 VCC 6 ns 15 pF, 50 pF 1 k open 74HCT273 3 V 6 ns 15 pF, 50 pF 1 k open 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 13 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger 12. Package outline Fig 11. Package outline SOT146-1 (DIP20) UNIT A max. 1 2 b1 cD E e L MH OUTLINE REFERENCES VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches DIMENSIONS (inch dimensions are derived from the original mm dimensions) SOT146-1 99-12-27 03-02-13 A min. A max. b Z max. e1 ME w 1.73 1.30 0.53 0.38 0.36 0.23 26.92 26.54 6.40 6.22 3.60 3.05 2.54 7.62 0.254 8.25 7.80 10.0 8.3 4.2 0.51 3.2 2 0.068 0.051 0.021 0.015 0.014 0.009 1.060 1.045 0.25 0.24 0.14 0.12 0.1 0.3 0.01 0.32 0.31 0.39 0.33 0.17 0.02 0.13 0.078 MS-001 SC-603 MH c (e ) 1 ME A L seating plane A1 w M b1 e D A2 Z 20 1 11 10 b E pin 1 index 0 5 10 mm scale Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. (1) (1) (1) DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 14 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Fig 12. Package outline SOT163-1 (SO20) UNIT A max. A1 A2 A3 bp c D(1) E(1) (1) e HE L Lp Q ywv Z θ OUTLINE REFERENCES VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 SOT163-1 10 20 w M bp detail X Z e 11 1 D y 0.25 075E04 MS-013 pin 1 index 0.1 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.51 0.49 0.30 0.29 0.05 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale X θ A A1 A2 HE Lp Q E c L v M A (A ) 3 A SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 99-12-27 03-02-19 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 15 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Fig 13. Package outline SOT339-1 (SSOP20) UNIT A1 A2 A3 bp c D(1) E(1) e HE L Lp Q (1) Zywv θ OUTLINE REFERENCES VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.21 0.05 1.80 1.65 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 0.9 0.7 0.9 0.5 8 0 o 1.25 0.2 0.1 0.13 o DIMENSIONS (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. 1.03 0.63 SOT339-1 MO-150 99-12-27 03-02-19 X w M θ A A1 A2 bp D HE Lp Q detail X E Z e c L v M A (A ) 3 A 1 10 20 11 y 0.25 pin 1 index 0 2.5 5 mm scale SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 A max. 2 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 16 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Fig 14. Package outline SOT360-1 (TSSOP20) UNIT A1 A2 A3 bp c D (1) E (2) (1) e HE L Lp Q Z ywv θ OUTLINE REFERENCES VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.5 0.2 8 0 o 1 0.2 0.13 0.1 o DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT360-1 MO-153 99-12-27 03-02-19 w M bp D Z e 0.25 1 10 20 11 pin 1 index θ A A1 A2 Lp Q detail X L (A ) 3 HE E c v M A X A y 0 2.5 5 mm scale TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 A max. 1.1 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 17 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Fig 15. Package outline SOT764-1 (DHVQFN20) terminal 1 index area 1 0.5 UNIT A1 b Eh e y 0.2 c OUTLINE REFERENCES VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 4.6 4.4 Dh 3.15 2.85 y1 2.6 2.4 1.15 0.85 e1 3.5 0.30 0.18 0.05 0.00 0.05 0.1 DIMENSIONS (mm are the original dimensions) SOT764-1 MO-241 - - - - - - 0.5 0.3 L 0.1 v 0.05 w 0 2.5 5 mm scale SOT764-1 DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm A(1) max. A A1 c detail X y y e 1 C L Eh Dh e e1 b 2 9 19 12 11 1 10 20 X D E C B A terminal 1 index area AC C v M B w M E(1) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. D(1) 02-10-17 03-01-27 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 18 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger 13. Abbreviations 14. Revision history Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT273 v.4 20130610 Product data sheet - 74HC_HCT273 v.3 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 74HC_HCT273 v.3 20060124 Product data sheet - 74HC_HCT273_CNV v.2 74HC_HCT273_CNV v.2 19970827 Product specification - - 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 19 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger 15. Legal information 15.1 Data sheet status [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. 74HC_HCT273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 10 June 2013 20 of 21 NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXP Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 10 June 2013 Document identifier: 74HC_HCT273 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Recommended operating conditions. . . . . . . . 6 9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 18 14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 16 Contact information. . . . . . . . . . . . . . . . . . . . . 20 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 1. Product profile 1.1 General description High-speed switching diodes, encapsulated in small Surface-Mounted Device (SMD) plastic packages. 1.2 Features and benefits 1.3 Applications  High-speed switching  General-purpose switching 1.4 Quick reference data [1] When switched from IF = 10 mA to IR = 10 mA; RL = 100 ; measured at IR = 1 mA. BAV756S; BAW56 series High-speed switching diodes Rev. 6 — 18 March 2015 Product data sheet Table 1. Product overview Type number Package Package configuration Configuration NXP JEITA JEDEC BAV756S SOT363 SC-88 - very small quadruple common anode/common cathode BAW56 SOT23 - TO-236AB small dual common anode BAW56M SOT883 SC-101 - leadless ultra small dual common anode BAW56S SOT363 SC-88 - very small quadruple common anode/common anode BAW56T SOT416 SC-75 - ultra small dual common anode BAW56W SOT323 SC-70 - very small dual common anode  High switching speed: trr  4 ns  Low capacitance: Cd  2 pF  Low leakage current  Reverse voltage: VR  90 V  Small SMD plastic packages  AEC-Q101 qualified Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit Per diode IR reverse current VR = 80 V - - 0.5 A VR reverse voltage - - 90 V trr reverse recovery time [1] - - 4 ns BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 2 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes 2. Pinning information Table 3. Pinning Pin Description Simplified outline Symbol BAV756S 1 anode (diode 1) 2 cathode (diode 2) 3 common anode (diode 2 and diode 3) 4 cathode (diode 3) 5 anode (diode 4) 6 common cathode (diode 1 and diode 4) BAW56; BAW56T; BAW56W 1 cathode (diode 1) 2 cathode (diode 2) 3 common anode BAW56M 1 cathode (diode 1) 2 cathode (diode 2) 3 common anode BAW56S 1 cathode (diode 1) 2 cathode (diode 2) 3 common anode (diode 3 and diode 4) 4 cathode (diode 3) 5 cathode (diode 4) 6 common anode (diode 1 and diode 2) 1 3 2 56 4 006aab103 1 3 6 2 5 4 006aaa144 1 2 3 006aab099 1 2 3 3 1 2 Transparent top view 006aab099 1 2 3 1 3 2 56 4 006aab102 1 3 6 2 5 4 BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 3 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes 3. Ordering information 4. Marking [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China 5. Limiting values Table 4. Ordering information Type number Package Name Description Version BAV756S SC-88 plastic surface-mounted package; 6 leads SOT363 BAW56 - plastic surface-mounted package; 3 leads SOT23 BAW56M SC-101 leadless ultra small plastic package; 3 solder lands; body 1.0  0.6  0.5 mm SOT883 BAW56S SC-88 plastic surface-mounted package; 6 leads SOT363 BAW56T SC-75 plastic surface-mounted package; 3 leads SOT416 BAW56W SC-70 plastic surface-mounted package; 3 leads SOT323 Table 5. Marking codes Type number Marking code[1] BAV756S A7* BAW56 A1* BAW56M S5 BAW56S A1* BAW56T A1 BAW56W A1* Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Per diode VRRM repetitive peak reverse voltage - 90 V VR reverse voltage - 90 V IF forward current BAV756S Ts = 60 C - 250 mA BAW56 Tamb  25 C - 215 mA BAW56M Tamb  25 C - 150 mA BAW56S Ts = 60 C - 250 mA BAW56T Ts = 90 C - 150 mA BAW56W Tamb  25 C - 150 mA BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 4 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes [1] Tj = 25 C prior to surge. [2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. [3] Reflow soldering is the only recommended soldering method. [4] Single diode loaded. 6. Thermal characteristics IFRM repetitive peak forward current - 500 mA IFSM non-repetitive peak forward current square wave [1] tp = 1 s - 4 A tp = 1 ms - 1 A tp = 1 s - 0.5 A Ptot total power dissipation [2] BAV756S Ts = 60 C - 350 mW BAW56 Tamb  25 C - 250 mW BAW56M Tamb  25 C [3] - 250 mW BAW56S Ts = 60 C - 350 mW BAW56T Ts = 90 C [4] - 170 mW BAW56W Tamb  25 C - 200 mW Per device IF forward current BAV756S Ts = 60 C - 100 mA BAW56 Tamb  25 C - 125 mA BAW56M Tamb  25 C - 75 mA BAW56S Ts = 60 C - 100 mA BAW56T Ts = 90 C - 75 mA BAW56W Tamb  25 C - 130 mA Tj junction temperature - 150 C Tamb ambient temperature 65 +150 C Tstg storage temperature 65 +150 C Table 6. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Table 7. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per diode Rth(j-a) thermal resistance from junction to ambient in free air [1] BAW56 - - 500 K/W BAW56M [2] - - 500 K/W BAW56W - - 625 K/W BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 5 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. 7. Characteristics [1] Pulse test: tp  300 s;   0.02. [2] When switched from IF = 10 mA to IR = 10 mA; RL = 100 ; measured at IR = 1 mA. [3] When switched from IF = 10 mA; tr = 20 ns. Rth(j-sp) thermal resistance from junction to solder point BAV756S - - 255 K/W BAW56 - - 360 K/W BAW56S - - 255 K/W BAW56T - - 350 K/W BAW56W - - 300 K/W Table 7. Thermal characteristics …continued Symbol Parameter Conditions Min Typ Max Unit Table 8. Characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Per diode VF forward voltage [1] IF = 1 mA - - 715 mV IF = 10 mA - - 855 mV IF = 50 mA - - 1 V IF = 150 mA - - 1.25 V IR reverse current VR = 25 V - - 30 nA VR = 80 V - - 0.5 A VR = 25 V; Tj = 150 C - - 30 A VR = 80 V; Tj = 150 C - - 150 A Cd diode capacitance VR = 0 V; f = 1 MHz - - 2 pF trr reverse recovery time [2] - - 4 ns VFR forward recovery voltage [3] - - 1.75 V BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 6 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes (1) Tamb = 150 C (2) Tamb = 85 C (3) Tamb = 25 C (4) Tamb = 40 C Based on square wave currents. Tj = 25 C; prior to surge Fig 1. Forward current as a function of forward voltage; typical values Fig 2. Non-repetitive peak forward current as a function of pulse duration; maximum values (1) Tamb = 150 C (2) Tamb = 85 C (3) Tamb = 25 C (4) Tamb = 40 C f = 1 MHz; Tamb = 25 C Fig 3. Reverse current as a function of reverse voltage; typical values Fig 4. Diode capacitance as a function of reverse voltage; typical values 006aab109 VF (V) 0.2 1.4 0.6 1.0 1 10 102 103 IF (mA) 10−1 (1) (2) (3) (4) mbg704 10 1 102 IFSM (A) 10−1 tp (μs) 1 104 103 10 102 006aab110 10−2 10−4 10−3 10 1 10−1 102 IR (μA) 10−5 VR (V) 0 100 20 40 60 80 (1) (2) (3) (4) 0 25 VR (V) 2.5 0 0.5 mbh191 1.0 1.5 2.0 5 Cd (pF) 10 15 20 BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 7 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. (1) IR = 1 mA Input signal: reverse pulse rise time tr = 0.6 ns; reverse voltage pulse duration tp = 100 ns; duty cycle  = 0.05 Oscilloscope: rise time tr = 0.35 ns Fig 5. Reverse recovery time test circuit and waveforms Input signal: forward pulse rise time tr = 20 ns; forward current pulse duration tp  100 ns; duty cycle   0.005 Fig 6. Forward recovery voltage test circuit and waveforms trr (1) + IF t output signal tr tp t 10 % 90 % VR input signal V = VR + IF × RS RS = 50 Ω IF D.U.T. Ri = 50 Ω SAMPLING OSCILLOSCOPE mga881 tr t tp 10 % 90 % I input signal RS = 50 Ω I Ri = 50 Ω OSCILLOSCOPE 1 kΩ 450 Ω D.U.T. mga882 VFR t output signal V BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 8 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes 9. Package outline Fig 7. Package outline BAW56 (SOT23/TO-236AB) Fig 8. Package outline BAW56M (SOT883/SC-101) Fig 9. Package outline BAV756S and BAW56S (SOT363/SC-88) Fig 10. Package outline BAW56T (SOT416/SC-75) Fig 11. Package outline BAW56W (SOT323/SC-70) Dimensions in mm 04-11-04 0.45 0.15 1.9 1.1 0.9 3.0 2.8 2.5 2.1 1.4 1.2 0.48 0.38 0.15 0.09 1 2 3 Dimensions in mm 03-04-03 0.62 0.55 0.55 0.47 0.50 0.46 0.65 0.20 0.12 3 2 1 0.30 0.22 0.30 0.22 1.02 0.95 0.35 0.25 0.10 0.3 0.2 pin 1 index 1.3 0.65 2.2 2.0 1.35 1.15 2.2 1.8 1.1 0.8 0.45 0.15 1 3 2 6 5 4 Dimensions in mm 14-10-03 Dimensions in mm 04-11-04 0.95 0.60 1.8 1.4 1.75 1.45 0.9 0.7 0.25 0.10 1 0.30 0.15 1 2 3 0.45 0.15 Dimensions in mm 04-11-04 0.45 0.15 1.1 0.8 2.2 1.8 2.2 2.0 1.35 1.15 1.3 0.4 0.3 0.25 0.10 1 2 3 BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 9 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes 10. Packing information [1] For further information and the availability of packing methods, see Section 14. [2] T1: normal taping [3] T2: reverse taping 11. Soldering Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description Packing quantity 3000 10000 BAV756S SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135 4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165 BAW56 SOT23 4 mm pitch, 8 mm tape and reel -215 -235 BAW56M SOT883 2 mm pitch, 8 mm tape and reel - -315 BAW56S SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135 4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165 BAW56T SOT416 4 mm pitch, 8 mm tape and reel -115 -135 BAW56W SOT323 4 mm pitch, 8 mm tape and reel -115 -135 Fig 12. Reflow soldering footprint BAW56 (SOT23/TO-236AB) solder lands solder resist occupied area solder paste sot023_fr 0.5 (3×) 0.6 (3×) 0.6 (3×) 0.7 (3×) 3 1 3.3 2.9 1.7 1.9 2 Dimensions in mm BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 10 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes Fig 13. Wave soldering footprint BAW56 (SOT23/TO-236AB) Reflow soldering is the only recommended soldering method. Fig 14. Reflow soldering footprint BAW56M (SOT883/SC-101) solder lands solder resist occupied area preferred transport direction during soldering sot023_fw 2.8 4.5 1.4 4.6 1.4 (2×) 1.2 (2×) 2.2 2.6 Dimensions in mm solder lands solder resist occupied area solder paste sot883_fr 1.3 0.3 0.6 0.7 0.4 0.9 0.3 (2×) 0.4 (2×) 0.25 (2×) 0.7 R0.05 (12×) Dimensions in mm BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 11 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes Fig 15. Reflow soldering footprint BAV756S and BAW56S (SOT363/SC-88) Fig 16. Wave soldering footprint BAV756S and BAW56S (SOT363/SC-88) solder lands solder resist occupied area solder paste sot363_fr 2.65 2.35 0.4 (2×) 0.6 (2×) 0.5 (4×) 0.5 (4×) 0.6 (4×) 0.6 (4×) 1.5 1.8 Dimensions in mm sot363_fw solder lands solder resist occupied area preferred transport direction during soldering 5.3 1.3 1.3 1.5 0.3 1.5 4.5 2.45 2.5 Dimensions in mm BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 12 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes Fig 17. Reflow soldering footprint BAW56T (SOT416/SC-75) Fig 18. Reflow soldering footprint BAW56W (SOT323/SC-70) Fig 19. Wave soldering footprint BAW56W (SOT323/SC-70) solder resist occupied area Dimensions in mm solder lands solder paste msa438 2.0 0.6 (3x) 0.7 1.5 1 2 3 1.1 2.2 0.5 (3x) 0.85 0.6 1.9 msa429 0.852.35 0.55 (3×) 0.75 1.325 2.40 2.65 1.30 3 2 1 0.60 (3×) 0.50 (3×) 1.90 solder lands solder resist occupied area solder paste Dimensions in mm msa419 4.00 4.60 2.103.65 1.15 2.70 3 2 1 0.90 (2×) preferred transport direction during soldering solder lands solder resist occupied area Dimensions in mm BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 13 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes 12. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes BAV756S_BAW56_SER v.6 20150318 Product data sheet - BAV756S_BAW56_SER_ 5 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. BAV756S_BAW56_SER_5 20071126 Product data sheet - BAV756S_2 BAW56_4 BAW56S_2 BAW56T_2 BAW56W_4 BAV756S_2 19971021 Product specification - BAV756S_1 BAW56_4 20030325 Product specification - BAW56_3 BAW56S_2 19971021 Product specification - BAW56S_1 BAW56T_2 19971219 Product specification - - BAW56W_4 19990511 Product specification - BAW56W_3 BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 14 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes 13. Legal information 13.1 Data sheet status [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 13.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. BAV756S_BAW56_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 — 18 March 2015 15 of 16 NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXP Semiconductors BAV756S; BAW56 series High-speed switching diodes © NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 March 2015 Document identifier: BAV756S_BAW56_SER Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 15. Contents 1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 General description . . . . . . . . . . . . . . . . . . . . . 1 1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 3 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 7 8.1 Quality information . . . . . . . . . . . . . . . . . . . . . . 7 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 10 Packing information . . . . . . . . . . . . . . . . . . . . . 9 11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 13.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Contact information. . . . . . . . . . . . . . . . . . . . . 15 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 PWP RHB NT 1FEATURES APPLICATIONS DESCRIPTION Delay x0 12−Bit Grayscale PWM Control DC Register GS Register DC EEPROM Constant Current Driver LED Open Detection Temperature Error Flag (TEF) Max. OUTn Current Delay x1 12−Bit Grayscale PWM Control DC Register GS Register DC EEPROM Constant Current Driver LED Open Detection Delay x15 6−Bit Dot 12−Bit Grayscale PWM Control DC Register GS Register DC EEPROM Constant Current Driver LED Open Detection OUT0 OUT1 OUT15 SOUT SCLK SIN IREF XERR XLAT GSCLK BLANK DCPRG DCPRG DCPRG VPRG VPRG VPRG VCC GND VPRG Input Shift Register Input Shift Register VPRG 0 11 12 23 180 191 90 95 6 11 5 VPRG 0 0 95 96 191 LED Open Detection (LOD) 5 90 95 6 11 DCPRG 0 192 96 1 0 1 0 0 1 1 0 GS Counter CNT CNT CNT CNT 96 96 Status Information: LOD, TED, DC DATA 192 0 191 1 0 0 1 VREF =1.24 V Correction 6−Bit Dot Correction 6−Bit Dot Correction 1 0 Blank TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 www.ti.com 16 CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL 2• 16 Channels • Monocolor, Multicolor, Full-Color LED Displays • 12 bit (4096 Steps) Grayscale PWM Control • LED Signboards • Dot Correction • Display Backlighting • General, High-Current LED Drive – 6 bit (64 Steps) – Storable in Integrated EEPROM • Drive Capability (Constant-Current Sink) The TLC5940 is a 16-channel, constant-current sink – 0 mA to 60 mA (VCC < 3.6 V) LED driver. Each channel has an individually – 0 mA to 120 mA (VCC > 3.6 V) adjustable 4096-step grayscale PWM brightness • LED Power Supply Voltage up control and a 64-step, constant-current sink (dot to 17 V correction). The dot correction adjusts the brightness • VCC = 3 V to 5.5 V variations between LED channels and other LED • Serial Data Interface drivers. The dot correction data is stored in an • Controlled In-Rush Current integrated EEPROM. Both grayscale control and dot correction are accessible via a serial interface. A • 30MHz Data Transfer Rate single external resistor sets the maximum current • CMOS Level I/O value of all 16 channels. • Error Information The TLC5940 features two error information circuits. – LOD: LED Open Detection The LED open detection (LOD) indicates a broken or – TEF: Thermal Error Flag disconnected LED at an output terminal. The thermal error flag (TEF) indicates an overtemperature condition. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2004–2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ABSOLUTE MAXIMUM RATINGS. TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA PACKAGE(1) PART NUMBER 28-pin HTSSOP PowerPAD™ TLC5940PWP –40°C to 85°C 32-pin 5mm x 5mm QFN TLC5940RHB 28-pin PDIP TLC5940NT (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. over operating free-air temperature range (unless otherwise noted) (1) UNIT VI Input voltage range(2) VCC –0.3V to 6V IO Output current (dc) 130mA VI Input voltage range V(BLANK), V(DCPRG), V(SCLK), V(XLAT), V(SIN), V(GSCLK), V(IREF) –0.3V to VCC +0.3V V(SOUT), V(XERR) –0.3V to VCC +0.3V VO Output voltage range V(OUT0) to V(OUT15) –0.3V to 18V EEPROM program range V(VPRG) –0.3V to 24V EEPROM write cycles 50 HBM (JEDEC JESD22-A114, Human Body Model) 2kV ESD rating CBM (JEDEC JESD22-C101, Charged Device Model) 500V Tstg Storage temperature range –55°C to 150°C TA Operating ambient temperature range –40°C to 85°C HTSSOP (PWP) (4) 31.58°C/W Package thermal impedance(3) QFN (RHB) 35.9°C/W PDIP (NP) 48°C/W (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. (3) The package thermal impedance is calculated in accordance with JESD 51-7. (4) With PowerPAD soldered on PCB with 2 oz. (56,7 grams) trace of copper. See SLMA002 for further information. 2 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com RECOMMENDED OPERATING CONDITIONS DISSIPATION RATINGS TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 MIN NOM MAX UNIT DC CHARACTERISTICS VCC Supply Voltage 3 5.5 V VO Voltage applied to output (OUT0–OUT15) 17 V VIH High-level input voltage 0.8 VCC VCC V VIL Low-level input voltage GND 0.2 VCC V IOH High-level output current VCC = 5V at SOUT –1 mA IOL Low-level output current VCC = 5V at SOUT, XERR 1 mA OUT0 to OUT15, VCC < 3.6V 60 mA IOLC Constant output current OUT0 to OUT15, VCC > 3.6V 120 mA V(VPRG) EEPROM program voltage 20 22 23 V TA Operating free-air temperature range -40 85 °C AC CHARACTERISTICS VCC = 3 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) f (SCLK) Data shift clock frequency SCLK 30 MHz f (GSCLK) Grayscale clock frequency GSCLK 30 MHz twh0/twl0 SCLK pulse duration SCLK = H/L (see Figure 11) 16 ns twh1/twl1 GSCLK pulse duration GSCLK = H/L (see Figure 11) 16 ns twh2 XLAT pulse duration XLAT = H (see Figure 11) 20 ns twh3 BLANK pulse duration BLANK = H (see Figure 11) 20 ns t su0 SIN to SCLK ↑ (1) (see Figure 11) 5 ns t su1 SCLK ↓ to XLAT ↑ (see Figure 11) 10 ns t su2 VPRG ↑ ↓ to SCLK ↑ (see Figure 11) 10 ns t su3 Setup time VPRG ↑ ↓XLAT ↑ (see Figure 11) 10 ns t su4 BLANK ↓ to GSCLK ↑ (see Figure 11) 10 ns t su5 XLAT ↑ to GSCLK ↑ (see Figure 11) 30 ns t su6 VPRG ↑ to DCPRG ↑ (see Figure 16) 1 ms th0 SCLK ↑ to SIN (see Figure 11) 3 ns th1 XLAT ↓ to SCLK ↑ (see Figure 11) 10 ns th2 SCLK ↑ to VPRG ↑ ↓ (see Figure 11) 10 ns Hold Time th3 XLAT ↓ to VPRG ↑ ↓ (see Figure 11) 10 ns th4 GSCLK ↑ to BLANK ↑ (see Figure 11) 10 ns th5 DCPRG ↓ to VPRG ↓ (see Figure 11) 1 ms tprog Programming time for EEPROM (see Figure 16) 20 ms (1) ↑ and ↓ indicates a rising edge, and a falling edge respectively. POWER RATING DERATING FACTOR POWER RATING POWER RATING PACKAGE TA < 25°C ABOVE TA = 25°C TA = 70°C TA = 85°C 28-pin HTSSOP with 3958mW 31.67mW/C 2533mW 2058mW PowerPAD™(1) soldered 28-pin HTSSOP with PowerPAD™ 2026mW 16.21mW/°C 1296mW 1053mW unsoldered 32-pin QFN(1) 3482mW 27.86mW/°C 2228mW 1811mW 28-pin PDIP 2456mW 19.65mW/°C 1572mW 1277mW (1) The PowerPAD is soldered to the PCB with a 2 oz. (56,7 grams) copper trace. See SLMA002 for further information. Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TLC5940 www.ti.com ELECTRICAL CHARACTERISTICS TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 VCC = 3 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage IOH = -1mA, SOUT VCC –0.5 V VOL Low-level output voltage IOL = 1mA, SOUT 0.5 V VI = VCC or GND; BLANK, DCPRG, GSCLK, SCLK, SIN, –1 1 XLAT µA I VI = GND; VPRG –1 1 I Input current VI = VCC; VPRG 50 VI = 22V; VPRG; DCPRG = VCC 4 10 mA No data transfer, all output OFF, 0.9 6 VO = 1V, R(IREF) = 10kΩ No data transfer, all output OFF, 5.2 12 VO = 1V, R(IREF) = 1.3kΩ ICC Supply current mA Data transfer 30MHz, all output ON, 16 25 VO = 1V, R(IREF) = 1.3kΩ Data transfer 30MHz, all output ON, 30 60 VO = 1V, R(IREF) = 640Ω Constant sink current (see IO(LC) All output ON, VO = 1V, R(IREF) = 640Ω 54 61 69 mA Figure 2) All output OFF, VO = 15V, R(IREF) = 640Ω, I lkg Leakage output current 0.1 µA OUT0 to OUT15 All output ON, VO = 1V, R(IREF) = 640Ω, 1 ±4 OUT0 to OUT15, –20°C to 85°C All output ON, VO = 1V, R(IREF) = 640Ω, 1 8 OUT0 to OUT15(1) Constant sink current error ΔIO(LC0) % (see Figure 2) All output ON, VO = 1V, R(IREF) = 320Ω, 1 6 OUT0 to OUT15, –20°C to 85°C All output ON, VO = 1V, R(IREF) = 320Ω, ±1 ±8 VCC = 4.5V to 5.5V, OUT0 to OUT15(1) Constant sink current error Device to device, Averaged current from OUT0 to –2 ΔIO(LC1) 4 % (see Figure 2) OUT15, R(IREF) = 1920Ω (20mA) (2) +0.4 Constant sink current error Device to device, Averaged current from OUT0 to –2.7 ΔIO(LC2) ±4 % (see Figure 2) OUT15, R(IREF) = 480Ω (80mA) (2) +2 All output ON, VO = 1V, R(IREF) = 640Ω 1 ±4 %/V OUT0 to OUT15, VCC = 3V to 5.5V(3) ΔIO(LC3) Line regulation (see Figure 2) All output ON, VO = 1V, R(IREF) = 320Ω , ±1 ±6 %/V OUT0 to OUT15, VCC = 3V to 5.5V(3) All output ON, VO = 1V to 3V, R(IREF) = 640Ω, ±2 ±6 %/V OUT0 to OUT15(4) ΔIO(LC4) Load regulation (see Figure 2) All output ON, VO = 1V to 3V, R(IREF) = 320Ω, 2 8 %/V OUT0 to OUT15(4) T(TEF) Thermal error flag threshold Junction temperature(5) 150 170 C V(LED) LED open detection threshold 0.3 0.4 V Reference voltage V(IREF) R(IREF) = 640Ω 1.20 1.24 1.28 V output (1) The deviation of each output from the average of OUT0-15 constant current. It is calculated by Equation 1 in Table 1. (2) The deviation of average of OUT1-15 constant current from the ideal constant-current value. It is calculated by Equation 2 in Table 1. The ideal current is calculated by Equation 3 in Table 1. (3) The line regulation is calculated by Equation 4 in Table 1. (4) The load regulation is calculated by Equation 5 in Table 1. (5) Not tested. Specified by design 4 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com 100 I I I (%) OUTavg _ 0 15 OUTn OUTavg _ 0 15 ´ - D = - - (1) 100 I I I (%) OUT(IDEAL) OUTavg OUT(IDEAL) ´ - D = (2) ÷ ÷ ø ö ç ç è æ = ´ IREF OUT(IDEAL) R .1 24V I 31 5. (3) 5.2 100 I( at V 0.3 V) I( at V 5.5 V) I( at V 0.3 V) (% / V) OUTn CC OUTn CC OUTn CC ´ = = - = D = (4) 0.2 100 I( at V 0.1 V) I( at V 0.3 V) I( at V 0.1 V) (%/ V) OUTn OUTn OUTn OUTn OUTn OUTn ´ = = - = D = (5) SWITCHING CHARACTERISTICS TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Table 1. Test Parameter Equations VCC = 3V to 5.5V, TA = -40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t r0 SOUT 16 Rise time ns t r1 OUTn, VCC = 5V, TA = 60°C, DCn = 3Fh 10 30 t f0 SOUT 16 Fall time ns t f1 OUTn, VCC = 5V, TA = 60°C, DCn = 3Fh 10 30 tpd0 SCLK to SOUT (see Figure 11) 30 ns tpd1 BLANK to OUT0 60 ns tpd2 OUTn to XERR (see Figure 11 ) 1000 ns Propagation delay time tpd3 GSCLK to OUT0 (see Figure 11 ) 60 ns tpd4 XLAT to IOUT (dot correction) (see Figure 11 ) 60 ns tpd5 DCPRG to OUT0 (see Figure 11) 30 ns td Output delay time OUTn to OUT(n+1) (see Figure 11 ) 20 30 ns ton-err Output on-time error touton– Tgsclk (see Figure 11), GSn = 01h, GSCLK = 11 MHz 10 –50 –90 ns Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TLC5940 www.ti.com DEVICE INFORMATION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 GND BLANK XLAT SCLK SIN VPRG OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 VCC IREF DCPRG GSCLK SOUT XERR OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 PWP PACKAGE (TOP VIEW) Thermal PAD THERMAL PAD GSCLK 24 SOUT 23 XERR 22 OUT15 21 OUT14 20 OUT13 19 OUT12 18 OUT11 17 16 OUT10 15 OUT9 14 OUT8 13 NC 12 NC 11 OUT7 10 OUT6 9 OUT5 OUT4 8 OUT3 7 OUT2 6 OUT1 5 OUT0 4 VPRG 3 SIN 2 SCLK 1 DCPRG 25 IREF 26 VCC 27 NC 28 NC 29 GND 30 BLANK 31 XLAT 32 RHB PACKAGE (TOP VIEW) NC − No internal connection 1 2 3 4 5 6 7 8 9 10 11 12 13 14 18 17 16 15 22 21 20 19 26 25 24 23 28 27 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 GND VCC IREF DCPRG GSCLK SOUT XERR OUT15 SCLK XLAT BLANK OUT0 VPRG SIN NT PACKAGE (TOP VIEW) TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 6 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 TERMINAL FUNCTION TERMINAL NO. I/O DESCRIPTION NAME DIP PWP RHB Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF. GS counter is also BLANK 23 2 31 I reset. When BLANK = L, OUTn are controlled by grayscale PWM control. Switch DC data input. When DCPRG = L, DC is connected to EEPROM. When DCPRG = H, DCPRG 19 26 25 I DC is connected to the DC register. DCPRG also controls EEPROM writing, when VPRG = V(PRG). EEPROM data = 3Fh (default) GND 22 1 30 G Ground GSCLK 18 25 24 I Reference clock for grayscale PWM control IREF 20 27 26 I Reference current terminal 12, 13, NC – – No connection 28, 29 OUT0 28 7 4 O Constant current output OUT1 1 8 5 O Constant current output OUT2 2 9 6 O Constant current output OUT3 3 10 7 O Constant current output OUT4 4 11 8 O Constant current output OUT5 5 12 9 O Constant current output OUT6 6 13 10 O Constant current output OUT7 7 14 11 O Constant current output OUT8 8 15 14 O Constant current output OUT9 9 16 15 O Constant current output OUT10 10 17 16 O Constant current output OUT11 11 18 17 O Constant current output OUT12 12 19 18 O Constant current output OUT13 13 20 19 O Constant current output OUT14 14 21 20 O Constant current output OUT15 15 22 21 O Constant current output SCLK 25 4 1 I Serial data shift clock SIN 26 5 2 I Serial data input SOUT 17 24 23 O Serial data output VCC 21 28 27 I Power supply voltage Multifunction input pin. When VPRG = GND, the device is in GS mode. When VPRG = VCC, the VPRG 27 6 3 I device is in DC mode. When VPRG = V(VPRG), DC register data can programmed into DC EEPROM with DCPRG=HIGH. EEPROM data = 3Fh (default) XERR 16 23 22 O Error output. XERR is an open-drain terminal. XERR goes L when LOD or TEF is detected. Level triggered latch signal. When XLAT = high, the TLC5940 writes data from the input shift XLAT 24 3 32 I register to either GS register (VPRG = low) or DC register (VPRG = high). When XLAT = low, the data in GS or DC register is held constant. Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TLC5940 www.ti.com PARAMETER MEASUREMENT INFORMATION PIN EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS VCC INPUT GND 400 W INPUT EQUIVALENT CIRCUIT (BLANK, XLAT, SCLK, SIN, GSCLK, DCPRG) 23 W 23 SOUT GND OUTPUT EQUIVALENT CIRCUIT (SOUT) _ + Amp 400 W 100 W VCC INPUT GND INPUT EQUIVALENT CIRCUIT (IREF) XERR GND OUTPUT EQUIVALENT CIRCUIT (XERR) 23 W INPUT INPUT GND GND INPUT EQUIVALENT CIRCUIT (VCC) INPUT EQUIVALENT CIRCUIT (VPRG) OUT GND OUTPUT EQUIVALENT CIRCUIT (OUT) VCC W V(IREF) TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Resistor values are equivalent resistances, and they are not tested. Figure 1. Input and Output Equivalent Circuits 8 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com SOUT OUTn t , t , t r0 f0 pd0 t , t , t , t , t , t , t , t r1 f1 pd1 pd2 pd3 pd4 pd5 d VO = 4V Testpoint C = 15pF L Testpoint R = 51 L W C = 15pF L V = 1V O OUTn V = 1V to 3V O OUTn IREF R (IREG) 470kΩ Testpoint V(IREF) VCC XERR tpd3 I , I , I , I , I O(LC) O(LC0) O(LC1) O(LC2) O(LC3) D D D D DIO(LC4) = 640W TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 PARAMETER MEASUREMENT INFORMATION (continued) Figure 2. Parameter Measurement Circuits Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TLC5940 www.ti.com TYPICAL CHARACTERISTICS 100 1 k 10 k IO − Output Current − mA 0 20 60 100 Reference Resistor, R - (IREF) W 40 80 120 7.68 kΩ 1.92 kΩ 0.96 kΩ 0.64 kΩ 0.38 kΩ 0.32 kΩ 0.48 kΩ 0 1 k 3 k 4 k 2 k TA − Free-Air Temperature − C o -20 0 20 100 Power Dissipation Rate - mW -40 40 60 80 TLC5940PWP PowerPAD Soldered TLC5940PWP PowerPAD Unsoldered TLC5940RHB TLC5940NT 0 20 40 60 80 100 120 140 0 0.5 1 1.5 2 2.5 3 V - Output Voltage - V O I - Output Current - mA O T = 25 C, V = 5 V A CC ° I = 120 mA O I = 100 mA O I = 80 mA O I = 60 mA O I = 40 mA O I = 20 mA O I = 5 mA O 55 56 57 58 59 60 61 62 63 64 65 0 0.5 1 1.5 2 2.5 3 V - Output Voltage - V O I - Output Current - mA O I = 60 mA, V = 5 V O CC T = 85 C A ° T = -40 C A ° T = 25 C A ° TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 REFERENCE RESISTOR POWER DISSIPATION RATE vs vs OUTPUT CURRENT FREE-AIR TEMPERATURE Figure 3. Figure 4. OUTPUT CURRENT OUTPUT CURRENT vs vs OUTPUT VOLTAGE OUTPUT VOLTAGE Figure 5. Figure 6. 10 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com -8 -6 -4 -2 0 2 4 6 8 0 20 40 60 80 I - Output Current - mA O Δ I - Constant Output Current - % OLC T = 25 C, V = 5 V A CC ° -8 -6 -4 -2 0 2 4 6 8 -40 -20 0 20 40 60 80 100 T - Ambient Temperature - C A ° Δ I - Constant Output Current - % OLC V = 3.3 V CC V = 5 V CC I = 60 mA O 0 20 40 60 80 100 120 140 0 10 20 30 40 50 60 70 Dot Correction Data - dec I - Output Current - mA O I = 5 mA O I = 60 mA O I = 80 mA O I = 120 mA O I = 30 mA O T = 25 C, V = 5 V A CC ° 0 10 20 30 40 50 60 70 0 10 20 30 40 50 60 70 Dot Correction Data - dec I - Output Current - mA O T = -40 C A ° T = 25 C A ° T = 85 C A ° I = 60 mA, V = 5 V O CC TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 TYPICAL CHARACTERISTICS (continued) CONSTANT OUTPUT CURRENT, ΔIOLC CONSTANT OUTPUT CURRENT, ΔIOLC vs vs AMBIENT TEMPERATURE OUTPUT CURRENT Figure 7. Figure 8. OUTPUT CURRENT OUTPUT CURRENT vs vs DOT CORRECTION LINEARITY (ABS VALUE) DOT CORRECTION LINEARITY (ABS VALUE) Figure 9. Figure 10. Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TLC5940 www.ti.com PRINCIPLES OF OPERATION SERIAL INTERFACE VPRG XLAT SIN SCLK SOUT BLANK GSCLK OUT0 (current) OUT1 (current) OUT15 (current) XERR 1 96 DC MSB DC LSB DC MSB 1 192 193 1 192 193 1 1 4096 t t su4 h4 twh3 1 GS1 MSB GS1 LSB GS1 MSB GS2 MSB GS2 LSB GS2 MSB SID2 MSB SID2 MSB-1 SID1 MSB SID1 MSB-1 SID1 LSB GS3 MSB - - - twh2 t su2 t su1 twh0 twl0 t su0 th0 tpd0 tpd1 t + t pd1 d t + 15 x t pd1 d tpd3 td 15 x td tpd2 t + t pd3 d tpd3 tpd4 twl1 twh1 DC Data Input Mode GS Data Input Mode 1st GS Data Input Cycle 2nd GS Data Input Cycle 1st GS Data Output Cycle 2nd GS Data Output Cycle t su3 th3 th2 th1 t su5 Tgsclk touton SIN(a) SIN SOUT SOUT(b) TLC5940 (a) GSCLK, BLANK, SIN SOUT TLC5940 (b) SCLK, XLAT, VPRG DCPRG, TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 The TLC5940 has a flexible serial interface, which can be connected to microcontrollers or digital signal processors in various ways. Only 3 pins are needed to input data into the device. The rising edge of SCLK signal shifts the data from the SIN pin to the internal register. After all data is clocked in, a high-level pulse of XLAT signal latches the serial data to the internal registers. The internal registers are level-triggered latches of XLAT signal. All data are clocked in with the MSB first. The length of serial data is 96 bit or 192 bit, depending on the programming mode. Grayscale data and dot correction data can be entered during a grayscale cycle. Although new grayscale data can be clocked in during a grayscale cycle, the XLAT signal should only latch the grayscale data at the end of the grayscale cycle. Latching in new grayscale data immediately overwrites the existing grayscale data. Figure 11 shows the timing chart. More than two TLC5940s can be connected in series by connecting an SOUT pin from one device to the SIN pin of the next device. An example of cascading two TLC5940s is shown in Figure 12 and the timing chart is shown in Figure 13. The SOUT pin can also be connected to the controller to receive status information from TLC5940 as shown in Figure 22. Figure 11. Serial Data Input Timing Chart Figure 12. Cascading Two TLC5940 Devices 12 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com VPRG XLAT SIN(a) SCLK SOUT(b) BLANK GSCLK OUT0 (current) OUT1 (current) OUT15 (current) XERR 1 192X2 DCb MSB DCa LSB DCb MSB 1 384 385 1 384 385 1 1 4096 1 GSb1 MSB GSa1 LSB GSb1 MSB GSb2 MSB GSa2 LSB GSb2 MSB SIDb2 MSB SIDb2 MSB-1 SIDb1 MSB SIDb1 MSB-1 SIDa1 LSB GSb3 MSB - - - 192 96X2 ERROR INFORMATION OUTPUT TEF: THERMAL ERROR FLAG TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Figure 13. Timing Chart for Two Cascaded TLC5940 Devices The open-drain output XERR is used to report both of the TLC5940 error flags, TEF and LOD. During normal operating conditions, the internal transistor connected to the XERR pin is turned off. The voltage on XERR is pulled up to VCC through an external pullup resistor. If TEF or LOD is detected, the internal transistor is turned on, and XERR is pulled to GND. Since XERR is an open-drain output, multiple ICs can be OR'ed together and pulled up to VCC with a single pullup resistor. This reduces the number of signals needed to report a system error (see Figure 22). To differentiate LOD and TEF signal from XERR pin, LOD can be masked out with BLANK = HIGH. Table 2. XERR Truth Table ERROR CONDITION ERROR INFORMATION SIGNALS TEMPERATURE OUTn VOLTAGE TEF LOD BLANK XERR TJ < T(TEF) Don't Care L X H H TJ > T(TEF) Don't Care H X L OUTn > V(LED) L L H TJ < T(TEF) OUTn < V(LED) L H L L OUTn > V(LED) H L L TJ > T(TEF) OUTn < V(LED) H H L The TLC5940 provides a temperature error flag (TEF) circuit to indicate an overtemperature condition of the IC. If the junction temperature exceeds the threshold temperature (160C typical), TEF becomes H and XERR pin goes to low level. When the junction temperature becomes lower than the threshold temperature, TEF becomes L and XERR pin becomes high impedance. TEF status can also be read out from the TLC5940 status register. Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): TLC5940 www.ti.com LOD: LED OPEN DETECTION DELAY BETWEEN OUTPUTS OUTPUT ENABLE SETTING MAXIMUM CHANNEL CURRENT Imax V (IREF) R(IREF)  31.5 (6) TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 The TLC5940 has an LED-open detector that detects broken or disconnected LEDs. The LED open detector pulls the XERR pin to GND when an open LED is detected. XERR and the corresponding error bit in the Status Information Data is only active under the following open-LED conditions. 1. OUTn is on and the time tpd2 (1 µs typical) has passed. 2. The voltage of OUTn is < 0.3V (typical) The LOD status of each output can be also read out from the SOUT pin. See STATUS INFORMATION OUTPUT section for details. The LOD error bits are latched into the Status Information Data when XLAT returns to a low after a high. Therefore, the XLAT pin must be pulsed high then low while XERR is active in order to latch the LOD error into the Status Information Data for subsequent reading via the serial shift register. The TLC5940 has graduated delay circuits between outputs. These circuits can be found in the constant current driver block of the device (see the functional block diagram). The fixed-delay time is 20ns (typical), OUT0 has no delay, OUT1 has 20ns delay, and OUT2 has 40ns delay, etc. The maximum delay is 300ns from OUT0 to OUT15. The delay works during switch on and switch off of each output channel. These delays prevent large inrush currents which reduces the bypass capacitors when the outputs turn on. All OUTn channels of the TLC5940 can be switched off with one signal. When BLANK is set high, all OUTn channels are disabled, regardless of logic operations of the device. The grayscale counter is also reset. When BLANK is set low, all OUTn channels work under normal conditions. If BLANK goes low and then back high again in less than 300ns, all outputs programmed to turn on still turn on for either the programmed number of grayscale clocks, or the length of time that the BLANK signal was low, which ever is lower. For example, if all outputs are programmed to turn on for 1ms, but the BLANK signal is only low for 200ns, all outputs still turn on for 200ns, even though some outputs are turning on after the BLANK signal has already gone high. Table 3. BLANK Signal Truth Table BLANK OUT0 - OUT15 LOW Normal condition HIGH Disabled The maximum output current per channel is programmed by a single resistor, R(IREF), which is placed between IREF pin and GND pin. The voltage on IREF is set by an internal band gap V(IREF) with a typical value of 1.24V. The maximum channel current is equivalent to the current flowing through R(IREF) multiplied by a factor of 31.5. The maximum output current per channel can be calculated by Equation 6: where: V(IREF) = 1.24 V R(IREF) = User-selected external resistor. Imax must be set between 5 mA and 120 mA. The output current may be unstable if Imax is set lower than 5 mA. Output currents lower than 5 mA can be achieved by setting Imax to 5 mA or higher and then using dot correction. Figure 3 shows the maximum output current IO versus R(IREF). R(IREF) is the value of the resistor between IREF terminal to GND, and IO is the constant output current of OUT0 to OUT15. A variable power supply may be connected to the IREF pin through a resistor to change the maximum output current per channel. The maximum output current per channel is 31.5 times the current flowing out of the IREF pin. 14 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com POWER DISSIPATION CALCULATION P = V x I + D CC CC V x I OUT MAX x DCn 63 x dPWM x N ( ) ( ) (7) OPERATING MODES SETTING DOT CORRECTION IOUTn Imax  DCn 63 (8) TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 The device power dissipation must be below the power dissipation rating of the device package to ensure correct operation. Equation 7 calculates the power dissipation of device: where: VCC: device supply voltage ICC: device supply current VOUT: TLC5940 OUTn voltage when driving LED current IMAX: LED current adjusted by R(IREF) Resistor DCn: maximum dot correction value for OUTn N: number of OUTn driving LED at the same time dPWM: duty cycle defined by BLANK pin or GS PWM value The TLC5940 has operating modes depending on the signals DCPRG and VPRG. Table 4 shows the available operating modes. The TPS5940 GS operating mode (see Figure 11) and shift register values are not defined after power up. One solution to solve this is to set dot correction data after TLS5940 power-up and switch back to GS PWM mode. The other solution is to overflow the input shift register with 193 bits of dummy data and latch it while TLS540 is in GS PWM mode. The values in the input shift register, DC register and GS register are unknown just after power on. The DC and GS register values should be properly stored through the serial interface before starting the operation. Table 4. TLC5940 Operating Modes Truth Table SIGNAL INPUT SHIFT REGISTER MODE DC VALUE DCPRG VPRG L EEPROM GND 192 bit Grayscale PWM Mode H DC Register L EEPROM VCC 96 bit Dot Correction Data Input Mode H DC Register L EEPROM H V(VPRG) X EEPROM Programming Mode Write dc register value to EEPROM. (Default data: 3Fh) The TLC5940 has the capability to fine adjust the output current of each channel OUT0 to OUT15 independently. This is also called dot correction. This feature is used to adjust the brightness deviations of LEDs connected to the output channels OUT0 to OUT15. Each of the 16 channels can be programmed with a 6-bit word. The channel output can be adjusted in 64 steps from 0% to 100% of the maximum output current Imax. Dot correction for all channels must be entered at the same time. Equation 8 determines the output current for each output n: where: Imax = the maximum programmable output current for each output. DCn = the programmed dot correction value for output n (DCn = 0 to 63). n = 0 to 15 Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Link(s): TLC5940 www.ti.com DC 0.0 0 DC 1.0 6 DC 15.0 90 DC 15.5 95 DC 0.5 5 DC 14.5 89 MSB LSB DC OUT15 DC OUT14 − DC OUT2 DC OUT0 tsu1 DC n MSB DC n MSB−1 DC n MSB−2 DC n LSB+1 DC n LSB DC n MSB DC n+1 MSB DC n+1 MSB−1 DC n MSB−1 DC n MSB−2 DC n−1 LSB DC n−1 LSB+1 DC n−1 MSB DC n−1 MSB−1 DC n−1 MSB−2 SCLK 1 2 3 95 96 1 2 SOUT SIN VPRG XLAT DC Mode Data Input Cycle n DC Mode Data Input Cycle n+1 VCC twh0 twl0 DC n−1 LSB twh2 th1 TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Figure 14 shows the dot correction data packet format which consists of 6 bits x 16 channel, total 96 bits. The format is Big-Endian format. This means that the MSB is transmitted first, followed by the MSB-1, etc. The DC 15.5 in Figure 14 stands for the 5th most significant bit for output 15. Figure 14. Dot Correction Data Packet Format When VPRG is set to VCC, the TLC5940 enters the dot correction data input mode. The length of input shift register becomes 96 bits. After all serial data are shifted in, the TLC5940 writes the data in the input shift register to DC register when XLAT is high, and holds the data in the DC register when XLAT is low. The DC register is a level triggered latch of XLAT signal. Since XLAT is a level-triggered signal, SCLK and SIN must not be changed while XLAT is high. After XLAT goes low, data in the DC register is latched and does not change. BLANK signal does not need to be high to latch in new data. XLAT has setup time (tsu1) and hold time (th1) to SCLK as shown in Figure 15. Figure 15. Dot Correction Data Input Timing Chart The TLC5940 also has an EEPROM to store dot correction data. To store data from the dot correction register to EEPROM, DCPRG is set to high after applying VPRG to the VPRG pin. Figure 16 shows the EEPROM programming timings. The EEPROM has a default value of all 1s. 16 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com VPRG DCPRG XLAT SIN SCLK SOUT 1 96 DC MSB - DC MSB DC LSB VCC V(PRG) t su6 tprog th5 DCPRG OUT0 (Current) tpd5 tpd5 OUT15 (Current) SETTING GRAYSCALE Brightness in % GSn 4095  100 (9) GS 0.0 0 GS 1.0 12 GS 15.0 180 GS 15.11 191 GS 0.11 11 GS 14.11 179 MSB LSB GS OUT15 GS OUT14 − GS OUT2 GS OUT0 TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Figure 16. EEPROM Programming Timing Chart Figure 17. DCPRG and OUTn Timing Diagram The TLC5940 can adjust the brightness of each channel OUTn using a PWM control scheme. The use of 12 bits per channel results in 4096 different brightness steps, respective 0% to 100% brightness. Equation 9 determines the brightness level for each output n: where: GSn = the programmed grayscale value for output n (GSn = 0 to 4095) n = 0 to 15 Grayscale data for all OUTn Figure 18 shows the grayscale data packet format which consists of 12 bits x 16 channels, totaling 192 bits. The format is Big-Endian format. This means that the MSB is transmitted first, followed by the MSB-1, etc. Figure 18. Grayscale Data Packet Format When VPRG is set to GND, the TLC5940 enters the grayscale data input mode. The device switches the input shift register to 192-bit width. After all data is clocked in, a rising edge of the XLAT signal latches the data into Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Link(s): TLC5940 www.ti.com STATUS INFORMATION OUTPUT LOD 15 X DC 15.5 DC 0.0 X X 0 23 LOD Data DC Values Reserved MSB LSB 24 119 120 TEF LOD 0 TEF 16 X 15 191 TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 the grayscale register (see Figure 11). New grayscale data immediately becomes valid at the rising edge of the XLAT signal; therefore, new grayscale data should be latched at the end of a grayscale cycle when BLANK is high.The first GS data input cycle after dot correction requires an additional SCLK pulse after the XLAT signal to complete the grayscale update cycle. All GS data in the input shift register is replaced with status information data (SID) after updated the grayscale register. The TLC5940 does have a status information register, which can be accessed in grayscale mode (VPRG=GND). After the XLAT signal latches the data into the GS register the input shift register data will be replaced with status information data (SID) of the device (see Figure 18). LOD, TEF, and dot correction EEPROM data (DCPRG=LOW) or dot correction register data (DCPRG=HIGH) can be read out at SOUT pin. The status information data packet is 192 bits wide. Bits 0-15 contain the LOD status of each channel. Bit 16 contains the TEF status. If DCPRG is low, bits 24-119 contain the data of the dot-correction EEPROM. If DCPRG is high, bits 24-119 contain the data of the dot-correction register.The remaining bits are reserved. The complete status information data packet is shown in Figure 19. SOUT outputs the MSB of the SID at the same time the SID are stored in the SID register, as shown Figure 20. The next SCLK pulse, which will be the clock for receiving the SMB of the next grayscale data, transmits MSB-1 of SID. If output voltage is < 0.3 V (typical) when the output sink current turns on, LOD status flage becomes active. The LOD status flag is an internal signal that pulls XERR pin down to low when the LOD status flag becomes active. The delay time, tpd2 (1 µs maximum), is from the time of turning on the output sink current to the time LOD status flage becomes valid. The timing for each channel's LOD status to become valid is shifted by the 30-ns (maximum) channel-to-channel turn-on time. After the first GSCLK goes high, OUT0 LOD status is valid; tpd3 + tpd2 = 60 ns + 1 µs. OUT1 LOD status is valid; tpd3 + td + tpd2 = 60 ns + 30 ns + 1 µs = 1.09 µs. OUT2 LOD status is valid; tpd3 + 2*td + tpd2 = 1.12 µs, and so on. It takes 1.51 µs maximum (tpd3 + 15*td + tpd2) from the first GSCLK rising edge until all LOD become valid; tsuLOD must be > 1.51 µs (see Figure 20) to ensure that all LOD data are valid. Figure 19. Status Information Data Packet Format 18 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com VPRG XLAT SIN SCLK SOUT BLANK GSCLK OUT0 (current) OUT1 (current) OUT15 (current) XERR 1 192 193 1 192 1 4096 GS1 MSB GS1 LSB GS1 MSB GS2 MSB GS2 LSB GS2 MSB SID1 MSB SID1 MSB-1 SID1 LSB - - t + 15 x t + t pd3 d pd2 tpd3 td 15 x td tpd2 GS Data Input Mode 1st GS Data Input Cycle 2nd GS Data Input Cycle (1st GS Data Output Cycle) t suLOD > tpd4 + 15 x td + tpd3 GRAYSCALE PWM OPERATION TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Figure 20. Readout Status Information Data (SID) Timing Chart The grayscale PWM cycle starts with the falling edge of BLANK. The first GSCLK pulse after BLANK goes low increases the grayscale counter by one and switches on all OUTn with grayscale value not zero. Each following rising edge of GSCLK increases the grayscale counter by one. The TLC5940 compares the grayscale value of each output OUTn with the grayscale counter value. All OUTn with grayscale values equal to the counter values are switched off. A BLANK=H signal after 4096 GSCLK pulses resets the grayscale counter to zero and completes the grayscale PWM cycle (see Figure 21). When the counter reaches a count of FFFh, the counter stops counting and all outputs turn off. Pulling BLANK high before the counter reaches FFFh immediately resets the counter to zero. Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link(s): TLC5940 www.ti.com GSCLK BLANK GS PWM Cycle n 1 2 3 1 GS PWM Cycle n+1 OUT0 OUT1 OUT15 XERR n x t d tpd1 tpd1 + td tpd1 + 15 x td tpd2 tpd3 twh1 twl1 twl1 tpd3 4096 th4 twh3 tpd3+ n x td tsu4 (Current) (Current) (Current) SERIAL DATA TRANSFER RATE f (GSCLK) 4096  f (update) f (SCLK) 193  f (update)  n (10) TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Figure 21. Grayscale PWM Cycle Timing Chart Figure 22 shows a cascading connection of n TLC5940 devices connected to a controller, building a basic module of an LED display system. The maximum number of cascading TLC5940 devices depends on the application system and is in the range of 40 devices. Equation 10 calculates the minimum frequency needed: where: f (GSCLK): minimum frequency needed for GSCLK f (SCLK): minimum frequency needed for SCLK and SIN f (update): update rate of whole cascading system n: number cascaded of TLC5940 device 20 Submit Documentation Feedback Copyright © 2004–2007, Texas Instruments Incorporated Product Folder Link(s): TLC5940 www.ti.com APPLICATION EXAMPLE TLC5940 SIN SOUT OUT0 OUT15 SCLK GSCLK XLAT VPRG BLANK IREF XERR DCPRG TLC5940 SIN SOUT OUT0 OUT15 SCLK GSCLK XLAT VPRG BLANK IREF XERR DCPRG IC 0 IC n 7 SIN SCLK GSCLK XLAT BLANK XERR DCPRG Controller SOUT VPRG_D VPRG_OE W_EEPROM 100 k 50 k 50 k 50 k 50 k 50 k 50 k VPRG 100 nF VCC V(LED) V(LED) V(LED) V(LED) 100 nF V(22V) V(22V) VCC VCC TLC5940 SLVS515C–DECEMBER 2004–REVISED OCTOBER 2007 Figure 22. Cascading Devices Copyright © 2004–2007, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Link(s): TLC5940 PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TLC5940NT ACTIVE PDIP NT 28 13 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 TLC5940NT TLC5940NTG4 ACTIVE PDIP NT 28 13 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 TLC5940NT TLC5940PWP ACTIVE HTSSOP PWP 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TLC5940 TLC5940PWPG4 ACTIVE HTSSOP PWP 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TLC5940 TLC5940PWPR ACTIVE HTSSOP PWP 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TLC5940 TLC5940PWPRG4 ACTIVE HTSSOP PWP 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TLC5940 TLC5940RHBR ACTIVE VQFN RHB 32 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TLC 5940 TLC5940RHBRG4 ACTIVE VQFN RHB 32 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TLC 5940 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2013 Addendum-Page 2 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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OTHER QUALIFIED VERSIONS OF TLC5940 : • Enhanced Product: TLC5940-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TLC5940RHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2013 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC5940RHBR VQFN RHB 32 3000 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2013 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2013, Texas Instruments Incorporated LC Filter Left LC Filter Right 4.5 V-26 V PSU Tuner AM/FM CD/ MP3 Aux in Left Right Audio Processor And control TPA3116D2 AM/FM Avoidance Control FAULTZ SDZ MUTE Capable of synchronizing to other devices Sync GAIN control and Master /Slave setting GAIN/SLV AM2,1,0 Power Limit PLIMIT PBTL Detect Product Folder Sample & Buy Technical Documents Tools & Software Support & Community TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 TPA3116D2 15-W, 30-W, 50-W Filter-Free Class-D Stereo Amplifier Family With AM Avoidance 1 Features 3 Description The TPA31xxD2 series are stereo efficient, digital 1• Supports Multiple Output Configurations amplifier power stage for driving speakers up to 100 – 2 × 50 W Into a 4-Ω BTL Load at 21 V W / 2 Ω in mono. The high efficiency of the (TPA3116D2) TPA3130D2 allows it to do 2 × 15 W without external – 2 × 30 W Into a 8-Ω BTL Load at 24 V heat sink on a single layer PCB. The TPA3118D2 can (TPA3118D2) even run 2 × 30 W / 8 Ω without heat sink on a dual layer PCB. If even higher power is needed the – 2 × 15 W Into a 8-Ω BTL Load at 15 V TPA3116D2 does 2 × 50 W / 4 Ω with a small heat- (TPA3130D2) sink attached to its top side PowerPAD. All three • Wide Voltage Range: 4.5 V to 26 V devices share the same footprint enabling a single • Efficient Class-D Operation PCB to be used across different power levels. – >90% Power Efficiency Combined With Low The TPA31xxD2 advanced oscillator/PLL circuit Idle Loss Greatly Reduces Heat Sink Size employs a multiple switching frequency option to – Advanced Modulation Schemes avoid AM interferences; this is achieved together with an option of either master or slave option, making it • Multiple Switching Frequencies possible to synchronize multiple devices. – AM Avoidance The TPA31xxD2 devices are fully protected against – Master and Slave Synchronization faults with short-circuit protection and thermal – Up to 1.2-MHz Switching Frequency protection as well as overvoltage, undervoltage, and • Feedback Power-Stage Architecture With High DC protection. Faults are reported back to the PSRR Reduces PSU Requirements processor to prevent devices from being damaged during overload conditions. • Programmable Power Limit • Differential and Single-Ended Inputs Device Information(1) • Stereo and Mono Mode With Single-Filter Mono PART NUMBER PACKAGE BODY SIZE (NOM) Configuration DAD (32) TPA3116D2 11.00 mm × 6.20 mm DAP (32) • Single Power Supply Reduces Component Count TPA3118D2 • Integrated Self-Protection Circuits Including DAP (32) 11.00 mm × 6.20 mm TPA3130D2 Overvoltage, Undervoltage, Overtemperature, DC- (1) For all available packages, see the orderable addendum at Detect, and Short Circuit With Error Reporting the end of the datasheet. • Thermally Enhanced Packages – DAD Simplified Application Circuit (32-Pin HTSSOP Pad Up) – DAP (32-Pin HTSSOP Pad Down) • –40°C to 85°C Ambient Temperature Range 2 Applications • Mini-Micro Component, Speaker Bar, Docks • After-Market Automotive • CRT TV • Consumer Audio Applications 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Table of Contents 1 Features.................................................................. 1 7.3 Feature Description................................................. 13 2 Applications ........................................................... 1 7.4 Device Functional Modes........................................ 24 3 Description ............................................................. 1 8 Applications and Implementation ...................... 25 8.1 Application Information............................................ 25 4 Revision History..................................................... 2 8.2 Typical Application .................................................. 25 5 Pin Configuration and Functions......................... 3 9 Power Supply Recommendations...................... 28 6 Specifications......................................................... 5 10 Layout................................................................... 28 6.1 Absolute Maximum Ratings ...................................... 5 10.1 Layout Guidelines ................................................. 28 6.2 ESD Ratings ............................................................ 5 10.2 Layout Example .................................................... 29 6.3 Recommended Operating Conditions....................... 5 10.3 Heat Sink Used on the EVM ................................. 31 6.4 Thermal Information.................................................. 6 6.5 DC Electrical Characteristics .................................... 6 11 Device and Documentation Support ................. 32 6.6 AC Electrical Characteristics..................................... 6 11.1 Related Links ........................................................ 32 6.7 Typical Characteristics .............................................. 8 11.2 Trademarks ........................................................... 32 11.3 Electrostatic Discharge Caution............................ 32 7 Detailed Description ............................................ 13 11.4 Glossary ................................................................ 32 7.1 Overview ................................................................. 13 7.2 Functional Block Diagram ....................................... 13 12 Mechanical, Packaging, and Orderable Information ........................................................... 32 4 Revision History Changes from Revision C (April 2012) to Revision D Page • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Changes from Revision B (May 2012) to Revision C Page • Changed Notes 2 and 3 of the Thermal Information Table.................................................................................................... 6 • Changed the Gain (BTL) Test Condition values for R1 and R2............................................................................................. 6 • Changed the Gain (SLV) Test Condition values for R1 and R2............................................................................................. 6 • Changed the SYSTEM BLOCK DIAGRAM .......................................................................................................................... 13 2 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 32 31 30 29 19 13 14 15 16 17 18 20 1 2 3 4 5 6 7 8 9 10 11 12 21 22 23 24 28 27 26 25 FAULTZ SDZ SYNC AM0 AM1 MUTE LINN LINP PLIMIT RINN GVDD RINP AVCC OUTPR PVCC BSPL GND OUTPL PVCC OUTNL BSNL PVCC OUTNR BSNR MODSEL BSPR GND GND PVCC GND GAIN/SLV AM2 Thermal PAD 32 31 30 29 19 13 14 15 16 17 18 20 1 2 3 4 5 6 7 8 9 10 11 12 21 22 23 24 28 27 26 25 FAULTZ SDZ SYNC AM0 AM1 MUTE LINN LINP PLIMIT RINN GVDD RINP AVCC OUTPR PVCC BSPL GND OUTPL PVCC OUTNL BSNL PVCC OUTNR BSNR MODSEL BSPR GND GND PVCC GND GAIN/SLV AM2 Thermal PAD TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 5 Pin Configuration and Functions DAD Package 32-Pin HTSSOP With PowerPAD Up TPA3116D2 Only, Top View DAP Package 32-Pin HTSSOP With PowerPAD Down Top View Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Pin Functions PIN TYPE(1) DESCRIPTION NO. NAME 1 MODSEL I Mode selection logic input (LOW = BD mode, HIGH = 1 SPW mode). TTL logic levels with compliance to AVCC. 2 SDZ I Shutdown logic input for audio amp (LOW = outputs Hi-Z, HIGH = outputs enabled). TTL logic levels with compliance to AVCC. 3 FAULTZ DO General fault reporting including Over-temp, DC Detect. Open drain. FAULTZ = High, normal operation FAULTZ = Low, fault condition 4 RINP I Positive audio input for right channel. Biased at 3 V. 5 RINN I Negative audio input for right channel. Biased at 3 V. 6 PLIMIT I Power limit level adjust. Connect a resistor divider from GVDD to GND to set power limit. Connect directly to GVDD for no power limit. 7 GVDD PO Internally generated gate voltage supply. Not to be used as a supply or connected to any component other than a 1 µF X7R ceramic decoupling capacitor and the PLIMIT and GAIN/SLV resistor dividers. 8 GAIN/SLV I Selects Gain and selects between Master and Slave mode depending on pin voltage divider. 9 GND G Ground 10 LINP I Positive audio input for left channel. Biased at 3 V. Connect to GND for PBTL mode. 11 LINN I Negative audio input for left channel. Biased at 3 V. Connect to GND for PBTL mode. 12 MUTE I Mute signal for fast disable/enable of outputs (HIGH = outputs Hi-Z, LOW = outputs enabled). TTL logic levels with compliance to AVCC. 13 AM2 I AM Avoidance Frequency Selection 14 AM1 I AM Avoidance Frequency Selection 15 AM0 I AM Avoidance Frequency Selection 16 SYNC DIO Clock input/output for synchronizing multiple class-D devices. Direction determined by GAIN/SLV terminal. 17 AVCC P Analog Supply 18 PVCC P Power supply 19 PVCC P Power supply 20 BSNL BST Boot strap for negative left channel output, connect to 220 nF X5R, or better ceramic cap to OUTPL 21 OUTNL PO Negative left channel output 22 GND G Ground 23 OUTPL PO Positive left channel output 24 BSPL BST Boot strap for positive left channel output, connect to 220 nF X5R, or better ceramic cap to OUTNL 25 GND G Ground 26 BSNR BST Boot strap for negative right channel output, connect to 220 nF X5R, or better ceramic cap to OUTNR 27 OUTNR PO Negative right channel output 28 GND G Ground 29 OUTPR PO Positive right channel output 30 BSPR BST Boot strap for positive right channel output, connect to 220 nF X5R or better ceramic cap to OUTPR 31 PVCC P Power supply 32 PVCC P Power supply 33 PowerPAD G Connect to GND for best system performance. If not connected to GND, leave floating. (1) TYPE: DO = Digital Output, I = Analog Input, G = General Ground, PO = Power Output, BST = Boot Strap. 4 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage, VCC PVCC, AVCC –0.3 30 V INPL, INNL, INPR, INNR –0.3 6.3 V Input voltage, VI PLIMIT, GAIN / SLV, SYNC –0.3 GVDD+0.3 V AM0, AM1, AM2, MUTE, SDZ, MODSEL –0.3 PVCC+0.3 V Slew rate, maximum(2) AM0, AM1, AM2, MUTE, SDZ, MODSEL 10 V/ms Operating free-air temperature, TA –40 85 °C Operating junction temperature , TJ –40 150 °C Storage temperature, Tstg –40 125 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) 100 kΩ series resistor is needed if maximum slew rate is exceeded. 6.2 ESD Ratings VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22- ±500 V C101(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. . 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VCC Supply voltage PVCC, AVCC 4.5 26 V High-level input VIH AM0, AM1, AM2, MUTE, SDZ, SYNC, MODSEL 2 V voltage Low-level input VIL AM0, AM1, AM2, MUTE, SDZ, SYNC, MODSEL 0.8 V voltage Low-level output VOL FAULTZ, RPULL-UP = 100 kΩ, PVCC = 26 V 0.8 V voltage High-level input IIH AM0, AM1, AM2, MUTE, SDZ, MODSEL (VI = 2 V, VCC = 18 V) 50 µA current TPA3116D2, TPA3118D2 3.2 4 RL(BTL) Output filter: L = 10 µH, C = 680 nF Minimum load TPA3130D2 5.6 8 Ω Impedance TPA3116D2, TPA3118D2 1.6 RL(PBTL) Output filter: L = 10 µH, C = 1 µF TPA3130D2 3.2 4 Output-filter Lo Minimum output filter inductance under short-circuit condition 1 µH Inductance Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com 6.4 Thermal Information TPA3130D2 TPA3118D2 TPA3116D2 THERMAL METRIC(1) DAP(2) DAP(3) DAD(4) UNIT 32 PINS 32 PINS 32 PINS RθJA Junction-to-ambient thermal resistance 36 22 14 ψJT Junction-to-top characterization parameter 0.4 0.3 1.2 °C/W ψJB Junction-to-board characterization parameter 5.9 4.7 5.7 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) For the PCB layout please see the TPA3130D2EVM user guide. (3) For the PCB layout please see the TPA3118D2EVM user guide. (4) The heat sink drawing used for the thermal model data are shown in the application section, size: 14mm wide, 50mm long, 25mm high. 6.5 DC Electrical Characteristics TA = 25°C, AVCC = PVCC = 12 V to 24 V, RL = 4 Ω (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Class-D output offset voltage (measured | VOS | VI = 0 V, Gain = 36 dB 1.5 15 mV differentially) SDZ = 2 V, No load or filter, PVCC = 12 V 20 35 ICC Quiescent supply current mA SDZ = 2 V, No load or filter, PVCC = 24 V 32 50 Quiescent supply current in shutdown SDZ = 0.8 V, No load or filter, PVCC = 12 V <50 ICC(SD) µA mode SDZ = 0.8 V, No load or filter, PVCC = 24 V 50 400 Drain-source on-state resistance, rDS(on) PVCC = 21 V, Iout = 500 mA, TJ = 25°C 120 mΩ measured pin to pin R1 = 5.6 kΩ, R2 = Open 19 20 21 dB R1 = 20 kΩ, R2 = 100 kΩ 25 26 27 G Gain (BTL) R1 = 39 kΩ, R2 = 100 kΩ 31 32 33 dB R1 = 47 kΩ, R2 = 75 kΩ 35 36 37 R1 = 51 kΩ, R2 = 51 kΩ 19 20 21 dB R1 = 75 kΩ, R2 = 47 kΩ 25 26 27 G Gain (SLV) R1 = 100 kΩ, R2 = 39 kΩ 31 32 33 dB R1 = 100 kΩ, R2 = 16 kΩ 35 36 37 ton Turn-on time SDZ = 2 V 10 ms tOFF Turn-off time SDZ = 0.8 V 2 µs GVDD Gate drive supply IGVDD < 200 µA 6.4 6.9 7.4 V Output voltage maximum under PLIMIT VO V(PLIMIT) = 2 V; VI = 1 Vrms 6.75 7.90 8.75 V control 6.6 AC Electrical Characteristics TA = 25°C, AVCC = PVCC = 12 V to 24 V, RL = 4 Ω (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 200 mVPP ripple at 1 kHz, Gain = 20 dB, Inputs AC- KSVR Power supply ripple rejection –70 dB coupled to GND THD+N = 10%, f = 1 kHz, PVCC = 14.4 V 25 PO Continuous output power W THD+N = 10%, f = 1 kHz, PVCC = 21 V 50 THD+N Total harmonic distortion + noise VCC = 21 V, f = 1 kHz, PO = 25 W (half-power) 0.1% 65 µV Vn Output integrated noise 20 Hz to 22 kHz, A-weighted filter, Gain = 20 dB –80 dBV Crosstalk VO = 1 Vrms, Gain = 20 dB, f = 1 kHz –100 dB Maximum output at THD+N < 1%, f = 1 kHz, Gain = 20 dB, SNR Signal-to-noise ratio 102 dB A-weighted 6 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 AC Electrical Characteristics (continued) TA = 25°C, AVCC = PVCC = 12 V to 24 V, RL = 4 Ω (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AM2=0, AM1=0, AM0=0 376 400 424 AM2=0, AM1=0, AM0=1 470 500 530 AM2=0, AM1=1, AM0=0 564 600 636 AM2=0, AM1=1, AM0=1 940 1000 1060 fOSC Oscillator frequency kHz AM2=1, AM1=0, AM0=0 1128 1200 1278 AM2=1, AM1=0, AM0=1 AM2=1, AM1=1, AM0=0 Reserved AM2=1, AM1=1, AM0=1 Thermal trip point 150+ °C Thermal hysteresis 15 °C TPA3130D2 4.5 Over current trip point A TPA3118D2, TPA3116D2 7.5 Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 0.001 0.01 0.1 1 10 20 100 1k 10k 20k Frequency (Hz) THD+N (%) PO = 1W PO = 5W PO = 10W Gain = 26dB PVCC = 24V TA = 25°C RL = 8Ω G006 0.001 0.01 0.1 1 10 0.01 0.1 1 10 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 6V TA = 25°C RL = 4Ω G008 0.001 0.01 0.1 1 10 20 100 1k 10k 20k Frequency (Hz) THD+N (%) PO = 1W PO = 5W PO = 10W Gain = 26dB PVCC = 24V TA = 25°C RL = 4Ω G004 0.001 0.01 0.1 1 10 20 100 1k 10k 20k Frequency (Hz) THD+N (%) PO = 1W PO = 2.5W PO = 5W Gain = 26dB PVCC = 12V TA = 25°C RL = 8Ω G005 0.001 0.01 0.1 1 10 20 100 1k 10k 20k Frequency (Hz) THD+N (%) PO = 0.5W PO = 1W PO = 2.5W Gain = 26dB PVCC = 6V TA = 25°C RL = 4Ω G002 0.001 0.01 0.1 1 10 20 100 1k 10k 20k Frequency (Hz) THD+N (%) PO = 1W PO = 2.5W PO = 5W Gain = 26dB PVCC = 12V TA = 25°C RL = 4Ω G003 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com 6.7 Typical Characteristics fs = 400 kHz, BD Mode (unless otherwise noted) Figure 1. Total Harmonic Distortion + Noise (BTL) vs Figure 2. Total Harmonic Distortion + Noise (BTL) vs Frequency Frequency Figure 3. Total Harmonic Distortion + Noise (BTL) vs Figure 4. Total Harmonic Distortion + Noise (BTL) vs Frequency Frequency Figure 5. Total Harmonic Distortion + Noise (BTL) vs Figure 6. Total Harmonic Distortion + Noise (BTL) vs Output Frequency Power 8 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 0 10 20 30 40 50 0 1 2 3 4 PLIMIT Voltage (V) Output Power (W) Gain = 26dB TA = 25°C PVCC = 24V RL = 4Ω G013 20 100 1k 10k 100k −50 −40 −30 −20 −10 0 10 20 30 −500 −400 −300 −200 −100 0 100 200 300 Frequency (Hz) Gain (dB) Phase (°) Gain Phase Gain = 26dB PVCC = 12V TA = 25°C RL = 4Ω G014 0.001 0.01 0.1 1 10 0.01 0.1 1 10 50 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 12V TA = 25°C RL = 8Ω G011 0.001 0.01 0.1 1 10 0.01 0.1 1 10 50 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 24V TA = 25°C RL = 8Ω G012 0.001 0.01 0.1 1 10 0.01 0.1 1 10 40 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 12V TA = 25°C RL = 4Ω G009 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 24V TA = 25°C RL = 4Ω G010 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 Typical Characteristics (continued) fs = 400 kHz, BD Mode (unless otherwise noted) Figure 7. Total Harmonic Distortion + Noise (BTL) vs Output Figure 8. Total Harmonic Distortion + Noise (BTL) vs Output Power Power Figure 9. Total Harmonic Distortion + Noise (BTL) vs Output Figure 10. Total Harmonic Distortion + Noise (BTL) vs Power Output Power Figure 11. Output Power (BTL) vs Plimit Voltage Figure 12. Gain/Phase (BTL) vs Frequency Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 −140 −130 −120 −110 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 20 100 1k 10k 20k Frequency (Hz) Crosstalk (dB) Right to Left Left to Right Gain = 26dB PVCC = 24V TA = 25°C RL = 8Ω G021 −140 −130 −120 −110 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 20 100 1k 10k 20k Frequency (Hz) Crosstalk (dB) Right to Left Left to Right Gain = 26dB PVCC = 12V TA = 25°C RL = 4Ω G022 0 10 20 30 40 50 60 70 80 90 100 0 5 10 15 20 25 30 35 40 45 50 Output Power (W) Power Efficiency (%) PVCC = 6V PVCC =12V PVCC = 24V Gain = 26dB TA = 25°C RL = 8Ω G017 0 10 20 30 40 50 60 70 80 90 100 0 5 10 15 20 25 30 35 40 45 50 Output Power (W) Power Efficiency (%) PVCC = 6V PVCC = 12V PVCC = 24V Gain = 26dB TA = 25°C RL = 4Ω G018 0 5 10 15 20 25 30 35 40 45 50 4 6 8 10 12 14 16 18 20 22 24 26 Supply Voltage (V) Maximum Output Power (W) THD+N = 1% THD+N = 10% Gain = 26dB TA = 25°C RL = 8Ω G015 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 4 6 8 10 12 14 16 18 20 22 24 26 Supply Voltage (V) Maximum Output Power (W) THD+N = 1% THD+N = 10% Gain = 26dB TA = 25°C RL = 4Ω G016 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Typical Characteristics (continued) fs = 400 kHz, BD Mode (unless otherwise noted) Figure 13. Maximum Output Power (BTL) vs Supply Voltage Figure 14. Maximum Output Power (BTL) vs Supply Voltage Figure 15. Power Efficiency (BTL) vs Output Power Figure 16. Power Efficiency (BTL) vs Output Power Figure 17. Crosstalk vs Frequency Figure 18. Crosstalk vs Frequency 10 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 Output Power (W) Power Efficiency (%) PVCC = 6V PVCC = 12V PVCC =24V Gain = 26dB TA = 25°C RL = 2Ω G028 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 20 100 1k 10k 20k Frequency (Hz) kSVR (dB) Gain = 26dB PVCC = 12VDC + 200mVP-P TA = 25°C RL = 2Ω G030 0.001 0.01 0.1 1 10 0.01 0.1 1 10 40 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 12V TA = 25°C RL = 2Ω G025 0 20 40 60 80 100 120 140 160 180 4 6 8 10 12 14 16 18 20 22 24 26 Supply Voltage (V) Maximum Output Power (W) THD+N = 1% THD+N = 10% Gain = 26dB TA = 25°C RL = 2Ω G027 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 20 100 1k 10k 20k Frequency (Hz) kSVR (dB) Left Channel Right Channel Gain = 26dB PVCC = 12VDC + 200mVP-P TA = 25°C RL = 8Ω G023 0.001 0.01 0.1 1 10 20 100 1k 10k 20k Frequency (Hz) THD+N (%) PO = 1W PO = 5W PO = 10W Gain = 26dB PVCC = 12V TA = 25°C RL = 2Ω G024 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 Typical Characteristics (continued) fs = 400 kHz, BD Mode (unless otherwise noted) Figure 19. Supply Ripple Rejection Ratio (BTL) vs Figure 20. Total Harmonic Distortion + Noise (PBTL) vs Frequency Frequency Figure 21. Total Harmonic Distortion + Noise (PBTL) vs Figure 22. Maximum Output Power (PBTL) vs Supply Output Power Voltage Figure 23. Power Efficiency (PBTL) vs Output Power Figure 24. Supply Ripple Rejection Ratio (PBTL) vs Frequency Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 200 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 24V TA = 25°C RL = 3Ω G032 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 4 6 8 10 12 14 16 18 20 22 24 26 Supply Voltage (V) Maximum Output Power (W) THD+N = 1% THD+N = 10% Gain = 26dB TA = 25°C RL = 3Ω G034 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Typical Characteristics (continued) fs = 400 kHz, BD Mode (unless otherwise noted) Figure 25. Total Harmonic Distortion + Noise (PBTL) vs Figure 26. Maximum Output Power (PBTL) vs Supply Output Power Voltage 12 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 + – + – + – + + SDZ MUTE TTL Buffer Gain Control GAIN OUTPR_FB RINP RINN Gain Control OUTPNR_FB FAULTZ SYNC GAIN/SLV AM<2:0> PLIMIT AVCC GVDD LDO Regulator LINP LINN GND Input Sense PBTL Select OUTPL_FB Gain Control OUTNL_FB AVDD GVDD PLIMIT Reference Ramp Generator Biases and References Startup Protection Logic SC Detect DC Detect Thermal Detect UVLO/OVLO PVCC GVDD PVCC Gate Drive OUTNL_ FB PVCC GVDD PVCC Gate Drive PWM Logic Modulation and PBTL Select OUTPL_FB GND OUTPL BSPL GND OUTNL BSNL GND BSNR OUTPR GND OUTNR OUTNR_ FB BSPR OUTPR_FB PVCC GVDD PVCC Gate Drive PVCC GVDD PVCC Gate Drive PWM Logic Modulation and PBTL Select PLIMIT PLIMIT + – + – + – + – + – + – – – Thermal Pad + – PVCC PVCC TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 7 Detailed Description 7.1 Overview The TPA31xxD2 device is a highly efficient Class D audio amplifier with integrated 120m Ohms MOSFET that allows output currents up to 7.5 A. The high efficiency allows the amplifier to provide an excellent audio performance without the need for a bulky heat sink. The device can be configured for either master or slave operation by using the SYNC pin. This helps to prevent audible beats noise. 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Gain Setting and Master and Slave The gain of the TPA31xxD2 family is set by the voltage divider connected to the GAIN/SLV control pin. Master or Slave mode is also controlled by the same pin. An internal ADC is used to detect the 8 input states. The first four stages sets the GAIN in Master mode in gains of 20, 26, 32, 36 dB respectively, while the next four stages sets the GAIN in Slave mode in gains of 20, 26, 32, 36 dB respectively. The gain setting is latched during power-up and cannot be changed while device is powered. Table 1 lists the recommended resistor values and the state and gain: Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 i i 1 f 2 Z C p ƒ = 5 6 7 8 9 10 INNR PLIMIT GVDD GAIN/SLV GND 2 1 C5 1 Fµ 2 1 2 1 R1 51 k R2 51 k TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Table 1. Gain and Master/Slave MASTER / SLAVE GAIN R1 (to GND)(1) R2 (to GVDD)(1) INPUT IMPEDANCE MODE Master 20 dB 5.6 kΩ OPEN 60 kΩ Master 26 dB 20 kΩ 100 kΩ 30 kΩ Master 32 dB 39 kΩ 100 kΩ 15 kΩ Master 36 dB 47 kΩ 75 kΩ 9 kΩ Slave 20 dB 51 kΩ 51 kΩ 60 kΩ Slave 26 dB 75 kΩ 47 kΩ 30 kΩ Slave 32 dB 100 kΩ 39 kΩ 15 kΩ Slave 36 dB 100 kΩ 16 kΩ 9 kΩ (1) Resistor tolerance should be 5% or better. Figure 27. Gain, Master/Slave In Master mode, SYNC terminal is an output, in Slave mode, SYNC terminal is an input for a clock input. TTL logic levels with compliance to GVDD. 7.3.2 Input Impedance The TPA31xxD2 family input stage is a fully differential input stage and the input impedance changes with the gain setting from 9 kΩ at 36 dB gain to 60 kΩ at 20 dB gain. Table 1 lists the values from min to max gain. The tolerance of the input resistor value is ±20% so the minimum value will be higher than 7.2 kΩ. The inputs need to be AC-coupled to minimize the output dc-offset and ensure correct ramping of the output voltages during powerON and power-OFF. The input ac-coupling capacitor together with the input impedance forms a high-pass filter with the following cut-off frequency: (1) If a flat bass response is required down to 20 Hz the recommended cut-off frequency is a tenth of that, 2 Hz. Table 2 lists the recommended ac-couplings capacitors for each gain step. If a -3 dB is accepted at 20 Hz 10 times lower capacitors can used – for example, a 1 µF can be used. Table 2. Recommended Input AC-Coupling Capacitors GAIN INPUT IMPEDANCE INPUT CAPACITANCE HIGH-PASS FILTER 20 dB 60 kΩ 1.5 µF 1.8 Hz 26 dB 30 kΩ 3.3 µF 1.6 Hz 32 dB 15 kΩ 5.6 µF 2.3 Hz 36 dB 9 kΩ 10 µF 1.8 Hz 14 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 Input Signal Ci IN Zi Zf TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 Figure 28. Input Impedance The input capacitors used should be a type with low leakage, like quality electrolytic, tantalum or ceramic. If a polarized type is used the positive connection should face the input pins which are biased to 3 Vdc. 7.3.3 Startup and Shutdown Operation The TPA31xxD2 family employs a shutdown mode of operation designed to reduce supply current (Icc) to the absolute minimum level during periods of nonuse for power conservation. The SDZ input terminal should be held high (see specification table for trip point) during normal operation when the amplifier is in use. Pulling SDZ low will put the outputs to mute and the amplifier to enter a low-current state. It is not recommended to leave SDZ unconnected, because amplifier operation would be unpredictable. For the best power-off pop performance, place the amplifier in the shutdown mode prior to removing the power supply. The gain setting is selected at the end of the start-up cycle. At the end of the start-up cycle, the gain is selected and cannot be changed until the next power-up. 7.3.4 PLIMIT Operation The TPA31xxD2 family has a built-in voltage limiter that can be used to limit the output voltage level below the supply rail, the amplifier simply operates as if it was powered by a lower supply voltage, and thereby limits the output power. Add a resistor divider from GVDD to ground to set the voltage at the PLIMIT pin. An external reference may also be used if tighter tolerance is required. Add a 1 µF capacitor from pin PLIMIT to ground to ensure stability. It is recommended to connect PLIMIT to GVDD when using 1SPW-modulation mode. Figure 29. Power Limit Example The PLIMIT circuit sets a limit on the output peak-to-peak voltage. The limiting is done by limiting the duty cycle to a fixed maximum value. This limit can be thought of as a "virtual" voltage rail which is lower than the supply connected to PVCC. This "virtual" rail is approximately 4 times the voltage at the PLIMIT pin. This output voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance. Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 2 L P L S OUT L R V R + 2 R P = for unclipped power 2 R æ ö æ ö ç ÷ ç ÷´ ´ è ø è ø ´ TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com where • POUT (10%THD) = 1.25 × POUT (unclipped) • RL is the load resistance. • RS is the total series resistance including RDS(on), and output filter resistance. • VP is the peak amplitude • VP = 4 × PLIMIT voltage if PLIMIT < 4 × VP (2) Table 3. Power Limit Example PVCC (V) PLIMIT VOLTAGE (V)(1) R to GND R to GVDD OUTPUT VOLTAGE (Vrms) 24 V GVDD Short Open 17.9 24 V 3.3 45 kΩ 51 kΩ 12.67 24 V 2.25 24 kΩ 51 kΩ 9 12 V GVDD Short Open 10.33 12 V 2.25 24 kΩ 51 kΩ 9 12 V 1.5 18 kΩ 68 kΩ 6.3 (1) PLIMIT measurements taken with EVM gain set to 26dB and input voltage set to 1Vrms. 7.3.5 GVDD Supply The GVDD Supply is used to power the gates of the output full bridge transistors. It can also be used to supply the PLIMIT and GAIN/SLV voltage dividers. Decouple GVDD with a X5R ceramic 1 µF capacitor to GND. The GVDD supply is not intended to be used for external supply. It is recommended to limit the current consumption by using resistor voltage dividers for GAIN/SLV and PLIMIT of 100 kΩ or more. 7.3.6 BSPx AND BSNx Capacitors The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the high side of each output to turn on correctly. A 220 nF ceramic capacitor of quality X5R or better, rated for at least 16 V, must be connected from each output to its corresponding bootstrap input. (See the application circuit diagram in Figure 37.) The bootstrap capacitors connected between the BSxx pins and corresponding output function as a floating power supply for the high-side N-channel power MOSFET gate drive circuitry. During each high-side switching cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the highside MOSFETs turned on. 7.3.7 Differential Inputs The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To use the TPA31xxD2 family with a differential source, connect the positive lead of the audio source to the RINP or LINP input and the negative lead from the audio source to the RINN or LINN input. To use the TPA31xxD2 family with a single-ended source, ac ground the negative input through a capacitor equal in value to the input capacitor on positive and apply the audio source to either input. In a single-ended input application, the unused input should be ac grounded at the audio source instead of at the device input for best noise performance. For good transient performance, the impedance seen at each of the two differential inputs should be the same. The impedance seen at the inputs should be limited to an RC time constant of 1 ms or less if possible. This is to allow the input dc blocking capacitors to become completely charged during the 10 ms power-up time. If the input capacitors are not allowed to completely charge, there will be some additional sensitivity to component matching which can result in pop if the input components are not well matched. 7.3.8 Device Protection System The TPA31xxD2 family contains a complete set of protection circuits carefully designed to make system design efficient as well as to protect the device against any kind of permanent failures due to short circuits, overload, over temperature, and under-voltage. The FAULTZ pin will signal if an error is detected according to Table 4: 16 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 Table 4. Fault Reporting TRIGGERING CONDITION LATCHED/SELF- FAULT FAULTZ ACTION (typical value) CLEARING Over Current Output short or short to PVCC or GND Low Output high impedance Latched Over Temperature Tj > 150°C Low Output high impedance Latched Too High DC Offset DC output voltage Low Output high impedance Latched Under Voltage on PVCC < 4.5V – Output high impedance Self-clearing PVCC Over Voltage on PVCC > 27V – Output high impedance Self-clearing PVCC 7.3.9 DC Detect Protection The TPA31xxD2 family has circuitry which will protect the speakers from DC current which might occur due to defective capacitors on the input or shorts on the printed circuit board at the inputs. A DC detect fault will be reported on the FAULT pin as a low state. The DC Detect fault will also cause the amplifier to shutdown by changing the state of the outputs to Hi-Z. If automatic recovery from the short circuit protection latch is desired, connect the FAULTZ pin directly to the SDZ pin. This allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the DC Detect protection latch. A DC Detect Fault is issued when the output differential duty-cycle of either channel exceeds 60% for more than 420 msec at the same polarity. Table x below shows some examples of the typical DC Detect Protection threshold for several values of the supply voltage. This feature protects the speaker from large DC currents or AC currents less than 2Hz. To avoid nuisance faults due to the DC detect circuit, hold the SD pin low at powerup until the signals at the inputs are stable. Also, take care to match the impedance seen at the positive and negative inputs to avoid nuisance DC detect faults. Table 5 lists the minimum output offset voltages required to trigger the DC detect. The outputs must remain at or above the voltage listed in the table for more than 420 ms to trigger the DC detect. Table 5. DC Detect Threshold PVCC (V) VOS - OUTPUT OFFSET VOLTAGE (V) 4.5 0.96 6 1.3 12 2.6 18 3.9 7.3.10 Short-Circuit Protection and Automatic Recovery Feature The TPA31xxD2 family has protection from over current conditions caused by a short circuit on the output stage. The short circuit protection fault is reported on the FAULTZ pin as a low state. The amplifier outputs are switched to a high impedance state when the short circuit protection latch is engaged. The latch can be cleared by cycling the SDZ pin through the low state. If automatic recovery from the short circuit protection latch is desired, connect the FAULTZ pin directly to the SDZ pin. This allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the shortcircuit protection latch. In systems where a possibility of a permanent short from the output to PVDD or to a high voltage battery like a car battery can occur, pull the MUTE pin low with the FAULTZ signal with a inverting transistor to ensure a highZ restart, like shown in the figure below: Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 > 1.4sec mP TPA3116D2 SDZ MUTE FAULTZ SDZ MUTE FAULTZ TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Figure 30. MUTE Driven by Inverted FAULTZ Figure 31. Timing Requirement for SDZ 7.3.11 Thermal Protection Thermal protection on the TPA31xxD2 family prevents damage to the device when the internal die temperature exceeds 150°C. There is a ±15°C tolerance on this trip point from device to device. Once the die temperature exceeds the thermal trip point, the device enters into the shutdown state and the outputs are disabled. This is a latched fault. Thermal protection faults are reported on the FAULTZ terminal as a low state. If automatic recovery from the thermal protection latch is desired, connect the FAULTZ pin directly to the SDZ pin. This allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the thermal protection latch. 7.3.12 Device Modulation Scheme The TPA31xxD2 family has the option of running in either BD modulation or 1SPW modulation; this is set by the MODSEL pin. 7.3.12.1 MODSEL = GND: BD-Modulation This is a modulation scheme that allows operation without the classic LC reconstruction filter when the amp is driving an inductive load with short speaker wires. Each output is switching from 0 volts to the supply voltage. The OUTPx and OUTNx are in phase with each other with no input so that there is little or no current in the speaker. The duty cycle of OUTPx is greater than 50% and OUTNx is less than 50% for positive output voltages. The duty cycle of OUTPx is less than 50% and OUTNx is greater than 50% for negative output voltages. The voltage across the load sits at 0V throughout most of the switching period, reducing the switching current, which reduces any I 2R losses in the load. 18 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 OUTP OUTN OUTP-OUTN Speaker Current OUTP OUTN OUTP-OUTN Speaker Current OUTP OUTN OUTP-OUTN Speaker Current 0V 0V PVCC No Output Positive Output Negative Output 0A 0A 0V -PVCC TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 Figure 32. BD Mode Modulation 7.3.12.2 MODSEL = HIGH: 1SPW-modulation The 1SPW mode alters the normal modulation scheme in order to achieve higher efficiency with a slight penalty in THD degradation and more attention required in the output filter selection. In 1SPW mode the outputs operate at ~15% modulation during idle conditions. When an audio signal is applied one output will decrease and one will increase. The decreasing output signal will quickly rail to GND at which point all the audio modulation takes place through the rising output. The result is that only one output is switching during a majority of the audio cycle. Efficiency is improved in this mode due to the reduction of switching losses. The THD penalty in 1SPW mode is minimized by the high performance feedback loop. The resulting audio signal at each half output has a discontinuity each time the output rails to GND. This can cause ringing in the audio reconstruction filter unless care is taken in the selection of the filter components and type of filter used. Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 OUTP OUTN OUTP-OUTN Speaker Current OUTP OUTN OUTP-OUTN Speaker Current OUTP OUTN OUTP-OUTN Speaker Current 0 V 0 V PVCC No Output Positive Output Negative Output 0A 0 A 0 V -PVCC TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Figure 33. 1SPW Mode Modulation 20 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 7.3.13 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme The main reason that the traditional class-D amplifier-based on AD modulation needs an output filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is large for the traditional modulation scheme, because the ripple current is proportional to voltage multiplied by the time at that voltage. The differential voltage swing is 2 × VCC, and the time at each voltage is half the period for the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle for the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive, whereas an LC filter is almost purely reactive. The TPA3116D2 modulation scheme has little loss in the load without a filter because the pulses are short and the change in voltage is VCC instead of 2 × VCC. As the output power increases, the pulses widen, making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most applications the filter is not needed. An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow through the filter instead of the load. The filter has less resistance but higher impedance at the switching frequency than the speaker, which results in less power dissipation, therefore increasing efficiency. 7.3.14 Ferrite Bead Filter Considerations Using the Advanced Emissions Suppression Technology in the TPA3116D2 amplifier it is possible to design a high efficiency class-D audio amplifier while minimizing interference to surrounding circuits. It is also possible to accomplish this with only a low-cost ferrite bead filter. In this case it is necessary to carefully select the ferrite bead used in the filter. One important aspect of the ferrite bead selection is the type of material used in the ferrite bead. Not all ferrite material is alike, so it is important to select a material that is effective in the 10 to 100 MHz range which is key to the operation of the class-D amplifier. Many of the specifications regulating consumer electronics have emissions limits as low as 30 MHz. It is important to use the ferrite bead filter to block radiation in the 30 MHz and above range from appearing on the speaker wires and the power supply lines which are good antennas for these signals. The impedance of the ferrite bead can be used along with a small capacitor with a value in the range of 1000 pF to reduce the frequency spectrum of the signal to an acceptable level. For best performance, the resonant frequency of the ferrite bead/ capacitor filter should be less than 10 MHz. Also, it is important that the ferrite bead is large enough to maintain its impedance at the peak currents expected for the amplifier. Some ferrite bead manufacturers specify the bead impedance at a variety of current levels. In this case it is possible to make sure the ferrite bead maintains an adequate amount of impedance at the peak current the amplifier will see. If these specifications are not available, it is also possible to estimate the bead current handling capability by measuring the resonant frequency of the filter output at low power and at maximum power. A change of resonant frequency of less than fifty percent under this condition is desirable. Examples of ferrite beads which have been tested and work well with the TPA3130D2 can be seen in the TPA3130D2EVM user guide SLOU341. A high quality ceramic capacitor is also needed for the ferrite bead filter. A low ESR capacitor with good temperature and voltage characteristics will work best. Additional EMC improvements may be obtained by adding snubber networks from each of the class-D outputs to ground. Suggested values for a simple RC series snubber network would be 18 Ω in series with a 330 pF capacitor although design of the snubber network is specific to every application and must be designed taking into account the parasitic reactance of the printed circuit board as well as the audio amp. Take care to evaluate the stress on the component in the snubber network especially if the amp is running at high PVCC. Also, make sure the layout of the snubber network is tight and returns directly to the GND pins on the IC. Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Figure 34. TPA311xD2 Radiated Emissions 7.3.15 When to Use an Output Filter for EMI Suppression The TPA3116D2 has been tested with a simple ferrite bead filter for a variety of applications including long speaker wires up to 125 cm and high power. The TPA3116D2 EVM passes FCC class-B specifications under these conditions using twisted speaker wires. The size and type of ferrite bead can be selected to meet application requirements. Also, the filter capacitor can be increased if necessary with some impact on efficiency. There may be a few circuit instances where it is necessary to add a complete LC reconstruction filter. These circumstances might occur if there are nearby circuits which are sensitive to noise. In these cases a classic second order Butterworth filter similar to those shown in the figures below can be used. Some systems have little power supply decoupling from the AC line but are also subject to line conducted interference (LCI) regulations. These include systems powered by "wall warts" and "power bricks." In these cases, LC reconstruction filters can be the lowest cost means to pass LCI tests. Common mode chokes using low frequency ferrite material can also be effective at preventing line conducted interference. 22 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 OUTP OUTN 10 µH L1 10 µH L2 C2 C3 0.68 µF 0.68 µF OUTP OUTN Ferrite Chip Bead 1 nF 1 nF Ferrite Chip Bead 4 - 8 W W 4 - 8 W W TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 Figure 35. TPA31xxD2 Output Filters 7.3.16 AM Avoidance EMI Reduction To reduce interference in the AM radio band, the TPA3116D2 has the ability to change the switching frequency via AM<2:0> pins. The recommended frequencies are listed in Table 6. The fundamental frequency and its second harmonic straddle the AM radio band listed. This eliminates the tones that can be present due to the switching frequency being demodulated by the AM radio. Table 6. AM Frequencies US EUROPEAN SWITCHING FREQUENCY (kHz) AM2 AM1 AM0 AM FREQUENCY (kHz) AM FREQUENCY (kHz) 522-540 540-917 540-914 500 0 0 1 0 1 0 917-1125 914-1122 600 (or 400) 0 0 0 1125-1375 1122-1373 500 0 0 1 0 1 0 1375-1547 1373-1548 600 (or 400) 0 0 0 0 1 0 1547-1700 1548-1701 600 (or 500) 0 0 1 Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2 4.5 V–26 V PSU LC Filter OUTPR OUTNR OUTPL OUTNL Right Left PBTL Detect TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com 7.4 Device Functional Modes 7.4.1 Mono Mode (PBTL) The TPA31xxD2 family can be connected in MONO mode enabling up to 100W output power. This is done by: • Connect INPL and INNL directly to Ground (without capacitors) this sets the device in Mono mode during power up. • Connect OUTPR and OUTNR together for the positive speaker terminal and OUTNL and OUTPL together for the negative pin. • Analog input signal is applied to INPR and INNR. Figure 36. Mono Mode 24 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 8 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information This section describes a 2.1 Master and Slave application. The Master is configured as stereo outputs and the Slave is configured as mono PBTL output. 8.2 Typical Application A 2.1 solution, U1 TPA3116D2 in Master mode 400 kHz, BTL, gain if 20 dB, power limit not implemented. U2 in Slave, PBTL mode gain of 20dB. Inputs are connected for differential inputs. Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 Power Pad U1 TPA3116D2 MODSEL 1 SDZ 2 FAULTZ 3 INPR 4 INNR 5 PLIMIT 6 GVDD 7 GAIN/SLV 8 GND 9 INPL 10 INNL 11 MUTE 12 AM2 13 AM1 14 AM0 15 SYNC 16 PVCC 32 PVCC 31 BSPR 30 OUTPR 29 GND 28 OUTNR 27 BSNR 26 GND 25 BSPL 24 OUTPL 23 GND 22 OUTNL 21 BSNL 20 PVCC 19 PVCC 18 AVCC 17 PVCC DECOUPLING C17 220nF 1 2 PVCC DECOUPLING GND C16 220nF 1 2 C13 1uF 2 1 C58 100nF 1 2 C29 680nF 2 1 L7 10uH 1 2 R10 3.3R 1 2 L8 10uH 1 2 C28 680nF 2 1 L9 10uH 1 2 C57 10nF 2 1 R12 20k 1 2 L10 10uH 1 2 C38 10nF 2 1 R14 100k 1 2 C25 220uF 1 2 C26 680nF 2 1 R18 3.3R 1 2 C40 10nF 2 1 R17 3.3R 1 2 GND C41 1nF 2 1 C32 1nF 2 1 C11 1uF 2 1 C22 220uF 1 2 GND C21 100nF 2 1 C20 1nF 2 1 C31 1nF 2 1 R15 3.3R 1 2 C33 1nF 2 1 R16 3.3R 1 2 GND C19 220nF 1 2 C30 1nF 2 1 C27 680nF 2 1 C34 10nF 2 1 C37 10nF 2 1 IN_P_LEFT IN_N_RIGHT IN_N_LEFT IN_P_RIGHT GND PVCC GND GND GND GND GND GND GND GND OUT_ N_LEFT OUT_P_LEFT - + OUT_N_RIGHT OUT_P_RIGHT + PVCC - C14 1uF 2 1 R11 100k 1 2 MUTE_LR OUTPUT LC FILTER R13 100k 1 2 C15 1uF 2 1 EMI C-RC SNUBBER C24 100nF 2 1 GND PVCC C18 220nF 1 2 GND /SD_LR PVCC C23 1nF 2 1 GND C12 1uF 2 1 R73 10k 1 2 C42 220nF 1 2 L15 10uH 1 2 L16 10uH 1 2 R21 75k 1 2 R22 100k 1 2 C50 220uF 1 2 C51 1uF 2 1 GND C35 1uF 2 1 GND C47 220uF 1 2 C46 100nF 2 1 C45 1nF 2 1 C54 1nF 2 1 R23 3.3R 1 2 GND R24 3.3R 1 2 C44 220nF 1 2 C53 1nF 2 1 C52 1uF 2 1 C55 10nF 2 1 C56 10nF 2 1 IN_P_SUB IN_N_SUB GND SYNC GND GND GND - + OUT_P_SUB OUT_N_SUB PVCC MUTE_SUB R20 47k 1 2 OUTPUT LC FILTER R19 100k 1 2 C39 1uF 2 1 C49 100nF 2 1 EMI C-RC SNUBBER PVCC C43 220nF 1 2 PVCC /SD_SUB C48 1nF 2 1 GND C36 1uF 2 1 GND Power Pad U2 TPA3116D2 MODSEL 1 SDZ 2 FAULTZ 3 INPR 4 INNR 5 PLIMIT 6 GVDD 7 GAIN/SLV 8 GND 9 INPL 10 INNL 11 MUTE 12 AM2 13 AM1 14 AM0 15 SYNC 16 PVCC 32 PVCC 31 BSPR 30 OUTPR 29 GND 28 OUTNR 27 BSNR 26 GND 25 BSPL 24 OUTPL 23 GND 22 OUTNL 21 BSNL 20 PVCC 19 PVCC 18 AVCC 17 PVCC DECOUPLING C43 220nF 1 2 PVCC DECOUPLING GND 4R 4R 2R TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Typical Application (continued) Figure 37. Schematic 8.2.1 Design Requriements DESIGN PARAMETERS EXAMPLE VALUE Input voltage range PVCC 4.5 V to 26 V PWM output frequencies 400 kHz, 500 kHz, 600 kHz, 1 MHz or 1.2 MHz Maximum output power 50 W 26 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 8.2.2 Detailed Design Procedure The TPA31xxD2 family is a very flexible and easy to use Class D amplifier; therefore the design process is straightforward. Before beginning the design, gather the following information regarding the audio system. • PVCC rail planned for the design • Speaker or load impedance • Maximum output power requirement • Desired PWM frequency 8.2.2.1 Select the PWM Frequency Set the PWM frequency by using AM0, AM1 and AM2 pins. 8.2.2.2 Select the Amplifier Gain and Master/Slave Mode In order to select the amplifier gain setting, the designer must determine the maximum power target and the speaker impedance. Once these parameters have been determined, calculate the required output voltage swing which delivers the maximum output power. Choose the lowest analog gain setting that corresponds to produce an output voltage swing greater than the required output swing for maximum power. The analog gain and master/slave mode can be set by selecting the voltage divider resistors (R1 and R2) on the Gain/SLV pin. 8.2.2.3 Select Input Capacitance Select the bulk capacitors at the PVCC inputs for proper voltage margin and adequate capacitance to support the power requirements. In practice, with a well-designed power supply, two 100-μF, 50-V capacitors should be sufficient. One capacitor should be placed near the PVCC inputs at each side of the device. PVCC capacitors should be a low ESR type because they are being used in a high-speed switching application. 8.2.2.4 Select Decoupling Capacitors Good quality decoupling capacitors need to be added at each of the PVCC inputs to provide good reliability, good audio performance, and to meet regulatory requirements. X5R or better ratings should be used in this application. Consider temperature, ripple current, and voltage overshoots when selecting decoupling capacitors. Also, these decoupling capacitors should be located near the PVCC and GND connections to the device in order to minimize series inductances. 8.2.2.5 Select Bootstrap Capacitors Each of the outputs require bootstrap capacitors to provide gate drive for the high-side output FETs. For this design, use 0.22-μF, 25-V capacitors of X5R quality or better. Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 27 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 0.001 0.01 0.1 1 10 0.01 0.1 1 10 40 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 12V TA = 25°C RL = 4Ω G009 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 Output Power (W) THD+N (%) f = 20Hz f = 1kHz f = 6kHz Gain = 26dB PVCC = 24V TA = 25°C RL = 4Ω G010 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com 8.2.3 Application Curves Figure 38. Total Harmonic Distortion + Noise (BTL) vs Figure 39. Total Harmonic Distortion + Noise (BTL) vs Output Power Output Power 9 Power Supply Recommendations The power supply requirements for the TPA3116D2 consist of one higher-voltage supply to power the output stage of the speaker amplifier. Several on-chip regulators are included on the TPA3116D2 to generate the voltages necessary for the internal circuitry of the audio path. It is important to note that the voltage regulators which have been integrated are sized only to provide the current necessary to power the internal circuitry. The external pins are provided only as a connection point for off-chip bypass capacitors to filter the supply. Connecting external circuitry to these regulator outputs may result in reduced performance and damage to the device. The high voltage supply, between 4.5 V and 26 V, supplies the analog circuitry (AVCC) and the power stage (PVCC). The AVCC supply feeds internal LDO including GVDD. This LDO output are connected to external pins for filtering purposes, but should not be connected to external circuits. GVDD LDO output have been sized to provide current necessary for internal functions but not for external loading. 10 Layout 10.1 Layout Guidelines The TPA3116D2 can be used with a small, inexpensive ferrite bead output filter for most applications. However, since the class-D switching edges are fast, it is necessary to take care when planning the layout of the printed circuit board. The following suggestions will help to meet EMC requirements. • Decoupling capacitors — The high-frequency decoupling capacitors should be placed as close to the PVCC and AVCC terminals as possible. Large (100 μF or greater) bulk power supply decoupling capacitors should be placed near the TPA3116D2 on the PVCC supplies. Local, high-frequency bypass capacitors should be placed as close to the PVCC pins as possible. These caps can be connected to the IC GND pad directly for an excellent ground connection. Consider adding a small, good quality low ESR ceramic capacitor between 220 pF and 1 nF and a larger mid-frequency cap of value between 100 nF and 1 µF also of good quality to the PVCC connections at each end of the chip. • Keep the current loop from each of the outputs through the ferrite bead and the small filter cap and back to GND as small and tight as possible. The size of this current loop determines its effectiveness as an antenna. • Grounding — The PVCC decoupling capacitors should connect to GND. All ground should be connected at the IC GND, which should be used as a central ground connection or star ground for the TPA3116D2. • Output filter — The ferrite EMI filter (see Figure 35) should be placed as close to the output terminals as possible for the best EMI performance. The LC filter should be placed close to the outputs. The capacitors used in both the ferrite and LC filters should be grounded. 28 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 Layout Guidelines (continued) For an example layout, see the TPA3116D2 Evaluation Module (TPA3116D2EVM) User Guide (SLOU336). Both the EVM user manual and the thermal pad application reports, SLMA002 and SLMA004, are available on the TI Web site at http://www.ti.com. 10.2 Layout Example Figure 40. Layout Example Top Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 29 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com Layout Example (continued) Figure 41. Layout Example Bottom 30 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 MACHINE THESE 3 EDGES AFTER 0.00 ANODIZATION –0.60 +.000 –.024 SINK HEIGHT 25.00 .984 1.00 [.118] 3.00 [.118] 0 [.000] 10.00 [.394] 19.50 [.768] 30.50 [1.201] 40.00 [1.575] 50.00±0.38 [1.969±.015] SINK LENGTH 3.00 [.118] 6.35 [.250] 13.90±0.38 [.547±.015] BASE WIDTH 6.95 [.274] 5.00 [.197] 40.00 [1.575] 2X 4-40 6.5 x TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708D –APRIL 2012–REVISED JANUARY 2015 10.3 Heat Sink Used on the EVM The heat sink (part number ATS-TI 10 OP-521-C1-R1) used on the EVM is an 14x25x50 mm extruded aluminum heat sink with three fins (see drawing below). For additional information on the heat sink, go to www.qats.com. Figure 42. EVM Heatsink This size heat sink has shown to be sufficient for continuous output power. The crest factor of music and having airflow will lower the requirement for the heat sink size and smaller types can be used. Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 TPA3116D2, TPA3118D2, TPA3130D2 SLOS708D –APRIL 2012–REVISED JANUARY 2015 www.ti.com 11 Device and Documentation Support 11.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 7. Related Links TECHNICAL TOOLS & SUPPORT & PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY TPA3116D2 Click here Click here Click here Click here Click here TPA3118D2 Click here Click here Click here Click here Click here TPA3130D2 Click here Click here Click here Click here Click here 11.2 Trademarks All trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 32 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPA3116D2DAD ACTIVE HTSSOP DAD 32 46 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 TPA 3116 D2 TPA3116D2DADR ACTIVE HTSSOP DAD 32 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 TPA 3116 D2 TPA3118D2DAP ACTIVE HTSSOP DAP 32 46 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 TPA3118 TPA3118D2DAPR ACTIVE HTSSOP DAP 32 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 TPA3118 TPA3130D2DAP ACTIVE HTSSOP DAP 32 46 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 TPA3130 TPA3130D2DAPR ACTIVE HTSSOP DAP 32 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 TPA3130 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2014 Addendum-Page 2 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TPA3116D2DADR HTSSOP DAD 32 2000 330.0 24.4 8.6 11.5 1.6 12.0 24.0 Q1 TPA3118D2DAPR HTSSOP DAP 32 2000 330.0 24.4 8.6 11.5 1.6 12.0 24.0 Q1 TPA3130D2DAPR HTSSOP DAP 32 2000 330.0 24.4 8.6 11.5 1.6 12.0 24.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2014 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPA3116D2DADR HTSSOP DAD 32 2000 367.0 367.0 45.0 TPA3118D2DAPR HTSSOP DAP 32 2000 367.0 367.0 45.0 TPA3130D2DAPR HTSSOP DAP 32 2000 367.0 367.0 45.0 PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2014 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1  15-V Digital or ±7.5-V Peak-to-Peak Switching  125-Ω Typical On-State Resistance for 15-V Operation  Switch On-State Resistance Matched to Within 5 Ω Over 15-V Signal-Input Range  On-State Resistance Flat Over Full Peak-to-Peak Signal Range  High On/Off Output-Voltage Ratio: 80 dB Typical at fis = 10 kHz, RL = 1 kΩ  High Degree of Linearity: <0.5% Distortion Typical at fis = 1 kHz, Vis = 5 V p-p, VDD − VSS ≥ 10 V, RL = 10 kΩ  Extremely Low Off-State Switch Leakage, Resulting in Very Low Offset Current and High Effective Off-State Resistance: 10 pA Typical at VDD − VSS = 10 V, TA = 25°C  Extremely High Control Input Impedance (Control Circuit Isolated From Signal Circuit): 1012 Ω Typical  Low Crosstalk Between Switches: −50 dB Typical at fis = 8 MHz, RL = 1 kΩ  Matched Control-Input to Signal-Output Capacitance: Reduces Output Signal Transients  Frequency Response, Switch On = 40 MHz Typical  100% Tested for Quiescent Current at 20 V  5-V, 10-V, and 15-V Parametric Ratings  Meets All Requirements of JEDEC Tentative Standard No. 13-B, Standard Specifications for Description of “B” Series CMOS Devices  Applications: − Analog Signal Switching/Multiplexing: Signal Gating, Modulator, Squelch Control, Demodulator, Chopper, Commutating Switch − Digital Signal Switching/Multiplexing − Transmission-Gate Logic Implementation − Analog-to-Digital and Digital-to-Analog Conversion − Digital Control of Frequency, Impedance, Phase, and Analog-Signal Gain description/ordering information The CD4066B is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. It is pin-for-pin compatible with the CD4016B, but exhibits a much lower on-state resistance. In addition, the on-state resistance is relatively constant over the full signal-input range. The CD4066B consists of four bilateral switches, each with independent controls. Both the p and the n devices in a given switch are biased on or off simultaneously by the control signal. As shown in Figure 1, the well of the n-channel device on each switch is tied to either the input (when the switch is on) or to VSS (when the switch is off). This configuration eliminates the variation of the switch-transistor threshold voltage with input signal and, thus, keeps the on-state resistance low over the full operating-signal range. The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold applications, the CD4016B is recommended.      !"   #!$% &"' Copyright  2003, Texas Instruments Incorporated &!   #" #" (" "  ") !" && *+' &! #", &"  ""%+ %!&" ",  %% #""' Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SIG A IN/OUT SIG A OUT/IN SIG B OUT/IN SIG B IN/OUT CONTROL B CONTROL C VSS VDD CONTROL A CONTROL D SIG D IN/OUT SIG D OUT/IN SIG C OUT/IN SIG C IN/OUT E, F, M, NS, OR PW PACKAGE (TOP VIEW)       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING CDIP − F Tube of 25 CD4066BF3A CD4066BF3A PDIP − E Tube of 25 CD4066BE CD4066BE Tube of 50 CD4066BM −55°C to 125°C SOIC − M Reel of 2500 CD4066BM96 CD4066BM −55°C to 125°C SOIC − M Reel of 250 CD4066BMT CD4066BM SOP − NS Reel of 2000 CD4066BNSR CD4066B TSSOP − PW Tube of 90 CD4066BPW CM066B Reel of 2000 CD4066BPWR † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. † All control inputs are protected by the CMOS protection network. NOTES: A. All p substrates are connected to VDD. B. Normal operation control-line biasing: switch on (logic 1), VC = VDD; switch off (logic 0), VC = VSS C. Signal-level range: VSS ≤ Vis ≤ VDD Control VC† VDD VSS VSS n n p Out Vos Control Switch In 92CS-29113 p n Vis Figure 1. Schematic Diagram of One-of-Four Identical Switches and Associated Control Circuitry       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† DC supply-voltage range, VDD (voltages referenced to VSS terminal) −0.5 V to 20 V . . . . . . . . . . . . . . . . . . . . Input voltage range, Vis (all inputs) −0.5 V to V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DD + 0.5 V DC input current, IIN (any one input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Package thermal impedance, θJA (see Note 1): E package 80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C/W M package 86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C/W NS package 76 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C/W PW package 113 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C/W Lead temperature (during soldering): At distance 1/16 ± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max 265 . . . . . . . . . . . . . . . . . . . . . . . °C Storage temperature range, Tstg −65 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN MAX UNIT VDD Supply voltage 3 18 V TA Operating free-air temperature −55 125 °C       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics LIMITS AT INDICATED TEMPERATURES PARAMETER TEST CONDITIONS VIN VDD −55°C −40°C 85°C 125°C PARAMETER TEST CONDITIONS 25°C UNIT VIN (V) VDD (V) −55°C −40°C 85°C 125°C TYP MAX UNIT 0, 5 5 0.25 0.25 7.5 7.5 0.01 0.25 IDD Quiescent device 0, 10 10 0.5 0.5 15 15 0.01 0.5 IDD A Quiescent device current 0, 15 15 1 1 30 30 0.01 1 µA current 0, 20 20 5 5 150 150 0.02 5 Signal Inputs (Vis) and Outputs (Vos) VC = VDD, RL = 10 kΩ returned 5 800 850 1200 1300 470 1050 ron On-state resistance (max) RL = 10 kΩ returned to , VDD VSS 2 on 10 310 330 500 550 180 400 Ω (max) to , Vis = VSS to VDD 2 15 200 210 300 320 125 240 On-state resistance 5 15 ∆ron On-state resistance difference between any two switches RL = 10 kΩ, VC = VDD ∆ron difference between 10 10 Ω any two switches RL = 10 kΩ, VC = VDD 15 5 Ω THD Total harmonic distortion VC = VDD = 5 V, VSS = −5 V, Vis(p-p) = 5 V (sine wave centered on 0 V), RL = 10 kΩ, fis = 1-kHz sine wave 0.4 % −3-dB cutoff frequency (switch on) VC = VDD = 5 V, VSS = −5 V, Vis(p-p) = 5 V (sine wave centered on 0 V), RL = 1 kΩ 40 MHz −50-dB feedthrough frequency (switch off) VC = VSS = −5 V, Vis(p-p) = 5 V (sine wave centered on 0 V), RL = 1 kΩ 1 MHz Iis Input/output leakage current (switch off) (max) VC = 0 V, Vis = 18 V, Vos = 0 V; and VC = 0 V, Vis = 0 V, Vos = 18 V 18 ±0.1 ±0.1 ±1 ±1 ±10−5 ±0.1 µA −50-dB crosstalk frequency VC(A) = VDD = 5 V, VC(B) = VSS = −5 V, Vis(A) = 5 Vp-p, 50-Ω source, RL = 1 kΩ 8 MHz Propagation delay RL = 200 kΩ, VC = VDD, VSS = GND, CL = 50 pF, 5 20 40 tpd Propagation delay (signal input to signal output) VSS = GND, CL = 50 pF, Vis = 10 V (square wave centered on 5 V), pd (signal input to 10 10 20 ns signal output) is (square wave centered on 5 V), tr, tf = 20 ns 15 7 15 Cis Input capacitance VDD = 5 V, VC = VSS = −5 V 8 pF Cos Output capacitance VDD = 5 V, VC = VSS = −5 V 8 pF Cios Feedthrough VDD = 5 V, VC = VSS = −5 V 0.5 pF       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 electrical characteristics (continued) LIMITS AT INDICATED TEMPERATURES CHARACTERISTIC TEST CONDITIONS VDD −55°C −40°C 85°C 125°C CHARACTERISTIC TEST CONDITIONS 25°C UNIT VDD (V) −55°C −40°C 85°C 125°C TYP MAX UNIT Control (VC) Control input, |Iis| < 10 µA, 5 1 1 1 1 1 VILC Control input, low voltage (max) |Iis| < 10 µA, Vis = VSS, VOS = VDD, and V = V , V = V VILC 10 2 2 2 2 2 V low voltage (max) Vis = VSS, VOS = VDD, and Vis = VDD, VOS = VSS 15 2 2 2 2 2 V Control input, 5 3.5 (MIN) VIHC high voltage VIHC See Figure 6 10 7 (MIN) V high voltage See Figure 6 15 11 (MIN) V IIN Input current (max) Vis ≤ VDD, VDD − VSS = 18 V, VCC ≤ VDD − VSS 18 ±0.1 ±0.1 ±1 ±1 ±10−5 ±0.1 µA Crosstalk (control input to signal output) VC = 10 V (square wave), tr, tf = 20 ns, RL = 10 kΩ 10 50 mV Turn-on and turn-off VIN = VDD, tr, tf = 20 ns, 5 35 70 Turn-on and turn-off propagation delay VIN = VDD, tr, tf = 20 ns, CL = 50 pF, RL = 1 kΩ 10 20 40 ns propagation delay CL = 50 pF, RL = 1 kΩ 15 15 30 ns Vis = VDD, VSS = GND, RL = 1 kΩ to GND, CL = 50 pF, 5 6 Maximum control input repetition rate RL = 1 kΩ to GND, CL = 50 pF, VC = 10 V (square wave centered on 5 V), tr, tf = 20 ns, 10 9 MHz repetition rate C centered on 5 V), tr, tf = 20 ns, Vos = 1/2 Vos at 1 kHz 15 9.5 CI Input capacitance 5 7.5 pF switching characteristics VDD SWITCH INPUT SWITCH VDD OUTPUT, Vos (V) Vis (V) Iis (mA) OUTPUT, Vos (V) (V) Vis (V) −55°C −40°C 25°C 85°C 125°C MIN MAX 5 0 0.64 0.61 0.51 0.42 0.36 0.4 5 5 −0.64 −0.61 −0.51 −0.42 −0.36 4.6 10 0 1.6 1.5 1.3 1.1 0.9 0.5 10 10 −1.6 −1.5 −1.3 −1.1 −0.9 9.5 15 0 4.2 4 3.4 2.8 2.4 1.5 15 15 −4.2 −4 −3.4 −2.8 −2.4 13.5       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Vis − Input Signal Voltage − V 600 500 400 300 200 100 0 −4 −3 −2 −1 0 1 2 3 4 TYPICAL ON-STATE RESISTANCE vs INPUT SIGNAL VOLTAGE (ALL TYPES) 92CS-27326RI Figure 2 TA = 125°C +25°C −55°C Supply Voltage (VDD − VSS) = 5 V − Channel On-State Resistance − on Ω r Figure 3 TYPICAL ON-STATE RESISTANCE vs INPUT SIGNAL VOLTAGE (ALL TYPES) 300 250 200 150 100 50 0 −10 −7.5 −5 −2.5 0 2.5 5 7.5 10 Supply Voltage (VDD − VSS) = 10 V TA = 125°C Vis − Input Signal Voltage − V +25°C −55°C 92CS-27327RI − Channel On-State Resistance − on Ω r Vis − Input Signal Voltage − V TYPICAL ON-STATE RESISTANCE vs INPUT SIGNAL VOLTAGE (ALL TYPES) Figure 4 300 250 200 150 100 50 0 −10 −7.5 −5 −2.5 0 2.5 5 7.5 10 Supply Voltage (VDD − VSS) = 15 V TA = 125°C +25°C −55°C 92CS-27329RI − Channel On-State Resistance − on Ω r Vis − Input Signal Voltage − V Figure 5 TYPICAL ON-STATE RESISTANCE vs INPUT SIGNAL VOLTAGE (ALL TYPES) 600 500 400 300 200 100 0 −10 −7.5 −5 −2.5 0 2.5 5 7.5 10 Supply Voltage (VDD − VSS) = 5 V TA = 125°C 10 V −15 V 92CS-27330RI − Channel On-State Resistance − on Ω r       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TYPICAL CHARACTERISTICS CD4066B 1 of 4 Switches Iis Vis Vos 92CS-30966 |Vis − Vos| |Iis| ron = Figure 6. Determination of ron as a Test Condition for Control-Input High-Voltage (VIHC) Specification X-Y Plotter 1-kΩ Range TG On Keithley 160 Digital Multimeter H. P. Moseley 7030A X VSS VDD 10 kΩ 92CS-22716 Y Figure 7. Channel On-State Resistance Measurement Circuit Figure 8 TYPICAL ON CHARACTERISTICS FOR 1 OF 4 CHANNELS 3 2 1 0 −1 −2 −3 −3 −2 −1 0 1 2 3 4 VI − Input Voltage − V 92CS-30919 Output Voltage − V V − VC = VDD VDD Vis Vos RL VSS All unused terminals are connected to VSS CD4066B 1 of 4 Switches O Figure 9 10 102 103 10 101 102 103 104 f − Switching Frequency − kHz POWER DISSIPATION PER PACKAGE vs SWITCHING FREQUENCY TA = 25°C Power Dissipation Per Package − W D µ 6 4 2 6 4 2 6 4 2 6 4 2 2 46 2 46 92C-30920 5 V 10 V VSS VDD 5 6 13 12 7 CD4066B P − 14 Supply Voltage (VDD) = 15 V       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS V VDD = 5 V C = −5 V VSS = −5 V Cios Cis Cos CD4066B 1 of 4 Switches Measured on Boonton capacitance bridge, model 75a (1 MHz); test-fixture capacitance nulled out. 92CS-30921 Figure 10. Typical On Characteristics for One of Four Channels VDD VC = VSS Vos VSS CD4066B 1 of 4 Switches Vis = VDD I 92CS-30922 Figure 11. Off-Switch Input or Output Leakage All unused terminals are connected to VSS. VDD VC = VDD Vos VSS CD4066B 1 of 4 Switches Vis Figure 12. Propagation Delay Time Signal Input (Vis) to Signal Output (Vos) 92CS-30923 200 kΩ 50 pF VDD tr = tf = 20 ns All unused terminals are connected to VSS. VC VDD Vos VSS CD4066B 1 of 4 Switches Vis Figure 13. Crosstalk-Control Input to Signal Output +10 V tr = tf = 20 ns 92CS-30924 1 kΩ 10 kΩ All unused terminals are connected to VSS.       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TYPICAL CHARACTERISTICS VDD VC = VDD Vos VSS CD4066B 1 of 4 Switches VDD 92CS-30925 1 kΩ 50 pF VDD NOTES: A. All unused terminals are connected to VSS. B. Delay is measured at Vos level of +10% from ground (turn-on) or on-state output level (turn-off). tr = tf = 20 ns Figure 14. Propagation Delay, tPLH, tPHL Control-Signal Output VDD = 10 V VC VSS CD4066B 1 of 4 Switches Vis = 10 V 92CS-30925 50 pF 1 kΩ tr = tf = 20 ns VC Vos 90% 10% All unused terminals are connected to VSS. VOS  VOS at 1 kHz 2 VOS  VOS at 1 kHz 2 Repetition Rate 50% tr tf 10 V 0 V Figure 15. Maximum Allowable Control-Input Repetition Rate       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Inputs VSS Measure inputs sequentially to both VDD and VSS. Connect all unused inputs to either VDD or VSS. Measure control inputs only. I VSS VDD 92CS-27555 Figure 16. Input Leakage-Current Test Circuit VDD Channel 1 Channel 2 Channel 3 Channel 4 Channel 1 Channel 2 Channel 3 Channel 4 1/4 CD4066B CD4066B CD4066B CD4018B CD4018B 1/4 CD4066B CD4001B LPF LPF LPF LPF 1 10 2 3 7 9 12 5 4 14 15 13 1 2 3 5 2 4 1 2 5 6 8 9 12 13 3 4 10 1 8 4 11 11 12 6 5 13 9 10 2 3 10 2 3 7 9 12 14 15 1 5 4 7 9 6 10 13 12 9 8 6 5 2 1 11 10 4 3 12 6 5 11 11 12 5 4 3 8 11 4 1 2 3 9 10 PE J1 J2 J3 J4 J5 Q1 Q2 1/3 CD4049B CD4001B Signal Inputs Clock Reset Package Count 2 - CD4001B 1 - CD4049B 3 - CD4066B 2 - CD4018B 1/3 CD4049B 1/6 CD4049B 10 k Signal Outputs PE J1 J2 J3 J4 J5 Q1 Q2 External Reset Clock Chan 1 Chan 2 Chan 3 Chan 4 VDD 30% (VDD − VSS) Clock Maximum Allowable Signal Level VSS 92CM-30928 Ω 10 kΩ 10 kΩ 10 kΩ 10 kΩ Figure 17. Four-Channel PAM Multiplex System Diagram       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TYPICAL CHARACTERISTICS SWA SWB SWC SWD 92CS-30927 Analog Inputs (±5 V) VDD = 5 V VDD = 5 V 5 V −5 V 5 V CD4066B Analog Outputs (±5 V) VSS = −5 V CD4054B VSS = 0 V VEE = −5 V IN 0 Digital Control Inputs 0 Figure 18. Bidirectional Signal Transmission Via Digital Control Logic       SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION In applications that employ separate power sources to drive VDD and the signal inputs, the VDD current capability should exceed VDD/RL (RL = effective external load of the four CD4066B bilateral switches). This provision avoids any permanent current flow or clamp action on the VDD supply when power is applied or removed from the CD4066B. In certain applications, the external load-resistor current can include both VDD and signal-line components. To avoid drawing VDD current when switch current flows into terminals 1, 4, 8, or 11, the voltage drop across the bidirectional switch must not exceed 0.8 V (calculated from ron values shown). No VDD current will flow through RL if the switch current flows into terminals 2, 3, 9, or 10. PACKAGE OPTION ADDENDUM www.ti.com 29-Mar-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples CD4066BE ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU | CU SN N / A for Pkg Type -55 to 125 CD4066BE CD4066BEE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD4066BE CD4066BF ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 CD4066BF CD4066BF3A ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 CD4066BF3A CD4066BF3AS2283 OBSOLETE CDIP J 14 TBD Call TI Call TI CD4066BF3AS2534 OBSOLETE CDIP J 14 TBD Call TI Call TI CD4066BM ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CD4066BM CD4066BM96 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -55 to 125 CD4066BM CD4066BM96E4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CD4066BM CD4066BM96G4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CD4066BM CD4066BME4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CD4066BM CD4066BMG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CD4066BM CD4066BMT ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CD4066BM CD4066BNSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CD4066B CD4066BPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CM066B CD4066BPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CM066B CD4066BPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -55 to 125 CM066B CD4066BPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 CM066B PACKAGE OPTION ADDENDUM www.ti.com 29-Mar-2015 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples JM38510/05852BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 05852BCA M38510/05852BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 05852BCA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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PACKAGE OPTION ADDENDUM www.ti.com 29-Mar-2015 Addendum-Page 3 OTHER QUALIFIED VERSIONS OF CD4066B, CD4066B-MIL : • Catalog: CD4066B • Automotive: CD4066B-Q1, CD4066B-Q1 • Military: CD4066B-MIL NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects • Military - QML certified for Military and Defense Applications TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant CD4066BM96 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CD4066BM96 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CD4066BM96 SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 CD4066BM96G4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CD4066BM96G4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CD4066BMT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CD4066BNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 CD4066BPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Apr-2014 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD4066BM96 SOIC D 14 2500 333.2 345.9 28.6 CD4066BM96 SOIC D 14 2500 367.0 367.0 38.0 CD4066BM96 SOIC D 14 2500 364.0 364.0 27.0 CD4066BM96G4 SOIC D 14 2500 367.0 367.0 38.0 CD4066BM96G4 SOIC D 14 2500 333.2 345.9 28.6 CD4066BMT SOIC D 14 250 367.0 367.0 38.0 CD4066BNSR SO NS 14 2000 367.0 367.0 38.0 CD4066BPWR TSSOP PW 14 2000 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 7-Apr-2014 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 20-W STEREO DIGITAL AUDIO POWER AMPLIFIER WITH EQ AND DRC Check for Samples: TAS5707 TAS5707A 1FEATURES 23• Audio Input/Output Night-Mode Listening – 20-W Into an 8-Ω Load From an 18-V Supply – Autobank Switching: Preload Coefficients – Wide PVDD Range, From 8 V to 26 V for Different Sample Rates. No Need to Write New Coefficients to the Part When – Efficient Class-D Operation Eliminates Sample Rate Changes. Need for Heatsinks – Autodetect: Automatically Detects – Requires Only 3.3 V and PVDD Sample-Rate Changes. No Need for – One Serial Audio Input (Two Audio External Microprocessor Intervention Channels) – Supports 8-kHz to 48-kHz Sample Rate APPLICATIONS (LJ/RJ/I2S) • Television • Audio/PWM Processing • iPod™ Dock – Independent Channel Volume Controls With • Sound Bar 24 dB to Mute – Soft Mute (50% Duty Cycle) DESCRIPTION – Programmable Dynamic Range Control The TAS5707 is a 20-W, efficient, digital-audio power – 14 Programmable Biquads for Speaker EQ amplifier for driving stereo bridge-tied speakers. One and Other Audio Processing Features serial data input allows processing of up to two discrete audio channels and seamless integration to – Programmable Coefficients for DRC Filters most digital audio processors and MPEG decoders. – DC Blocking Filters The device accepts a wide range of input data and • General Features data rates. A fully programmable data path routes these channels to the internal speaker drivers. – Serial Control Interface Operational Without MCLK The TAS5707 is a slave-only device receiving all clocks from external sources. The TAS5707 operates – Factory-Trimmed Internal Oscillator for with a PWM carrier between a 384-kHz switching rate Automatic Rate Detection and 352-KHz switching rate, depending on the input – Surface Mount, 48-PIN, 7-mm × 7-mm sample rate. Oversampling combined with a HTQFP Package fourth-order noise shaper provides a flat noise floor – Thermal and Short-Circuit Protection and excellent dynamic range from 20 Hz to 20 kHz.. • Benefits The TAS5707A is identical in function to the HTQFP packaged TAS5707, but has a unique I 2 – EQ: Speaker Equalization Improves Audio C device Performance address. The address of the TAS5707 is 0x36. The address of the TAS5707A is 0x3A. – DRC: Dynamic Range Compression. Can Be Used As Power Limiter. Enables Speaker Protection, Easy Listening, 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2iPod is a trademark of Apple Inc. 3All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2008–2009, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SDIN LRCLK SCLK MCLK RESET PDN SDA PLL_FLTM PLL_FLTP AVDD/DVDD PVDD OUT_A OUT_C OUT_B OUT_D BST_A BST_C BST_B BST_D 3.3 V 8 V–26 V SCL Digital Audio Source I C Control 2 Control Inputs LC LC Left Right B0264-11 Loop Filter(1) TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. SIMPLIFIED APPLICATION DIAGRAM (1)See user's guide for loop-filter details. 2 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A SDIN MCLK SCLK LRCLK Serial Audio Port 7 BQ L R V O L U M E DRC Protection Logic Click and Pop Control 7 BQ SDA SCL 4 Order th Noise Shaper and PWM S R C mDAP Sample Rate Autodetect and PLL Serial Control Microcontroller Based System Control Terminal Control OUT_A OUT_B 2 HB ´ FET Out OUT_C OUT_D 2 HB ´ FET Out B0262-02 TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 FUNCTIONAL VIEW Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TAS5707 TAS5707A Temp. Sense VALID FAULT AGND OC_ADJ Power On Reset Undervoltage Protection GND PWM_D OUT_D PGND_CD PVDD_D BST_D Gate Drive PWM Rcv Overcurrent Protection 4 Protection and I/O Logic PWM_C OUT_C PGND_CD PVDD_C BST_C Timing Gate Drive Ctrl PWM Rcv GVDD_CD PWM_B OUT_B PGND_AB PVDD_B BST_B Timing Gate Drive Ctrl PWM Rcv PWM_A OUT_A PGND_AB PVDD_A BST_A Timing Gate Drive Ctrl PWM Rcv GVDD_AB Ctrl Pulldown Resistor Pulldown Resistor Pulldown Resistor Pulldown Resistor 4 GVDD_CD Regulator GVDD_AB Regulator Timing I sense B0034-05 PWM Controller FAULT TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Figure 1. Power Stage Functional Block Diagram 4 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A Vol1 R L 7 BQ EQ ´ ´ ealpha ealpha ´ ´ 7 BQ EQ Input Muxing Vol2 B0341-01 1 Energy MAXMUX Attack Decay DRC1 DRC ON/OFF 50[D7] 30–36 29–2F 3A 3A 3B–3C 46[D0] To PWM Hex numbers refer to I2C subaddresses [Di] = bit "i" of subaddress SSTIMER OC_ADJ PLL_FLTP VR_ANA NC AVSS PLL_FLTM BST_A GVDD_OUT PVDD_A OUT_A RESET PVDD_A STEST PDN VR_DIG OSC_RES DVSSO DVDD FAULT MCLK SCLK SDIN LRCLK AVDD SDA SCL DVSS GND VREG PVDD_B BST_B PVDD_C OUT_C PVDD_D BST_D PGND_AB OUT_B PGND_CD OUT_D AGND PGND_AB PVDD_B PGND_CD PVDD_D BST_C PVDD_C GVDD_OUT P0075-01 PHP Package (Top View) TAS5707 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 DAP Process Structure 48-TERMINAL, HTQFP PACKAGE (TOP VIEW) Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com PIN FUNCTIONS PIN TYPE 5-V TERMINATION (1) DESCRIPTION TOLERANT (2) NAME NO. AGND 30 P Analog ground for power stage AVDD 13 P 3.3-V analog power supply AVSS 9 P Analog 3.3-V supply ground BST_A 4 P High-side bootstrap supply for half-bridge A BST_B 43 P High-side bootstrap supply for half-bridge B BST_C 42 P High-side bootstrap supply for half-bridge C BST_D 33 P High-side bootstrap supply for half-bridge D DVDD 27 P 3.3-V digital power supply DVSSO 17 P Oscillator ground DVSS 28 P Digital ground FAULT 14 DO Backend error indicator. Asserted LOW for over temperature, over current, over voltage, and under voltage error conditions. De-asserted upon recovery from error condition. GND 29 P Analog ground for power stage GVDD_OUT 5, 32 P Gate drive internal regulator output LRCLK 20 DI 5-V Pulldown Input serial audio data left/right clock (sample rate clock) MCLK 15 DI 5-V Pulldown Master clock input NC 8 – No connection OC_ADJ 7 AO Analog overcurrent programming. Requires resistor to ground. OSC_RES 16 AO Oscillator trim resistor. Connect an 18.2-kΩ 1% resistor to DVSSO. OUT_A 1 O Output, half-bridge A OUT_B 46 O Output, half-bridge B OUT_C 39 O Output, half-bridge C OUT_D 36 O Output, half-bridge D PDN 19 DI 5-V Pullup Power down, active-low. PDN prepares the device for loss of power supplies by shutting down the noise shaper and initiating PWM stop sequence. PGND_AB 47, 48 P Power ground for half-bridges A and B PGND_CD 37, 38 P Power ground for half-bridges C and D PLL_FLTM 10 AO PLL negative loop filter terminal PLL_FLTP 11 AO PLL positive loop filter terminal PVDD_A 2, 3 P Power supply input for half-bridge output A PVDD_B 44, 45 P Power supply input for half-bridge output B PVDD_C 40, 41 P Power supply input for half-bridge output C PVDD_D 34, 35 P Power supply input for half-bridge output D RESET 25 DI 5-V Pullup Reset, active-low. A system reset is generated by applying a logic low to this pin. RESET is an asynchronous control signal that restores the DAP to its default conditions, and places the PWM in the hard mute state (tristated). SCL 24 DI 5-V I 2C serial control clock input SCLK 21 DI 5-V Pulldown Serial audio data clock (shift clock). SCLK is the serial audio port input data bit clock. SDA 23 DIO 5-V I 2C serial control data interface input/output SDIN 22 DI 5-V Pulldown Serial audio data input. SDIN supports three discrete (stereo) data formats. (1) TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output (2) All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic levels if the pins are left unconnected (pullups → logic 1 input; pulldowns → logic 0 input). 6 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 PIN FUNCTIONS (continued) PIN TYPE 5-V TERMINATION (1) DESCRIPTION TOLERANT (2) NAME NO. SSTIMER 6 AI Controls ramp time of OUT_X to minimize pop. Leave this pin floating for BD mode. Requires capacitor of 2.2 nF to GND in AD mode. The capacitor determines the ramp time. STEST 26 DI Factory test pin. Connect directly to DVSS. VR_ANA 12 P Internally regulated 1.8-V analog supply voltage. This pin must not be used to power external devices. VR_DIG 18 P Internally regulated 1.8-V digital supply voltage. This pin must not be used to power external devices. VREG 31 P Digital regulator output. Not to be used for powering external circuitry. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT DVDD, AVDD –0.3 to 3.6 V Supply voltage PVDD_X –0.3 to 30 V OC_ADJ –0.3 to 4.2 V 3.3-V digital input –0.5 to DVDD + 0.5 V Input voltage 5-V tolerant(2) digital input (except MCLK) –0.5 to DVDD + 2.5(3) V 5-V tolerant MCLK input –0.5 to AVDD + 2.5(3) V OUT_x to PGND_X 32(4) V BST_x to PGND_X 43(4) V Input clamp current, IIK ±20 mA Output clamp current, IOK ±20 mA Operating free-air temperature 0 to 85 °C Operating junction temperature range 0 to 150 °C Storage temperature range, Tstg –40 to 125 °C (1) Stresses beyond those listed under absolute ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operation conditions are not implied. Exposure to absolute-maximum conditions for extended periods may affect device reliability. (2) 5-V tolerant inputs are PDN, RESET, SCLK, LRCLK, MCLK, SDIN, SDA, and SCL. (3) Maximum pin voltage should not exceed 6.0Vele (4) DC voltage + peak ac waveform measured at the pin should be below the allowed limit for all conditions. DISSIPATION RATINGS(1) DERATING FACTOR TA ≤ 25°C TA = 45°C TA = 70°C PACKAGE ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING 7-mm × 7-mm HTQFP 40 mW/°C 5 W 4.2 W 3.2 W (1) This data was taken using 1 oz trace and copper pad that is soldered directly to a JEDEC standard high-k PCB. The thermal pad must be soldered to a thermal land on the printed-circuit board. See TI Technical Briefs SLMA002 for more information about using the HTQFP thermal pad RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Digital/analog supply voltage DVDD, AVDD 3 3.3 3.6 V Half-bridge supply voltage PVDD_X 8 26 V VIH High-level input voltage 5-V tolerant 2 V VIL Low-level input voltage 5-V tolerant 0.8 V TA Operating ambient temperature range 0 85 °C Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com RECOMMENDED OPERATING CONDITIONS (continued) MIN NOM MAX UNIT TJ (1) Operating junction temperature range 0 125 °C RL (BTL) Load impedance Output filter: L = 15 μH, C = 680 nF. 6 8 Ω Minimum output inductance under 10 LO (BTL) Output-filter inductance μH short-circuit condition (1) Continuous operation above the recommended junction temperature may result in reduced reliability and/or lifetime of the device. PWM OPERATION AT RECOMMENDED OPERATING CONDITIONS PARAMETER TEST CONDITIONS VALUE UNIT 11.025/22.05/44.1-kHz data rate ±2% 352.8 kHz Output sample rate 48/24/12/8/16/32-kHz data rate ±2% 384 8 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 PLL INPUT PARAMETERS AND EXTERNAL FILTER COMPONENTS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fMCLKI MCLK Frequency 2.8224 24.576 MHz MCLK duty cycle 40% 50% 60% tr / Rise/fall time for MCLK 5 ns tf(MCLK) LRCLK allowable drift before LRCLK reset 4 MCLKs External PLL filter capacitor C1 SMD 0603 Y5V 47 nF External PLL filter capacitor C2 SMD 0603 Y5V 4.7 nF External PLL filter resistor R SMD 0603, metal film 470 Ω ELECTRICAL CHARACTERISTICS DC Characteristics TA = 25°, PVCC_X = 18V, DVDD = AVDD = 3.3V, RL= 8Ω, BTL AD Mode, FS = 48KHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage FAULTZ and SDA IOH = –4 mA 2.4 V DVDD = AVDD = 3 V VOL Low-level output voltage FAULTZ and SDA IOL = 4 mA 0.5 V DVDD = AVDD = 3 V VI < VIL ; DVDD = AVDD 75 IIL Low-level input current μA = 3.6V VI > VIH ; DVDD = 75 IIH High-level input current μA AVDD = 3.6V Normal Mode 48 83 3.3 V supply voltage (DVDD, IDD 3.3 V supply current Reset (RESET = low, 24 32 mA AVDD) PDN = high) Normal Mode 30 55 IPVDD Half-bridge supply current No load (PVDD_X) Reset (RESET = low, 5 13 mA PDN = high) Drain-to-source resistance, LS TJ = 25°C, includes metallization resistance 180 rDS(on) (1) Drain-to-source resistance, mΩ TJ = 25°C, includes metallization resistance 180 HS I/O Protection Vuvp Undervoltage protection limit PVDD falling 7.2 V Vuvp,hyst Undervoltage protection limit PVDD rising 7.6 V OTE(2) Overtemperature error 150 °C Extra temperature drop OTEHYST (2) 30 °C required to recover from error OTW Overtemperature warning 125 °C Temperature drop required to OTWHYST 25 °C recover from warning OLPC Overload protection counter fPWM = 384 kHz 0.63 ms IOC Overcurrent limit protection Resistor—programmable, max. current, ROCP = 22 kΩ 4.5 A IOCT Overcurrent response time 150 ns OC programming resistor Resistor tolerance = 5% for typical value; the minimum ROCP 20 22 kΩ range resistance should not be less than 20 kΩ. Internal pulldown resistor at Connected when drivers are tristated to provide bootstrap RPD 3 kΩ the output of each half-bridge capacitor charge. (1) This does not include bond-wire or pin resistance. (2) Specified by design Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com AC Characteristics (BTL) PVDD_X = 18 V, BTL AD mode, FS = 48 KHz, RL = 8 Ω, ROCP = 22 KΩ, CBST = 33 nF, audio frequency = 1 kHz, AES17 filter, fPWM = 384 kHz, TA = 25°C (unless otherwise noted). All performance is in accordance with recommended operating conditions, unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PVDD = 18 V,10% THD, 1-kHz input signal 20.6 PVDD = 18 V, 7% THD, 1-kHz input signal 19.5 PVDD = 12 V, 10% THD, 1-kHz input 9.4 P signal O Power output per channel W PVDD = 12 V, 7% THD, 1-kHz input signal 8.9 PVDD = 8 V, 10% THD, 1-kHz input signal 4.1 PVDD = 8 V, 7% THD, 1-kHz input signal 3.8 PVDD= 18 V; PO = 1 W 0.06% THD+N Total harmonic distortion + noise PVDD= 12 V; PO = 1 W 0.13% PVDD= 8 V; PO = 1 W 0.2% Vn Output integrated noise (rms) A-weighted 56 μV PO = 0.25 W, f = 1kHz (BD Mode) –82 dB Crosstalk PO = 0.25 W, f = 1kHz (AD Mode) -69 dB A-weighted, f = 1 kHz, maximum power at SNR Signal-to-noise ratio (1) 106 dB THD < 1% (1) SNR is calculated relative to 0-dBFS input level. 10 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A th1 t su1 t (edge) t su2 th2 SCLK (Input) LRCLK (Input) SDIN T0026-04 t r t f TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 SERIAL AUDIO PORTS SLAVE MODE over recommended operating conditions (unless otherwise noted) TEST PARAMETER MIN TYP MAX UNIT CONDITIONS fSCLKIN Frequency, SCLK 32 × fS, 48 × fS, 64 × fS CL = 30 pF 1.024 12.288 MHz tsu1 Setup time, LRCLK to SCLK rising edge 10 ns th1 Hold time, LRCLK from SCLK rising edge 10 ns tsu2 Setup time, SDIN to SCLK rising edge 10 ns th2 Hold time, SDIN from SCLK rising edge 10 ns LRCLK frequency 8 48 48 kHz SCLK duty cycle 40% 50% 60% LRCLK duty cycle 40% 50% 60% SCLK SCLK rising edges between LRCLK rising edges 32 64 edges t(edge) SCLK LRCLK clock edge with respect to the falling edge of SCLK –1/4 1/4 period tr / ns Rise/fall time for SCLK/LRCLK 8 tf(SCLK/LRCLK) Figure 2. Slave Mode Serial Data Interface Timing Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TAS5707 TAS5707A SCL SDA tw(H) tw(L) t r t f t su1 th1 T0027-01 SCL SDA th2 t (buf) t su2 t su3 Start Condition Stop Condition T0028-01 TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com I 2C SERIAL CONTROL PORT OPERATION Timing characteristics for I 2C Interface signals over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT fSCL Frequency, SCL No wait states 400 kHz tw(H) Pulse duration, SCL high 0.6 μs tw(L) Pulse duration, SCL low 1.3 μs tr Rise time, SCL and SDA 300 ns tf Fall time, SCL and SDA 300 ns tsu1 Setup time, SDA to SCL 100 ns th1 Hold time, SCL to SDA 0 ns t(buf) Bus free time between stop and start condition 1.3 μs tsu2 Setup time, SCL to start condition 0.6 μs th2 Hold time, start condition to SCL 0.6 μs tsu3 Setup time, SCL to stop condition 0.6 μs CL Load capacitance for each bus line 400 pF Figure 3. SCL and SDA Timing Figure 4. Start and Stop Conditions Timing 12 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A tw(RESET) RESET td(I2C_ready) System Initialization. Enable via I C. 2 T0421-01 I C Active 2 I C Active 2 f − Frequency − Hz 20 PVDD = 18 V RL = 8 Ω 100 1k 10k THD+N − Total Harmonic Distortion + Noise − % 20k G001 P = 1 W P = 5 W 0.001 0.01 10 0.1 1 f − Frequency − Hz 20 PVDD = 12 V RL = 8 Ω 100 1k 10k THD+N − Total Harmonic Distortion + Noise − % 20k G002 P = 2.5 W 0.001 0.01 10 0.1 1 P = 0.5 W TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 RESET TIMING (RESET) Control signal parameters over recommended operating conditions (unless otherwise noted). Please refer to Recommended Use Model section on usage of all terminals. PARAMETER MIN TYP MAX UNIT tw(RESET) Pulse duration, RESET active 100 us td(I2C_ready) Time to enable I 2C 13.5 ms NOTE: On power up, it is recommended that the TAS5707 RESET be held LOW for at least 100 μs after DVDD has reached 3.0 V NOTE: If the RESET is asserted LOW while PDN is LOW, then the RESET must continue to be held LOW for at least 100 μs after PDN is deasserted (HIGH). Figure 5. Reset Timing TYPICAL CHARACTERISTICS, BTL CONFIGURATION TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE vs vs FREQUENCY FREQUENCY Figure 6. Figure 7. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): TAS5707 TAS5707A f − Frequency − Hz 20 PVDD = 8 V RL = 8 Ω 100 1k 10k THD+N − Total Harmonic Distortion + Noise − % 20k G003 P = 0.5 W P = 1 W 0.001 0.01 10 0.1 1 P = 2.5 W PO − Output Power − W 0.01 PVDD = 18 V RL = 8 Ω 0.1 1 10 THD+N − Total Harmonic Distortion + Noise − % 0.001 0.01 10 40 0.1 G004 1 f = 20 Hz f = 1 kHz f = 10 kHz PO − Output Power − W 0.01 PVDD = 12 V RL = 8 Ω 0.1 1 10 THD+N − Total Harmonic Distortion + Noise − % 0.001 0.01 10 40 0.1 G005 1 f = 20 Hz f = 1 kHz f = 10 kHz PO − Output Power − W 0.01 PVDD = 8 V RL = 8 Ω 0.1 1 10 THD+N − Total Harmonic Distortion + Noise − % 0.001 0.01 10 40 0.1 G006 1 f = 20 Hz f = 1 kHz f = 10 kHz TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS, BTL CONFIGURATION (continued) TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE vs vs FREQUENCY OUTPUT POWER Figure 8. Figure 9. TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE vs vs OUTPUT POWER OUTPUT POWER Figure 10. Figure 11. 14 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A PVDD − Supply Voltage − V 2 4 6 8 10 12 14 16 18 20 8 9 10 11 12 13 14 15 16 17 18 PO − Output Power − W G010 RL = 8 Ω THD+N = 1% THD+N = 10% PO − Output Power (Per Channel) − W 0 10 20 30 40 50 60 70 80 90 100 0 4 8 12 16 20 24 28 32 36 40 Efficiency − % G012 PVDD = 12 V PVDD = 18 V RL = 8 Ω PVDD = 8 V −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 f − Frequency − Hz Crosstalk − dB G013 20 100 1k 10k 20k Left to Right Right to Left PO = 0.25 W PVDD = 18 V RL = 8 Ω −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 f − Frequency − Hz Crosstalk − dB G014 20 100 1k 10k 20k Left to Right Right to Left PO = 0.25 W PVDD = 12 V RL = 8 Ω TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS, BTL CONFIGURATION (continued) OUTPUT POWER EFFICIENCY vs vs SUPPLY VOLTAGE OUTPUT POWER Figure 12. Figure 13. CROSSTALK CROSSTALK vs vs FREQUENCY FREQUENCY Figure 14. Figure 15. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Link(s): TAS5707 TAS5707A −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 f − Frequency − Hz Crosstalk − dB G015 20 100 1k 10k 20k Left to Right Right to Left PO = 0.25 W PVDD = 8 V RL = 8 Ω TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS, BTL CONFIGURATION (continued) CROSSTALK vs FREQUENCY Figure 16. 16 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 DETAILED DESCRIPTION POWER SUPPLY To facilitate system design, the TAS5707 needs only a 3.3-V supply in addition to the (typical) 18-V power-stage supply. An internal voltage regulator provides suitable voltage levels for the gate drive circuitry. Additionally, all circuitry requiring a floating voltage supply, e.g., the high-side gate drive, is accommodated by built-in bootstrap circuitry requiring only a few external capacitors. In order to provide good electrical and acoustical characteristics, the PWM signal path for the output stage is designed as identical, independent half-bridges. For this reason, each half-bridge has separate bootstrap pins (BST_X), and power-stage supply pins (PVDD_X). The gate drive voltages (GVDD_AB and GVDD_CD) are derived from the PVDD voltage. Special attention should be paid to placing all decoupling capacitors as close to their associated pins as possible. In general, inductance between the power-supply pins and decoupling capacitors must be avoided. For a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin (BST_X) to the power-stage output pin (OUT_X). When the power-stage output is low, the bootstrap capacitor is charged through an internal diode connected between the gate-drive regulator output pin (GVDD_X) and the bootstrap pin. When the power-stage output is high, the bootstrap capacitor potential is shifted above the output potential and thus provides a suitable voltage supply for the high-side gate driver. In an application with PWM switching frequencies in the range from 352 kHz to 384 kHz, it is recommended to use 33-nF ceramic capacitors, size 0603 or 0805, for the bootstrap supply. These 33-nF capacitors ensure sufficient energy storage, even during minimal PWM duty cycles, to keep the high-side power stage FET (LDMOS) fully turned on during the remaining part of the PWM cycle. Special attention should be paid to the power-stage power supply; this includes component selection, PCB placement, and routing. As indicated, each half-bridge has independent power-stage supply pins (PVDD_X). For optimal electrical performance, EMI compliance, and system reliability, it is important that each PVDD_X pin is decoupled with a 100-nF ceramic capacitor placed as close as possible to each supply pin. The TAS5707 is fully protected against erroneous power-stage turnon due to parasitic gate charging. ERROR REPORTING Any fault resulting in device shutdown is signaled by the FAULT pin going low (see Table 1). A sticky version of this pin is available on D1 of register 0X02. Table 1. FAULT Output States FAULT DESCRIPTION 0 Overcurrent (OC) or undervoltage (UVP) error or overtemperature error (OTE) or over voltage ERROR 1 No faults (normal operation) DEVICE PROTECTION SYSTEM Overcurrent (OC) Protection With Current Limiting The device has independent, fast-reacting current detectors on all high-side and low-side power-stage FETs. The detector outputs are closely monitored by two protection systems. The first protection system controls the power stage in order to prevent the output current further increasing, i.e., it performs a cycle-by-cycle current-limiting function, rather than prematurely shutting down during combinations of high-level music transients and extreme speaker load impedance drops. If the high-current condition situation persists, i.e., the power stage is being overloaded, a second protection system triggers a latching shutdown, resulting in the power stage being set in the high-impedance (Hi-Z) state. The device returns to normal operation once the fault condition (i.e., a short circuit on the output) is removed. Current limiting and overcurrent protection are not independent for half-bridges. That is, if the bridge-tied load between half-bridges A and B causes an overcurrent fault, half-bridges A, B, C, and D are shut down. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Overtemperature Protection The TAS5707 has a two-level temperature-protection system that asserts an active-high warning signal (OTW) when the device junction temperature exceeds 125°C (nominal) and, if the device junction temperature exceeds 150°C (nominal), the device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-impedance (Hi-Z) state and FAULT being asserted low. The TAS5707 recovers from shutdown automatically once the temperature drops approximately 30°C. The overtemperature warning (OTW) is disabled once the temperature drops approximately 25°C. Undervoltage Protection (UVP) and Power-On Reset (POR) The UVP and POR circuits of the TAS5707 fully protect the device in any power-up/down and brownout situation. While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are fully operational when the PVDD and AVDD supply voltages reach 7.6 V and 2.7 V, respectively. Although PVDD and AVDD are independently monitored, a supply voltage drop below the UVP threshold on AVDD or either PVDD pin results in all half-bridge outputs immediately being set in the high-impedance (Hi-Z) state and FAULT being asserted low. SSTIMER FUNCTIONALITY The SSTIMER pin uses a capacitor connected between this pin and ground to control the output duty cycle when exiting all-channel shutdown. The capacitor on the SSTIMER pin is slowly charged through an internal current source, and the charge time determines the rate at which the output transitions from a near zero duty cycle to the desired duty cycle. This allows for a smooth transition that minimizes audible pops and clicks. When the part is shutdown the drivers are tristated and transition slowly down through a 3K resistor, similarly minimizing pops and clicks. The shutdown transition time is independent of SSTIMER pin capacitance. Larger capacitors will increase the start-up time, while capacitors smaller than 2.2 nF will decrease the start-up time. The SSTIMER pin should be left floating for BD modulation. CLOCK, AUTO DETECTION, AND PLL The TAS5707 is a slave device. It accepts MCLK, SCLK, and LRCLK. The digital audio processor (DAP) supports all the sample rates and MCLK rates that are defined in the clock control register . The TAS5707 checks to verify that SCLK is a specific value of 32 fS, 48 fS, or 64 fS. The DAP only supports a 1 × fS LRCLK. The timing relationship of these clocks to SDIN is shown in subsequent sections. The clock section uses MCLK or the internal oscillator clock (when MCLK is unstable, out of range, or absent) to produce the internal clock (DCLK) running at 512 time the PWM switching frequency. The DAP can autodetect and set the internal clock control logic to the appropriate settings for all supported clock rates as defined in the clock control register. TAS5707 has robust clock error handling that uses the bulit-in trimmed oscillator clock to quickly detect changes/errors. Once the system detects a clock change/error, it will mute the audio (through a single step mute) and then force PLL to limp using the internal oscillator as a reference clock. Once the clocks are stable, the system will auto detect the new rate and revert to normal operation. During this process, the default volume will be restored in a single step (also called hard unmute). The ramp process can be programmed to ramp back slowly (also called soft unmute) as defined in volume register (0X0E). SERIAL DATA INTERFACE Serial data is input on SDIN. The PWM outputs are derived from SDIN. The TAS5707 DAP accepts serial data in 16-, 20-, or 24-bit left-justified, right-justified, and I 2S serial data formats. PWM Section The TAS5707 DAP device uses noise-shaping and sophisticated non-linear correction algorithms to achieve high power efficiency and high-performance digital audio reproduction. The DAP uses a fourth-order noise shaper to increase dynamic range and SNR in the audio band. The PWM section accepts 24-bit PCM data from the DAP and outputs two BTL PWM audio output channels. 18 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A 23 22 SCLK 32 Clks LRCLK (Note Reversed Phase) Left Channel 24-Bit Mode 1 19 18 20-Bit Mode 16-Bit Mode 15 14 MSB LSB 32 Clks Right Channel 2-Channel I S (Philips Format) Stereo Input 2 T0034-01 9 8 5 4 1 0 0 5 4 1 0 23 22 1 19 18 15 14 MSB LSB 9 8 5 4 1 0 0 5 4 1 0 SCLK TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 The PWM section has individual channel dc blocking filters that can be enabled and disabled. The filter cutoff frequency is less than 1 Hz. Individual channel de-emphasis filters for 44.1- and 48-kHz are included and can be enabled and disabled. Finally, the PWM section has an adjustable maximum modulation limit of 93.8% to 99.2%. For detailed description of using audio processing features like DRC and EQ, please refer to User's Guide and TAS570X GDE software development tool documentation. Also refer to GDE software development tool for device data path. I 2C COMPATIBLE SERIAL CONTROL INTERFACE The TAS5707 DAP has an I 2C serial control slave interface to receive commands from a system controller. The serial control interface supports both normal-speed (100-kHz) and high-speed (400-kHz) operations without wait states. As an added feature, this interface operates even if MCLK is absent. The serial control interface supports both single-byte and multi-byte read and write operations for status registers and the general control registers associated with the PWM. SERIAL INTERFACE CONTROL AND TIMING I 2S Timing I 2S timing uses LRCLK to define when the data being transmitted is for the left channel and when it is for the right channel. LRCLK is low for the left channel and high for the right channel. A bit clock running at 32, 48, or 64 × fS is used to clock in the data. There is a delay of one bit clock from the time the LRCLK signal changes state to the first bit of data on the data lines. The data is written MSB first and is valid on the rising edge of bit clock. The DAP masks unused trailing data bit positions. NOTE: All data presented in 2s-complement form with MSB first. Figure 17. I 2S 64-fS Format Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link(s): TAS5707 TAS5707A 23 22 SCLK 24 Clks LRCLK Left Channel 24-Bit Mode 1 19 18 20-Bit Mode 16-Bit Mode 15 14 MSB LSB 24 Clks Right Channel 2-Channel I S (Philips Format) Stereo Input/Output (24-Bit Transfer Word Size) 2 T0092-01 17 16 9 8 5 4 3 2 1 0 0 13 12 5 4 9 8 1 0 23 22 SCLK 1 19 18 15 14 MSB LSB 17 16 9 8 5 4 3 2 13 12 5 4 1 0 9 8 1 0 SCLK 16 Clks LRCLK Left Channel 16-Bit Mode 15 14 1 15 14 1 MSB LSB 16 Clks Right Channel 2-Channel I S (Philips Format) Stereo Input 2 T0266-01 13 12 11 10 9 8 5 4 3 2 0 13 12 11 10 9 8 5 4 3 2 SCLK MSB LSB TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com NOTE: All data presented in 2s-complement form with MSB first. Figure 18. I 2S 48-fS Format NOTE: All data presented in 2s-complement form with MSB first. Figure 19. I 2S 32-fS Format 20 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A 23 22 SCLK 32 Clks LRCLK Left Channel 24-Bit Mode 1 19 18 20-Bit Mode 16-Bit Mode 15 14 MSB LSB 32 Clks Right Channel 2-Channel Left-Justified Stereo Input T0034-02 9 8 5 4 5 4 1 1 0 0 0 23 22 1 19 18 15 14 MSB LSB 9 8 5 4 5 4 1 1 0 0 0 SCLK TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Left-Justified Left-justified (LJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when it is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 32, 48, or 64 × fS is used to clock in the data. The first bit of data appears on the data lines at the same time LRCLK toggles. The data is written MSB first and is valid on the rising edge of the bit clock. The DAP masks unused trailing data bit positions. NOTE: All data presented in 2s-complement form with MSB first. Figure 20. Left-Justified 64-fS Format Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Link(s): TAS5707 TAS5707A 23 22 SCLK 24 Clks LRCLK Left Channel 24-Bit Mode 1 19 18 20-Bit Mode 16-Bit Mode 15 14 MSB LSB 24 Clks Right Channel 2-Channel Left-Justified Stereo Input (24-Bit Transfer Word Size) T0092-02 17 16 9 8 5 4 13 12 5 4 1 9 8 1 0 0 0 21 17 13 23 22 SCLK 1 19 18 15 14 MSB LSB 17 16 9 8 5 4 13 12 5 4 1 9 8 1 0 0 0 21 17 13 SCLK 16 Clks LRCLK Left Channel 16-Bit Mode 15 14 1 15 14 1 MSB LSB 16 Clks Right Channel 2-Channel Left-Justified Stereo Input T0266-02 13 12 11 10 9 8 5 4 3 2 0 13 12 11 10 9 8 5 4 3 2 0 SCLK MSB LSB TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com NOTE: All data presented in 2s-complement form with MSB first. Figure 21. Left-Justified 48-fS Format NOTE: All data presented in 2s-complement form with MSB first. Figure 22. Left-Justified 32-fS Format 22 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A 23 22 SCLK 32 Clks LRCLK Left Channel 24-Bit Mode 1 20-Bit Mode 16-Bit Mode 15 14 MSB LSB SCLK 32 Clks Right Channel 2-Channel Right-Justified (Sony Format) Stereo Input T0034-03 19 18 19 18 1 1 0 0 0 15 14 15 14 23 22 1 15 14 MSB LSB 19 18 19 18 1 1 0 0 0 15 14 15 14 TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Right-Justified Right-justified (RJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when it is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 32, 48, or 64 × fS is used to clock in the data. The first bit of data appears on the data 8 bit-clock periods (for 24-bit data) after LRCLK toggles. In RJ mode the LSB of data is always clocked by the last bit clock before LRCLK transitions. The data is written MSB first and is valid on the rising edge of bit clock. The DAP masks unused leading data bit positions. Figure 23. Right Justified 64-fS Format Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link(s): TAS5707 TAS5707A 23 22 SCLK 24 Clks LRCLK Left Channel 24-Bit Mode 1 20-Bit Mode 16-Bit Mode 15 14 MSB LSB SCLK 24 Clks Right Channel MSB 2-Channel Right-Justified Stereo Input (24-Bit Transfer Word Size) T0092-03 19 18 5 19 18 5 1 5 1 0 0 0 2 2 2 6 6 6 15 14 15 14 23 22 1 15 14 19 18 5 19 18 5 1 5 1 0 0 0 2 2 2 6 6 6 15 14 15 14 LSB TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Figure 24. Right Justified 48-fS Format Figure 25. Right Justified 32-fS Format 24 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A 7-Bit Slave Address R/ W A 8-Bit Register Address (N) 8-Bit Register Data For Address (N) Start Stop SDA SCL 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 A 8-Bit Register Data For Address (N) A A T0035-01 TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 I 2C SERIAL CONTROL INTERFACE The TAS5707 DAP has a bidirectional I 2C interface that compatible with the I 2C (Inter IC) bus protocol and supports both 100-kHz and 400-kHz data transfer rates for single and multiple byte write and read operations. This is a slave only device that does not support a multimaster bus environment or wait state insertion. The control interface is used to program the registers of the device and to read device status. The DAP supports the standard-mode I 2C bus operation (100 kHz maximum) and the fast I 2C bus operation (400 kHz maximum). The DAP performs all I 2C operations without I 2C wait cycles. General I 2C Operation The I 2C bus employs two signals; SDA (data) and SCL (clock), to communicate between integrated circuits in a system. Data is transferred on the bus serially one bit at a time. The address and data can be transferred in byte (8-bit) format, with the most significant bit (MSB) transferred first. In addition, each byte transferred on the bus is acknowledged by the receiving device with an acknowledge bit. Each transfer operation begins with the master device driving a start condition on the bus and ends with the master device driving a stop condition on the bus. The bus uses transitions on the data pin (SDA) while the clock is high to indicate a start and stop conditions. A high-to-low transition on SDA indicates a start and a low-to-high transition indicates a stop. Normal data bit transitions must occur within the low time of the clock period. These conditions are shown in Figure 26. The master generates the 7-bit slave address and the read/write (R/W) bit to open communication with another device and then waits for an acknowledge condition. The TAS5707 holds SDA low during the acknowledge clock period to indicate an acknowledgment. When this occurs, the master transmits the next byte of the sequence. Each device is addressed by a unique 7-bit slave address plus R/W bit (1 byte). All compatible devices share the same signals via a bidirectional bus using a wired-AND connection. An external pullup resistor must be used for the SDA and SCL signals to set the high level for the bus. Figure 26. Typical I 2C Sequence There is no limit on the number of bytes that can be transmitted between start and stop conditions. When the last word transfers, the master generates a stop condition to release the bus. A generic data transfer sequence is shown in Figure 26. The 7-bit address for TAS5707 is 0011 011 (0x36). The 7-bit address for the TAS5707A is 0011 101 (0x3A). The TAS5707 address can be changed from 0x36 to 0x38 by writing 0x38 to device slave address register 0xF9. The TAS5707A address can be changed from 0x3A to 0x3C by writing 0x3C to device slave address register 0xF9. Single- and Multiple-Byte Transfers The serial control interface supports both single-byte and multiple-byte read/write operations for subaddresses 0x00 to 0x1F. However, for the subaddresses 0x20 to 0xFF, the serial control interface supports only multiple-byte read/write operations (in multiples of 4 bytes). During multiple-byte read operations, the DAP responds with data, a byte at a time, starting at the subaddress assigned, as long as the master device continues to respond with acknowledges. If a particular subaddress does not contain 32 bits, the unused bits are read as logic 0. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Link(s): TAS5707 TAS5707A A6 A5 A4 A3 A2 A1 A0 R/W ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge I C Device Address and 2 Read/Write Bit Subaddress Data Byte T0036-01 D7 D0 ACK Stop Condition Acknowledge I C Device Address and 2 Read/Write Bit Subaddress Last Data Byte A6 A5 A1 A0 R/W ACK A7 A5 A1 A0 ACK D7 ACK Start Condition Acknowledge Acknowledge Acknowledge First Data Byte A6 A4 A3 Other Data Bytes ACK Acknowledge D0 D7 D0 T0036-02 TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com During multiple-byte write operations, the DAP compares the number of bytes transmitted to the number of bytes that are required for each specific subaddress. For example, if a write command is received for a biquad subaddress, the DAP expects to receive five 32-bit words. If fewer than five 32-bit data words have been received when a stop command (or another start command) is received, the data received is discarded. Supplying a subaddress for each subaddress transaction is referred to as random I 2C addressing. The TAS5707 also supports sequential I 2C addressing. For write transactions, if a subaddress is issued followed by data for that subaddress and the 15 subaddresses that follow, a sequential I 2C write transaction has taken place, and the data for all 16 subaddresses is successfully received by the TAS5707. For I 2C sequential write transactions, the subaddress then serves as the start address, and the amount of data subsequently transmitted, before a stop or start is transmitted, determines how many subaddresses are written. As was true for random addressing, sequential addressing requires that a complete set of data be transmitted. If only a partial set of data is written to the last subaddress, the data for the last subaddress is discarded. However, all other data written is accepted; only the incomplete data is discarded. Single-Byte Write As shown in Figure 27, a single-byte data write transfer begins with the master device transmitting a start condition followed by the I 2C device address and the read/write bit. The read/write bit determines the direction of the data transfer. For a write data transfer, the read/write bit will be a 0. After receiving the correct I 2C device address and the read/write bit, the DAP responds with an acknowledge bit. Next, the master transmits the address byte or bytes corresponding to the TAS5707 internal memory address being accessed. After receiving the address byte, the TAS5707 again responds with an acknowledge bit. Next, the master device transmits the data byte to be written to the memory address being accessed. After receiving the data byte, the TAS5707 again responds with an acknowledge bit. Finally, the master device transmits a stop condition to complete the single-byte data write transfer. Figure 27. Single-Byte Write Transfer Multiple-Byte Write A multiple-byte data write transfer is identical to a single-byte data write transfer except that multiple data bytes are transmitted by the master device to the DAP as shown in Figure 28. After receiving each data byte, the TAS5707 responds with an acknowledge bit. Figure 28. Multiple-Byte Write Transfer 26 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A A6 A5 A0 R/W ACK A7 A6 A5 A4 A0 ACK A6 A5 A0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge I C Device Address and 2 Read/Write Bit Subaddress Data Byte D7 D6 D1 D0 ACK I C Device Address and Read/Write Bit 2 Not Acknowledge A1 A1 R/W Repeat Start Condition T0036-03 A6 A0 ACK Acknowledge I C Device Address and Read/Write Bit 2 A6 A0 R/W ACK A0 ACK R/W D7 D0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge Last Data Byte ACK First Data Byte Repeat Start Condition Not Acknowledge I C Device Address and Read/Write Bit 2 Subaddress Other Data Bytes A7 A6 A5 D7 D0 ACK Acknowledge D7 D0 T0036-04 TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Single-Byte Read As shown in Figure 29, a single-byte data read transfer begins with the master device transmitting a start condition followed by the I 2C device address and the read/write bit. For the data read transfer, both a write followed by a read are actually done. Initially, a write is done to transfer the address byte or bytes of the internal memory address to be read. As a result, the read/write bit becomes a 0. After receiving the TAS5707 address and the read/write bit, TAS5707 responds with an acknowledge bit. In addition, after sending the internal memory address byte or bytes, the master device transmits another start condition followed by the TAS5707 address and the read/write bit again. This time the read/write bit becomes a 1, indicating a read transfer. After receiving the address and the read/write bit, the TAS5707 again responds with an acknowledge bit. Next, the TAS5707 transmits the data byte from the memory address being read. After receiving the data byte, the master device transmits a not acknowledge followed by a stop condition to complete the single byte data read transfer. Figure 29. Single-Byte Read Transfer Multiple-Byte Read A multiple-byte data read transfer is identical to a single-byte data read transfer except that multiple data bytes are transmitted by the TAS5707 to the master device as shown in Figure 30. Except for the last data byte, the master device responds with an acknowledge bit after receiving each data byte. Figure 30. Multiple Byte Read Transfer Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 27 Product Folder Link(s): TAS5707 TAS5707A Output Level (dB) Input Level (dB) T O K M0091-02 1:1 Transfer Function Implemented Transfer Function S Z –1 Alpha Filter Structure w a B0265-01 Energy Filter a w, T, K, O a w a , a d d / , a w DRC 0x3A 0x40, 0x41, 0x42 0x3B / 0x3C Compression Control Attack and Decay Filters Audio Input DRC Coefficient NOTE: w a = 1 – TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Dynamic Range Control (DRC) The DRC scheme has a single threshold, offset, and slope (all programmable). There is one ganged DRC for the left/right channels. The DRC input/output diagram is shown in Figure 31. Professional-quality dynamic range compression automatically adjusts volume to flatten volume level. • One DRC for left/right • The DRC has adjustable threshold, offset, and compression levels • Programmable energy, attack, and decay time constants • Transparent compression: compressors can attack fast enough to avoid apparent clipping before engaging, and decay times can be set slow enough to avoid pumping. Figure 31. Dynamic Range Control Figure 32. DRC Structure 28 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A 2 Bit –23 S_xx.xxxx_xxxx_xxxx_xxxx_xxxx_xxx 2 Bit –5 2 Bit –1 2 Bit 0 Sign Bit 2 Bit 1 M0125-01 TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 BANK SWITCHING The TAS5707 uses an approach called bank switching together with automatic sample-rate detection. All processing features that must be changed for different sample rates are stored internally in three banks. The user can program which sample rates map to each bank. By default, bank 1 is used in 32kHz mode, bank 2 is used in 44.1/48 kHz mode, and bank 3 is used for all other rates. Combined with the clock-rate autodetection feature, bank switching allows the TAS5707 to detect automatically a change in the input sample rate and switch to the appropriate bank without any MCU intervention. An external controller configures bankable locations (0x29-0x36 and 0x3A-0x3C) for all three banks during the initialization sequence. If auto bank switching is enabled (register 0x50, bits 2:0) , then the TAS5707 automatically swaps the coefficients for subsequent sample rate changes, avoiding the need for any external controller intervention for a sample rate change. By default, bits 2:0 have the value 000; indicating that bank switching is disabled. In that state, updates to bankable locations take immediate effect. A write to register 0x50 with bits 2:0 being 001, 010, or 011 brings the system into the coefficient-bank-update state update bank1, update bank2, or update bank3, respectively. Any subsequent write to bankable locations updates the coefficient banks stored outside the DAP. After updating all the three banks, the system controller should issue a write to register 0x50 with bits 2:0 being 100; this changes the system state to automatic bank switching mode. In automatic bank switching mode, the TAS5707 automatically swaps banks based on the sample rate. Command sequences for updating DAP coefficients can be summarized as follows: 1. Bank switching disabled (default): DAP coefficient writes take immediate effect and are not influenced by subsequent sample rate changes. OR Bank switching enabled: (a) Update bank-1 mode: Write "001" to bits 2:0 of reg 0x50. Load the 32 kHz coefficients. (b) Update bank-2 mode: Write "010" to bits 2:0 of reg 0x50. Load the 48 kHz coefficients. (c) Update bank-3 mode: Write "011" to bits 2:0 of reg 0x50. Load the other coefficients. (d) Enable automatic bank switching by writing "100" to bits 2:0 of reg 0x50. 26-Bit 3.23 Number Format All mixer gain coefficients are 26-bit coefficients using a 3.23 number format. Numbers formatted as 3.23 numbers means that there are 3 bits to the left of the decimal point and 23 bits to the right of the decimal point. This is shown in Figure 33 . Figure 33. 3.23 Format Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 29 Product Folder Link(s): TAS5707 TAS5707A (1 or 0) 2 + ´ 1 (1 or 0) 2 + (1 or 0) 2 + ....... (1 or 0) 2 + ....... (1 or 0) 2 ´ ´ ´ ´ 0 –1 –4 –23 2 Bit 1 2 Bit 0 2 Bit –1 2 Bit –4 2 Bit –23 M0126-01 u Coefficient Digit 8 u u u u u S x Coefficient Digit 7 x. x x x Coefficient Digit 6 x x x x Coefficient Digit 5 x x x x Coefficient Digit 4 x x x x Coefficient Digit 3 x x x x Coefficient Digit 2 x x x x Coefficient Digit 1 Fraction Digit 5 Fraction Digit 4 Fraction Digit 3 Fraction Digit 2 Fraction Integer Digit 1 Digit 1 Sign Bit Fraction Digit 6 u = unused or don’t care bits Digit = hexadecimal digit M0127-01 0 TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com The decimal value of a 3.23 format number can be found by following the weighting shown in Figure 33. If the most significant bit is logic 0, the number is a positive number, and the weighting shown yields the correct number. If the most significant bit is a logic 1, then the number is a negative number. In this case every bit must be inverted, a 1 added to the result, and then the weighting shown in Figure 34 applied to obtain the magnitude of the negative number. Figure 34. Conversion Weighting Factors—3.23 Format to Floating Point Gain coefficients, entered via the I 2C bus, must be entered as 32-bit binary numbers. The format of the 32-bit number (4-byte or 8-digit hexadecimal number) is shown in Figure 35 Figure 35. Alignment of 3.23 Coefficient in 32-Bit I 2C Word Table 2. Sample Calculation for 3.23 Format db Linear Decimal Hex (3.23 Format) 0 1 8388608 00800000 5 1.7782794 14917288 00E39EA8 –5 0.5623413 4717260 0047FACC X L = 10(X/20) D = 8388608 × L H = dec2hex (D, 8) Table 3. Sample Calculation for 9.17 Format db Linear Decimal Hex (9.17 Format) 0 1 131072 20000 5 1.77 231997 38A3D –5 0.56 73400 11EB8 X L = 10(X/20) D = 131072 × L H = dec2hex (D, 8) 30 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A Initialization 50 ms 50 ms 2 sm 2 sm 2 sm 2 sm AVDD/DVDD PDN PVDD RESET T0419-01 3 V 3 V 0 ns 0 ns 0 ns 10 sm 100 sμ 13.5 ms 100 sm 6 V 6 V 8 V 8 V 2I S MCLK LRCLK SCLK SDIN 2I C SCL SDA Trim Volume and Mute Commands Clock Changes/Errors OK Stable and Valid Clocks Stable and Valid Clocks Exit SD Enter SD DAP Config Other Config 1 ms + 1.3 tstart(2) 1 ms + 1.3 tstart(2) tPLL(1) tPLL(1) 1 ms + 1.3 tstop(2) 0 ns Normal Operation Shutdown Powerdown (1) t has to be greater than 240 ms + 1.3 t . This constraint only applies to the first trim command following AVDD/DVDD power-up. It does not apply to trim commands following subsequent resets. (2) t /t = PWM start/stop time as defined in register 0X1A PLL start start stop TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Recommended Use Model Figure 36. Recommended Command Sequence Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Link(s): TAS5707 TAS5707A 2 sm 2 sm 2 sm AVDD/DVDD PDN PVDD RESET T0420-01 3 V 8 V 6 V I S2 I C2 2 ms 0 ns 0 ns 0 ns 0 ns TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Figure 37. Power Loss Sequence Recommended Command Sequences The DAP has two groups of commands. One set is for configuration and is intended for use only during initialization. The other set has built-in click and pop protection and may be used during normal operation while audio is streaming. The following supported command sequences illustrate how to initialize, operate, and shutdown the device. Initialization Sequence Use the following sequence to power-up and initialize the device: 1. Hold all digital inputs low and ramp up AVDD/DVDD to at least 3V. 2. Initialize digital inputs and PVDD supply as follows: • Drive RESETZ=0, PDNZ=1, and other digital inputs to their desired state while ensuring that all are never more than 2.5V above AVDD/DVDD. Provide stable and valid I2S clocks (MCLK, LRCLK, and SCLK). Wait at least 100us, drive RESETZ=1, and wait at least another 13.5ms. • Ramp up PVDD to at least 8V while ensuring that it remains below 6V for at least 100us after AVDD/DVDD reaches 3V. Then wait at least another 10us. 3. Trim oscillator (write 0x00 to register 0x1B) and wait at least 50ms. 4. Configure the DAP via I 2C (see Users's Guide for typical values): Biquads (0x29-36) DRC parameters (0x3A-3C, 0x40-42, and 0x46) Bank select (0x50) 5. Configure remaining registers 6. Exit shutdown (sequence defined below). 32 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Normal Operation The following are the only events supported during normal operation: (a) Writes to master/channel volume registers (b) Writes to soft mute register (c) Enter and exit shutdown (sequence defined below) (d) Clock errors and rate changes Note: Events (c) and (d) are not supported for 240ms+1.3*Tstart after trim following AVDD/DVDD powerup ramp (where Tstart is specified by register 0x1A). Shutdown Sequence Enter: 1. Ensure I2S clocks have been stable and valid for at least 50ms. 2. Write 0x40 to register 0x05. 3. Wait at least 1ms+1.3*Tstop (where Tstop is specified by register 0x1A). 4. Once in shutdown, stable clocks are not required while device remains idle. 5. If desired, reconfigure by ensuring that clocks have been stable and valid for at least 50ms before returning to step 4 of initialization sequence. Exit: 1. Ensure I2S clocks have been stable and valid for at least 50ms. 2. Write 0x00 to register 0x05 (exit shutdown command may not be serviced for as much as 240ms after trim following AVDD/DVDD powerup ramp). 3. Wait at least 1ms+1.3*Tstart (where Tstart is specified by register 0x1A). 4. Proceed with normal operation. Powerdown Sequence Use the following sequence to powerdown the device and its supplies: 1. If time permits, enter shutdown (sequence defined above); else, in case of sudden power loss, assert PDNZ=0 and wait at least 2ms. 2. Assert RESETZ=0. 3. Drive digital inputs low and ramp down PVDD supply as follows: • Drive all digital inputs low after RESETZ has been low for at least 2us. • Ramp down PVDD while ensuring that it remains above 8V until RESETZ has been low for at least 2us. 4. Ramp down AVDD/DVDD while ensuring that it remains above 3V until PVDD is below 6V and that it is never more than 2.5V below the digital inputs. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 33 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Table 4. Serial Control Interface Register Summary NO. OF INITIALIZATION SUBADDRESS REGISTER NAME CONTENTS BYTES VALUE A u indicates unused bits. 0x00 Clock control register 1 Description shown in subsequent section 0x6C 0x01 Device ID register 1 Description shown in subsequent section 0x70 0x02 Error status register 1 Description shown in subsequent section 0x00 0x03 System control register 1 1 Description shown in subsequent section 0xA0 0x04 Serial data interface 1 Description shown in subsequent section 0x05 register 0x05 System control register 2 1 Description shown in subsequent section 0x40 0x06 Soft mute register 1 Description shown in subsequent section 0x00 0x07 Master volume 1 Description shown in subsequent section 0xFF (mute) 0x08 Channel 1 vol 1 Description shown in subsequent section 0x30 (0 dB) 0x09 Channel 2 vol 1 Description shown in subsequent section 0x30 (0 dB) 0x0A Fine master volume 1 Description shown in subsequent section 0x00 (0 dB) 0x0B–0X0D 1 Reserved(1) 0x0E Volume configuration 1 Description shown in subsequent section 0x91 register 0x0F 1 Reserved(1) 0x10 Modulation limit register 1 Description shown in subsequent section 0x02 0x11 IC delay channel 1 1 Description shown in subsequent section 0xAC 0x12 IC delay channel 2 1 Description shown in subsequent section 0x54 0x13 IC delay channel 3 1 Description shown in subsequent section 0xAC 0x14 IC delay channel 4 1 Description shown in subsequent section 0x54 0x15–0x19 1 Reserved(1) 0x1A Start/stop period register 1 Description shown in subsequent section 0x0F 0x1B Oscillator trim register 1 Description shown in subsequent section 0x82 0x1C BKND_ERR register 1 Description shown in subsequent section 0x02 0x1D–0x1F 1 Reserved(1) 0x20 Input MUX register 4 Description shown in subsequent section 0x0001 7772 0x21-0X24 4 Reserved(1) 0x25 PWM MUX register 4 Description shown in subsequent section 0x0102 1345 0x26–0x28 4 Reserved(1) 0x29 ch1_bq[0] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x2A ch1_bq[1] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x2B ch1_bq[2] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 (1) Reserved registers should not be accessed. 34 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Table 4. Serial Control Interface Register Summary (continued) NO. OF INITIALIZATION SUBADDRESS REGISTER NAME CONTENTS BYTES VALUE 0x2C ch1_bq[3] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x2D ch1_bq[4] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x2E ch1_bq[5] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x2F ch1_bq[6] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x30 ch2_bq[0] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x31 ch2_bq[1] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x32 ch2_bq[2] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x33 ch2_bq[3] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x34 ch2_bq[4] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 35 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Table 4. Serial Control Interface Register Summary (continued) NO. OF INITIALIZATION SUBADDRESS REGISTER NAME CONTENTS BYTES VALUE 0x35 ch2_bq[5] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x36 ch2_bq[6] 20 u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 0x37–0x39 Reserved(2) DRC ae(3) u[31:26], ae[25:0] 0x0080 0000 0x3A 8 DRC (1 – ae) u[31:26], (1 – ae)[25:0] 0x0000 0000 DRC aa u[31:26], aa[25:0] 0x0080 0000 0x3B 8 DRC (1 – aa) u[31:26], (1 – aa)[25:0] 0x0000 0000 DRC ad u[31:26], ad[25:0] 0x0080 0000 0x3C 8 DRC (1 – ad) u[31:26], (1 – ad)[25:0] 0x0000 0000 0x3D–0x3F Reserved(2) 0x40 DRC-T 4 T[31:0] (9.23 format) 0xFDA2 1490 0x41 DRC-K 4 u[31:26], K[25:0] 0x0384 2109 0x42 DRC-O 4 u[31:26], O[25:0] 0x0008 4210 0x43–0x45 Reserved(2) 0x46 DRC control 4 Description shown in subsequent section 0x0000 0000 0x47–0x4F Reserved(2) 0x50 Bank switch control 4 Description shown in subsequent section 0x0F70 8000 0x51–0xC9 Reserved(2) 0xCA 8 Reserved(2) 0xCB–0xF8 Reserved(2) Update device address 4 New Dev Id[7:1], ZERO[0] (New Dev Id = 0x38), 0x00000036 0xF9 register (7:1) defines the new device address 0xFA-0xFF Reserved(2) (2) Reserved registers should not be accessed. (3) "ae" stands for µ of energy filter, "aa" stands for µ of attack filter and "ad" stands for µ of decay filter and 1- µ = ω. All DAP coefficients are 3.23 format unless specified otherwise. 36 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 CLOCK CONTROL REGISTER (0x00) The clocks and data rates are automatically determined by the TAS5707. The clock control register contains the auto-detected clock status. Bits D7–D5 reflect the sample rate. Bits D4–D2 reflect the MCLK frequency. The device accepts a 64-fS or 32-fS SCLK rate for all MCLK rates, but accepts a 48-fS SCLK rate for MCLK rates of 192 fS and 384 fS only. Table 5. Clock Control Register (0x00) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 0 0 – – – – – fS = 32-kHz sample rate 0 0 1 – – – – – Reserved(1) 0 1 0 – – – – – Reserved(1) 0 1 1 – – – – – fS = 44.1/48-kHz sample rate (2) 1 0 0 – – – – – fs = 16-kHz sample rate 1 0 1 – – – – – fs = 22.05/24 -kHz sample rate 1 1 0 – – – – – fs = 8-kHz sample rate 1 1 1 – – – – – fs = 11.025/12 -kHz sample rate – – – 0 0 0 – – MCLK frequency = 64 × fS (3) – – – 0 0 1 – – MCLK frequency = 128 × fS (3) – – – 0 1 0 – – MCLK frequency = 192 × fS (4) – – – 0 1 1 – – MCLK frequency = 256 × fS (2) (5) – – – 1 0 0 – – MCLK frequency = 384 × fS – – – 1 0 1 – – MCLK frequency = 512 × fS – – – 1 1 0 – – Reserved(1) – – – 1 1 1 – – Reserved(1) – – – – – – 0 – Reserved(1) – – – – – – – 0 Reserved(1) (1) Reserved registers should not be accessed. (2) Default values are in bold. (3) Only available for 44.1 kHz and 48 kHz rates. (4) Rate only available for 32/44.1/48 KHz sample rates (5) Not available at 8 kHz DEVICE ID REGISTER (0x01) The device ID register contains the ID code for the firmware revision. Table 6. General Status Register (0x01) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION X – – – – – – – Reserved – 1 1 1 0 0 0 0 Identification code Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 37 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com ERROR STATUS REGISTER (0x02) The error bits are sticky and are not cleared by the hardware. This means that the software must clear the register (write zeroes) and then read them to determine if they are persistent errors. Error Definitions: • MCLK Error : MCLK frequency is changing. The number of MCLKs per LRCLK is changing. • SCLK Error: The number of SCLKs per LRCLK is changing. • LRCLK Error: LRCLK frequency is changing. • Frame Slip: LRCLK phase is drifting with respect to internal frame sync. Table 7. Error Status Register (0x02) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 1 - – – – – – – MCLK error – 1 – – – – – – PLL autolock error – – 1 – – – – – SCLK error – – – 1 – – – – LRCLK error – – – – 1 – – – Frame slip – – – – – – 1 – Overcurrent, overtemperature, overvoltage or undervoltage error – – – – – – – 1 Overtemperature warning (sets around 125°) 0 0 0 0 0 0 0 0 No errors (1) (1) Default values are in bold. SYSTEM CONTROL REGISTER 1 (0x03) The system control register 1 has several functions: Bit D7: If 0, the dc-blocking filter for each channel is disabled. If 1, the dc-blocking filter (–3 dB cutoff <1 Hz) for each channel is enabled (default). Bit D5: If 0, use soft unmute on recovery from clock error. This is a slow recovery. Unmute takes same time as volume ramp defined in reg 0X0E. If 1, use hard unmute on recovery from clock error (default). This is a fast recovery, a single step volume ramp Bits D1–D0: Select de-emphasis Table 8. System Control Register 1 (0x03) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 – – – – – – – PWM high-pass (dc blocking) disabled 1 – – – – – – – PWM high-pass (dc blocking) enabled (1) – 0 – – – – – – Reserved (1) – – 0 – – – – – Soft unmute on recovery from clock error – – 1 – – – – – Hard unmute on recovery from clock error (1) – – – 0 – – – – Reserved (1) – – – – 0 – – – Reserved (1) – – – – – 0 – – Reserved(1) – – – – – – 0 0 No de-emphasis (1) – – – – – – 0 1 De-emphasis for fS = 32 kHz – – – – – – 1 0 Reserved – – – – – – 1 1 De-emphasis for fS = 48 kHz (1) Default values are in bold. 38 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 SERIAL DATA INTERFACE REGISTER (0x04) As shown in Table 9, the TAS5707 supports 9 serial data modes. The default is 24-bit, I 2S mode, Table 9. Serial Data Interface Control Register (0x04) Format RECEIVE SERIAL DATA WORD D7–D4 D3 D2 D1 D0 INTERFACE FORMAT LENGTH Right-justified 16 0000 0 0 0 0 Right-justified 20 0000 0 0 0 1 Right-justified 24 0000 0 0 1 0 I 2S 16 000 0 0 1 1 I 2S 20 0000 0 1 0 0 I 2S (1) 24 0000 0 1 0 1 Left-justified 16 0000 0 1 1 0 Left-justified 20 0000 0 1 1 1 Left-justified 24 0000 1 0 0 0 Reserved 0000 1 0 0 1 Reserved 0000 1 0 1 0 Reserved 0000 1 0 1 1 Reserved 0000 1 1 0 0 Reserved 0000 1 1 0 1 Reserved 0000 1 1 1 0 Reserved 0000 1 1 1 1 (1) Default values are in bold. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com SYSTEM CONTROL REGISTER 2 (0x05) When bit D6 is set low, the system exits all channel shutdown and starts playing audio; otherwise, the outputs are shut down(hard mute). Table 10. System Control Register 2 (0x05) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 – – – – – – – Reserved (1) – 1 – – – – – – Enter all channel shut down (hard mute).(1) – 0 – – – – – – Exit all-channel shutdown (normal operation) – – 0 0 0 0 0 0 Reserved (1) (1) Default values are in bold. SOFT MUTE REGISTER (0x06) Writing a 1 to any of the following bits sets the output of the respective channel to 50% duty cycle (soft mute). Table 11. Soft Mute Register (0x06) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION – – – – – – – 1 Soft mute channel 1 – – – – – – – 0 Soft unmute channel 1 – – – – – – 1 – Soft mute channel 2 – – – – – – 0 – Soft unmute channel 2 0 0 0 0 0 0 – – Reserved 40 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 VOLUME REGISTERS (0x07, 0x08, 0x09) Step size is 0.5 dB. Master volume – 0x07 (default is mute) Channel-1 volume – 0x08 (default is 0 dB) Channel-2 volume – 0x09 (default is 0 dB) Table 12. Volume Registers (0x07, 0x08, 0x09) D D D D D D D D FUNCTION 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 24 dB 0 0 1 1 0 0 0 0 0 dB (default for individual channel volume) (1) 1 1 0 0 1 1 0 1 –78.5 dB 1 1 0 0 1 1 1 0 –79.0 dB 1 1 0 0 1 1 1 1 Values between 0xCF and 0xFE are Reserved 1 1 1 1 1 1 1 1 MUTE (default for master volume) (1) Default values are in bold. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 41 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com MASTER FINE VOLUME REGISTER (0x0A) This register can be used to provide precision tuning of master volume. Table 13. Master Fine Volume Register (0x0A) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION – – – – – – 0 0 0 dB (1) – – – – – – 0 1 0.125 dB – – – – – – 1 0 0.25 dB – – – – – – 1 1 0.375 dB 1 – – – – – – – Write enable bit 0 – – – – – – – Ignore Write to register 0X0A (1) Default values are in bold. VOLUME CONFIGURATION REGISTER (0x0E) Bits Volume slew rate (Used to control volume change and MUTE ramp rates). These bits control the D2–D0: number of steps in a volume ramp.Volume steps occur at a rate that depends on the sample rate of the I2S data as follows Sample Rate (KHz) Approximate Ramp Rate 8/16/32 125 us/step 11.025/22.05/44.1 90.7 us/step 12/24/48 83.3 us/step Table 14. Volume Control Register (0x0E) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 1 0 0 1 0 – – – Reserved (1) – – – – – 0 0 0 Volume slew 512 steps (43 ms volume ramp time at 48kHz) – – – – – 0 0 1 Volume slew 1024 steps (85 ms volume ramp time at 48kHz) (1) – – – – – 0 1 0 Volume slew 2048 steps (171 ms volume ramp time at 48kHz) – – – – – 0 1 1 Volume slew 256 steps (21ms volume ramp time at 48kHz) – – – – – 1 X X Reserved (1) Default values are in bold. 42 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 MODULATION LIMIT REGISTER (0x10) The modulation limit is the maximum duty cycle of the PWM output waveform. Table 15. Modulation Limit Register (0x10) D7 D6 D5 D4 D3 D2 D1 D0 MODULATION LIMIT – – – – – 0 0 0 99.2% – – – – – 0 0 1 98.4% – – – – – 0 1 0 97.7% – – – – – 0 1 1 96.9% – – – – – 1 0 0 96.1% – – – – – 1 0 1 95.3% – – – – – 1 1 0 94.5% – – – – – 1 1 1 93.8% 0 0 0 0 0 – – – RESERVED INTERCHANNEL DELAY REGISTERS (0x11, 0x12, 0x13, and 0x14) Internal PWM channels 1, 2, 1, and 2 are mapped into registers 0x11, 0x12, 0x13, and 0x14. Table 16. Channel Interchannel Delay Register Format BITS DEFINITION D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 0 0 0 0 0 – – Minimum absolute delay, 0 DCLK cycles 0 1 1 1 1 1 – – Maximum positive delay, 31 × 4 DCLK cycles 1 0 0 0 0 0 – – Maximum negative delay, –32 × 4 DCLK cycles 0 0 RESERVED SUBADDRESS D7 D6 D5 D4 D3 D2 D1 D0 Delay = (value) × 4 DCLKs 0x11 1 0 1 0 1 1 – – Default value for channel 1 (1) 0x12 0 1 0 1 0 1 – – Default value for channel 2 (1) 0x13 1 0 1 0 1 1 – – Default value for channel 1 (1) 0x14 0 1 0 1 0 1 – – Default value for channel 2 (1) (1) Default values are in bold. ICD settings have high impact on audio performance (e.g., dynamic range, THD, crosstalk etc.) Therefore, appropriate ICD settings must be used. By default, the device has ICD settings for AD mode. If used in BD mode, then update these registers before coming out of all-channel shutdown. REGISTER AD MODE BD MODE 0x11 0xAC 0xB8 0x12 0x54 0x60 0x13 0xAC 0xA0 0x14 0x54 0x48 Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 43 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com START/STOP PERIOD REGISTER (0x1A) This register is used to control the soft-start and soft-stop period following an enter/exit all channel shut down command or change in the PDN state. This helps reduce pops and clicks at start-up and shutdown.The times are only approximate and vary depending on device activity level and I2S clock stability. Table 17. Start/Stop Period Register (0x1A) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 0 0 – – – – – Reserved – – – 0 0 – – – No 50% duty cycle start/stop period – – – 0 1 0 0 0 16.5-ms 50% duty cycle start/stop period – – – 0 1 0 0 1 23.9-ms 50% duty cycle start/stop period – – – 0 1 0 1 0 31.4-ms 50% duty cycle start/stop period – – – 0 1 0 1 1 40.4-ms 50% duty cycle start/stop period – – – 0 1 1 0 0 53.9-ms 50% duty cycle start/stop period – – – 0 1 1 0 1 70.3-ms 50% duty cycle start/stop period – – – 0 1 1 1 0 94.2-ms 50% duty cycle start/stop period – – – 0 1 1 1 1 125.7-ms 50% duty cycle start/stop period(1) – – – 1 0 0 0 0 164.6-ms 50% duty cycle start/stop period – – – 1 0 0 0 1 239.4-ms 50% duty cycle start/stop period – – – 1 0 0 1 0 314.2-ms 50% duty cycle start/stop period – – – 1 0 0 1 1 403.9-ms 50% duty cycle start/stop period – – – 1 0 1 0 0 538.6-ms 50% duty cycle start/stop period – – – 1 0 1 0 1 703.1-ms 50% duty cycle start/stop period – – – 1 0 1 1 0 942.5-ms 50% duty cycle start/stop period – – – 1 0 1 1 1 1256.6-ms 50% duty cycle start/stop period – – – 1 1 0 0 0 1728.1-ms 50% duty cycle start/stop period – – – 1 1 0 0 1 2513.6-ms 50% duty cycle start/stop period – – – 1 1 0 1 0 3299.1-ms 50% duty cycle start/stop period – – – 1 1 0 1 1 4241.7-ms 50% duty cycle start/stop period – – – 1 1 1 0 0 5655.6-ms 50% duty cycle start/stop period – – – 1 1 1 0 1 7383.7-ms 50% duty cycle start/stop period – – – 1 1 1 1 0 9897.3-ms 50% duty cycle start/stop period – – – 1 1 1 1 1 13,196.4-ms 50% duty cycle start/stop period (1) Default values are in bold. 44 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 OSCILLATOR TRIM REGISTER (0x1B) The TAS5707 PWM processor contains an internal oscillator to support autodetect of I2S clock rates. This reduces system cost because an external reference is not required. Currently, TI recommends a reference resistor value of 18.2 kΩ (1%). This should be connected between OSC_RES and DVSSO. Writing 0X00 to reg 0X1B enables the trim that was programmed at the factory. Note that trim must always be run following reset of the device. Table 18. Oscillator Trim Register (0x1B) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 1 – – – – – – – Reserved (1) – 0 – – – – – – Oscillator trim not done (read-only) (1) – 1 – – – – – – Oscillator trim done (read only) – – 0 0 0 0 – – Reserved (1) – – – – – – 0 – Select factory trim (Write a 0 to select factory trim; default is 1.) – – – – – – 1 – Factory trim disabled (1) – – – – – – – 0 Reserved (1) (1) Default values are in bold. BKND_ERR REGISTER (0x1C) When a back-end error signal is received from the internal power stage, the power stage is reset stopping all PWM activity. Subsequently, the modulator waits approximately for the time listed in Table 19 before attempting to re-start the power stage. Table 19. BKND_ERR Register (0x1C)(1) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 0 0 0 0 0 0 X Reserved – – – – 0 0 1 0 Set back-end reset period to 299 ms (2) – – – – 0 0 1 1 Set back-end reset period to 449 ms – – – – 0 1 0 0 Set back-end reset period to 598 ms – – – – 0 1 0 1 Set back-end reset period to 748 ms – – – – 0 1 1 0 Set back-end reset period to 898 ms – – – – 0 1 1 1 Set back-end reset period to 1047 ms – – – – 1 0 0 0 Set back-end reset period to 1197 ms – – – – 1 0 0 1 Set back-end reset period to 1346 ms – – – – 1 0 1 X Set back-end reset period to 1496 ms – – – – 1 1 X X Set back-end reset period to 1496 ms (1) This register can be written only with a "non-Reserved" value. Also this register can be written once after the reset. (2) Default values are in bold. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 45 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com INPUT MULTIPLEXER REGISTER (0x20) This register controls the modulation scheme (AD or BD mode) as well as the routing of I2S audio to the internal channels. Table 20. Input Multiplexer Register (0x20) D31 D30 D29 D28 D27 D26 D25 D24 FUNCTION 0 0 0 0 0 0 0 0 Reserved (1) D23 D22 D21 D20 D19 D18 D17 D16 FUNCTION 0 – – – – – – – Channel-1 AD mode 1 – – – – – – – Channel-1 BD mode – 0 0 0 – – – – SDIN-L to channel 1 (1) – 0 0 1 – – – – SDIN-R to channel 1 – 0 1 0 – – – – Reserved – 0 1 1 – – – – Reserved – 1 0 0 – – – – Reserved – 1 0 1 – – – – Reserved – 1 1 0 – – – – Ground (0) to channel 1 – 1 1 1 – – – – Reserved – – – – 0 – – – Channel 2 AD mode – – – – 1 – – – Channel 2 BD mode – – – – – 0 0 0 SDIN-L to channel 2 – – – – – 0 0 1 SDIN-R to channel 2 (1) – – – – – 0 1 0 Reserved – – – – – 0 1 1 Reserved – – – – – 1 0 0 Reserved – – – – – 1 0 1 Reserved – – – – – 1 1 0 Ground (0) to channel 2 – – – – – 1 1 1 Reserved D15 D14 D13 D12 D11 D10 D9 D8 FUNCTION 0 1 1 1 0 1 1 1 Reserved (1) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 1 1 1 0 0 1 0 Reserved (1) (1) Default values are in bold. PWM OUTPUT MUX REGISTER (0x25) This DAP output mux selects which internal PWM channel is output to the external pins. Any channel can be output to any external output pin. Bits D21–D20: Selects which PWM channel is output to OUT_A Bits D17–D16: Selects which PWM channel is output to OUT_B Bits D13–D12: Selects which PWM channel is output to OUT_C Bits D09–D08: Selects which PWM channel is output to OUT_D Note that channels are enclosed so that channel 1 = 0x00, channel 2 = 0x01, channet 1 = 0x02, and channel 2 = 0x03. 46 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Table 21. PWM Output Mux Register (0x25) D31 D30 D29 D28 D27 D26 D25 D24 FUNCTION 0 0 0 0 0 0 0 1 Reserved(1) D23 D22 D21 D20 D19 D18 D17 D16 FUNCTION 0 0 – – – – – – Reserved(1) – – 0 0 – – – – Multiplex channel 1 to OUT_A (1) – – 0 1 – – – – Multiplex channel 2 to OUT_A – – 1 0 – – – – Multiplex channel 1 to OUT_A – – 1 1 – – – – Multiplex channel 2 to OUT_A – – – – 0 0 – – Reserved (1) – – – – – – 0 0 Multiplex channel 1 to OUT_B – – – – – – 0 1 Multiplex channel 2 to OUT_B – – – – – – 1 0 Multiplex channel 1 to OUT_B (1) – – – – – – 1 1 Multiplex channel 2 to OUT_B D15 D14 D13 D12 D11 D10 D9 D8 FUNCTION 0 0 – – – – – – Reserved (1) – – 0 0 – – – – Multiplex channel 1 to OUT_C – – 0 1 – – – – Multiplex channel 2 to OUT_C(1) – – 1 0 – – – – Multiplex channel 1 to OUT_C – – 1 1 – – – – Multiplex channel 2 to OUT_C – – – – 0 0 – – Reserved (1) – – – – – – 0 0 Multiplex channel 1 to OUT_D – – – – – – 0 1 Multiplex channel 2 to OUT_D – – – – – – 1 0 Multiplex channel 1 to OUT_D – – – – – – 1 1 Multiplex channel 2 to OUT_D (1) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 1 0 0 0 1 0 1 RESERVED (1) Default values are in bold. DRC CONTROL (0x46) Each DRC can be enabled independently using the DRC control register. The DRCs are disabled by default. Table 22. DRC Control Register (0x46) D31 D30 D29 D28 D27 D26 D25 D24 FUNCTION 0 0 0 0 0 0 0 0 Reserved (1) D23 D22 D21 D20 D19 D18 D17 D16 FUNCTION 0 0 0 0 0 0 0 0 Reserved (1) D15 D14 D13 D12 D11 D10 D9 D8 FUNCTION 0 0 0 0 0 0 0 0 Reserved (1) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION – – – – – – – 0 DRC turned OFF (1) – – – – – – – 1 DRC turned ON 0 0 0 0 0 0 0 – Reserved (1) (1) Default values are in bold. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 47 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com BANK SWITCH AND EQ CONTROL (0x50) Table 23. Bank Switching Command D31 D30 D29 D28 D27 D26 D25 D24 FUNCTION 0 – – – – – – – 32 kHz, does not use bank 3 (1) 1 – – – – – – – 32 kHz, uses bank 3 – 0 – – – – – – Reserved(1) – – 0 – – – – – Reserved(1) – – – 0 – – – – 44.1/48 kHz, does not use bank 3 (1) – – – 1 – – – – 44.1/48 kHz, uses bank 3 – – – – 0 – – – 16 kHz, does not use bank 3 – – – – 1 – – – 16 kHz, uses bank 3 (1) – – – – – 0 – – 22.025/24 kHz, does not use bank 3 – – – – – 1 – – 22.025/24 kHz, uses bank 3 (1) – – – – – – 0 – 8 kHz, does not use bank 3 – – – – – – 1 – 8 kHz, uses bank 3 (1) – – – – – – – 0 11.025 kHz/12, does not use bank 3 – – – – – – – 1 11.025/12 kHz, uses bank 3 (1) D23 D22 D21 D20 D19 D18 D17 D16 FUNCTION 0 – – – – – – – 32 kHz, does not use bank 2 (1) 1 – – – – – – – 32 kHz, uses bank 2 – 1 – – – – – – Reserved (1) – – 1 – – – – – Reserved (1) – – – 0 – – – – 44.1/48 kHz, does not use bank 2 – – – 1 – – – – 44.1/48 kHz, uses bank 2 (1) – – – – 0 – – – 16 kHz, does not use bank 2 (1) – – – – 1 – – – 16 kHz, uses bank 2 – – – – – 0 – – 22.025/24 kHz, does not use bank 2 (1) – – – – – 1 – – 22.025/24 kHz, uses bank 2 – – – – – – 0 – 8 kHz, does not use bank 2 (1) – – – – – – 1 – 8 kHz, uses bank 2 – – – – – – – 0 11.025/12 kHz, does not use bank 2 (1) – – – – – – – 1 11.025/12 kHz, uses bank 2 D15 D14 D13 D12 D11 D10 D9 D8 FUNCTION 0 – – – – – – – 32 kHz, does not use bank 1 1 – – – – – – – 32 kHz, uses bank 1 (1) – 0 – – – – – – Reserved(1) – – 0 – – – – – Reserved(1) – – – 0 – – – – 44.1/48 kHz, does not use bank 1 (1) – – – 1 – – – – 44.1/48 kHz, uses bank 1 – – – – 0 – – – 16 kHz, does not use bank 1 (1) – – – – 1 – – – 16 kHz, uses bank 1 – – – – – 0 – – 22.025/24 kHz, does not use bank 1 (1) – – – – – 1 – – 22.025/24 kHz, uses bank 1 – – – – – – 0 – 8 kHz, does not use bank 1 (1) – – – – – – 1 – 8 kHz, uses bank 1 – – – – – – – 0 11.025/12 kHz, does not use bank 1 (1) – – – – – – – 1 11.025/12 kHz, uses bank 1 (1) Default values are in bold. 48 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A www.ti.com SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 Table 23. Bank Switching Command (continued) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 EQ ON 1 – – – – – – – EQ OFF (bypass BQ 0-6 of channels 1 and 2) – 0 – – – – – – Reserved (2) – – 0 – – – – – Ignore bank-mapping in bits D31–D8.Use default mapping. (2) 1 Use bank-mapping in bits D31–D8. – – – 0 – – – – L and R can be written independently. (2) L and R are ganged for EQ biquads; a write to Left channel BQ is – – – 1 – – – – also written to Right channel BQ. (0X29-2F is ganged to 0X30-0X36). – – – – 0 – – – Reserved (2) – – – – – 0 0 0 No bank switching. All updates to DAP (2) – – – – – 0 0 1 Configure bank 1 (32 kHz by default) – – – – – 0 1 0 Configure bank 2 (44.1/48 kHz by default) – – – – – 0 1 1 Configure bank 3 (other sample rates by default) – – – – – 1 0 0 Automatic bank selection – – – – – 1 0 1 Reserved – – – – – 1 1 X Reserved (2) Default values are in bold. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 49 Product Folder Link(s): TAS5707 TAS5707A TAS5707, TAS5707A SLOS556B –NOVEMBER 2008–REVISED NOVEMBER 2009 www.ti.com Changes from Revision A (November 2008) to Revision B Page • Added TAS5707A device to data sheet ................................................................................................................................ 1 • Changed PVDD maximum voltage to 26 V in Features ....................................................................................................... 1 • Added Applications section ................................................................................................................................................... 1 • Inserted paragraph on TAS5707A into Description section .................................................................................................. 1 • Changed PVDD maximum voltage to 26 V in simplified application diagram ...................................................................... 2 • Changed PVDD maximum voltage to 26 V in recommended operating conditions ............................................................. 7 • Added AVDD to output voltage test conditions ..................................................................................................................... 9 • Added rows to Electrical Characteristics fro OTW and OTW ............................................................................................... 9 • Changed OLPC typical value to 0.63 ms. ............................................................................................................................. 9 • Replaced text of Overtemperature Protection section ........................................................................................................ 18 • Added address information for the TAS5707A ................................................................................................................... 25 • Revised Sample Calculation for 3.23 Format table ............................................................................................................ 30 • Added 0xCA row to Register Summary table ..................................................................................................................... 36 • Revised 0xF9 row of Register Summary table ................................................................................................................... 36 • Corrected temperature from 145°C to 125°C ..................................................................................................................... 38 • Changed de-emphasis settings in register 0x03 table ........................................................................................................ 38 • Added text to Modulationi Limit Register section ................................................................................................................ 43 • Added text to the DRC Control section ............................................................................................................................... 47 50 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A PACKAGE OPTION ADDENDUM www.ti.com 9-Sep-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TAS5707APHP ACTIVE HTQFP PHP 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 0 to 85 TAS5707A TAS5707APHPR ACTIVE HTQFP PHP 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 0 to 85 TAS5707A TAS5707PHP ACTIVE HTQFP PHP 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 0 to 85 TAS5707 TAS5707PHPR ACTIVE HTQFP PHP 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 0 to 85 TAS5707 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TAS5707APHPR HTQFP PHP 48 1000 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2 TAS5707APHPR HTQFP PHP 48 1000 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2 TAS5707PHPR HTQFP PHP 48 1000 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2014 Pack Materials-Page 1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TAS5707APHPR HTQFP PHP 48 1000 367.0 367.0 38.0 TAS5707APHPR HTQFP PHP 48 1000 336.6 336.6 31.8 TAS5707PHPR HTQFP PHP 48 1000 336.6 336.6 31.8 PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2014 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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B2 1 www.fairchildsemi.com FDS6679AZ P-Channel PowerTrench® MOSFET -30V, -13A, 9mΩ General Description This P-Channel MOSFET is producted using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance. This device is well suited for Power Management and load switching applications common in Notebook Computers and Portable Battery Packs. Features „ Max rDS(on) = 9.3mΩ at VGS = -10V, ID = -13A „ Max rDS(on) = 14.8mΩ at VGS = -4.5V, ID = -11A „ Extended VGS range (-25V) for battery applications „ HBM ESD protection level of 6kV typical (note 3) „ High performance trench technology for extremely low rDS(on) „ High power and current handing capability „ RoHS Compliant S D S S SO-8 D D D G 1 7 5 2 8 4 6 3 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Thermal Characteristics Package Marking and Ordering Information Symbol Parameter Ratings Units VDS Drain to Source Voltage -30 V VGS Gate to Source Voltage ±25 V ID Drain Current -Continuous (Note 1a) -13 A -Pulsed -65 PD Power Dissipation for Single Operation (Note 1a) 2.5 (Note 1b) 1.2 W (Note 1c) 1.0 TJ, TSTG Operating and Storage Temperature -55 to +150 °C RθJA Thermal Resistance , Junction to Ambient (Note 1a) 50 °C/W RθJC Thermal Resistance , Junction to Case (Note 1) 25 °C/W Device Marking Device Reel Size Tape Width Quantity FDS6679AZ FDS6679AZ 13’’ 12mm 2500 units FDS6679AZ P-Channel PowerTrench® MOSFET ©2009 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDS6679AZ Rev. B2 Electrical Characteristics T J = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage I D = -250 µA, VGS = 0V -30 V ∆ BVDSS ∆ T J Breakdown Voltage Temperature Coefficient I D = -250 µA, referenced to 25 ° C -20 mV/°C IDSS Zero Gate Voltage Drain Current VDS = -24V, VGS=0V -1 µ A IGSS Gate to Source Leakage Current VGS = ±25V, VDS=0V ±10 µ A On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, I D = -250 µ A -1 -1.9 -3 V ∆ VGS(th) ∆ T J Gate to Source Threshold Voltage Temperature Coefficient I D = -250 µA, referenced to 25°C 6.5 mV/°C rDS(on) Drain to Source On Resistance VGS = -10V, I D = -13A 7.7 9.3 m Ω VGS = -4.5V, I D = -11A 11.8 14.8 VGS = -10V, I D = -13A, T J = 125 ° C 10.7 13.4 gFS Forward Transconductance VDS = -5V, I D = -13A 55 S (Note 2) Dynamic Characteristics Ciss Input Capacitance VDS = -15V, VGS = 0V, f = 1MHz 2890 3845 pF Coss Output Capacitance 500 665 pF Crss Reverse Transfer Capacitance 495 745 pF Switching Characteristics (Note 2) td(on) Turn-On Delay Time VDD = -15V, I D = -1A VGS = -10V, RGS = 6 Ω 13 24 ns t r Rise Time 15 27 ns td(off) Turn-Off Delay Time 210 336 ns tf Fall Time 92 148 ns Qg Total Gate Charge VDS = -15V, VGS = -10V, ID = -13A 68 96 nC Qg Total Gate Charge VDS = -15V, VGS = -5V, ID = -13A 38 54 nC Qgs Gate to Source Gate Charge 10 nC Qgd Gate to Drain Charge 17 nC Drain-Source Diode Characteristic VSD Source to Drain Diode Forward Voltage VGS = 0V, I S = -2.1A -0.7 -1.2 V trr Reverse Recovery Time I F = -13A, di/dt = 100A/ µ s 40 ns Qrr Reverse Recovery Charge I F = -13A, di/dt = 100A/ µ s -31 nC Notes: 1: R θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θJC is guaranteed by design while R θCA is determined by the user’s board design. Scale 1 : 1 on letter size paper 2: Pulse Test:Pulse Width <300 µs, Duty Cycle <2.0% 3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. a) 50 °C/W when mounted on a 1 in 2 pad of 2 oz copper b)105 °C/W when mounted on a .04 in 2 pad of 2 oz copper minimun pad c) 125 °C/W when mounted on a FDS6679AZ P-Channel PowerTrench® MOSFET ©2009 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDS6679AZ Rev. B2 Typical Characteristics T J = 25°C unless otherwise noted Figure 1. On Region Characteristics 01234 0 10 20 30 40 50 60 70 PULSE DURATION = 80 µ s DUTY CYCLE = 0.5%MAX VGS = -5V VGS = -4V VGS = -3V VGS = -3.5V VGS = -4.5V VGS = -10V -ID, DRAIN CURRENT (A) -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 2. Normalized 0 10 20 30 40 50 60 70 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 PULSE DURATION = 80 µ s DUTY CYCLE = 0.5%MAX NORMALIZED DRAIN TO SOURCE ON-RESISTANCE -I D, DRAIN CURRENT(A) VGS = -10V VGS = -5V VGS = -4.5V VGS = -4V VGS = -3.5V On-Resistance vs Drain Current and Gate Voltage Figure 3. -80 -40 0 40 80 120 160 0.6 0.8 1.0 1.2 1.4 1.6 I D = -13A VGS = -10V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE T J, JUNCTION TEMPERATURE ( o C ) Normalized On Resistance vs Junction Temperature Figure 4. 3.0 4.5 6.0 7.5 9.0 0 10 20 30 PULSE DURATION = 80 µ s DUTY CYCLE = 0.5%MAX TJ = 150oC TJ = 25oC ID = -13A rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) -VGS, GATE TO SOURCE VOLTAGE (V) 10 On-Resistance vs Gate to Source Voltage Figure 5. Transfer Characteristics 2.0 2.5 3.0 3.5 4.0 4.5 0 10 20 30 40 50 60 70 PULSE DURATION = 80 µ s DUTY CYCLE = 0.5%MAX T J = -55 o C T J = 25 o C TJ = 150 o C -ID, DRAIN CURRENT (A) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1E-3 0.01 0.11 10 100 T J = -55 o C T J = 25 o C TJ = 150 o C VGS = 0V -IS, REVERSE DRAIN CURRENT (A) -VSD, BODY DIODE FORWARD VOLTAGE (V) Source to Drain Diode Forward Voltage vs Source Current FDS6679AZ P-Channel PowerTrench® MOSFET ©2009 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDS6679AZ Rev. B2 Figure 7. 0 15 30 45 60 75 02468 10 VDD = -20V VDD = -10V -VGS, GATE TO SOURCE VOLTAGE(V) Q g, GATE CHARGE(nC) VDD = -15V Gate Charge Characteristics Figure 8. 0.1 1 10 100 1000 10000 f = 1MHz VGS = 0V CAPACITANCE (pF) -VDS, DRAIN TO SOURCE VOLTAGE (V) Crss Coss Ciss 30 Capacitance vs Drain to Source Voltage Figure 9. I g vs VGS 0 5 10 15 20 25 30 35 1E-4 1E-3 0.01 0.11 10 100 1000 TJ = 150 o CT J = 25 o C -Ig(uA) -VGS(V) Figure 10. 10-2 10-1 10 0 10 1 10 2 1 10 TJ = 25 o C TJ = 125 o C -IAS, AVALANCHE CURRENT(A) 20 t AV, TIME IN AVALANCHE(ms) Unclamped Inductive Switching Capability Figure 11. 25 50 75 100 125 150 02468 10 12 14 16 VGS = -10V VGS = -4.5V -ID, DRAIN CURRENT (A) TA, AMBIENT TEMPERATURE ( o C ) Maximum Continuous Drain Current vs Ambient Temperature Figure 12. Forward Bias Safe Operating Area 0.01 0.1 1 10 100 0.01 0.11 10 100 100 us 1 s 10 s DC 100 ms 10 ms 1 ms ID, DRAIN CURRENT (A) VDS, DRAIN to SOURCE VOLTAGE (V) THIS AREA IS LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED RθJA = 125 o C/W TA = 25 o C 200 Typical Characteristics T J = 25°C unless otherwise noted FDS6679AZ P-Channel PowerTrench® MOSFET ©2009 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDS6679AZ Rev. B2 Figure 13. 10-4 10-3 10-2 10-1 1 10 10 2 10 3 0.51 10 10 2 10 3 10 4 SINGLE PULSE RθJA = 125 o C/W TA = 25 o C VGS = -10 V P(PK), PEAK TRANSIENT POWER (W) t, PULSE WIDTH (sec) Single Pulse Maximum Power Dissipation Figure 14. 10-4 10-3 10-2 10-1 1 10 10 2 10 3 10-4 10-3 10-2 10-11 SINGLE PULSE RθJA = 125 o C/W DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA t, RECTANGULAR PULSE DURATION (sec) D = 0.5 0.2 0.1 0.05 0.02 0.01 2 PDM t 1 t 2 NOTES: DUTY FACTOR: D = t 1/t 2 PEAK T J = PDM x Z θJA x R θJA + TA Junction-to-Ambient Transient Thermal Response Curve Typical Characteristics T J = 25°C unless otherwise noted 6 www.fairchildsemi.com FDS6679AZ P-Channel PowerTrench ® MOSFET ©2009 Fairchild Semiconductor Corporation FDS6679AZ Rev. B2 Rev. I39 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EfficentMax™ EZSWITCH™ * ™ Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® * FPS™ F-PFS™ FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® ® PDP SPM™ Power-SPM™ PowerTrench® PowerXS™ Programmable Active Droop™ QFET® QS™ Quiet Series™ RapidConfigure™ ™ Saving our world, 1mW /W /kW at a time™ SmartMax™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SupreMOS™ SyncFET™ ® The Power Franchise® TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ TriFault Detect™ TRUECURRENT™* µSerDes™ UHC® Ultra FRFET™ UniFET™ VCX™ VisualMax™ XS™ tm ® tm tm Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. 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Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC32 - Plastic Film Capacitors Metallized Polyester Film Capacitor Type:ECQE(F) Non-inductive construction using metallized Polyester film with flame retardant epoxy resin coating ■Features •Self-healing property •Excellent electrical characteristics •Flame retardant epoxy resin coating •RoHS directive compliant ■Recommended Applications •General purpose usage ❈Please contact us when applications are CD , ignitor etc. ■Explanation of Part Numbers 1 2 3 4 5 6 7 8 9 10 11 12 E C Q E Product code Dielectric & construction Rated volt. Capacitance F Cap. Tol. Suffix Suffix 1 2 4 6 100 VDC 250 VDC 400 VDC 630 VDC 10 12 1A 2A 1000 VDC 1250 VDC 125 VAC 250 VAC J K ±5 % ±10 % E C Q E Product code Dielectric & construction Rated volt. Capacitance R F Suffix Cap. Tol. Suffix ■Specifications ●Explanation of Part Number for Odd Size Taping Category temp. range (Including temperature-rise on unit surface) Rated voltage Capacitance range Capacitance tolerance Dissipation factor (tan ) Withstand voltage Insulation resistance (IR) 100 VDC, 250 VDC,400 VDC, 630 VDC, 1000 VDC, 1250 VDC, 125 VAC, 250 VAC –40 ˚C to +105 ˚C –40 ˚C to +105 ˚C 100 VDC, 250 VDC, 400 VDC, 630 VDC, 1000 VDC, 1250 VDC, (Derating of rated voltage by 1.25 %/˚C at more than 85 ˚C) 125 VAC, 250 VAC 0.0010 µF to 10 µF (E12) ±5 %(J), ±10 %(K) tan <=1.0 % (20 ˚C, 1 kHz) •Rated volt. 100 V to 630 VDC Between terminals : Rated volt.(VDC)✕150 % 60 s •Rated volt. 1000 VDC, 1250 VDC Between terminals : Rated volt. (VDC)✕175 % 2 s to 5 s or 1000 VAC 60 s Between terminals to enclosure : 1500 VAC 60 s •Rated volt. 125 VAC, 250 VAC Between terminals : Rated volt.(VAC)✕230 % 60 s Between terminals to enclosure : 1500 VAC 60 s 100 V to 630 VDC: C <= 0.33 µF : IR>=9000 MΩ (20 ˚C, 100 VDC, 60 s) C > 0.33 µF : IR>=3000 MΩ . µF 1000 VDC, 1250 VDC: IR>=10000 MΩ (20 ˚C, 100 VDC, 60 s) IR>=2000 MΩ (20 ˚C, 500 VDC, 60 s) 125 VAC, 250 VAC: C <= 0.47 µF : IR>=2000 MΩ (20 ˚C, 500 VDC, 60 s) C > 0.47 µF : IR>=3000 MΩ . µF (20 ˚C, 100 VDC, 60 s) ❈ In case of applying voltage in alternating current (50 Hz or 60 Hz sine wave) to a capacitor with DC rated voltage, please refer to the page of “Permissible voltage (R.M.S) in alternating current corresponding to DC rated voltage”. ❈ Voltage to be applied to ECQE1A (F) & ECQE2A (F) is only sine wave (50 Hz or 60 Hz). Suffix Blank B Z 3 6 Lead Form Straight Crimped lead Cut lead Crimped taping (Ammo) Crimped taping (Ammo) p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 32 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC33 - Plastic Film Capacitors ■Dimensions in mm (not to scale) Cut lead ■Packaging Specifications for Bulk Package Packing quantity:100 pcs./bag ■Taping Specifications for Automatic Insertion ●Taping style ❈Refer to the page of taping specifications. 100 VDC 250 VDC 400 VDC 630 VDC 1000 VDC 1250 VDC 125 VAC 250 VAC ECQE (F) AD AS AB BCD E 0.56 to 0.68 ○ Ammo ( ) F3 0.82 to 1.0 ○ Ammo ( ) F3 1.2 to 3.3 ○ Ammo ( ) F3 1.2 to 3.3 ○ Ammo R( ) F 0.010 to 0.27 ○ Ammo ( ) F3 0.33 ○ Ammo ( ) F3 0.39 to 1.5 ○ Ammo ( ) F3 0.010 to 0.33 ○ Ammo R( ) F 0.39 to 1.5 ○ Ammo R( ) F 0.010 to 0.10 ○ Ammo ( ) F3 0.12 to 0.47 ○ Ammo ( ) F3 0.010 to 0.10 ○ Ammo R( ) F 0.12 to 0.47 ○ Ammo R( ) F 0.0010 to 0.033 ○ Ammo ( ) F3 0.039 to 0.047 ○ Ammo ( ) F3 0.056 to 0.22 ○ Ammo ( ) F3 0.0010 to 0.047 ○ Ammo R( ) F 0.056 to 0.22 ○ Ammo R( ) F 0.010 to 0.10 ○ Ammo R( ) F 0.0010 to 0.022 ○ Ammo R( ) F 0.010 to 0.068 ○ Ammo ( ) F6 0.010 to 0.068 ○ Ammo R( ) F 0.010 to 0.033 ○ Ammo ( ) F6 0.010 to 0.047 ○ Ammo R( ) F 0.056 to 0.22 ○ Ammo R( ) F ●Packaging Specifications Cap. range (µF) Taping style Type Rated volt. Packing suffix Style AD AB B C D E Lead Spacing 5.0 mm 5.0 mm 5.0 mm 5.0 mm 7.5 mm 7.5 mm ❈See the column “Rating, Dimensions & Quantity Box” for packing quantity. ●Lead Spacing Metallized Film p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 33 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC34 - Plastic Film Capacitors ■Rating, Dimensions & Quantity/Ammo Box ●Rated voltage : 250 VDC, Capacitance tolerance : ±5 %(J), ±10 %(K) Style D: 0.010 µF to 0.33 µF Style B: 0.39 µF to 10.0 µF Suffix for lead crimped or taped type Cap. tol. code ▲ ▲ Suffix for lead crimped or taped type Cap. tol. code ▲ ▲ ■Rating, Dimensions & Quantity/Ammo Box ●Rated voltage : 100 VDC, Capacitance tolerance : ± 5 %(J), ±10 %(K) 0.56 12.0 5.5 10.9 15.9 10.0 10.0 1.0 0.60 0.68 12.0 6.0 11.9 16.9 10.0 10.0 1.0 0.60 0.82 12.0 6.0 13.5 18.5 10.0 10.0 1.0 0.60 1.0 12.0 6.7 14.0 19.0 10.0 10.0 1.0 0.60 1.2 18.5 5.5 12.8 17.8 15.0 10.0 1.0 0.60 1.5 18.5 6.0 13.4 18.4 15.0 10.0 1.0 0.80 1.8 18.5 6.5 14.4 19.4 15.0 10.0 1.0 0.80 2.2 18.5 7.0 15.0 20.0 15.0 10.0 1.0 0.80 2.7 18.5 8.0 15.8 20.8 15.0 10.0 1.0 0.80 3.3 18.5 8.5 16.5 21.5 15.0 10.0 1.0 0.80 3.9 26.0 7.0 16.4 21.4 22.5 15.0 1.0 0.80 4.7 26.0 7.5 17.0 22.0 22.5 15.0 1.0 0.80 5.6 26.0 8.3 17.5 22.5 22.5 15.0 1.0 0.80 6.8 26.0 9.0 18.5 23.5 22.5 15.0 1.0 0.80 8.2 26.0 10.0 20.0 25.0 22.5 15.0 1.5 0.80 10.0 26.0 11.5 21.0 26.0 22.5 15.0 1.5 0.80 Part No. Cap. (µF) Min. order Q'ty Taping 500 - - - - Dimensions (mm) L max. T max. Standard 5 mm Odd size 5 mm Odd size 7.5 mm ø d ECQE1564□F( ) ECQE1684□F( ) ECQE1824□F( ) ECQE1105□F( ) ECQE1125□F( ) ECQE1155□F( ) ECQE1185□F( ) ECQE1225□F( ) ECQE1275□F( ) ECQE1335□F( ) ECQE1395□F( ) ECQE1475□F( ) ECQE1565□F( ) ECQE1685□F( ) ECQE1825□F( ) ECQE1106□F( ) 500 1,000 400 400 500 600 - H max. Straight Crimped lead Straight F Crimped lead S Straight G max. Bulk 500 style D: 0.056 µF to 1.0 µF style B: 1.2 µF to 10.0 µF Part No. Cap. (µF) Dimensions (mm) L max. T max. ø d ECQE2103□F( ) 0.010 10.3 4.3 7.4 12.4 7.5 7.5 1.0 0.60 ECQE2123□F( ) 0.012 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2153□F( ) 0.015 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2183□F( ) 0.018 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2223□F( ) 0.022 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2273□F( ) 0.027 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2333□F( ) 0.033 10.3 4.5 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2393□F( ) 0.039 10.3 4.5 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2473□F( ) 0.047 10.3 4.5 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2563□F( ) 0.056 10.3 4.8 7.9 12.9 7.5 7.5 1.0 0.60 ECQE2683□F( ) 0.068 10.3 4.5 7.5 12.5 7.5 7.5 1.0 0.60 ECQE2823□F( ) 0.082 10.3 4.9 8.0 13.0 7.5 7.5 1.0 0.60 ECQE2104□F( ) 0.10 10.3 5.8 8.4 13.4 7.5 7.5 1.0 0.60 ECQE2124□F( ) 0.12 10.3 6.0 9.0 14.0 7.5 7.5 1.0 0.60 ECQE2154□F( ) 0.15 10.3 6.0 10.8 15.8 7.5 7.5 1.0 0.60 ECQE2184□F( ) 0.18 12.0 5.0 10.3 15.3 10.0 10.0 1.0 0.60 ECQE2224□F( ) 0.22 12.0 5.5 10.5 15.5 10.0 10.0 1.0 0.60 ECQE2274□F( ) 0.27 12.0 6.0 11.5 16.5 10.0 10.0 1.0 0.60 ECQE2334□F( ) 0.33 12.0 6.5 12.0 17.0 10.0 10.0 1.0 0.60 ECQE2394□F( ) 0.39 18.5 4.9 12.0 17.0 15.0 10.0 1.0 0.60 ECQE2474□F( ) 0.47 18.5 5.3 12.5 17.5 15.0 10.0 1.0 0.60 ECQE2564□F( ) 0.56 18.5 5.5 13.0 18.0 15.0 10.0 1.0 0.60 ECQE2684□F( ) 0.68 18.5 6.0 13.5 18.5 15.0 10.0 1.0 0.80 ECQE2824□F( ) 0.82 18.5 6.5 14.5 19.5 15.0 10.0 1.0 0.80 ECQE2105□F( ) 1.0 18.5 7.4 15.0 20.0 15.0 10.0 1.0 0.80 ECQE2125□F( ) 1.2 18.5 8.0 15.9 20.9 15.0 10.0 1.0 0.80 ECQE2155□F( ) 1.5 18.5 9.0 16.8 21.8 15.0 10.0 1.0 0.80 ECQE2185□F( ) 1.8 26.0 7.5 15.5 20.5 22.5 15.0 1.0 0.80 ECQE2225□F( ) 2.2 26.0 8.5 16.3 21.3 22.5 15.0 1.0 0.80 ECQE2275□F( ) 2.7 26.0 9.4 17.0 22.0 22.5 15.0 1.0 0.80 ECQE2335□F( ) 3.3 26.0 10.3 18.0 23.0 22.5 15.0 1.5 0.80 ECQE2395□F( ) 3.9 26.0 11.0 20.5 25.5 22.5 15.0 1.5 0.80 ECQE2475□F( ) 4.7 26.0 12.0 21.5 26.5 22.5 15.0 1.5 0.80 ECQE2565□F( ) 5.6 31.0 11.8 21.0 26.0 27.5 22.5 1.5 0.80 ECQE2685□F( ) 6.8 31.0 13.0 22.4 27.4 27.5 22.5 1.5 0.80 ECQE2825□F( ) 8.2 31.0 14.3 23.5 28.5 27.5 22.5 1.5 0.80 ECQE2106□F( )10.0 31.0 15.9 25.8 30.8 27.5 22.5 1.5 0.80 1000 - - 1000 500 500 1000 400 500 400 300 - - H max. Straight Crimped lead Straight F Crimped lead S Straight G max. 500 Min. order Q'ty Taping Standard 5 mm Odd size 5 mm Odd size 7.5 mm Bulk p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 34 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC35 - Plastic Film Capacitors ■Rating, Dimensions & Quantity/Ammo Box ●Rated voltage : 400 VDC, Capacitance tolerance : ±5 %(J), ±10 %(K) style D:0.010 µF to 0.10 µF style B:0.12 µF to 2.2 µF Suffix for lead crimped or taped type Cap. tol. code ▲ ▲ Part No. 0.010 10.3 4.3 7.4 12.4 7.5 7.5 1.0 0.60 0.012 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.015 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.018 10.3 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.022 10.3 4.8 7.9 12.9 7.5 7.5 1.0 0.60 0.027 10.3 5.5 8.0 13.0 7.5 7.5 1.0 0.60 0.033 10.3 6.0 9.0 14.0 7.5 7.5 1.0 0.60 0.039 12.0 4.9 8.0 13.0 10.0 10.0 1.0 0.60 0.047 12.0 5.0 8.3 13.3 10.0 10.0 1.0 0.60 0.056 12.0 5.0 10.0 15.0 10.0 10.0 1.0 0.60 0.068 12.0 5.4 10.5 15.5 10.0 10.0 1.0 0.60 0.082 12.0 5.8 11.0 16.0 10.0 10.0 1.0 0.60 0.10 12.0 6.3 12.0 17.0 10.0 10.0 1.0 0.60 0.12 18.5 5.0 10.0 15.0 15.0 10.0 1.0 0.60 0.15 18.5 5.0 12.4 17.4 15.0 10.0 1.0 0.60 0.18 18.5 5.4 12.5 17.5 15.0 10.0 1.0 0.60 0.22 18.5 5.9 13.0 18.0 15.0 10.0 1.0 0.60 0.27 18.5 6.5 14.3 19.3 15.0 10.0 1.0 0.80 0.33 18.5 7.0 14.9 19.9 15.0 10.0 1.0 0.80 0.39 18.5 7.5 15.4 20.4 15.0 10.0 1.0 0.80 0.47 18.5 7.8 17.0 22.0 15.0 10.0 1.0 0.80 0.56 26.0 6.5 16.0 21.0 22.5 15.0 1.0 0.80 0.68 26.0 7.0 16.5 21.5 22.5 15.0 1.0 0.80 0.82 26.0 7.9 17.3 22.3 22.5 15.0 1.0 0.80 1.0 26.0 8.5 18.0 23.0 22.5 15.0 1.0 0.80 1.2 26.0 9.5 18.9 23.9 22.5 15.0 1.0 0.80 1.5 31.0 9.5 19.0 24.0 27.5 22.5 1.0 0.80 1.8 31.0 11.0 20.5 25.5 27.5 22.5 1.5 0.80 2.2 31.0 11.0 22.0 27.0 27.5 22.5 1.5 0.80 ECQE4103□F( ) ECQE4123□F( ) ECQE4153□F( ) ECQE4183□F( ) ECQE4223□F( ) ECQE4273□F( ) ECQE4333□F( ) ECQE4393□F( ) ECQE4473□F( ) ECQE4563□F( ) ECQE4683□F( ) ECQE4823□F( ) ECQE4104□F( ) ECQE4124□F( ) ECQE4154□F( ) ECQE4184□F( ) ECQE4224□F( ) ECQE4274□F( ) ECQE4334□F( ) ECQE4394□F( ) ECQE4474□F( ) ECQE4564□F( ) ECQE4684□F( ) ECQE4824□F( ) ECQE4105□F( ) ECQE4125□F( ) ECQE4155□F( ) ECQE4185□F( ) ECQE4225□F( ) Cap. (µF) 1000 500 - - 500 500 400 - - 1000 Dimensions (mm) L max. T max. φd H max. Straight Crimped lead Straight F Crimped lead S Straight G max. 500 Min. order Q'ty Taping Standard 5 mm Odd size 5 mm Odd size 7.5 mm Bulk Metallized Film p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 35 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC36 - Plastic Film Capacitors ●Rated voltage : 630 VDC, Capacitance tolerance : ±5 %(J), ±10 %(K) Suffix for lead crimped or taped type. Cap. tol. code ▲ ▲ style D:0.010 µF to 0.047 µF style B:0.0010 µF to 0.0082 µF, 0.056 µF to 2.2 µF Part No. 0.0010 10.0 4.5 9.5 14.5 7.5 5.0 1.0 0.60 0.0012 10.0 4.5 10.0 15.0 7.5 5.0 1.0 0.60 0.0015 10.0 4.5 10.0 15.0 7.5 5.0 1.0 0.60 0.0018 10.0 4.5 10.0 15.0 7.5 5.0 1.0 0.60 0.0022 10.0 4.5 10.0 15.0 7.5 5.0 1.0 0.60 0.0027 10.0 4.5 10.0 15.0 7.5 5.0 1.0 0.60 0.0033 10.0 4.5 10.0 15.0 7.5 5.0 1.0 0.60 0.0039 10.0 4.5 10.0 15.0 7.5 5.0 1.0 0.60 0.0047 12.0 4.5 10.0 15.0 10.0 7.5 1.0 0.60 0.0056 12.0 4.5 10.0 15.0 10.0 7.5 1.0 0.60 0.0068 12.0 4.9 10.0 15.0 10.0 7.5 1.0 0.60 0.0082 12.0 4.5 10.0 15.0 10.0 7.5 1.0 0.60 0.010 12.0 4.5 7.5 12.5 10.0 10.0 1.0 0.60 0.012 12.0 4.5 7.8 12.8 10.0 10.0 1.0 0.60 0.015 12.0 5.0 8.2 13.2 10.0 10.0 1.0 0.60 0.018 12.0 4.9 10.0 15.0 10.0 10.0 1.0 0.60 0.022 12.0 5.3 10.5 15.5 10.0 10.0 1.0 0.60 0.027 12.0 5.5 10.9 15.9 10.0 10.0 1.0 0.60 0.033 12.0 6.0 11.9 16.9 10.0 10.0 1.0 0.60 0.039 12.0 6.0 13.4 18.4 10.0 10.0 1.0 0.60 0.047 12.0 6.5 13.5 18.5 10.0 10.0 1.0 0.60 0.056 18.5 5.4 10.5 15.5 15.0 10.0 1.0 0.60 0.068 18.5 5.8 11.0 16.0 15.0 10.0 1.0 0.60 0.082 18.5 6.5 12.0 17.0 15.0 10.0 1.0 0.60 0.10 18.5 6.3 14.0 19.0 15.0 10.0 1.0 0.60 0.12 18.5 6.3 14.5 19.5 15.0 10.0 1.0 0.80 0.15 18.5 7.5 15.4 20.4 15.0 10.0 1.0 0.80 0.18 18.5 8.0 16.0 21.0 15.0 10.0 1.0 0.80 0.22 18.5 9.0 16.5 21.5 15.0 10.0 1.0 0.80 0.27 26.0 7.0 16.5 21.5 22.5 15.0 1.0 0.80 0.33 26.0 7.8 17.0 22.0 22.5 15.0 1.0 0.80 0.39 26.0 8.5 17.9 22.9 22.5 15.0 1.0 0.80 0.47 26.0 9.3 18.5 23.5 22.5 15.0 1.0 0.80 0.56 26.0 10.0 20.0 25.0 22.5 15.0 1.5 0.80 0.68 26.0 11.5 21.0 26.0 22.5 15.0 1.5 0.80 0.82 31.0 11.3 20.5 25.5 27.5 22.5 1.5 0.80 1.0 31.0 12.5 21.9 26.9 27.5 22.5 1.5 0.80 1.2 31.0 13.5 23.0 28.0 27.5 22.5 1.5 0.80 1.5 31.0 15.3 24.7 29.7 27.5 22.5 1.5 0.80 1.8 31.0 16.8 27.0 32.0 27.5 22.5 1.5 0.80 2.2 31.0 19.5 29.0 34.0 27.5 22.5 1.5 0.80 ECQE6102□F( ) ECQE6122□F( ) ECQE6152□F( ) ECQE6182□F( ) ECQE6222□F( ) ECQE6272□F( ) ECQE6332□F( ) ECQE6392□F( ) ECQE6472□F( ) ECQE6562□F( ) ECQE6682□F( ) ECQE6822□F( ) ECQE6103□F( ) ECQE6123□F( ) ECQE6153□F( ) ECQE6183□F( ) ECQE6223□F( ) ECQE6273□F( ) ECQE6333□F( ) ECQE6393□F( ) ECQE6473□F( ) ECQE6563□F( ) ECQE6683□F( ) ECQE6823□F( ) ECQE6104□F( ) ECQE6124□F( ) ECQE6154□F( ) ECQE6184□F( ) ECQE6224□F( ) ECQE6274□F( ) ECQE6334□F( ) ECQE6394□F( ) ECQE6474□F( ) ECQE6564□F( ) ECQE6684□F( ) ECQE6824□F( ) ECQE6105□F( ) ECQE6125□F( ) ECQE6155□F( ) ECQE6185□F( ) ECQE6225□F( ) Cap. (µF) 1000 - 1000 500 400 300 1000 500 400 - - 500 - Dimensions (mm) L max. T max. φd H max. Straight Crimped lead Straight F Crimped lead S Straight G max. 500 Min. order Q'ty Taping Standard 5 mm Odd size 5 mm Odd size 7.5 mm Bulk p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 36 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC37 - Plastic Film Capacitors ■Rating, Dimensions & Quantity/Ammo Box ●Rated voltage : 1000 VDC, Note) 125 VAC, Capacitance tolerance : ±5 %(J), ±10 %(K) Note) This type has two rated voltage, one is DC rated voltage another is AC rated voltage.. DC rated voltage is 1000 V, AC rated voltage is 125 V. Making for rated voltage is「1000 V, 125 V 」 When capacitors use in secondary side of power source, and in case of applying voltage in altering current (50 Hz or 60 Hz sine wave) to a capacitor, please refer to the page of ''Permissible voltage (R.M.S) in altering current corresponding to DC rated voltage''. When capacitors use in primary side of power source, the rated voltage is shown 125 VAC. Voltage to be applied to capacitors in only sine wave (50 Hz or 60 Hz). AC rated capacitors complying with clause 1 of ''Electrical Appliance and Material Safety Law''. And not complying with clause 2 of ''Electrical Appliance and Material Safety Law'', in this case please use ECQUL type or ECQUG type Part No. 0.010 15.5 6.0 11.0 16.0 12.5 12.5 1.0 0.60 0.012 15.5 6.0 12.0 17.0 12.5 12.5 1.0 0.60 0.015 15.5 7.0 12.5 17.5 12.5 12.5 1.0 0.60 0.018 15.5 7.5 13.0 20.0 12.5 12.5 1.0 0.80 0.022 15.5 7.5 15.5 22.5 12.5 12.5 1.0 0.80 0.027 21.0 6.0 13.0 18.0 17.5 12.5 1.0 0.80 0.033 21.0 6.5 14.0 19.0 17.5 12.5 1.0 0.80 0.039 21.0 7.0 14.5 19.5 17.5 12.5 1.0 0.80 0.047 21.0 7.5 15.5 20.5 17.5 12.5 1.0 0.80 0.056 21.0 7.5 17.0 22.0 17.5 12.5 1.0 0.80 0.068 21.0 8.5 18.0 23.0 17.5 12.5 1.0 0.80 0.082 21.0 9.0 18.5 23.5 17.5 12.5 1.0 0.80 0.10 21.0 10.0 20.0 25.0 17.5 12.5 1.0 0.80 0.12 26.0 9.0 18.5 23.5 22.5 17.5 1.0 0.80 0.15 26.0 10.0 20.0 25.0 22.5 17.5 1.5 0.80 0.18 26.0 10.5 22.0 27.0 22.5 17.5 1.5 0.80 0.22 26.0 12.0 23.0 28.0 22.5 17.5 1.5 0.80 ECQE10103□F( ) ECQE10123□F( ) ECQE10153□F( ) ECQE10183□F( ) ECQE10223□F( ) ECQE10273□F( ) ECQE10333□F( ) ECQE10393□F( ) ECQE10473□F( ) ECQE10563□F( ) ECQE10683□F( ) ECQE10823□F( ) ECQE10104□F( ) ECQE10124□F( ) ECQE10154□F( ) ECQE10184□F( ) ECQE10224□F( ) Cap. (µF) Min. order Q'ty 500 400 500 400 300 - Dimensions (mm) L max. T max. ø d 7.5 mm H max. Straight Crimped lead Straight F Crimped lead S Straight G max. 500 Bulk Taping Style D: 0.010 µF to 0.022 µF Style B: 0.027 µF to 0.22 µF Suffix for lead crimped or taped type. Cap. tol. code ▲ ▲ Metallized Film p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 37 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC38 - Plastic Film Capacitors ■Rating, Dimensions & Quantity/Ammo Box ●Rated voltage : 1250 VDC, Note) 125 VAC, Capacitance tolerance : ±5 %(J), ±10 %(K) Note) This type has two rated voltage, one is DC rated voltage another is AC rated voltage.. DC rated voltage is 1250 V, AC rated voltage is 125 V. Making for rated voltage is「1250 V, 125 V 」 When capacitors use in secondary side of power source, and in case of applying voltage in altering current (50 Hz or 60 Hz sine wave) to a capacitor, please refer to the page of ''Permissible voltage (R.M.S) in altering current corresponding to DC rated voltage''. When capacitors use in primary side of power source, the rated voltage is shown 125 VAC. Voltage to be applied to capacitors in only sine wave (50 Hz or 60 Hz). AC rated capacitors complying with clause 1 of ''Electrical Appliance and Material Safety Law''. And not complying with clause 2 of ''Electrical Appliance and Material Safety Law'', in this case please use ECQUL type or ECQUG type Style D: 0.0010 µF to 0.0068 µF Style B: 0.0082 µF to 0.22 µF Part No. 0.0010 15.5 6.0 11.0 16.0 12.5 10.0 1.0 0.60 0.0012 15.5 6.0 11.0 16.0 12.5 10.0 1.0 0.60 0.0015 15.5 6.0 11.0 16.0 12.5 10.0 1.0 0.60 0.0018 15.5 6.0 11.0 16.0 12.5 10.0 1.0 0.60 0.0022 15.5 6.0 11.5 16.5 12.5 10.0 1.0 0.60 0.0027 15.5 6.5 12.0 17.0 12.5 10.0 1.0 0.60 0.0033 15.5 6.0 11.5 16.5 12.5 10.0 1.0 0.60 0.0039 15.5 6.5 12.0 17.0 12.5 10.0 1.0 0.60 0.0047 15.5 7.0 12.5 17.5 12.5 10.0 1.0 0.60 0.0056 15.5 7.5 13.0 18.0 12.5 10.0 1.0 0.60 0.0068 15.5 7.5 15.0 20.0 12.5 10.0 1.0 0.60 0.0082 21.0 5.0 12.0 17.0 17.5 12.5 1.0 0.60 0.010 21.0 5.0 12.5 17.5 17.5 12.5 1.0 0.60 0.012 21.0 5.5 13.0 18.0 17.5 12.5 1.0 0.60 0.015 21.0 6.0 13.5 18.5 17.5 12.5 1.0 0.60 0.018 21.0 6.5 14.5 19.5 17.5 12.5 1.0 0.80 0.022 21.0 7.0 15.0 20.0 17.5 12.5 1.0 0.80 0.027 26.0 6.0 15.5 20.5 22.5 17.5 1.0 0.80 0.033 26.0 6.5 16.0 21.0 22.5 17.5 1.0 0.80 0.039 26.0 7.0 16.5 21.5 22.5 17.5 1.0 0.80 0.047 26.0 8.0 17.0 22.0 22.5 17.5 1.0 0.80 0.056 31.0 7.5 17.0 22.0 27.5 22.5 1.0 0.80 0.068 31.0 8.0 17.5 22.5 27.5 22.5 1.0 0.80 0.082 31.0 9.0 18.5 23.5 27.5 22.5 1.0 0.80 0.10 31.0 10.0 19.5 24.5 27.5 22.5 1.0 0.80 0.12 31.0 11.5 20.5 25.5 27.5 22.5 1.5 0.80 0.15 31.0 12.0 23.0 28.0 27.5 22.5 1.5 0.80 0.18 31.0 13.0 24.5 29.5 27.5 22.5 1.5 0.80 0.22 31.0 14.5 26.5 31.5 27.5 22.5 1.5 0.80 ECQE12102□F( ) ECQE12122□F( ) ECQE12152□F( ) ECQE12182□F( ) ECQE12222□F( ) ECQE12272□F( ) ECQE12332□F( ) ECQE12392□F( ) ECQE12472□F( ) ECQE12562□F( ) ECQE12682□F( ) ECQE12822□F( ) ECQE12103□F( ) ECQE12123□F( ) ECQE12153□F( ) ECQE12183□F( ) ECQE12223□F( ) ECQE12273□F( ) ECQE12333□F( ) ECQE12393□F( ) ECQE12473□F( ) ECQE12563□F( ) ECQE12683□F( ) ECQE12823□F( ) ECQE12104□F( ) ECQE12124□F( ) ECQE12154□F( ) ECQE12184□F( ) ECQE12224□F( ) Cap. (µF) Min. order Q'ty 500 400 500 Dimensions (mm) L max. T max. ø d 7.5 mm H max. Straight Crimped lead Straight F Crimped lead S Straight G max. Bulk Taping 500 Suffix for lead crimped or taped type. Cap. tol. code ▲ ▲ p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 38 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC39 - Plastic Film Capacitors ■Rating, Dimensions & Quantity/Ammo Box ●Rated voltage : 125 VAC, Capacitance tolerance : ±5 %(J), ±10 %(K) ●Noise suppression Capacitors (Across-the-line) style D:0.010 µF to 0.068 µF Suffix for lead crimped or taped type. Cap. tol. code MF( ) Table 1 Notice for AC rated AC rated capacitors complying with clause 1 of ''Electrical Appliance and Material Safety Law''. As for clause 2 of ''Electrical Appliance and Material Safety Law'', please use ECQUL type or ECQUG type. When using these capacitors as a across-the-line capacitor, it shall be required to follow either item 1. or item 2. condition. 1. Capacitor shall be connected in parallel with varistor (Specified varistor voltage in table 1.) 2. Voltage applied for capacitor shall not exceed other than specified in table 1, when using these capacitors. Cap. Rated Voltage 125 VAC Varistor voltage 250 V Pulse voltage 250 V0–P Part No. 0.010 10.5 4.5 7.5 12.5 7.5 7.5 1.0 0.60 0.012 10.5 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.015 10.5 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.018 10.5 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.022 10.5 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.027 10.5 4.4 7.5 12.5 7.5 7.5 1.0 0.60 0.033 10.5 4.5 7.8 12.8 7.5 7.5 1.0 0.60 0.039 10.5 4.5 7.8 12.8 7.5 7.5 1.0 0.60 0.047 10.5 5.5 8.0 13.0 7.5 7.5 1.0 0.60 0.056 10.5 5.9 8.5 13.5 7.5 7.5 1.0 0.60 0.068 10.5 6.3 9.4 14.4 7.5 7.5 1.0 0.60 ECQE1A103□F( ) ECQE1A123□F( ) ECQE1A153□F( ) ECQE1A183□F( ) ECQE1A223□F( ) ECQE1A273□F( ) ECQE1A333□F( ) ECQE1A393□F( ) ECQE1A473□F( ) ECQE1A563□F( ) ECQE1A683□F( ) Cap. (µF) 1000 - 1000 500 Dimensions (mm) L max. T max. φd H max. Straight Crimped lead Straight F Crimped lead S Straight G max. 500 Min. order Q'ty Taping Standard 5 mm Odd size 5 mm Odd size 7.5 mm Bulk Metallized Film p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 39 Design, Specifications are subject to change without notice. Ask factory for technical specifications before purchase and/or use. Whenever a doubt about safety arises from this product, please inform us immediately for technical consultation without fail. - FC40 - Plastic Film Capacitors ●Rated voltage : 250 VAC, Capacitance tolerance : ±5 %(J), ±10 %(K) Noise suppression Capacitors (Across-the-line) Style D:0.010 µF to 0.047 µF Style B:0.056 µF to 0.47 µF Table 1 ❈Please consult us about Crimed lead type of 0.56 µF to 2.2 µF. Notice for AC rated AC rated capacitors complying with clause 1 of ''Electrical Appliance and Material Safety Law''. As for clause 2 of ''Electrical Appliance and Material Safety Law'', please use ECQUL type or ECQUG type. When using these capacitors as a across-the-line capacitor, it shall be required to follow either item 1. or item 2. condition. 1. Capacitor shall be connected in parallel with varistor (Specified varistor voltage in table 1.) 2. Voltage applied for capacitor shall not exceed other than specified in table 1, when using these capacitors. Cap. Rated Voltage 250 VAC Varistor voltage 470 V Pulse voltage 630 V0–P Suffix for lead crimped or taped type. Cap. tol. code MF( ) Part No. 0.010 12.5 5.5 10.8 15.8 10.0 10.0 1.0 0.60 0.012 12.5 6.0 11.5 16.5 10.0 10.0 1.0 0.60 0.015 12.5 6.3 9.9 14.9 10.0 10.0 1.0 0.60 0.018 12.5 6.0 11.9 16.9 10.0 10.0 1.0 0.60 0.022 12.5 6.0 11.5 16.5 10.0 10.0 1.0 0.60 0.027 12.5 5.5 10.9 15.9 10.0 10.0 1.0 0.60 0.033 12.5 6.0 11.9 16.9 10.0 10.0 1.0 0.60 0.039 12.5 6.0 13.4 18.4 10.0 10.0 1.0 0.60 0.047 12.5 6.5 14.4 19.4 10.0 10.0 1.0 0.60 0.056 18.5 5.4 10.5 15.5 15.0 10.0 1.0 0.60 0.068 18.5 5.8 11.0 16.0 15.0 10.0 1.0 0.60 0.082 18.5 6.3 12.0 17.0 15.0 10.0 1.0 0.60 0.10 18.5 6.3 14.0 19.0 15.0 10.0 1.0 0.60 0.12 18.5 6.8 14.5 19.5 15.0 10.0 1.0 0.80 0.15 18.5 7.5 15.4 20.4 15.0 10.0 1.0 0.80 0.18 18.5 8.0 16.0 21.0 15.0 10.0 1.0 0.80 0.22 18.5 9.0 16.9 21.9 15.0 10.0 1.0 0.80 0.27 26.0 7.0 16.5 21.5 22.5 15.0 1.0 0.80 0.33 26.0 7.8 17.0 22.0 22.5 15.0 1.0 0.80 0.39 26.0 8.5 17.9 22.9 22.5 15.0 1.0 0.80 0.47 26.0 9.3 18.5 23.5 22.5 15.0 1.0 0.80 0.56 26.0 10.0 20.0 ─ 22.5 ─ 1.0 0.80 0.68 26.0 11.5 21.0 ─ 22.5 ─ 1.0 0.80 0.82 26.0 13.0 22.5 ─ 22.5 ─ 1.0 0.80 1.0 31.0 12.5 21.9 ─ 27.5 ─ 1.5 0.80 1.2 31.0 13.5 23.0 ─ 27.5 ─ 1.5 0.80 1.5 31.0 15.3 24.7 ─ 27.5 ─ 1.5 0.80 1.8 31.0 16.8 27.0 ─ 27.5 ─ 1.5 0.80 2.2 31.0 19.5 29.0 ─ 27.5 ─ 1.5 0.80 ECQE2A103□F( ) ECQE2A123□F( ) ECQE2A153□F( ) ECQE2A183□F( ) ECQE2A223□F( ) ECQE2A273□F( ) ECQE2A333□F( ) ECQE2A393□F( ) ECQE2A473□F( ) ECQE2A563□F( ) ECQE2A683□F( ) ECQE2A823□F( ) ECQE2A104□F( ) ECQE2A124□F( ) ECQE2A154□F( ) ECQE2A184□F( ) ECQE2A224□F( ) ECQE2A274□F( ) ECQE2A334□F( ) ECQE2A394□F( ) ECQE2A474□F( ) ECQE2A564P( )( ) ECQE2A684P( )( ) ECQE2A824P( )( ) ECQE2A105P( )( ) ECQE2A125P( )( ) ECQE2A155P( )( ) ECQE2A185P( )( ) ECQE2A225P( )( ) Cap. (µF) 500 1000 500 400 300 - - Dimensions (mm) L max. T max. φd H max. Straight Crimped lead Straight F Crimped lead S Straight G max. 500 Min. order Q'ty Taping Standard 5 mm Odd size 7.5 mm Bulk p Œ ¯ ¶ ‚ /P33-52 12.11.14 19:29 y [ W 40 Temperature Characteristics Frequency Characteristics 0.01 0.1 1 10 100 1000 10000 1 10 100 1000 10000 0 2 4 6 8 10 1 10 100 1000 10000 -10 -5 0 5 10 1 10 100 1000 10000 1.E+06 1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 -60 -40 -20 0 20 40 60 80 100 0 2 4 6 8 10 -60 -40 -20 0 20 40 60 80 100 -10 -5 0 5 10 -60 -40 -20 0 20 40 60 80 100 ECQE(F) Type 100VDC Series (Metallized Polyester Film) Erectrical Characteristics at 1kHz Temperature (Degree C) Capacitance change (%) Dissipation factor (%) Temperature (Degree C) at 1kHz at DC100V Temperature (Degree C) Insuration resistance (ohm) Capacitance change (%) Frequency (kHz) Frequency (kHz) Dissipation factor (%) Frequency (kHz) Impedance (ohm) 10uF 4.7uF 1.0uF 10uF 4.7uF 1.0uF 10uF 4.7uF 1.0uF 10uF 4.7uF 1.0uF 1.0uF 4.7uF 10uF 1.0uF 4.7uF 10uF Rating Voltage Capacitance Value(uF) Code dV/dt(V/us) Current(o-p) (A) 0.56 564 12.32 0.68 684 15.0 0.82 824 18.0 1.00 105 22.0 1.20 125 13.2 1.50 155 17.1 1.80 185 19.8 2.20 225 24.2 2.70 275 29.7 3.30 335 36.3 3.90 395 23.4 4.70 475 28.2 5.60 565 33.6 6.80 685 40.8 8.20 825 49.2 10.00 106 60.0 Pulse Handling Capability (dV/dt) (Max 10000cycles) Voltage Derating by Temperature Permissible Current Permissible Voltage 6 22 100VDC 11 0 20 40 60 80 100 120 -60 -40 -20 0 20 40 60 80 100 120 0.1 1 10 100 10 100 1000 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 10 100 1000 * Please consult Panasonic if your condition exceeds the above spec. ECQE(F) Type 100VDC Series (Metallized Polyester Film) Applicable Specifications Frequency (kHz) Permissible Current (Arms) Permissible Voltage (Vrms) (at sinewave) Frequency (kHz) Rated Voltage (VDC) Surface Temperature of Capacitor(Degree C) 1.0uF 2.2uF 4.7uF 10uF 1.0uF 2.2uF 4.7uF 10uF From 0.56uF to 10uF Temperature Characteristics Frequency Characteristics 0.01 0.1 1 10 100 1000 10000 1 10 100 1000 10000 100000 0 2 4 6 8 10 1 10 100 1000 10000 -10 -5 0 5 10 1 10 100 1000 10000 1.E+06 1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 -60 -40 -20 0 20 40 60 80 100 0 2 4 6 8 10 -60 -40 -20 0 20 40 60 80 100 -10 -5 0 5 10 -60 -40 -20 0 20 40 60 80 100 ECQE(F) Type 250VDC Series (Metallized Polyester Film) Erectrical Characteristics at 1kHz Temperature (Degree C) Capacitance change (%) Dissipation factor (%) Temperature (Degree C) at 1kHz at DC100V Temperature (Degree C) Insuration resistance (ohm) Capacitance change (%) Frequency (kHz) Frequency (kHz) Dissipation factor (%) Frequency (kHz) Impedance (ohm) 10uF 1.0uF 0.1uF 10uF 1.0uF 0.1uF 10uF 1.0uF 0.01uF 10uF 1.0uF 0.1uF 0.1uF 1.0uF 10uF 0.1uF 1.0uF 10uF 0.01uF 0.01uF 0.1uF 0.01uF 0.01uF 0.01uF Rating Voltage Capacitance Value(uF) Code dV/dt(V/us) Current(o-p) (A) 0.010 103 0.48 0.015 153 0.72 0.022 223 1.06 0.033 333 1.58 0.047 473 2.26 0.068 683 3.26 0.100 104 4.80 0.150 154 7.20 0.220 224 7.26 0.330 334 10.89 0.470 474 8.46 0.680 684 12.24 1.000 105 18.00 1.500 155 27.00 2.200 225 22.00 3.300 335 33.00 4.700 475 47.00 6.800 685 54.40 10.000 106 80.00 250VDC Pulse Handling Capability (dV/dt) Voltage Derating by Temperature (Max 10000cycles) 48 8 10 18 33 Permissible Current Permissible Voltage 0 50 100 150 200 250 300 -60 -40 -20 0 20 40 60 80 100 120 1 10 100 10 100 1000 0 1 2 3 4 5 10 100 1000 * Please consult Panasonic if your condition exceeds the above spec. ECQE(F) Type 250VDC Series (Metallized Polyester Film) Applicable Specifications Frequency (kHz) Permissible Current (Arms) Permissible Voltage (Vrms) (at sinewave) Frequency (kHz) Rated Voltage (VDC) Surface Temperature of Capacitor(Degree C) 1.0uF 2.2uF 4.7uF 10uF From 0.01uF to 10uF 0.47uF 0.22uF 0.10uF 0.047u 0.022u 0.01uF 0.01uF 0.022uF 0.047uF 0.10uF 0.22uF 0.47uF 1.0uF 2.2uF 4.7uF 10uF Temperature Characteristics Frequency Characteristics 0.01 0.1 1 10 100 1000 10000 1 10 100 1000 10000 100000 0 2 4 6 8 10 1 10 100 1000 10000 -10 -5 0 5 10 -60 -40 -20 0 20 40 60 80 100 -10 -5 0 5 10 1 10 100 1000 10000 1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 1.E+13 -60 -40 -20 0 20 40 60 80 100 0 2 4 6 8 10 -60 -40 -20 0 20 40 60 80 100 ECQE(F) Type 400VDC Series (Metallized Polyester Film) Erectrical Characteristics at 1kHz Temperature (Degree C) Capacitance change (%) Dissipation factor (%) Temperature (Degree C) at 1kHz at DC100V Temperature (Degree C) Insuration resistance (ohm) Capacitance change (%) Frequency (kHz) Frequency (kHz) Dissipation factor (%) Frequency (kHz) Impedance (ohm) 2.2uF 1.0uF 0.1uF 2.2uF 1.0uF 0.1uF 2.2uF 1.0uF 0.1uF 0.01uF 0.01uF 0.01uF 0.01uF 0.1uF 1.0uF 2.2uF 0.01uF 0.1uF 1.0uF 2.2uF 2.2uF 1.0uF 0.1uF 0.01uF Rating Voltage Capacitance Value(uF) Code dV/dt(V/us) Current(o-p) (A) 0.010 103 1.31 0.015 153 1.97 0.022 223 2.88 0.033 333 4.32 0.047 473 3.67 0.068 683 5.30 0.100 104 7.80 0.150 154 5.55 0.220 224 8.14 0.330 334 12.21 0.470 474 17.39 0.680 684 14.96 1.000 105 22.00 1.200 155 27.00 2.200 225 39.60 Permissible Voltage Voltage Derating by Temperature 131 Permissible Current Pulse Handling Capability (dV/dt) (Max 10000cycles) 400VDC 78 37 22 18 0 100 200 300 400 500 -60 -40 -20 0 20 40 60 80 100 120 0 0.5 1 1.5 2 2.5 3 10 100 1000 1 10 100 10 100 1000 * Please consult Panasonic if your condition exceeds the above spec. ECQE(F) Type 400VDC Series (Metallized Polyester Film) Applicable Specifications Frequency (kHz) Permissible Current (Arms) Permissible Voltage (Vrms) (at sinewave) Frequency (kHz) Rated Voltage (VDC) Surface Temperature of Capacitor(Degree C) From 0.01uF to 2.2uF 2.2uF 1.0uF 0.47uF 0.22uF 0.1uF 0.047uF 0.022uF 0.01uF 0.01uF 0.022uF 0.047uF 0.1uF 0.22uF 0.47uF 1.0uF 2.2uF Temperature Characteristics Frequency Characteristics 0.01 0.1 1 10 100 1000 10000 1 10 100 1000 10000 100000 0 2 4 6 8 10 1 10 100 1000 10000 -10 -5 0 5 10 1 10 100 1000 10000 1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 1.E+13 -60 -40 -20 0 20 40 60 80 100 0 2 4 6 8 10 -60 -40 -20 0 20 40 60 80 100 -10 -5 0 5 10 -60 -40 -20 0 20 40 60 80 100 ECQE(F) Type 630VDC Series (Metallized Polyester Film) Erectrical Characteristics at 1kHz Temperature (Degree C) Capacitance change (%) Dissipation factor (%) Temperature (Degree C) at 1kHz at DC100V Temperature (Degree C) Insuration resistance (ohm) Capacitance change (%) Frequency (kHz) Frequency (kHz) Dissipation factor (%) Frequency (kHz) Impedance (ohm) 2.2uF 1.0uF 0.1uF 2.2uF 1.0uF 0.1uF 1.0uF 0.1uF 0.01uF 0.01uF 0.01uF 0.01uF 0.1uF 1.0uF 2.2uF 0.01uF 0.1uF 1.0uF 2.2uF 2.2uF 1.0uF 0.1uF 0.01uF 2.2uF Rating Voltage Capacitance Value(uF) Code dV/dt(V/us) Current(o-p) (A) 0.010 103 2.73 0.015 153 4.10 0.022 223 6.01 0.033 333 9.01 0.047 473 12.83 0.068 683 7.89 0.100 104 11.60 0.150 154 17.40 0.220 224 25.52 0.330 334 20.79 0.470 474 29.61 0.680 684 42.84 1.000 105 48.00 1.500 155 72.00 2.200 225 105.60 (Max 10000cycles) 273 Voltage Derating by Temperature 630VDC Permissible Current Permissible Voltage 116 63 48 Pulse Handling Capability (dV/dt) 0 100 200 300 400 500 600 700 800 -60 -40 -20 0 20 40 60 80 100 120 1 10 100 10 100 1000 0 1 2 3 4 5 10 100 1000 * Please consult Panasonic if your condition exceeds the above spec. ECQE(F) Type 630VDC Series (Metallized Polyester Film) Applicable Specifications Frequency (kHz) Permissible Current (Arms) Permissible Voltage (Vrms) (at sinewave) Frequency (kHz) Rated Voltage (VDC) Surface Temperature of Capacitor(Degree C) From 0.01uF to 2.2uF 2.2uF 1.0uF 0.47uF 0.22uF 0.1uF 0.047uF 0.022uF 0.01uF 0.01uF 0.022uF 0.047uF 0.1uF 0.22uF 0.47uF 1.0uF 2.2uF Temperature Characteristics Frequency Characteristics 0.01 0.1 1 10 100 1000 10000 1 10 100 1000 10000 100000 0 2 4 6 8 10 1 10 100 1000 10000 -10 -5 0 5 10 1 10 100 1000 10000 1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 1.E+13 -60 -40 -20 0 20 40 60 80 100 0 2 4 6 8 10 -10 -5 0 5 10 -60 -40 -20 0 20 40 60 80 100 ECQE(F) Type 125VAC Series (Metallized Polyester Film) Erectrical Characteristics at 1kHz Temperature (Degree C) Capacitance change (%) Dissipation factor (%) Temperature (Degree C) at 1kHz at DC100V Temperature (Degree C) Insuration resistance (ohm) Capacitance change (%) Frequency (kHz) Frequency (kHz) Dissipation factor (%) Frequency (kHz) Impedance (ohm) 0.47uF 0.1uF 0.047uF 0.47uF 0.1uF 0.047uF 0.47uF 0.1uF 0.01uF 0.47uF 0.1uF 0.047uF 0.047uF 0.1uF 0.47uF 0.047uF 0.1uF 0.47uF 0.01uF 0.01uF 0.047uF 0.01uF 0.01uF 0.01uF Temperature Characteristics Frequency Characteristics 0.01 0.1 1 10 100 1000 10000 1 10 100 1000 10000 100000 0 2 4 6 8 10 1 10 100 1000 10000 -10 -5 0 5 10 1 10 100 1000 10000 1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 1.E+13 -60 -40 -20 0 20 40 60 80 100 0 2 4 6 8 10 -60 -40 -20 0 20 40 60 80 100 -10 -5 0 5 10 -60 -40 -20 0 20 40 60 80 100 ECQE(F) Type 250VAC Series (Metallized Polyester Film) Erectrical Characteristics at 1kHz Temperature (Degree C) Capacitance change (%) Dissipation factor (%) Temperature (Degree C) at 1kHz at DC100V Temperature (Degree C) Insuration resistance (ohm) Capacitance change (%) Frequency (kHz) Frequency (kHz) Dissipation factor (%) Frequency (kHz) Impedance (ohm) 0.47uF 0.1uF 0.047uF 0.47uF 0.1uF 0.047uF 0.47uF 0.1uF 0.01uF 0.47uF 0.1uF 0.047uF 0.047uF 0.1uF 0.47uF 0.047uF 0.1uF 0.47uF 0.01uF 0.01uF 0.047uF 0.01uF 0.01uF 0.01uF Design and specifi cations are each subject to change without notice. Ask factory for the current technical specifi cations before purchase and/or use. Should a safety concern arise regarding this product, please be sure to contact us immediately. Aluminum Electrolytic Capacitors/ FR – EEE-82 – 010 Sleeve L 14 min. 3 min. = = L16 : L±1.5 L20 : L±2.0 Pressure relief 06.3 + – 08 0D±0.5 F±0.5 0D±0.5 fd±0.05 ■ Country of origin Malaysia Radial Lead Type Series: FR Type: A ■ Specifi cations Category Temp. Range –40 °C to +105 °C Rated W.V. Range 6.3 V.DC to 100 V.DC Nominal Cap. Range 4.7 μF to 8200 μF Capacitance Tolerance ±20 % (120 Hz/+20 °C) DC Leakage Cur rent I < 0.01 CV (μA) After 2 minutes tan d W.V. 6.3 10 16 25 35 50 63 100 (120 Hz/+20 °C) tan d 0.22 0.19 0.16 0.14 0.12 0.10 0.09 0.08 Add 0.02 per 1000 μF for products of 1000 μF or more. Endurance After following life test with DC voltage and +105 °C±2 °C ripple current value applied. (The sum of DC and ripple peak voltage shall not exceed the rated working voltage) when the capacitors are restored to 20 °C, the capacitors shall meet the limits specifi ed below. Duration 05×11/ 06.3×11.2 : 5000 hours 08×11.5/ 010×12.5 : 6000 hours (✽ Only EEUFR1V331U (010×12.5) 5000 hours) 08×15/ 010×16 : 8000 hours, 08×20 : 9000 hours 010×20 to 010×25/ 012.5×20 to 012.5×35/ 016×20 to 016×25 : 10000 hours Capacitance change ±25 % of initial measured value (6.3 V to 10 V : ±30 %) tan d < 200 % of initial specifi ed value DC leakage current < initial specifi ed value Shelf Life After storage for 1000 hours at +105 °C±2 °C with no voltage applied and then being stabilized at +20 °C, capacitors shall meet the limits specifi ed in Endurance. (With voltage treatment) ■ Di men sions in mm (not to scale) W.V.(V.DC) Cap (μF) Frequency (Hz) 60 120 1 k 10 k 100 k 6.3 to 100 4.7 to 33 0.45 0.55 0.75 0.90 1.00 47 to 330 0.60 0.70 0.85 0.95 1.00 390 to 1000 0.65 0.75 0.90 0.98 1.00 1200 to 8200 0.75 0.80 0.95 1.00 1.00 ■ Frequency correction factor for ripple current Body Dia. 0D 5 6.3 8 10 12.5 16 Body Length L — — — — 12.5 to 25 30 to 35 — Lead Dia. 0d 0.5 0.5 0.6 0.6 0.6 0.8 0.8 Lead space F 2.0 2.5 3.5 5.0 5.0 7.5 ■ Features ● Low ESR (Same as FM Series) ● Endurance : 5000 h to 10000 h at +105 °C ● RoHS directive compliant ■ Attention Not applicable for automotive (Unit : mm) 06 Nov. 2014 De